HD74LV126ATELL-E [RENESAS]
LV/LV-A/LVX/H SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14, TSSOP-14;
| 型号： | HD74LV126ATELL-E |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | LV/LV-A/LVX/H SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14, TSSOP-14 栅 |
| 文件： | 总10页 (文件大小：75K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HD74LV126A
Quad. Bus Buffer Gates with 3-state Outputs
REJ03D0316–0300Z
(Previous ADE-205-259A (Z))
Rev.3.00
Jun. 03, 2004
Description
The HD74LV126A features independent line drivers with three state outputs. Each output is disabled when the
associated output enable (OE) input is low. To ensure the high impedance state during power up or power down, OE
should be connected to GND through a pull-down resistor; the minimum value of the resistor is determined by the
current souring capability of the driver. Low-voltage and high-speed operation is suitable for the battery-powered
products (e.g., notebook computers), and the low-power consumption extends the battery life.
Features
•
•
•
•
•
•
•
VCC = 2.0 V to 5.5 V operation
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)
Output current ±8 mA (@VCC = 3.0 V to 3.6 V), ±16 mA (@VCC = 4.5 V to 5.5 V)
Ordering Information
Part Name
Package Type
Package Code
Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74LV126AFPEL
HD74LV126ARPEL
HD74LV126ATELL
SOP–14 pin(JEITA)
SOP–14 pin(JEDEC)
TSSOP–14 pin
FP–14DAV
FP–14DNV
TTP–14DV
FP
RP
T
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
ELL (2,000 pcs/reel)
Note: Please consult the sales office for the above package availability.
Function Table
Inputs
Output Y
OE
A
H
L
H
H
L
H
L
X
Z
Note: H: High level
L: Low level
X: Immaterial
Z: High impedance
Rev.3.00 Jun. 03, 2004 page 1 of 9
HD74LV126A
Pin Arrangement
1
2
3
4
5
6
7
14 VCC
1OE
1A
13
12
11
10
9
4OE
4A
1Y
4Y
2OE
2A
3OE
3A
2Y
8
GND
3Y
(Top view)
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Conditions
Supply voltage range
Input voltage range*1
Output voltage range*1, 2
VCC
VI
–0.5 to 7.0
–0.5 to 7.0
–0.5 to VCC + 0.5
–0.5 to 7.0
–20
V
V
V
VO
Output: H or L
VCC: OFF or Output: Z
VI < 0
Input clamp current
IIK
IOK
IO
mA
mA
mA
mA
Output clamp current
Continuous output current
±50
VO < 0 or VO > VCC
VO = 0 to VCC
±35
Continuous current through
VCC or GND
ICC or IGND ±70
Maximum power dissipation at PT
Ta = 25°C (in still air)*3
785
mW
SOP
500
TSSOP
Storage temperature
Tstg
–65 to 150
°C
Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are
observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Rev.3.00 Jun. 03, 2004 page 2 of 9
HD74LV126A
Recommended Operating Conditions
Item
Symbol
VCC
Min
2.0
0
Max
5.5
5.5
VCC
5.5
–50
–2
Unit
V
Conditions
Supply voltage range
Input voltage range
Output voltage range
VI
V
VO
0
V
H or L
0
High impedance state
VCC = 2.0 V
Output current
IOH
—
—
—
—
—
—
—
—
0
µA
mA
VCC = 2.3 to 2.7 V
VCC = 3.0 to 3.6 V
VCC = 4.5 to 5.5 V
VCC = 2.0 V
–8
–16
50
IOL
µA
2
mA
VCC = 2.3 to 2.7 V
VCC = 3.0 to 3.6 V
VCC = 4.5 to 5.5 V
VCC = 2.3 to 2.7 V
VCC = 3.0 to 3.6 V
8
16
Input transition rise or fall rate
Operating free-air temperature
∆t /∆v
200
100
20
ns/V
°C
0
0
VCC = 4.5 to 5.5 V
Ta
–40
85
Note: Unused or floating inputs must be held high or low.
Logic Diagram
1
1OE
2
3
6
1A
1Y
2Y
3Y
4Y
4
2OE
5
2A
10
3OE
8
9
3A
13
4OE
12
11
4A
Rev.3.00 Jun. 03, 2004 page 3 of 9
HD74LV126A
DC Electrical Characteristics
Ta = –40 to 85°C
Unit Test Conditions
V
Item
Symbol
V
CC (V)*
Min
Typ Max
Input voltage
VIH
2.0
1.5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0.5
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
2.0
V
V
V
CC × 0.7
CC × 0.7
CC × 0.7
VIL
—
—
—
—
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
V
V
V
CC × 0.3
CC × 0.3
CC × 0.3
Output voltage
VOH
Min to Max VCC – 0.1
—
V
IOH = –50 µA
IOH = –2 mA
IOH = –8 mA
IOH = –16 mA
IOL = 50 µA
2.3
2.0
2.48
3.8
—
—
3.0
—
4.5
—
VOL
Min to Max
2.3
0.1
0.4
0.44
0.55
±1
—
IOL = 2 mA
3.0
—
IOL = 8 mA
4.5
—
IOL = 16 mA
VI = 5.5 V or GND
VO = VCC or GND
Input current
IIN
0 to 5.5
5.5
—
µA
µA
Off-state output
current
IOZ
—
±5
Quiescent supply
current
ICC
5.5
0
—
—
—
—
—
3
20
5
µA
µA
pF
VI = VCC or GND, IO = 0
VI or VO = 0 V to 5.5 V
VI = VCC or GND
Output leakage
current
IOFF
Input capacitance
CIN
3.3
—
Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions.
Rev.3.00 Jun. 03, 2004 page 4 of 9
HD74LV126A
Switching Characteristics
VCC = 2.5 ± 0.2 V
TO
Ta = 25°C
Ta = –40 to 85°C
Test
FROM
(Input)
Item
Symbol
Unit Conditions
(Output)
Min Typ Max Min
Max
15.5
18.5
15.5
18.5
17.0
20.5
Propagation
delay time
tPLH
tPHL
—
—
—
—
—
—
7.1
9.2
7.4
9.5
5.7
8.1
13.0 1.0
16.5 1.0
13.0 1.0
16.5 1.0
14.7 1.0
18.2 1.0
ns
ns
ns
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
A
Y
Y
Y
Enable time
tZH
tZL
OE
OE
Disable time
tHZ
tLZ
VCC = 3.3 ± 0.3 V
TO
Ta = 25°C
Ta = –40 to 85°C
Test
FROM
(Input)
Item
Symbol
Unit Conditions
(Output)
Min Typ Max Min
Max
9.5
Propagation
delay time
tPLH
tPHL
—
—
—
—
—
—
5.0
6.4
5.1
6.6
4.4
6.1
8.0
11.5 1.0
8.0 1.0
11.5 1.0
9.7 1.0
13.2 1.0
1.0
ns
ns
ns
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
A
Y
Y
Y
13.0
9.5
Enable time
tZH
tZL
OE
OE
13.0
11.5
15.0
Disable time
tHZ
tLZ
VCC = 5.0 ± 0.5 V
TO
Ta = 25°C
Ta = –40 to 85°C
Test
FROM
(Input)
Item
Symbol
Unit Conditions
(Output)
Min Typ Max Min
Max
6.5
Propagation
delay time
tPLH
tPHL
—
—
—
—
—
—
3.5
4.6
3.6
4.6
3.3
4.3
5.5
7.5
5.1
7.1
6.8
8.8
1.0
1.0
1.0
1.0
1.0
1.0
ns
ns
ns
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
A
Y
Y
Y
8.5
Enable time
tZH
tZL
6.0
OE
OE
8.0
Disable time
tHZ
tLZ
8.0
10.0
Output-skew Characteristics
Ta = 25°C
Ta = –40 to 85°C
Item
Symbol
VCC = (V)
Unit
Min
—
Max
2.0
1.5
1.0
Min
—
Max
Output skew
tsk (O)
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
2.0
1.5
1.0
ns
—
—
—
—
Note: Skew between any outputs of the same package switching in the same direction. This parameter is warranted
but not production tested.
Operating Characteristics
CL = 50 pF
Ta = 25°C
Item
Symbol
V
CC = (V)
Unit
Test Conditions
Min
—
Typ
14.4
15.9
Max
—
Power dissipation capacitance CPD
3.3
5.0
pF
f = 10 MHz
—
—
Rev.3.00 Jun. 03, 2004 page 5 of 9
HD74LV126A
Noise Characteristics
CL = 50 pF
Test Conditions
Ta = 25°C
Min
Item
Symbol
VCC = (V)
Unit
Typ
Max
Quiet output, maximum
dynamic VOL
VOL (P)
3.3
—
0.3
0.8
V
Quiet output, minimum
dynamic VOL
VOL (V)
VOH (V)
VIH (D)
VIL (D)
3.3
3.3
3.3
3.3
—
–0.2
3.1
—
–0.8
—
V
V
V
V
Quiet output, minimum
dynamic VOH
—
High-level dynamic input
voltage
2.31
—
—
Low-level dynamic input
voltage
—
0.99
Test Circuit
VCC
VCC
Input
Output
Pulse Generator
1 kΩ
S1
OPEN
*1 See under table
GND
ZOUT = 50 Ω
CL=
15 or 50 pF
TEST
S1
OPEN
GND
VCC
tPLH/tPHL
tZH/tHZ
tZL /tLZ
Note: 1. CL includes probe and jig capacitance.
Rev.3.00 Jun. 03, 2004 page 6 of 9
HD74LV126A
tr
tf
•
Waveform
Input A
− 1
VCC
90 %
50 %VCC
90 %
50 %VCC
10 %
10 %
GND
tPHL
tPLH
VOH
50 %VCC
50 %VCC
Output Y
VOL
tr
tf
•
Waveform − 2
VCC
90 %
90 %
50 %VCC
50 %VCC
10 %
10 %
tLZ
Input OE
GND
VCC
tZL
Waveform
−
A
B
50 %VCC
V
OL + 0.3 V
VOL
VOH
tZH
tHZ
VOH− 0.3 V
50 %VCC
GND
Waveform
Notes:
−
1. tr ≤ 3 ns, tf ≤ 3 ns
2. Input waveform: PRR ≤ 1 MHz, duty cycle 50%
3. Waveform−A is for an output with internal conditions such that the output is low except when
disabled by the output control.
4. Waveform−B is for an output with internal conditions such that the output is high except when
disabled by the output control.
Rev.3.00 Jun. 03, 2004 page 7 of 9
HD74LV126A
Package Dimensions
As of January, 2003
Unit: mm
10.06
10.5 Max
8
14
1
7
+ 0.20
7.80
– 0.30
1.42 Max
1.15
0˚ – 8˚
1.27
0.70 ± 0.20
*0.40 ± 0.06
0.15
M
0.12
Package Code
JEDEC
FP-14DAV
—
JEITA
Mass (reference value)
Conforms
0.23 g
*Ni/Pd/Au plating
As of January, 2003
Unit: mm
8.65
9.05 Max
8
14
1
7
+ 0.10
6.10
– 0.30
0.635 Max
1.08
0˚ – 8˚
+ 0.67
1.27
0.60
– 0.20
*0.40 ± 0.06
0.15
M
0.25
Package Code
JEDEC
JEITA
FP-14DNV
Conforms
Conforms
0.13 g
*Ni/Pd/Au plating
Mass (reference value)
Rev.3.00 Jun. 03, 2004 page 8 of 9
HD74LV126A
As of January, 2003
Unit: mm
5.00
5.30 Max
14
8
1
7
0.65
1.0
*0.20 ± 0.05
0.13 M
6.40 ± 0.20
0.83 Max
0˚ – 8˚
0.50 ± 0.10
0.10
Package Code
JEDEC
TTP-14DV
—
JEITA
—
*Ni/Pd/Au plating
Mass (reference value)
0.05 g
Rev.3.00 Jun. 03, 2004 page 9 of 9
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