HS9-1840RH/883S [RENESAS]
16-CHANNEL, SGL ENDED MULTIPLEXER, CDFP28;
| 型号： | HS9-1840RH/883S |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | 16-CHANNEL, SGL ENDED MULTIPLEXER, CDFP28 CD |
| 文件： | 总11页 (文件大小：743K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
HS-1840RH/883S
Rad-Hard 16 Channel CMOS Analog
Multiplexer with High-Z Analog Input Protection
September 1
Features
Pinouts
HS1-1840RH/883S 28 PIN CERAMIC SIDEBRAZE DIP
CASE OUTLINE D-10,COMPLIANT TO MIL-M-38510 PACKAGE
TOP VIEW
• This Circuit is Processed in Accordance to
Mil-Std-883 and is Fully Conformant Under the
Provisions of Paragraph 1.2.1.
• Radiation Environment
+VS
NC
1
2
3
4
5
6
7
8
9
28 OUT
27 -VS
26 IN 8
25 IN 7
24 IN 6
23 IN 5
22 IN 4
21 IN 3
- Gamma Rate
1 x 108 RAD(Si)/s
(γ)
- Gamma Dose (γ) 2 x 105 RAD(Si)
NC
• Low Power Consumption
IN 16
IN 15
IN 14
IN 13
IN 12
IN 11
• Fast Access Time 1000ns
• High Analog Input Impedance 500MΩ
During Power Loss (Open)
• Dielectrically Isolated Device Islands
• Excellent In Hi-Rel Redundant Systems
• Break-Before-Make Switching
• No Latch-Up
20
IN 2
IN 10 10
IN 9 11
19 IN 1
18 ENABLE
17 ADDR A0
16 ADDR A1
15 ADDR A2
GND 12
(+5VS) VREF 13
ADDR A3 14
Description
The HS-1840RH/883S is
a radiation hardened,
monolithic 16 channel multiplexer constructed with the
Intersil Linear Dielectric Isolation CMOS process. It is
designed to provide a high input impedance to the
analog source if device power fails (open) or the
analog signal voltage inadvertently exceeds the supply
rails during powered operation. Excellent for use in
redundant applications, since the secondary device
can be operated in a standby unpowered mode
affording no additional power drain. More significantly,
a very high impedance exists between the active and
inactive devices preventing any interaction. One of
sixteen channel selection is controlled by a 4-bit binary
address plus an Enable-Inhibit input which conve-
niently controls the ON/OFF operation of several
multiplexers in a system. All digital inputs have
electrostatic discharge protection.
HS9-1840RH/883S 28 PIN CERAMIC SIDEBRAZE FLATPACK
CASE OUTLINE F-11A, COMPLIANT TO MIL-M-38510 PACKAGE
TOP VIEW
+VS
NC
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
OUT
2
-VS
NC
IN 8
3
IN 16
IN 7
4
IN 15
IN 6
5
IN 14
IN 5
6
IN 13
IN 4
7
IN 12
IN 3
8
IN 11
IN 2
9
IN 10
The HS-1840RH/883S has been specifically designed
to meet exposure to radiation environments. It is
available in a 28 pin Ceramic Sidebraze dual-in-line
package and 28 pin Ceramic Flatpack. It is guaranteed
operational from -55oC to +125oC.
IN 1
10
11
12
13
14
IN 9
ENABLE
ADDR A0
ADDR A1
ADDR A2
GND
(+5VS) VREF
ADDR A3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
File Number 3022.1
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
1
HS-1840RH/883S
Functional Diagram
IN 1
A0
1
P
A1
A2
A3
DIGITAL
ADDRESS
OUT
16
P
EN
IN 16
ADDRESS INPUT
DECODERS
MULTIPLEX
SWITCHES
BUFFER AND
LEVEL SHIFTER
Truth Table
A3
A2
X
L
A1
X
L
A0
X
L
EN
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
“ON” CHANNEL
X
L
None
1
L
L
L
H
L
2
L
L
H
H
L
3
L
L
H
L
4
L
H
H
H
H
L
5
L
L
H
L
6
L
H
H
L
7
L
H
L
8
H
H
H
H
H
H
H
H
9
L
L
H
L
10
11
12
13
14
15
16
L
H
H
L
L
H
L
H
H
H
H
L
H
L
H
H
H
2
Specifications HS-1840RH/883S
Absolute Maximum Ratings
Reliability Information
Supply Voltage Between Pins 1 and 27 . . . . . . . . . . . . . . . . . . +40V
+VSUPPLY to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +20V
-VSUPPLY to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-20V
Thermal Resistance . . . . . . . . . . . . . . . . . .
θ
θ
JC
JA
Sidebraze Package . . . . . . . . . . . . . . . . . 83.1oC/W 19.1oC/W
Flatpack Package . . . . . . . . . . . . . . . . . . 49.1oC/W 16.5oC/W
VREF to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +20V Total Power Dissipation*:
Analog input Overvoltage:
+VS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+25V (Power On/Off)
Sidebraze DIP Package . . . . . . . . . . . . . . . . . . . . . . . . . 1600mW
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . 1400mW
-VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25V (Power On) ESD Classification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Digital Input Overvoltage:
* For DIP Derate 20.4mW/oC above TA = +95oC
+VEN, +VA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VREF +4V
For Flatpack Derate 18.5mW/oC above TA = +95oC
-VEN, -VA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND -4V
Storage Temperature Range . . . . . . . . . . . . . . . . . -65oC to +150oC
Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
Lead Temperature (Soldering 10s). . . . . . . . . . . . . . . . . . . . . .+275o
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Operating Supply Voltage (±VSUPPLY) . . . . . . . . . . . . . . . . . . . ±15V
Operating Temperature Range. . . . . . . . . . . . . . . . -55oC to +125oC
VREF (Pin 13) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V
Logic Low Level (VAL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.8V
Logic High Level (VAH). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.0V
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Guaranteed and 100% Tested. Unless Otherwise Specified: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.0V, VAL = 0.8V
LIMITS
GROUP A
PARAMETER
SYMBOL
CONDITIONS
SUBGROUPS TEMPERATURE
MIN
MAX
UNITS
Analog Signal Range
VS
7, 8A, 8B
1, 2, 3
-55oC, +25oC,
+125oC
-5
+15
V
Input Leakage
Current, Address, or
Enable Pins
IAH
IAL
Measure Inputs Sequentially
Ground All Unused Pins
VAL = 0.8V, VAH = 4.0V
-55oC, +25oC,
+125oC
-1000 1000
nA
Leakage Current Into
the Source Terminal of
an “Off” Switch
+IS(OFF)
-IS(OFF)
VS = +10V, All Unused Inputs
and Output = -10V, VEN = 4V
1
2, 3
1
+25oC
+125oC,-55oC
+25oC
-10
-100
-10
10
100
10
nA
nA
nA
nA
nA
nA
VS = -10V, All Unused Inputs,
Output = +10V, VEN = 4V
2, 3
1
+125oC, -55oC
+25oC
-100
-50
100
50
Leakage Current into
the Source Terminal of
an “Off” Switch With
Power “Off”
+IS(OFF)
Power Off
V+, V-, VREF, A0, A1, A2, A3,A4,
EN = GND, Unused Inputs Tied to
GND, VS = +25V
2, 3
+125oC, -55oC
-100
100
Leakage Current Into
the Source Terminal of
an “Off” Switch With
Overvoltage Applied
+IS(OFF)
VS = +25V, VD = 0V, VEN = 4V
1, 2, 3
1, 2, 3
-55oC, +25oC,
+125oC
-1000 1000
-1000 1000
nA
nA
Overvoltage All Unused Inputs Tied to GND
-IS(OFF) VS = -25V, VD = 0V, VEN = 4V All
Overvoltage Unused Inputs Tied to GND
-55oC, +25oC,
+125oC
Leakage Current Into
the Drain Terminal of
an “Off” Switch
+ID(OFF)
-ID(OFF)
+ID(OFF)
VD = +10V, VEN = 4V All Unused
Inputs = -10V
1
2, 3
1
+25oC
+125oC, -55oC
+25oC
-10
-100
-10
10
100
10
nA
nA
nA
nA
nA
VD = -10V, VEN = 4V All Unused
Inputs = +10V
2, 3
1, 2, 3
+125oC, -55oC
-100
100
Leakage Current Into
the Drain Terminal of
an “Off” Switch With
Overvoltage Applied
VS = +25V, Measure VD,
-55oC, +25oC,
+125oC
-1000 1000
-1000 1000
Overvoltage VEN = 4V, All Unused Inputs to
GND
-ID(OFF)
VS = -25V, Measure VD,
1, 2, 3
-55oC, +25oC,
+125oC
nA
Overvoltage All Unused Inputs to GND
3
Specifications HS-1840RH/883S
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
Device Guaranteed and 100% Tested. Unless Otherwise Specified: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.0V, VAL = 0.8V
LIMITS
GROUP A
PARAMETER
SYMBOL
CONDITIONS
SUBGROUPS TEMPERATURE
MIN
-10
MAX
10
UNITS
nA
Leakage Current from
an “On” Driver into the
Switch (Drain & Source)
+ID(ON)
VS = +10V, VD = +10V, VEN =
0.8V All unused inputs = -10V
1
2, 3
1
+25oC
+125oC, -55oC
+25oC
-100
-10
100
10
nA
-ID(ON)
VS = -10V, VD = -10V, VEN =
0.8V, All Unused Inputs = +10V
nA
2, 3
1, 2, 3
+125oC, -55oC
-100
50
100
1000
nA
Switch On Resistance
+15V R(ON) VS = +15V, ID = -1mA,
VEN = 0.8V
-55oC, +25oC,
+125oC
Ω
-5V R(ON)
VS = -5V, ID = +1mA, VEN = 0.8V
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
-55oC, +25oC,
+125oC
50
50
-
4000
2500
0.5
-
Ω
+5V R(ON) VS = +5V, ID = -1mA, VEN = 0.8V
-55oC, +25oC,
+125oC
Ω
Positive Supply
Current
I(+)
I(-)
VEN = 0.8V
VEN = 0.8V
VEN = 4.0V
VEN = 4.0V
-55oC, +25oC,
+125oC
mA
mA
mA
mA
Negative Supply
Current
-55oC, +25oC,
+125oC
-0.5
-
Positive Standby
Supply Current
+ISBY
-ISBY
-55oC, +25oC,
+125oC
0.5
-
Negative Standby
Supply Current
-55oC, +25oC,
+125oC
-0.5
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Guaranteed and 100% Tested. Unless Otherwise Specified: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.0V, VAL = 0.8V
LIMITS
GROUP A
PARAMETER
SYMBOL
CONDITIONS
SUBGROUPS TEMPERATURE
MIN
MAX
-
UNITS
ns
Break-Before-Make
Time Delay
TD
RL = 1000Ω, CL = 50pF
9
+25oC
+125oC, -55oC
+25oC
25
5
-
10, 11
9
-
ns
Propagation Delay
Times: Address Inputs
to I/O Channels
TON(A),
TOFF(A)
RL = 10KΩ,CL = 50pF
RL = 1000Ω, CL = 50pF
600
1000
ns
10, 11
+125oC, -55oC
-
ns
Enable to I/O
TON(EN),
TOFF(EN)
9
+25oC
-
-
600
ns
ns
10, 11
+125oC, -55oC
1000
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Characterized At: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.0V, VAL = 0.8V, Unless Otherwise Specified
LIMITS
PARAMETER
SYMBOL
CONDITIONS
NOTE
TEMPERATURE
MIN
MAX
UNITS
Capacitance Address
Input
CA
+VS = -VS = 0V, f = 1MHz
1
+25oC
-
7
pF
Capacitance Channel
Input
CS(OFF)
+VS = -VS = 0V, f = 1MHz
+VS = -VS = 0V, f = 1MHz
1
1
1
+25oC
+25oC
+25oC
-
-
5
50
-
pF
pF
dB
Capacitance Channel
Output
CD(OFF)
TOFF(EN)
Off Isolation
VISO
VEN = 4.0V, f = 200kHz, CL = 7pF,
45
RL = 1kΩ, VS = 3.0VRMS
NOTE: 1. The parameters listed in Table 3 are controlled via design or process parameters and not directly tested. These parameters are
characterized upon initial design and after major process and/or design changes.
4
Specifications HS-1840RH/883S
TABLE 4. POST 200K RAD(Si) ELECTRICAL CHARACTERISTICS
Tested, per Mil-Std-883. Unless Otherwise Specified: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.5V, VAL = 0.5V
LIMITS
MIN MAX
-1000 1000
GROUP A
SUBGROUPS TEMPERATURE
PARAMETER
SYMBOL
CONDITIONS
UNITS
Input Leakage Current,
Address, or Enable Pins
IAH
IAL
Measure Inputs Sequentially,
Ground All Unused Pins
1
1
1
1
+25oC
+25oC
+25oC
+25oC
nA
Leakage Current Into
the Source Terminal of
an “Off” Switch
+IS(OFF)
VS = +10V, All Unused Inputs &
Output = -10V, VEN = 4.5V
-100
-100
-100
100
100
100
nA
nA
nA
-IS(OFF)
VS = -10V, All Unused Inputs &
Output = +10V, VEN = 4.5V
Leakage Current into
the Source Terminal of
an “Off” Switch With
Power “Off”
+IS(OFF)
Power Off
V+, V-, VREF, A0, A1, A2, A3, A4,
EN = GND, Unused Inputs Tied to
GND, VS = +25V
Leakage Current Into
the Source Terminal of Overvoltage All Unused Inputs Tied to GND
an “Off” Switch With
+IS(OFF)
VS = +25V, VD=0V, VEN=4.5V
1
1
1
1
1
+25oC
+25oC
+25oC
+25oC
+25oC
-1500 1500
-1500 1500
nA
nA
nA
nA
nA
-IS(OFF)
VS = -25V, VD=0V, VEN=4.5V
Overvoltage Applied
Overvoltage All Unused Inputs Tied to GND
Leakage Current Into
the Drain Terminal of
an “Off” Switch
+ID(OFF)
-ID(OFF)
+ID(OFF)
VD = +10V, VEN = 4.5V
All Unused Inputs = -10V
-100
-100
100
100
VD = -10V, VEN = 4.5V
All Unused Inputs = +10V
Leakage Current Into
the Drain Terminal of
an “Off” Switch With
Overvoltage Applied
VS = +25V, Measure VD,
-1000 1000
-1000 1000
Overvoltage VEN = 4.5V
All Unused Inputs to GND
-ID(OFF)
VS = -25V, Measure VD,
Overvoltage VEN = 4.5V
All Unused Inputs to GND
1
1
1
+25oC
+25oC
+25oC
nA
nA
nA
Leakage Current from
an “On” Driver into the
Switch (Drain & Source)
+ID(ON)
-ID(ON)
VS = +10V, VD = +10V,
VEN = 0.5V
All Unused Inputs = -10V
-100
-100
100
100
VS = -10V, VD = -10V,
VEN = 0.5V
All Unused Inputs = +10V
Switch On Resistance
+15V R(ON) VS = +15V, ID = -1mA, VEN = 0.5V
-5V R(ON) VS = -5V, ID = +1mA, VEN = 0.5V
+5V R(ON) VS = +5V, ID = -1mA, VEN = 0.5V
1
1
1
1
+25oC
+25oC
+25oC
+25oC
50
50
50
-
1000
4000
2500
0.50
Ω
Ω
Ω
Positive Supply
Current
I(+)
VEN = 0.5V
mA
Negative Supply
Current
I(-)
VEN = 0.5V
1
1
1
9
9
+25oC
+25oC
+25oC
+25oC
+25oC
-0.50
-
0.50
-
mA
mA
mA
ns
Positive Standby
Supply Current
+I(SBY)
-I(SBY)
TD
VEN = 4.5V
-
Negative Standby
Supply Current
VEN = 4.5V
-0.50
Make-Before-Break
Time Delay
RL = 1000Ω, CL = 50pf
RL = 10KΩ, CL = 50pf
5
-
-
Propagation Delay
Times: Adress Inputs
to I/O Channels
TON (A)
TOFF (A)
3000
ns
Enable to I/O
TON (EN)
RL = 1000Ω, CL = 50pf
9
+25oC
-
3000
ns
TOFF (EN)
5
Specifications HS-1840RH/883S
TABLE 5. DC POST BURN-IN DELTA ELECTRICAL CHARACTERISTICS
Guaranteed, per Mil-Std-883, Method 1019. Unless Otherwise Specified: V- = -15V, V+ = +15V, VREF = +5V, VAH = +4.0V, VAL = 0.8V
LIMITS
GROUP A
PARAMETER
SYMBOL
CONDITIONS
SUBGROUPS TEMPERATURE
MIN
MAX
UNITS
Input Leakage Current,
Address, or Enable
Pins
IAH
IAL
Measure Inputs Sequentially,
Ground All Unused Pins
1
+25oC
-100
100
nA
Leakage Current Into
the Source Terminal of
an “Off” Switch
+IS(OFF)
-IS(OFF)
+ID(OFF)
-ID(OFF)
+ ID(ON)
VS = +10V, All Unused Inputs &
Output = -10V, VEN = 4.0V
1
1
1
1
1
+25oC
+25oC
+25oC
+25oC
+25oC
-20
-20
-20
-20
-20
20
20
20
20
20
nA
nA
nA
nA
nA
VS = -10V, All Unused Inputs &
Output = +10V, VEN = 4.0V
Leakage Current Into
the Drain Terminal of
an “Off” Switch
VD = +10V, VEN = 4.0V
All Unused Inputs = -10V
VD = -10V, VEN = 4.0V
All Unused Inputs = +10V
Leakage Current from
an “On” Driver into the
Switch (Drain & Source)
VS = +10V, VD = +10V,
VEN = 0.8V
All Unused Inputs = -10V
-ID(ON)
VS = -10V, VD = -10V,
VEN = 0.8V
1
+25oC
-20
20
nA
All Unused Inputs = +10V
Switch On Resistance
+15V R(ON) VS = +15V, ID = -1mA,
VEN = 0.8V
1
1
1
1
1
1
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
-150
-250
-50
150
250
50
Ω
-5V R(ON)
VS = -5V, ID = +1mA,
VEN = 0.8V
Ω
Positive Supply
Current
I(+)
VEN = 0.8V
VEN = 0.8V
VEN = 4.0V
VEN = 4.0V
µA
µA
µA
µA
Negative Supply
Current
I(-)
-50
50
Positive Standby
Supply Current
+ISBY
-ISBY
-50
50
Negative Standby
Supply Current
-50
50
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
METHOD
100%/5004
Q SUBGROUPS
Initial Test
Interim Test
PDA
1
100%/5004
1
100%/5004
1
Final Test
Group A
100%/5004
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Samples/5005
Samples/5005
Samples/5005
Samples/5005
Samples/5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Group B
B5
1, 2, 3
1, 7
Others
Group D
1, 7
Group E, Subgroup 2
1, 7
6
HS-1840RH/883S
Performance Characteristics and Test Circuits
ACCESS TIME vs. LOGIC LEVEL (HIGH)
4.0V
15V, 0V
A3
A2
A1
A0
IN 1
50%
IN 2 -
IN 15
VA
0.8V
50Ω
VA
0V, 15V
VOUT
IN 16
EN
0.8V
GND
VOUT
50pF
10K
50%
ta
0V
BREAK-BEFORE-MAKE DELAY (tOPEN)
4.0V
+5V
A3
A2
A1
A0
IN 1
IN 2 -
IN 15
VA
50Ω
0.8V
VA
IN 16
OUT
VOUT
VOUT
EN
0.8V
GND
50%
50%
1K
50pF
tOPEN
ENABLE DELAY (tON(EN), tOFF(EN))
4.0V
VA
+10V
A3
A2
A1
A0
IN 1
0.8V
IN 2 -
IN 16
OUTPUT
10%
VOUT
EN
90%
1K
50pF
VA
50Ω
VOUT
tON(EN)
tOFF(EN)
7
HS-1840RH/883S
Burn-In/Life Test Circuits
R
R
+VS
+VS
-VS
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
-VS
2
R
R
3
R
R
4
5
6
4
5
6
7
8
9
10
11
12
13
14
7
8
9
10
11
F5
GND
GND
F4
12
13
14
F1
F2
VR
F3
R
DYNAMIC BURN-IN AND LIFE TEST CIRCUIT
STATIC BURN-IN TEST CIRCUIT
NOTES:
NOTES:
R = 1kΩ ± 5%, 1/4W
VS+ = +15.5V ± 0.5V, VS- = -15.5V ± 0.5V
R = 1kΩ ± 5%
C1 = C2 = 0.01µF minimum, 1 each per socket, minimum
VS+ = 15.5V ± 0.5V, VS- = -15.5V ± 0.5V, VR = 15.5 ± 0.5V
C1 = C2 = 0.01µF ± 10%, 1 each per socket, minimum
D1 = D2 = 1N4002, 1 each per board, minimum
Input Signals: square wave, 50% duty cycle, 0V to 15V peak ± 10%
F1 = 100kHz; F2 = F1/2; F3 = F1/4; F4 = F1/8; F5 = F1/16
NOTES:
1. The Above Test Circuits are Utilized for All Package Types
2. The Dynamic Test Circuit is Utilized for All Life Testing
Irradiation Circuit
28 PIN DIP
+15V
1
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
-15V
NC
NC
1KΩ
3
+1V
4
5
6
7
8
9
10
11
12
13
14
+5V
NOTE: All irradiation testing is performed in the 28 pin DIP package
8
HS-1840RH/883S
Schematic Diagrams
ADDRESS INPUT BUFFER AND LEVEL SHIFTER
V
REF
LEVEL SHIFTER
V+
P
P
P
P
P
P
P
P
P
LEVEL
SHIFTED
ADDRESS
TO
OVERVOLTAGE
PROTECTION
R2
P
N
R5
R6
R7
DECODE
V
REF
LEVEL
R3
R4
SHIFTED
ADDRESS
TO
R8
D2
R1
N
N
N
N
N
N
N
N
N
ADD
IN.
DECODE
200Ω
D1
V-
ADDRESS DECODER
MULTIPLEX SWITCH
V+
+V
P
P
P
P
P
TO
SWITCH
N
N
N
N
N
P
N
P
N
IN
A0 OR A0
S
D
P
FROM
DECODE
A1 OR A1
A2 OR A2
OUT
A3 OR A3
ENABLE
V-
V-
9
HS-1840RH/883S
Intersil - Space Level Product Flow
SEM - Traceable to Diffusion Method 2018
Wafer Lot Acceptance Method 5007
PDA Calculation 3% Functional
5% Subgroups 1, 7, ∆
Dynamic Burn-In 240 Hours, +125oC Method 1015
Condition D
Internal Visual Inspection (Note 1)
Gamma Radiation Assurance Tests Method 1019
100% Nondestructive Bond Pull Method 2023
Customer Pre-Cap Visual Inspection (Notes 1, 2)
Temperature Cycling Method 1010 Condition C
Constant Acceleration method 2001 Y1 30KG
Electrical Tests Subgroups 1, 7, 9 (T2)
Burn-In Delta Calculation (T0 - T2)
PDA Calculation 3% Functional
5% Subgroups 1, 7, ∆
Electrical Test +125oC, -55oC
Alternate Group A Inspection Method 5005
Fine and Gross Leak Tests Method 1014
Customer Source Inspection (Note 2)
Group B Inspection (Notes 2, 4) Method 5005
Group D Inspection (Notes 2, 4) Method 5005
External Visual Inspection Method 2009
Data Package Generation (Note 3)
Particle Impact Noise Detection method 2020,
Condition A 20G
Marking and Serialization
X-Ray Inspection Method 2012
Initial Electrical Tests (T0)
Static Burn-In 72 Hour, +125oC method 1015 Condition A
Room Temperature Electrical Tests (T1)
Burn-In Delta Calculation (T0-T1)
NOTES:
1. Visual Inspection is performed to MIL-STD-883 Method 2010, Condition A.
2. These steps are optional, and should be listed on the purchase order if required.
3. Data package contains: Assembly Attributes (post seal)
Test Attributes (includes Group A) -55oC, +25oC, +125oC
Shippable Serial Number List
Radiation Testing Certificate of Conformance
Wafer Lot Acceptance Report (includes SEM report)
X-Ray Report and Film
Test Variables Data, DC Test and TELQV
+25oC Initial Test
+25oC Interim Test 1
+25oC Interim Test 2
+25oC Delta Over Burn-In
4. Group B data package contains Attributes Data pulse Variables Data, DC Test and TE2HQV. Group D data package contains Attributes only.
10
HS-1840RH/883S
Metallization Topology
DIE DIMENSIONS:
110 x 159 x 11mils
METALLIZATION:
Type: Al
Thickness: 12.5kÅ ± 2kÅ
GLASSIVATION:
Type: SiO2
Thickness: 8kÅ ± 1kÅ
DIE ATTACH:
Material: Gold Eutectic
Temperature: Sidebrazed Ceramic DIP - 460oC (Max)
Flatpack - 460oC (Max)
WORST CASE CURRENT DENSITY: 1.90e04A/cm2
LEAD TEMPERATURE (10 Seconds Soldering): <275oC
PROCESS: CMOS-DI
Metallization Mask Layout
HS-1840RH/883S
ENABLE
IN8
-V
A0
A1
OUT
A2
A3
VREF
+V
IN16
GND
11
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