ISL32705EIBZ [RENESAS]
Low-EMI Isolated Full-Duplex RS-485 Transceiver;
| 型号： | ISL32705EIBZ |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | Low-EMI Isolated Full-Duplex RS-485 Transceiver |
| 文件： | 总20页 (文件大小：860K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATASHEET
ISL32705E
Low-EMI Isolated Full-Duplex RS-485 Transceiver
FN8949
Rev.2.00
Jan 11, 2018
The ISL32705E is a galvanically isolated, full-duplex
differential bus transceiver, designed for bidirectional
data transmission meeting the RS-485 and RS-422
standards for balanced communication. All bus terminals
are protected against ±7kV ESD strikes without latch-up.
Features
• 4Mbps data rate
• 2.5kV
isolation/600V
working voltage
RMS
RMS
• 3V to 5V power supplies
The device uses Giant Magnetoresistance (GMR) as
isolation technology. A unique ceramic/polymer
composite barrier provides excellent isolation and nearly
unlimited barrier life.
• Drives up to 44 devices on an isolated bus
• 50kV/µs (typical), 30kV/µs (minimum)
common-mode transient immunity
• 44,000 year barrier life
The part is available in a 16 Ld wide-body SOIC package
providing true 8mm creepage distance.
• 7kV ESD protection
The ISL32705E delivers a minimum of 1.5V into a 54Ω
differential load for excellent data integrity over long
cable lengths.
• Low EMC footprint
• Thermal shutdown protection
• -40°C to +85°C temperature range
• Meets or exceeds ANSI RS-485
• 0.3” true 8mm 16 Ld SOIC package
• UL 1577 recognized
The device is compatible with 3V and 5V input supplies,
allowing an interface to standard microcontrollers
without additional level shifting.
Current limiting and thermal shutdown features protect
against output short-circuits and bus contention that may
cause excessive power dissipation. Receiver inputs
feature a “fail-safe if open” design, ensuring a logic high
R-output if A/B are floating.
• VDE V 0884-10 certified
Applications
• Factory automation
Related Literature
• Security networks
• For a full list of related documents, visit our website
• Building environmental control systems
• Industrial/process control networks
• Level translators (for example, RS-232 to RS-485)
• Equipment covered under IEC 61010-1 Edition 3
• ISL32705E product page
ISOLATION
BARRIER
ISOLATION
BARRIER
3.3V
5V
5V
3.3V
100n
100n
100n
100n
1
16
VDD2
16
VDD2
1
VDD1
VDD1
R
R
B
B
3
4
5
6
14
13
11
12
10
11
12
14
13
10
6
5
4
3
R
A
Y
D
R
T
B
Y
Z
RE
DE
D
DE
RE
R
A
R
T
Z
B
ISODE
GND2
ISODE
GND2
R
R
B
B
GND1
2,8
GND1
2,8
9,15
9,15
ISL32705EIBZ
ISL32705EIBZ
Figure 1. Typical Isolated Full-Duplex RS-485 Application
FN8949 Rev.2.00
Jan 11, 2018
Page 1 of 20
ISL32705E
1. Overview
1. Overview
1.1
Typical Operating Circuit
ISO
DC-DC
1
2
3
4
5
6
7
8
16
15
Vs
VDD1
VDD2
GND2
100n
100n
10k
100n
R
R
B
GND1
R
VDD
RxD
A 14
B 13
A
B
Z
R
T
RE
DE
D
REN
DEN
TxD
MCU
Z 12
Y 11
Y
DGND
ISODE 10
3 x
10k
NC
B
9
GND
GND1
GND2
ISL32705E
Figure 2. Typical Operating Circuit
1.2
Ordering Information
Part Number
(Notes 1, 2, 3)
Temp. Range
Package
(RoHS Compliant)
Part Marking
32705EIBZ
(°C)
Pkg. Dwg. #
M16.3A
ISL32705EIBZ
ISL32705EVAL1Z
Notes:
-40 to +85
16 Ld SOICW
Evaluation board for ISL32705EIBZ
1. Add “-T” suffix for 1k unit or -T7A” suffix for 250 unit tape and reel options. Refer to TB347 for details on reel specifications.
2. Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.
3. For Moisture Sensitivity Level (MSL), see the product information page for the ISL32705E. For more information on MSL, see
TB363.
Table 1. Key Differences Between Family of Parts
VDD1
(V)
VDD2
(V)
Data Rate
(Mbps)
Isolation Voltage
Part Number
ISL32704E
Full/Half Duplex
(kVRMS
)
Half
Full
Half
Half
3.0 – 5.5
3.0 – 5.5
3.0 – 5.5
3.0 – 5.5
4.5 – 5.5
4.5 – 5.5
4.5 – 5.5
4.5 – 5.5
4
4
2.5
ISL32705E
ISL32740E
ISL32741E
2.5
40
40
2.5
6
FN8949 Rev.2.00
Jan 11, 2018
Page 2 of 20
ISL32705E
1. Overview
1.3
Pin Configuration
ISL32705E
(16 Ld SOIC)
Top View
VDD1
GND1
R
1
2
3
4
5
6
7
8
16 VDD2
15 GND2
14 A
RE
13 B
DE
12 Z
D
11 Y
NC
10 ISODE
GND1
9
GND2
1.4
Truth Tables
Transmitting
Inputs
Outputs
RE
X
DE
1
D
1
ISODE
Z
0
Y
1
1
0
0
1
X
1
0
1
0
0
0
X
X
High-Z
High-Z
High-Z
High-Z
1
0
Receiving
Inputs
Output
RE
0
DE
X
A-B
VAB ≥0.2V
RO
1
0
X
0.2V > VAB > -0.2V
VAB ≤ -0.2V
Inputs Open
X
Undetermined
0
X
0
1
0
X
1
X
High-Z
FN8949 Rev.2.00
Jan 11, 2018
Page 3 of 20
ISL32705E
1. Overview
1.5
Pin Descriptions
Pin
Pin
Number
Name
Function
1
2, 8
3
VDD1 Input power supply.
GND1 Input power supply ground return. Pin 2 is internally connected to Pin 8.
R
Receiver output. R is high when A-B ≥200mV or A and B are floating. R is low when A-B ≤-200mV.
Receiver output enable. R is enabled when RE is low; R is high impedance when RE is high.
4
RE
DE
5
Driver output enable. The driver outputs, Y and Z, are enabled when DE is high. They are high-impedance when
DE is low.
6
D
Driver input. A high on D forces output Y high and output Z low. Similarly, a low on D forces output Y low and
output Z high.
7
NC
No internal connection.
9, 15
10
GND2 Output power supply ground return. Pin 9 is internally connected to Pin 15.
ISODE Isolated DE output for use in applications in which the state of the isolated drive enable node needs to be
monitored.
11
12
13
14
16
Y
Z
B
A
±7kV ESD protected noninverting driver output.
±7kV ESD protected inverting driver output.
±7kV ESD protected inverting receiver input.
±7kV ESD protected noninverting receiver input.
VDD2 Output power supply.
FN8949 Rev.2.00
Jan 11, 2018
Page 4 of 20
ISL32705E
2. Specifications
2. Specifications
2.1
Absolute Maximum Ratings
Parameter (Note 4)
Minimum
-0.5
Maximum
Unit
Supply Voltages (Note 7)
VDD1 to GND1
VDD2 to GND2
Input Voltages D, DE, RE
Input/Output Voltages
A, B
+7
7
V
V
V
-0.5
VDD1 + 0.5
-9
+13
V
V
V
R
-0.5
VDD1 + 1
Short-Circuit Duration A, B
ESD Rating
Continuous
See “Electrical Specifications” table on page 6
Note:
4. Absolute Maximum specifications mean the device will not be damaged if operated under these conditions. It does not
guarantee performance.
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may
adversely impact product reliability and result in failures not covered by warranty.
2.2
Thermal Information
Thermal Resistance (Typical)
JA (°C/W)
JC (°C/W)
16 Ld SOICW Package (Notes 5, 6)
Notes:
60
12
5. JA is measured in free air with the component soldered to a double-sided board.
6. For JC, the “case temp” location is the center of the package top side.
Parameter
Maximum Junction Temperature (Plastic Package)
Maximum Storage Temperature Range
Maximum Power Dissipation
Minimum
-55
Maximum
Unit
°C
+150
+150
800
-55
°C
mW
Pb-Free Reflow Profile
Refer to TB493
2.3
Recommended Operation Conditions
Parameter
Minimum
Maximum
Unit
Supply Voltages
VDD1
3.0
4.5
5.5
5.5
V
V
VDD2
High-Level Digital Input Voltage, VIH
VDD1 = 3.3V
2.4
3.0
0
VDD1
VDD1
0.8
V
V
V
V
VDD1 = 5.0V
Low-Level Digital Input Voltage, VIL
Differential Input Voltage, VID (Note 8)
-7
12
FN8949 Rev.2.00
Jan 11, 2018
Page 5 of 20
ISL32705E
2. Specifications
Parameter
Minimum
Maximum
Unit
mA
mA
mA
mA
°C
High-Level Output Current (Driver), IOH
High-Level Digital Output Current (Receiver), IOH
Low-Level Output Current (Driver), IOL
Low-Level Digital Output Current (Receiver), IOL
Junction Temperature, TJ
60
8
-60
-8
-40
-40
+110
+85
Ambient Operating Temperature, TA
°C
Digital Input Signal Rise and Fall Times, tIR, tIF
DC Stable
2.4
Electrical Specifications
Test conditions: Tmin to Tmax, VDD1 = VDD2 = 4.5V to 5.5V; unless otherwise stated. (Note 7)
Typ
(Note 11) Max Unit
Parameter
DC Characteristics
Symbol
Test Conditions
Min
Driver Line Output Voltage (VA, VB)
(Note 7)
VO
No load
-
-
-
-
VDD2
VDD2
VDD2
0.20
V
V
V
V
Driver Differential Output Voltage
(Note 8)
VOD1 No load
Driver Differential Output Voltage
(Note 8)
VOD2 RL = 54Ω
1.5
-
2.3
0.01
Change in Magnitude of Differential
Output Voltage (Note 13)
VOD RL = 54Ω or 100Ω
Driver Common-Mode Output Voltage
VOC
RL = 54Ω or 100Ω
-
-
-
3
V
V
Change in Magnitude of Driver
Common-Mode Output Voltage
(Note 13)
VOC RL = 54Ω or 100Ω
0.01
0.20
Bus Output Current (Y, Z) (Notes 10, 14)
High-Level Input Current (DI, DE, RE)
Low-Level Input Current (DI, DE, RE)
Absolute Short-Circuit Output Current
Supply Current
IOZD
IIH
DE = 0V, -7V ≤ VO ≤ 12V
-100
-
100
10
-
µA
µA
µA
VI = 3.5V
-
-
IIL
VI = 0.4V
-10
-
IOS
IDD1
DE = VDD1, -7V ≤ VA or VB ≤ 12V
VDD1 = 5V
-
-
±250 mA
-
4
6
4
mA
mA
mV
mV
mV
V
VDD1 = 3.3V
-
3
Positive-Going Input Threshold Voltage
Negative-Going Input Threshold Voltage
Receiver Input Hysteresis
VTH+ -7V ≤ VCM ≤ 12V
VTH- -7V ≤ VCM ≤ 12V
VHYS VCM = 0V
-
-
200
-
-200
-
-
70
-
Receiver Output High Voltage
VOH
VOL
IOZR
IIN
IO = -20µA, VID = 200mV
VDD2 - 0.2
VDD2
-
Receiver Output Low Voltage
IO = +20µA, VID = -200mV
0.4V ≤ VO ≤ (VDD2 - 0.5)
-
-1
-
-
-
0.2
1
V
High impedance Output Current
Bus Input Current (A, B) (Notes 10, 14)
µA
mA
mA
kΩ
mA
DE = 0V
VIN = 12V
VIN = -7V
-
1
-0.8
12
-
-
-
Receiver Input Resistance
Supply Current
RIN
-7V ≤ VCM ≤ 12V
-
-
IDD2
DE = VDD1, no load
5
16
ESD Performance
RS-485 Bus Pins (A, B, Y, Z)
Human Body Model (HBM) discharge to
GND2
-
±7
-
kV
FN8949 Rev.2.00
Jan 11, 2018
Page 6 of 20
ISL32705E
2. Specifications
Test conditions: Tmin to Tmax, VDD1 = VDD2 = 4.5V to 5.5V; unless otherwise stated. (Note 7) (Continued)
Typ
(Note 11) Max Unit
Parameter
All Pins (R, RE, D, DE)
Symbol
Test Conditions
Min
Human Body Model (HBM) discharge to
GND1
-
±2
-
kV
Switching Characteristics
DD1 = 5V, VDD2 = 5V
V
Data Rate
DR
tPD
RL = 54Ω, CL = 50pF
4
-
-
-
150
15
50
50
50
50
-
Mbps
ns
Propagation Delay (Notes 8, 15)
Pulse Skew (Notes 8, 16)
VO = -1.5V to 1.5V, CL = 15pF
48
6
tSK (P) VO = -1.5V to 1.5V, CL = 15pF
-
ns
Output Enable Time to High Level
Output Enable Time to Low Level
Output Disable Time from High Level
Output Disable Time from Low Level
Common-Mode Transient Immunity
VDD1 = 3.3V, VDD2 = 5V
tPZH
tPZL
tPHZ
tPLZ
CL = 15pF
CL = 15pF
CL = 15pF
CL = 15pF
-
33
33
33
33
50
ns
-
ns
-
ns
-
ns
CMTI VCM = 1500 VDC, tTRANSIENT = 25ns
30
kV/µs
Data Rate
DR
tPD
RL = 54Ω, CL = 50pF
4
-
-
-
150
20
50
50
50
50
-
Mbps
ns
Propagation Delay (Notes 8, 15)
Pulse Skew (Notes 8, 16)
VO = -1.5V to 1.5V, CL = 15pF
48
6
tSK (P) VO = -1.5V to 1.5V, CL = 15pF
-
ns
Output Enable Time to High Level
Output Enable Time to Low Level
Output Disable Time from High Level
Output Disable Time from Low Level
Common-Mode Transient Immunity
tPZH
tPZL
tPHZ
tPLZ
CL = 15pF
CL = 15pF
CL = 15pF
CL = 15pF
-
33
33
33
33
50
ns
-
ns
-
ns
-
ns
CMTI VCM = 1500 VDC, tTRANSIENT = 25ns
30
kV/µs
Notes: (apply to both driver and receiver sections)
7. All voltages on the isolator primary side are with respect to GND1, all line voltages and common-mode voltages on the isolator
secondary or bus side are with respect to GND2.
8. Differential I/O voltage is measured at the noninverting bus terminal A with respect to the inverting terminal B.
9. Skew limit is the maximum propagation delay difference between any two devices at +25°C.
10. The power-off measurement in ANSI Standard EIA/TIA-422-B applies to disabled outputs only and is not applied to combined
inputs and outputs.
11. All typical values are at VDD1, VDD2 = 5V or VDD1 = 3.3V and TA = +25°C.
12. -7V < VCM < 12V; 4.5 < VDD < 5.5V.
13. VOD and VOC are the changes in magnitude of VOD and VOD respectively, that occur when the input is changed from one
logic state to the other.
14. This applies for both power-on and power-off; refer to ANSI standard RS-485 for the exact condition. The EIA/TIA-422 -B limit
does not apply for a combined driver and receiver terminal.
15. Includes 10ns read enable time. Maximum propagation delay is 25ns after read assertion.
16. Pulse skew is defined as |tPLH - tPHL| of each channel.
FN8949 Rev.2.00
Jan 11, 2018
Page 7 of 20
ISL32705E
2. Specifications
2.5
Insulation Specifications
Parameter
Symbol
Test Conditions
Per IEC 60601
Min
8.03
13
Typ
8.3
16
Max
Unit
mm
Creepage Distance (External)
Total Barrier Thickness (Internal)
Barrier Resistance
-
-
-
-
-
-
-
µm
RIO
CIO
500V
-
>1014
7
Ω
Barrier Capacitance
f = 1MHz
-
pF
Leakage Current
240VRMS, 60Hz
Per IEC 60112
-
0.2
-
µARMS
VRMS
VRMS
Comparative Tracking Index
CTI
VIO
≥600
1000
High Voltage Endurance (Maximum Barrier Voltage
for Indefinite Life)
At maximum operating
temperature
-
1500
-
-
-
-
VDC
Barrier Life
+100°C, 1000VRMS, 60% CL
activation energy
44000
Years
2.6
Magnetic Field Immunity
Parameter (Note 17)
Symbol
Test Conditions
Min
Typ
Max
Unit
VDD1 = 5V, VDD2 = 5V
Power Frequency Magnetic Immunity
Pulse Magnetic Field Immunity
Damped Oscillatory Magnetic Field
Cross-Axis Immunity Multiplier (Note 18)
VDD1 = 3.3V, VDD2 = 5V
HPF
HPM
HOSC
KX
50Hz/60Hz
2800
4000
4000
-
3500
4500
4500
2.5
-
-
-
-
A/m
A/m
A/m
tP = 8µs
0.1Hz to 1MHz
Power Frequency Magnetic Immunity
Pulse Magnetic Field Immunity
Damped Oscillatory Magnetic Field
Cross-Axis Immunity Multiplier (Note 18)
Notes:
HPF
HPM
HOSC
KX
50Hz/60Hz
tP = 8µs
1000
1800
1800
-
1500
2000
2000
2.5
-
-
-
-
A/m
A/m
A/m
0.1Hz to1MHz
17. The relevant test and measurement methods are given in “Electromagnetic Compatibility” on page 10.
18. External magnetic field immunity is improved by this factor if the field direction is “end-to-end” rather than “pin-to-pin”
(See “Electromagnetic Compatibility” on page 10).
FN8949 Rev.2.00
Jan 11, 2018
Page 8 of 20
ISL32705E
3. Safety and Approvals
3. Safety and Approvals
3.1
VDE V 0884-10
Basic Isolation; VDE File Number 5016933-4880-0001/229067
• Working voltage (V
) 600V
(848V ); Basic insulation, Pollution degree 2
PK
IORM
RMS
RMS
• Isolation voltage (V ) 2500V
ISO
• Transient overvoltage (V
) 4000V
PK
IOTM
• Each part tested at 1590V for 1s, 5pC partial discharge limit
PK
• Samples tested at 4000V for 60s, then 1358V for 10s with 5pC partial discharge limit
PK
PK
Symbol
Safety-Limiting Values
Value
+180
270
Unit
°C
TS
PS
IS
Safety Rating Ambient Temperature
Safety Rating Power (+180°C)
mW
mA
Supply Current Safety Rating (total of supplies)
54
3.2
UL 1577
Component Recognition Program File Number: E483309
• Each part tested at 3000V (4240V ) for 1s
RMS
PK
• Each lot samples tested at 2500V
(3536V ) for 60s
PK
RMS
FN8949 Rev.2.00
Jan 11, 2018
Page 9 of 20
ISL32705E
4. Electromagnetic Compatibility
4. Electromagnetic Compatibility
The ISL32705E is fully compliant with generic EMC standards EN50081, EN50082-1, and the umbrella line-voltage
standard for Information Technology Equipment (ITE) EN61000. The isolator’s Wheatstone bridge configuration and
differential magnetic field signaling ensure excellent EMC performance against all relevant standards. Compliance
tests have been conducted in the following categories:
Table 2. Compliance Test Categories
EN50081-1
EN50082-2
EN50204
Residential, Commercial, and
Light Industrial:
Industrial Environment
EN61000-4-2 (ESD)
Radiated field from digital
telephones
Methods EN55022, EN55014
EN61000-4-3 (Electromagnetic Field Immunity)
EN61000-4-4 (EFT)
EN61000-4-6 (RFI Immunity)
EN61000-4-8 (Power Frequency Magnetic Field immunity)
EN61000-4-9 (Pulsed Magnetic Field)
EN61000-4-10 (Damped Oscillatory Magnetic Field)
Immunity to external magnetic fields is even higher if the field direction is
“end-to-end” rather than “pin-to-pin” as shown on the right.
FN8949 Rev.2.00
Jan 11, 2018
Page 10 of 20
ISL32705E
5. Application Information
5. Application Information
The ISL32705E is an isolated full-duplex RS-485 transceiver designed for high-speed data transmission of up to
4Mbps.
5.1
RS-485 and Isolation
RS-485 is a differential (balanced) data transmission standard for use in long haul networks or noisy environments. It
is a true multipoint standard, which allows up to 32 one-unit load devices (any combination of drivers and receivers)
on a bus. To allow for multipoint operation, the RS-485 specification requires that drivers must handle bus contention
without sustaining any damage.
An important advantage of RS-485 is its wide common-mode range, which specifies that the driver outputs and the
receiver inputs withstand signals ranging from +12V to -7V. This common-mode range is the sum of the ground
potential difference between driver and receiver, V
, the driver output common-mode offset, V , and the
GPD
OC
longitudinally coupled noise along the bus lines, V : V = V
+ V + V .
n
CM
GPD
OC
n
V
CC1
V
CC2
V
N
D
R
R
T
R
T
D
R
V
OC
V
CM
V
GPD
GND
GND
2
1
Figure 3. Common-Mode Voltages in a Non-Isolated Data Link
However, in networks using isolated transceivers, such as the ISL32705E, the supply and signal paths of the driver
and receiver bus circuits are galvanically isolated from their local mains supplies and signal sources.
V
CC1
V
V
CC2
CC2-ISO
V
N
ISO
D
R
R
T
R
T
D
R
V
CM
= 0V
R
ISO
V
OC
V
CM
GND
2-ISO
V
GPD
GND
GND
2
1
Figure 4. Common-Mode Voltages in an Isolated Data Link
Because the ground potentials of isolated bus nodes are isolated from each other, the common-mode voltage of one
node’s output has no effect on the bus inputs of another node. This is because the common-mode voltage is
14
dropping across the high-resistance isolation barrier of 10 Ω. Thus, galvanic isolation extends the maximum
allowable common-mode range of a data link to the maximum working voltage of the isolation barrier, which for
the ISL32705E is 600V
.
RMS
FN8949 Rev.2.00
Jan 11, 2018
Page 11 of 20
ISL32705E
5. Application Information
5.2
Digital Isolator Principle
The ISL32705E uses a Giant Magnetoresistance (GMR) isolation. Figure 5 shows the principle operation of a
single channel GMR isolator.
EXTERNAL B-FIELD
V
DD2
INTERNAL
B-FIELD
GMR1
GMR2
IN
OUT
GMR3 GMR4
GND2
Figure 5. Single Channel GMR Isolator
The input signal is buffered and drives a primary coil, which creates a magnetic field that changes the resistance of
the GMR resistors 1 to 4. GMR1 to GMR4 form a Wheatstone bridge to create a bridge output voltage that reacts
only to magnetic field changes from the primary coil. Large external magnetic fields however, are treated as
common-mode fields, and are therefore suppressed by the bridge configuration. The bridge output is fed into a
comparator whose output signal is identical in phase and shape to the input signal.
5.3
GMR Resistor in Detail
Figure 6 shows a GMR resistor consisting of ferromagnetic alloy layers, B1, B2, sandwiched around an ultra thin,
nonmagnetic conducting middle layer A, typically copper. The GMR structure is designed so that, in the absence of
a magnetic field, the magnetic moments in B1 and B2 face opposite directions, thus causing heavy electron
scattering across layer A, which increases its resistance for current C drastically. When a magnetic field D is
applied, the magnetic moments in B1 and B2 are aligned and electron scattering is reduced. This lowers the
resistance of layer A and increases current C.
HIGH
LOW
RESISTANCE
RESISTANCE
B1
A
B1
A
C
C
C
C
B2
B2
D
APPLIED
MAGNETIC FIELD
Figure 6. Multilayer GMR Resistor
FN8949 Rev.2.00
Jan 11, 2018
Page 12 of 20
ISL32705E
5. Application Information
5.4
Low Emissions
Because GMR isolators do not use complex encoding schemes, such as RF carriers or high-frequency clocks, and
do not include power transfer coils or transformers, their radiated emission spectrum is practically undetectable.
60
50
40
30
20
10
0
FCC-B < 1GHz 3m
EN55022 < 1GHz 3m
LABORATORY NOISE FLOOR
QP-MEASUREMENTS
10MHz
100MHz
1GHz
Figure 7. Undetectable Emissions of GMR Isolators
5.5
Low EMI Susceptibility
Because GMR isolators have no pulse trains or carriers to interfere with, they also have very low EMI susceptibility.
For the list of compliance tests conducted on GMR isolators, refer to “Electromagnetic Compatibility” on page 10.
5.6
Receiver (Rx) Features
This transceiver uses a differential input receiver for maximum noise immunity and common-mode rejection. Input
sensitivity is ±200mV, as required by the RS-485 specification.
The receiver input resistance meets the RS-485 Unit Load (UL) requirement of 12kΩ minimum. The receiver
includes a “fail-safe if open” function that guarantees a high level receiver output if the receiver inputs are
unconnected (floating). The receiver output is tri-statable through the active low RE input.
5.7
Driver (Tx) Features
The RS-485 driver is a differential output device that delivers at least 1.5V across a 54Ω purely differential load.
The driver features low propagation delay skew to maximize bit width and to minimize EMI.
The driver in the ISL32705E is tri-statable through the active high DE input. The outputs of the ISL32705E driver
are not slew rate limited, so faster output transition times allow data rates of at least 4Mbps.
5.8
Built-In Driver Overload Protection
As stated previously, the RS-485 specification requires that drivers survive worst-case bus contentions undamaged.
The ISL32705E transmitters meet this requirement through driver output short-circuit current limits and on-chip thermal
shutdown circuitry.
The driver output stage incorporates short-circuit current limiting circuitry, which ensures that the output current
never exceeds the RS-485 specification. In the event of a major short-circuit condition, the device also includes a
thermal shutdown feature that disables the driver whenever the die temperature becomes excessive. This eliminates
the power dissipation, allowing the die to cool. The driver automatically re-enables after the die temperature drops
about 15°C. If the contention persists, the thermal shutdown/re-enable cycle repeats until the fault is cleared. The
receiver stays operational during thermal shutdown.
FN8949 Rev.2.00
Jan 11, 2018
Page 13 of 20
ISL32705E
5. Application Information
5.9
Dynamic Power Consumption
The isolator within the ISL32705E achieves its low power consumption from the way it transmits data across the
barrier. By detecting the edge transitions of the input logic signal and converting these to narrow current pulses, a
magnetic field is created around the GMR Wheatstone bridge. Depending on the direction of the magnetic field, the
bridge causes the output comparator to switch following the input signal. Because the current pulses are narrow,
about 2.5ns, the power consumption is independent of the mark-to-space ratio and solely depends on frequency.
Table 3. Supply Current Increase with Data Rate
Data Rate
(Mbps)
IDD1
(mA)
IDD2
(mA)
1
4
0.15
0.6
0.15
0.6
5.10 Power Supply Decoupling
Both supplies, V
and V
, must be bypassed with 100nF ceramic capacitors. These should be placed as close
DD1
DD2
as possible to the supply pins for proper operation.
5.11 DC Correctness
The ISL32705E incorporates a patented refresh circuit to maintain the correct output state with respect to data input.
At power-up, the bus outputs follow the “Truth Tables” on page 3. The DE input should be held low during power-up
to prevent false drive data pulses on the bus. This can be accomplished by connecting a 10kΩ pull-down resistor
between DE and GND1.
5.12 Data Rate, Cables, and Terminations
RS-485 is intended for network lengths up to 4000 feet, but the maximum system data rate decreases as the
transmission length increases. Devices operating at 4Mbps are typically limited to lengths less than 100 feet, but
are capable of driving up to 350 feet of cable when allowing for some jitter of 5%.
Twisted pair is the cable of choice for RS-485 networks. Twisted pair cables tend to pick up noise and other
electromagnetically induced voltages as common-mode signals, which are effectively rejected by the differential
receivers in these ICs.
To minimize reflections, proper termination is imperative when using this high data rate transceiver. In
point-to-point or point-to-multipoint (single driver on bus) networks, the main cable should be terminated in its
characteristic impedance (typically 120Ω for RS-485) at the end farthest from the driver. In multireceiver
applications, stubs connecting receivers to the main cable should be kept as short as possible. Multipoint
(multidriver) systems require that the main cable be terminated in its characteristic impedance at both ends. Stubs
connecting a transceiver to the main cable should be kept as short as possible.
A useful guideline for determining the maximum stub lengths is given with (EQ. 1).
t
r
10
------
(EQ. 1)
L
v c
S
where:
• L is the stub length (ft)
S
• t is the driver rise time (s)
r
8
• c is the speed of light (9.8 x 10 ft/s)
• v is the signal velocity as a percentage of c
FN8949 Rev.2.00
Jan 11, 2018
Page 14 of 20
ISL32705E
5. Application Information
To ensure proper receiver operation during times when the bus is not actively driven, fail-safe biasing networks are
used to provide sufficient bus voltage to maintain all receiver outputs logic high.
The point-to-point link in Figure 8 requires only one fail-safe termination at each receiver input. This is due to the
unidirectional data traffic.
V
S
MASTER
D
SLAVE
R
R
B
TRANSMIT
D
R
R
R
D
T
R
B
V
S
R
B
RECEIVE
R
R
D
T
R
B
Figure 8. Fail-Safe Biasing Terminations for a Full-Duplex Point-to-Point Data Link
The values for R and R are calculated using (EQ. 2) and (EQ. 3).
B
T2
Z
V
S
V
AB
0
(EQ. 2)
------ -----------
R
B
T
2
2R Z
B
0
(EQ. 3)
------------------------
R
=
2R – Z
B
0
where:
• R are the fail-safe biasing resistors
B
• R is the termination resistor
T
• V is the minimum transceiver supply
S
• V is the fail-safe bus voltage of the idle bus
AB
• Z is the characteristic cable impedance
0
The multipoint network in Figure 9 on page 16 requires different termination networks for the transmit and receive
path. This is because the transmit path contains only one driver, while the receive path has multiple drivers. The
corresponding resistor values are calculated using (EQ. 4) through (EQ. 8).
Transmit Path Termination
Z
V
S
V
AB
0
(EQ. 4)
(EQ. 5)
------ -----------
R
R
B
T
2
2R Z
B
0
------------------------
=
2R – Z
B
0
FN8949 Rev.2.00
Jan 11, 2018
Page 15 of 20
ISL32705E
5. Application Information
Receive Path Termination
Z
V
S
V
AB
0
(EQ. 6)
------ -----------
R
B
4
2R Z
B
0
------------------------
(EQ. 7)
(EQ. 8)
R
=
T2
2R – Z
B
0
R
= Z
0
T1
V
S
MASTER
D
R
B
TRANSMIT
D
R
R
T
R
B
V
S
R
B
RECEIVE
R
R
R
T1
T2
R
B
R
R
D
R
R
D
D
D
SLAVE
SLAVE
Figure 9. Fail-Safe Biasing Terminations for a Full-Duplex Multipoint Bus
5.13 Transient Protection
Protecting the ISL32705E against transients exceeding the device’s transient immunity requires the addition of
external TVS devices. For this purpose, the Semtech RCLAMP0512TQ was chosen due to its high transient
protection levels, low junction capacitance, and small form factor.
Table 4. RCLAMP0512 TVS Features
Parameter
Symbol
VESD
VESD
VEFT
VSURGE
CJ
Value
±30
±30
±4
Unit
kV
ESD (IEC61000-4-2)
Air
Contact
kV
EFT (IEC61000-4-4)
Surge (IEC61000-4-5)
Junction Capacitance
Form Factor
kV
±1.3
3
kV
pF
-
1x0.6
mm
The TVS diodes are implemented between the bus lines and isolated ground (GND2).
FN8949 Rev.2.00
Jan 11, 2018
Page 16 of 20
ISL32705E
5. Application Information
Because transient voltages on the bus lines are referenced to Earth potential, also known as Protective Earth (PE), a
high-voltage capacitor (C ) is inserted between GND2 and PE, providing a low-impedance path for
HV
high-frequency transients.
Note that the connection from the PE point on the isolated side to the PE point on the non-isolated side (Earth) is
usually made using the metal chassis of the equipment, or through a short, thick wire of low-inductance.
A high-voltage resistor (R ) is added in parallel to C to prevent the build-up of static charges on floating
HV
HV
grounds (GND2) and cable shields. The bill of materials for the circuit in Figure 10 is listed in Table 5.
V
S-ISO
V
S
A
B
A
B
MCU/
UART
ISL32705E
Y
Z
Y
Z
Shield
GND
PE
TVSs
C
R
HV
HV
PE
Non-isolated Ground
Isolated Ground, Floating RS-485 Common
Protective Earth Ground, Equipment Safety Ground
Figure 10. Transient Protection for ISL32705E
Table 5. BOM for Circuit in Figure 10
Name
TVS
CHV
Function
Order No.
RCLAMP0512TQ
Vendor
170W (8, 20µs) 2-Line Protector
4.7nF, 2kV, 10% Capacitor
1MΩ, 2kV, 5% Resistor
Semtech
Novacap
1812B472K202NT
HVC12061M0JT3
RHV
TT-Electronics
FN8949 Rev.2.00
Jan 11, 2018
Page 17 of 20
ISL32705E
6. Revision History
6. Revision History
Rev.
Date
Description
2.00
Jan 11, 2018
Changed approvals to UL1577 recognized and VDE V 0884-10 certified on page 1 (2 feature bullets).
Removed the units (A/m) in both “Kx” rows on page 8.
Removed “Certification Pending” in the VDE header and added the file numbers for VDE and UL.
Removed About Intersil section.
1.00
0.00
Sep 29, 2017
Jul 17, 2017
Updated Table 1 on page 2.
Updated receiving truth table on page 3.
Initial release
FN8949 Rev.2.00
Jan 11, 2018
Page 18 of 20
ISL32705E
7. Package Outline Drawing
For the most recent package outline drawing, see M16.3A.
7. Package Outline Drawing
M16.3A
16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE (SOICW)
Rev 1, 6/17
1
3
10.08
10.49
0.3
0.5
SEE DETAIL "X"
16
9
0.18
0.25
7.42
7.59
10.00
10.64
6.60
7.11
PIN #1
I.D. MARK
2
3
0.85
1.10
1
8
1.24
1.30
0.2
0.3
TOP VIEW
END VIEW
0.05
2.34
2.67
H
C
2.0
2.5
GAUGE
PLANE
SEATING
PLANE
0.25
0.1
0.3
0.3
0.5
5
0.1 MIN
0.40
0.10
C
0° TO 8°
0.3 MAX
1.30
0.1 M
C
B A
SIDE VIEW
DETAIL X
(1.7)
NOTES:
1. Dimension does not include mold flash, protrusions, or gate burrs.
Mold flash, protrusions, or gate burrs shall not exceed 0.15 per side.
2. Dimension does not include interlead flash or protrusion. Interlead
flash or protrusion shall not exceed 0.25 per side.
(9.75)
3. Dimensions are measured at datum plane H.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
5. Dimension does not include dambar protrusion.
6. Dimension in ( ) are for reference only.
7. Pin spacing is a BASIC dimension; tolerances do not accumulate.
8. Dimensions are in mm.
(0.51)
(1.27)
TYPICAL RECOMMENDED LAND PATTERN
FN8949 Rev.2.00
Jan 11, 2018
Page 19 of 20
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