ISL55001IBZ-T7A [RENESAS]
High Supply Voltage 220MHz Unity-Gain Stable Operational Amplifier;
| 型号： | ISL55001IBZ-T7A |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | High Supply Voltage 220MHz Unity-Gain Stable Operational Amplifier 放大器 光电二极管 |
| 文件： | 总12页 (文件大小：872K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATASHEET
ISL55001
FN6200
Rev 3.00
Nov 3, 2009
High Supply Voltage 220MHz Unity-Gain Stable Operational Amplifier
The ISL55001 is a high speed, low power, low cost
monolithic operational amplifier. The ISL55001 is
Features
• 220MHz -3dB Bandwidth
unity-gain stable and features a 300V/µs slew rate and
220MHz bandwidth while requiring only 9mA of supply
current.
• Unity-gain Stable
• Low Supply Current: 9mA @ V = ±15V
S
The power supply operating range of the ISL55001 is
from ±15V down to ±2.5V. For single-supply operation,
the ISL55001 operates from 30V down to 5V.
• Wide Supply Range: ±2.5V to ±15V Dual-Supply
and 5V to 30V Single-Supply
• High Slew Rate: 300V/µs
The ISL55001 also features an extremely wide output
• Fast Settling: 75ns to 0.1% for a 10V Step
• Wide Output Voltage Swing: -12.75V/+13.6V with
voltage swing of -12.75V/+13.4V with V = ±15V and
S
R = 1k.
L
V = ±15V, R = 1k
S
L
At a gain of +1, the ISL55001 has a -3dB bandwidth of
220MHz with a phase margin of 50°. Because of its
conventional voltage-feedback topology, the ISL55001
allows the use of reactive or non-linear elements in its
feedback network. This versatility combined with low
cost and 140mA of output-current drive makes the
ISL55001 an ideal choice for price-sensitive
• Low Cost, Enhanced Replacement for the EL2044
• Pb-free (RoHS compliant)
Applications
• Video Amplifiers
• Single-supply Amplifiers
• Active Filters/Integrators
• High Speed Sample-and-Hold
• High Speed Signal Processing
• ADC/DAC Buffers
applications requiring low power and high speed.
The ISL55001 is available in an 8 Ld SO package and
specified for operation over the full -40°C to +85°C
temperature range.
• Pulse/RF Amplifiers
Ordering Information
• Pin Diode Receivers
• Log Amplifiers
PART
PACKAGE
PKG.
DWG. #
PART NUMBER MARKING (Pb-free)
• Photo Multiplier Amplifiers
• Difference Amplifier
ISL55001IBZ
(Note 2)
55001 IBZ 8 Ld SO
55001 IBZ 8 Ld SO
M8.15E
M8.15E
M8.15E
ISL55001IBZ-T7
(Note 1, 2)
Pin Configuration
ISL55001
(8 LD SO)
TOP VIEW
ISL55001IBZ-T13 55001 IBZ 8 Ld SO
(Notes 1, 2)
NOTES:
NC 1
IN- 2
IN+ 3
VS- 4
8 NC
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die
attach materials, and 100% matte tin plate plus anneal
(e3 termination finish, which is RoHS compliant and
compatible with both SnPb and Pb-free soldering
operations). Intersil Pb-free products are MSL classified
at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-
020.
7 VS+
6 OUT
5 NC
-
+
3. For Moisture Sensitivity Level (MSL), please see device
information page for ISL55001. For more information on
MSL please see techbrief TB363.
FN6200 Rev 3.00
Nov 3, 2009
Page 1 of 12
ISL55001
Absolute Maximum Ratings (T = +25°C)
Thermal Information
A
Supply Voltage (V ) . . . . . . . . . . . . . . . . . . ±16.5V or 33V
Continuous Output Current . . . . . . . . . . . . . . . . . . . 60mA
S
Input Voltage (V . . . . . . . . . . . . . . . . . . . . . . . . . . . ±V
Power Dissipation (P ). . . . . . . . . . . . . . . . . . . . see Curves
IN)
S
D
Differential Input Voltage (dV ) . . . . . . . . . . . . . . . . ±10V
Operating Temperature Range (T ) . . . . . . . -40°C to +85°C
A
IN
ESD Rating
Operating Junction Temperature (T ). . . . . . . . . . . . +150°C
J
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . 3kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . 250V
Storage Temperature (T ) . . . . . . . . . . . -65°C to +150°C
ST
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
DC Electrical Specifications V = ±15V, R = 1k, T = +25°C, unless otherwise specified.
S
L
A
PARAMETER
DESCRIPTION
CONDITION
MIN
TYP
0.06
18
MAX
UNIT
mV
V
Input Offset Voltage
3
OS
TCV
Average Offset Voltage Drift
Input Bias Current
µV/°C
µA
OS
I
I
1.72
0.27
0.8
3.5
1.5
B
Input Offset Current
µA
OS
TC-I
Average Offset Current Drift
(Note 4)
nA/°C
OS
A
Open-loop Gain
V
= ±10V, R = 1k
10
75
70
17
90
kV/V
dB
dB
V
VOL
OUT
L
PSRR
CMRR
CMIR
Power Supply Rejection Ratio
Common-mode Rejection Ratio
Common-mode Input Range
Output Voltage Swing
V = ±5V to ±15V
S
V
= ±10V, V
OUT
= 0V
90
CM
V = ±15V
±14
13.5
-12.8
11.5
-9.9
145
8.3
S
V
V +, R = 1k
13.25
-12.6
10.7
-8.8
V
OUT
O
L
V -, R = 1k
V
O
L
V +, R = 150
V
O
L
V -, R = 150
V
O
L
I
I
Output Short Circuit Current
Supply Current
120
mA
mA
M
pF
m
V
SC
S
No load
9.25
R
C
R
Input Resistance
2.0
2.75
1
IN
Input Capacitance
A = +1
V
IN
Output Resistance
A = +1
V
50
OUT
PSOR
Power Supply Operating Range
Dual supply
±2.25
4.5
±15
30
Single supply
V
NOTE:
4. Measured from T
MIN
to T
.
MAX
AC Electrical SpecificationsV = ±15V, A = +1, R = 1k, unless otherwise specified.
S
V
L
PARAMETER
DESCRIPTION
CONDITION
MIN
TYP
220
55
MAX
UNIT
MHz
MHz
MHz
MHz
MHz
°
BW
-3dB Bandwidth (V
= 0.4V
)
A = +1
V
OUT
P-P
A = -1
V
A = +2
53
V
A = +5
17
V
GBWP
PM
Gain Bandwidth Product
Phase Margin
70
R = 1k, C = 5pF
55
L
L
SR
Slew Rate (Note 5)
R = 100
250
280
V/µs
L
FN6200 Rev 3.00
Nov 3, 2009
Page 2 of 12
ISL55001
AC Electrical SpecificationsV = ±15V, A = +1, R = 1k, unless otherwise specified. (Continued)
S
V
L
PARAMETER
DESCRIPTION
CONDITION
MIN
TYP
9.5
MAX
UNIT
MHz
ns
FPBW
Full-power Bandwidth (Note 6)
V = ±15V
S
t
Settling to +0.1% (A = +1)
V
V = ±15V, 10V step
S
75
S
dG
dP
eN
Differential Gain (Note 7)
Differential Phase
NTSC/PAL
NTSC/PAL
10kHz
0.01
0.05
12
%
°
Input Noise Voltage
nV/H
z
iN
Input Noise Current
10kHz
1.5
pA/H
z
NOTES:
5. Slew rate is measured on rising edge.
6. For V = ±15V, V = 10V , for V = ±5V, V
= 5V . Full-power bandwidth is based on slew rate measurement using
P-P
S
OUT
P-P
S
OUT
FPBW = SR/(2*V
).
PEAK
7. Video performance measured at V = ±15V, A = +2 with two times normal video level across R = 150. This corresponds
S
V
L
to standard video levels across a back-terminated 75 load. For other values or R , see “Typical Performance Curves” on
L
page 4.
FN6200 Rev 3.00
Nov 3, 2009
Page 3 of 12
ISL55001
Typical Performance Curves
V
= ±15V
= 1k
S
R
L
SOURCE POWER = -20dBm
V
R
= ±15V
= 1k
S
L
SOURCE POWER = -20dBm
FIGURE 1. OPEN-LOOP GAIN vs FREQUENCY
FIGURE 2. OPEN-LOOP PHASE vs FREQUENCY
V
C
= ±15V
= 5pF
S
L
V
C
= ±15V
= 5pF
S
L
SOURCE POWER = -20dBm
SOURCE POWER = -20dBm
R
= 1k
L
R
= 1k
L
R
= 500
L
R
= 500
L
R
= 150
L
R
= 150
L
R
= 75
L
R
= 75
L
R
= -50
L
R
= 50
L
FIGURE 4. FREQUENCY RESPONSE FOR VARIOUS R
FIGURE 3. FREQUENCY RESPONSE FOR VARIOUS
(A = +1)
LOAD
(A = +2)
R
V
LOAD
V
V
R
= ±15V
= 1k
S
L
C
= 82pF
L
C
= 82pF
L
SOURCE POWER = -20dBm
C
= 39pF
L
C
= 39pF
L
C
= 10pF
L
C
= 5pF
L
C
= 10pF
L
V
R
= ±15V
= 1k
S
L
C
= 5pF
L
SOURCE POWER = -20dBm
FIGURE 6. FREQUENCYRESPONSE FOR VARIOUS C
FIGURE 5. FREQUENCY RESPONSE FOR VARIOUS
(A = +1)
LOAD
(A = +2)
C
V
LOAD
V
FN6200 Rev 3.00
Nov 3, 2009
Page 4 of 12
ISL55001
Typical Performance Curves (Continued)
360
315
270
V
R
= ±15V
= 500
V
R
= ±15V
S
F
L
S
F
L
= 500
R = 500
R = 500
180
90
270
225
180
A = -1
V
A
= +1
V
0
135
90
-90
-180
-270
A
= +5
V
A
= -5
V
A
= +2
V
A
= -2
V
45
0
NOTE: FOR A = +1, R = 0
V
F
100k
1M
10M
100M
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 7. PHASE vs FREQUENCY FOR VARIOUS
NON-INVERTING GAIN SETTINGS
FIGURE 8. PHASE vs FREQUENCY FOR VARIOUS
INVERTING GAIN SETTINGS
100
350
R
= 500
L
A
= +2
V
R
= 500
F
80
300
R
= 500
L
POSITIVE SLEW RATE
C
= 5pF
L
60
40
20
0
250
200
150
100
NEGATIVE SLEW RATE
0
3
6
9
12
15
0
3
6
9
12
15
SUPPLY VOLTAGES (±V)
SUPPLY VOLTAGES (±V)
FIGURE 10. SLEW RATE vs SUPPLY
FIGURE 9. GAIN BANDWIDTH PRODUCT vs SUPPLY
5
3
5
V
= ±15V
A = +2
V
L
L
V
= ±15V
= +1
= 500
= 5pF
S
S
A
R
= 500
V
F
R
C
= 500
= 5pF
R
C
L
L
3
1
R
F
= 250
F
R = 500
F
1
R
= 100
-1
-3
-5
R = 250
F
-1
-3
-5
R
= 0
F
R
= 100
F
100k
1M
10M
100M
100M
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 12. GAIN vs FREQUENCY FOR VARIOUS
(A = +2)
FIGURE 11. GAIN vs FREQUENCY FOR VARIOUS
(A = +1)
R
R
FEEDBACK
V
FEEDBACK
V
FN6200 Rev 3.00
Nov 3, 2009
Page 5 of 12
ISL55001
Typical Performance Curves (Continued)
5
3
5
A
= +1
= 0
= 500
= 5pF
V
= ±15V
= +2
= 500
= 500
= 5pF
V
S
C
= 10pF
R
R
C
A
IN
F
L
L
V
R
R
C
C
= 6.8pF
= 4.7pF
F
L
L
IN
3
1
V
= ±2.5V
S
V
= ±5V
S
C
IN
1
C
= 2.2pF
IN
V
= ±15V
S
-1
-3
-5
-1
-3
-5
C
= 0pF
V
S
= ±10V
IN
100k
1M
10M
100M
100k
1M
10M
FREQUENCY (Hz)
100M
1G
FREQUENCY (Hz)
FIGURE 13. GAIN vs FREQUENCY FOR VARIOUS
INVERTING INPUT CAPACITANCE (C
FIGURE 14. GAIN vs FREQUENCY FOR VARIOUS SUPPLY
SETTINGS
)
IN
-10
-10
V
= ±15V
V
= ±15V
S
S
-20
-30
-40
-50
-60
-70
-80
-90
-100
-20
-30
-40
-50
-60
-70
-80
-90
-100
NEG_PSRR
POS_PSRR
10k
100k
1M
FREQUENCY (Hz)
10M
100M
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FIGURE 16. POWER SUPPLY REJECTION RATIO (PSRR)
FIGURE 15. COMMON-MODE REJECTION RATIO (CMRR)
-30
V
= ±15V
= +2
= 500
= 500
= 5pF
S
A
V
R
V
= ±15V
= 500
= 2V
V
S
L
OUT
-40
-50
R
R
C
F
L
L
THD
P-P
THD
F
= 2MHz
IN
-60
-70
2nd HD
3rd HD
-80
3rd HD
2nd HD
-90
-100
0
2
4
6
8
10 12 14 16 18 20 22 24 26
OUTPUT VOLTAGE (V)
FIGURE 17. HARMONIC DISTORTION vs FREQUENCY
(A = +1)
FIGURE 18. HARMONIC DISTORTION vs OUTPUT
VOLTAGE(A = +2)
V
V
FN6200 Rev 3.00
Nov 3, 2009
Page 6 of 12
ISL55001
Typical Performance Curves (Continued)
25
20
30
R
C
= 500
L
L
A
= +1
V
= ±15V
= 500
= 5pF
V
S
=5pF
R
C
L
L
25
20
15
10
A
= +2
A
= +2
V
A
R
= +1
= 0
R
= 500
V
F
F
15
10
A
R
= +1
= 500
V
F
5
0
5
0
1M
10M
FREQUENCY (Hz)
100M
0
3
6
9
12
15
SUPPLY VOLTAGES (±V)
FIGURE 19. OUTPUT SWING vs FREQUENCY FOR
VARIOUS GAIN SETTINGS
FIGURE 20. OUTPUT SWING vs SUPPLY VOLTAGE FOR
VARIOUS GAIN SETTINGS
V
A
= ±15V
= +1
V
V
= ±15V
= +1
S
S
A
V
R
R
C
V
= 0
R
R
C
V
= 0
F
L
L
F
L
L
= 500
= 5pF
= 400mV
= 500
= 5pF
= 4V
t
=
t
=
OUT
RISE
2ns
OUT
FALL
2.2ns
80% to 20%
20% to 80%
t
= 7.2ns
t
= 8.4ns
FALL
80% to 20%
RISE
20% to 80%
FIGURE 22. SMALL SIGNAL RISE AND FALL TIMES
FIGURE 21. LARGE SIGNAL RISE AND FALL TIMES
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
12.5
10.0
1.8
1.6
1.4
1.2
75
1.136W
1.0
0.8
5.0
SO8
0.6
= +120°C/W
JA
A
= +1
V
0.4
0.2
0
R
= 0
2.5
0
F
= 500
R
L
= 5pF
C
L
0
3
6
9
12
15
0
25
50
75 85 100
125
150
SUPPLY VOLTAGES (±V)
AMBIENT TEMPERATURE (°C)
FIGURE 23. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 24. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FN6200 Rev 3.00
Nov 3, 2009
Page 7 of 12
ISL55001
setting is greater than 1, the gain resistor R can then
G
be chosen to make up for any gain loss which may be
created by the additional series resistor at the output.
Product Description
The ISL55001 is a wide bandwidth, low power, and low
offset voltage feedback operational amplifier. This device
is internally compensated for closed loop gain of +1 or
greater. Connected in voltage follower mode and driving
a 500 load, the -3dB bandwidth is around a 220MHz.
Driving a 150 load and a gain of 2, the bandwidth is
about 90MHz while maintaining a 300V/µs slew rate.
When used as a cable driver, double termination is
always recommended for reflection-free performance.
For those applications, a back-termination series resistor
at the amplifier's output will isolate the amplifier from the
cable and allow extensive capacitive drive. However,
other applications may have high capacitive loads
without a back-termination resistor. Again, a small series
resistor at the output can help to reduce peaking.
The ISL55001 is designed to operate with supply voltage
from +15V to -15V. That means for single supply
application, the supply voltage is from 0V to 30V. For split
supplies application, the supply voltage is from ±15V.
The amplifier has an input common-mode voltage range
Output Drive Capability
The ISL55001 does not have internal short circuit
protection circuitry. It has a typical short circuit current of
140mA. If the output is shorted indefinitely, the power
dissipation could easily overheat the die or the current
could eventually compromise metal integrity. Maximum
reliability is maintained if the output current never
exceeds ±60mA. This limit is set by the design of the
internal metal interconnect. Note that in transient
applications, the part is robust.
from 1.5V above the negative supply (V - pin) to 1.5V
S
below the positive supply (V + pin). If the input signal is
S
outside the above specified range, it will cause the output
signal to be distorted.
The outputs of the ISL55001 can swing from -12.75V to
+13.4V for V = ±15V. As the load resistance becomes
S
lower, the output swing is lower.
Choice of Feedback Resistor and Gain
Bandwidth Product
Short circuit protection can be provided externally with a
back match resistor in series with the output placed close
as possible to the output pin. In video applications this
would be a 75 resistor and will provide adequate short
circuit protection to the device. Care should still be taken
not to stress the device with a short at the output.
For applications that require a gain of +1, no feedback
resistor is required. Just short the output pin to the
inverting input pin. For gains greater than +1, the
feedback resistor forms a pole with the parasitic
capacitance at the inverting input. As this pole becomes
smaller, the amplifier's phase margin is reduced. This
causes ringing in the time domain and peaking in the
Power Dissipation
With the high output drive capability of the ISL55001, it
is possible to exceed the +150°C absolute maximum
junction temperature under certain load current
conditions. Therefore, it is important to calculate the
maximum junction temperature for an application to
determine if load conditions or package types need to be
modified to assure operation of the amplifier in a safe
operating area.
frequency domain. Therefore, R can't be very big for
F
optimum performance. If a large value of R must be
F
used, a small capacitor in the few Pico Farad range in
parallel with R can help to reduce the ringing and
F
peaking at the expense of reducing the bandwidth. For
gain of +1, R = 0 is optimum. For the gains other than
F
+1, optimum response is obtained with R with proper
F
selection of R and R (see Figures 15 and 16 for
F
G
The maximum power dissipation allowed in a package is
determined according to Equation 1:
selection).
Video Performance
T
– T
JMAX
AMAX
(EQ. 1)
--------------------------------------------
PD
=
MAX
For good video performance, an amplifier is required to
maintain the same output impedance and the same
frequency response as DC levels are changed at the
output. This is especially difficult when driving a standard
video load of 150, because of the change in output
current with DC level. The dG and dP of this device is
about 0.01% and 0.05°, while driving 150 at a gain
of 2. Driving high impedance loads would give a similar
or better dG and dP performance.
JA
Where:
• T
• T
= Maximum junction temperature
= Maximum ambient temperature
JMAX
AMAX
• = Thermal resistance of the package
JA
The maximum power dissipation actually produced by an
IC is the total quiescent supply current times the total
power supply voltage, plus the power in the IC due to the
load, or: For sourcing use Equation 2:
Driving Capacitive Loads and Cables
The ISL55001 can drive 47pF loads in parallel with 500
with less than 3dB of peaking at gain of +1 and as much
as 100pF at a gain of +2 with under 3db of peaking. If
less peaking is desired in applications, a small series
resistor (usually between 5 to 50) can be placed in
series with the output to eliminate most peaking.
However, this will reduce the gain slightly. If the gain
n
V
OUTi
PD
= (V + – V - I
+
OUTi
V + – V
---------------------
MAX
S
S
SMAX
S
R
LOADi
i = 1
(EQ. 2)
FN6200 Rev 3.00
Nov 3, 2009
Page 8 of 12
ISL55001
For sinking use Equation 3:
capacitor from V + to GND will suffice. This same
S
capacitor combination should be placed at each supply
pin to ground if split supplies are to be used. In this case,
n
V
OUTi
V
PD
= (V + – V - I
+
– V -
OUTi
---------------------
MAX
S
S
SMAX
S
R
LOADi
the V - pin becomes the negative supply rail.
S
i = 1
(EQ. 3)
Printed Circuit Board Layout
Where:
• V = Positive supply voltage
For good AC performance, parasitic capacitance should
be kept to minimum. Use of wire wound resistors should
be avoided because of their additional series inductance.
Use of sockets should also be avoided if possible. Sockets
add parasitic inductance and capacitance that can result
in compromised performance. Minimizing parasitic
capacitance at the amplifier's inverting input pin is very
important. The feedback resistor should be placed very
close to the inverting input pin. Strip line design
S+
• V = Negative supply voltage
S-
• I
= Maximum quiescent supply current
= Average output voltage of the application
SMAX
• V
• R
OUT
LOAD
LOAD
= Load resistance tied to ground
= Load current
techniques are recommended for the signal traces.
• I
• n = number of amplifiers (n = 1 for ISL55001)
By setting the two PD equations (Equations 1, 2 or 3)
Application Circuits
Sallen-Key Low Pass Filter
A common and easy to implement filter taking advantage
of the wide bandwidth, low offset and low power
demands of the ISL55001. A derivation of the transfer
function is provided for convenience (see Figure 25).
MAX
equal to each other, we can solve the output current and
to avoid the device overheat.
R
LOAD
Power Supply Bypassing Printed Circuit
Board Layout
As with any high frequency device, a good printed circuit
board layout is necessary for optimum performance.
Lead lengths should be as short as possible. The power
supply pin must be well bypassed to reduce the risk of
oscillation. For normal single supply operation, where the
Sallen-Key High Pass Filter
Again this useful filter benefits from the characteristics of
the ISL55001. The transfer function is very similar to the
low pass so only the results are presented (see
Figure 26).
V - pin is connected to the ground plane, a single 4.7µF
S
tantalum capacitor in parallel with a 0.1µF ceramic
Holp K
V
2
5V
1
wo
C
5
R
1
C
1
R
2
2
C
2
1nF
1
C
1
Q
R
1
C
C
1
2
R
R
1
C
2
1
R
R
2
1
C
C
2
1nF
(1 K )
R
R
2
1
R
2
C
1
V+
+
-
V
OUT
1k
1k C
2
V
1
R
1k
7
1nF
V-
R
B
1k
R
A
C
K
5
1k
Holp
wo
4 K
1nF
2
V
3
5V
RC
2
Q
4 K
FIGURE 25. SALLEN-KEY LOW PASS FILTER
FN6200 Rev 3.00
Nov 3, 2009
Page 9 of 12
ISL55001
V
5V
2
Holp K
1
C
5
wo
R
1
C
1
R
2
C
2
1nF
1
R
1
Q
R
1
C
C
1
2
R
R
1
C
2
1
R
2
1
C
C
2
1k
C
1nF
2
(1 K )
C
R
2
2
C
R
1
1
V+
V-
+
-
V
OUT
R
1k
2
V
1nF
1
R
1k
7
Equations simplify if we let
all components be equal R = C
R
B
K
Holp
wo
Q
1k
4 K
R
A
C
5
1k
2
1nF
RC
V
3
5V
2
4 K
FIGURE 26. SALLEN-KEY HIGH PASS FILTER
coupled noise and ground potential errors inherent in
remote transmission. This configuration also provides
enhanced bandwidth, wider output swing and faster slew
rate than conventional three amplifier solutions with only
the cost of an additional amplifier and few resistors (see
Figure 27).
Differential Output Instrumentation
Amplifier
The addition of a third amplifier to the conventional three
amplifier instrumentation amplifier introduces the
benefits of differential signal realization, specifically the
advantage of using common-mode rejection to remove
A
1
R
R
3
3
e
1
+
-
A
3
R
e
2
o
o
-
e
e
= –1 + 2R R e – e
e
= 1 + 2R R e – e
o4 2 G 1 2
o3
o
2
G
1
2
+
+
= –21 + 2R R e – e
2
G
1
2
R
R
3
3
2f
C1 2
A
= –21 + 2R R
2 G
RE
-----------------
Di
BW =
A
R
e
G
Di
R
R
3
3
A
4
R
2
-
+
-
e
o
A
2
R
R
3
3
-
+
e
2
FIGURE 27. DIFFERENTIAL OUTPUT INSTRUMENTATION AMPLIFIER
FN6200 Rev 3.00
Nov 3, 2009
Page 10 of 12
ISL55001
to increasing strain, its resistance changes, resulting in
an imbalance in the bridge. A voltage variation from
the referenced high accuracy source is generated and
translated to the difference amplifier through the buffer
stage. This voltage difference as a function of the strain
is converted into an output voltage (see Figure 28).
Strain Gauge
The strain gauge is an ideal application to take
advantage of the moderate bandwidth and high
accuracy of the ISL55001. The operation of the circuit
is very straightforward. As the strain variable
component resistor in the balanced bridge is subjected
+
V
2
5V
-
C
6
VARIABLE
SUBJECT TO
1nF
1k
16
1k
+
-
R
R
1k
1k
17
18
V
0V
R
R
5
15
1k
V+
V-
+
-
V
OUT
(V1+V2+V3+V4)
R
1k
L
1k
R
F
1k
C
12
1nF
+
V
4
5V
-
FIGURE 28. STRAIN GAUGE AMPLIFIER
© Copyright Intersil Americas LLC 2005-2009. All Rights Reserved.
All trademarks and registered trademarks are the property of their respective owners.
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6200 Rev 3.00
Nov 3, 2009
Page 11 of 12
ISL55001
Package Outline Drawing
M8.15E
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 0, 08/09
4
4.90 ± 0.10
A
DETAIL "A"
0.22 ± 0.03
B
6.0 ± 0.20
3.90 ± 0.10
4
PIN NO.1
ID MARK
5
(0.35) x 45°
4° ± 4°
0.43 ± 0.076
1.27
0.25 M C A B
SIDE VIEW “B”
TOP VIEW
1.75 MAX
1.45 ± 0.1
0.25
GAUGE PLANE
C
SEATING PLANE
0.175 ± 0.075
SIDE VIEW “A
0.10 C
0.63 ±0.23
DETAIL "A"
(0.60)
(1.27)
NOTES:
(1.50)
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
(5.40)
4. Dimension does not include interlead flash or protrusions.
Interlead flash or protrusions shall not exceed 0.25mm per side.
The pin #1 identifier may be either a mold or mark feature.
Reference to JEDEC MS-012.
5.
6.
TYPICAL RECOMMENDED LAND PATTERN
FN6200 Rev 3.00
Nov 3, 2009
Page 12 of 12
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