ISL80138 [RENESAS]
40V, Low Quiescent Current, 50mA Linear Regulator;
| 型号： | ISL80138 |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | 40V, Low Quiescent Current, 50mA Linear Regulator |
| 文件： | 总10页 (文件大小：697K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATASHEET
ISL80136
FN7970
Rev 2.00
August 11, 2015
40V, Low Quiescent Current, 50mA Linear Regulator
The ISL80136 is a high voltage, low quiescent current linear
regulator ideally suited for “always-on” and “keep alive”
applications. The ISL80136 operates from an input voltage of
+6V to +40V under normal operating conditions, consuming
only 18µA of quiescent current at no load.
Features
• Wide V range of 6V to 40V
IN
• Adjustable output voltage from 2.5V to 12V
• Guaranteed 50mA output current
The ISL80136 offers adjustable output voltages from 2.5V to
12V. It features an EN pin that can be used to put the device
into a low-quiescent current shutdown mode where it draws
only 1.8µA of supply current. The device features over-
temperature shutdown and current limit protection.
• Ultra low 18µA typical quiescent current
• Low 1.8µA of typical shutdown current
• ±1% accurate voltage reference
• Low dropout voltage of 120mV at 50mA
• 40V tolerant logic level (TTL/CMOS) enable input
• Stable operation with 10µF output capacitor
• 5kV ESD HBM rated
The ISL80136 is rated over the -40°C to +125°C temperature
range and is available in an 8 lead EPSOIC with an exposed
pad package.
TABLE 1. KEY DIFFERENCES IN FAMILY OF 40V LDO PARTS
• Thermal shutdown and current limit protection
PART NUMBER
ISL80136
MINIMUM I
50mA
OUT
IC PACKAGE
Applications
• Industrial
8 Ld EPSOIC
ISL80138
150mA
14 Ld HTSSOP
• Networking
• Telecom
Related Literature
• ISL80138, “40V, Low Quiescent Current, 150mA Linear
Regulator”
• AN1784, “ISL80136EVAL1Z, ISL80138EVAL1Z Evaluation
Boards User Guide”
70
60
OUT
ADJ
IN
LOAD = 50mA
50
C
IN
COUT
10µF
R1
R2
0.1µF
40
30
20
PAD
(GND)
EN
LOAD = 0mA
10
GND
0
-50
0
50
100
150
TEMPERATURE (°C)
FIGURE 1. TYPICAL APPLICATION
FIGURE 2. QUIESCENT CURRENT vs LOAD CURRENT (AT UNITY
GAIN), V = 14V
IN
FN7970 Rev 2.00
August 11, 2015
Page 1 of 10
ISL80136
Block Diagram
VIN
EN
CONTROL
LOGIC
FET DRIVER
WITH CURRENT
LIMIT
-
EA
+
VOUT
ADJ
REFERENCE
+
SOFT-START
THERMAL
SENSOR
GND
Pin Configuration
ISL80136
(8 LD EPSOIC)
TOP VIEW
IN
NC
NC
EN
1
2
3
4
8
OUT
ADJ
NC
7
6
5
PAD
(GND)
GND
Pin Descriptions
PIN #
PIN NAME
DESCRIPTION
1
IN
Input voltage pin. A minimum 0.1µF X5R/X7R capacitor is required for proper operation. Range: 6V to 40V
Pins have internal termination and can be left not connected. Connection to ground is optional.
2, 3, 6
NC
4
5
7
8
-
EN
High on this pin enables the device. Range: 0V to V
Ground pin.
IN
GND
ADJ
This pin is connected to the external feedback resistor divider, which sets the LDO output voltage.
Regulated output voltage. A 10µF X5R/X7R output capacitor is required for stability. Range: 0V to 12V
It is recommended to solder the PAD to the ground plane.
OUT
PAD
FN7970 Rev 2.00
August 11, 2015
Page 2 of 10
ISL80136
Ordering Information
PART
NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP. RANGE
(°C)
ENABLE
PIN
OUTPUT VOLTAGE
(V)
PACKAGE
(RoHS Compliant)
PKG.
DWG. #
ISL80136IBEAJZ
ISL80136EVAL1Z
NOTES:
80136 IBEAJZ
-40 to +125
Yes
ADJ
8 Ld EPSOIC
M8.15B
Evaluation Platform
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL80136. For more information on MSL please see techbrief TB363.
FN7970 Rev 2.00
August 11, 2015
Page 3 of 10
ISL80136
Absolute Maximum Ratings
Thermal Information
IN Pin to GND Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to +45V
OUT Pin to GND Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 16V
EN Pin to GND Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .GND - 0.3V to IN
ADJ Pin to GND Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . .GND - 0.3V to3V
Output Short-circuit Duration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite
ESD Rating
Thermal Resistance (Typical)
8 Ld EPSOIC Package (Notes 4, 5). . . . . . . .
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +175°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
(°C/W)
50
(°C/W)
9
JA
JC
Human Body Model (Tested per JESD22-A114E). . . . . . . . . . . . . . . . 5kV
Machine Model (Tested per JESD-A115-A) . . . . . . . . . . . . . . . . . . . 200V
Charge Device Model (Tested per JESD22-C101C). . . . . . . . . . . . . 2.2kV
Latch-up (Tested per JESD78B; Class II, Level A) . . . . . . . . . . . . . . . 100mA
Recommended Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . -40°C to +125°C
IN Pin to GND Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6V to +40V
OUT Pin to GND Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +2.5V to +12V
EN Pin to GND Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to +40V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
JA
Brief TB379.
5. For , the “case temp” location is the center of the exposed metal pad on the package underside.
JC
Electrical Specifications Recommended Operating Conditions, unless otherwise noted. V = 14V, I
= 1mA, T = T = -40°C to
A J
IN
OUT
+125°C, unless otherwise noted. Typical specifications are at T = +25°C. Boldface limits apply across the operating temperature range, -40°C to
A
+125°C.
MIN
MAX
PARAMETER
Input Voltage Range
Guaranteed Output Current
ADJ Reference Voltage
Line Regulation
SYMBOL
TEST CONDITIONS
(Note 8) TYP (Note 8) UNITS
V
6
40
V
mA
V
IN
I
V
= V
IN OUT
+ VDO
50
OUT
V
EN = High, V = 14V, I
= 0.1mA to 50mA
1.211 1.223 1.235
REF
IN OUT
(V
OUT
low line - V
high 6V < VIN < 40V, IOUT = 1mA
0.04
0.115
%
OUT
line)/V
low line
high
no load
OUT
Load Regulation
(V
OUT
no load - V
OUT
V
= 14V I
, OUT
= 100µA to 50mA
0.25
0.5
%
IN
load)/V
OUT
Dropout Voltage (Note 6)
V
I
I
I
I
= 1mA, V
OUT
= 2.5V
= 2.5V
10
130
10
38
340
48
mV
mV
mV
mV
µA
µA
µA
µA
µA
dB
DO
OUT
OUT
OUT
OUT
= 50mA, V
OUT
= 1mA, V
= 5V
OUT
= 50mA, V
= 5V
120
1.8
18
350
3.64
24
OUT
Shutdown Current
Quiescent Current
I
EN = LOW
SHDN
IQ
EN = HIGH, I
EN = HIGH, I
EN = HIGH, I
EN = HIGH, I
= 0mA
OUT
OUT
OUT
OUT
= 1mA
22
42
= 10mA
= 50mA
34
60
56
82
Power Supply Rejection Ratio
EN FUNCTION
PSRR
f = 100Hz; VIN_RIPPLE = 500mV ; Load = 50mA
P-P
58
EN Threshold Voltage
V
V
V
V
= Off to On
= On to Off
= 0V
1.485
1.93
V
V
EN_H
OUT
OUT
OUT
V
0.935
EN_L
EN Pin Current
I
0.026
1.65
µA
ms
EN
EN to Regulation Time
(Note 7)
t
EN
FN7970 Rev 2.00
August 11, 2015
Page 4 of 10
ISL80136
Electrical Specifications Recommended Operating Conditions, unless otherwise noted. V = 14V, I
= 1mA, T = T = -40°C to
A J
IN
OUT
+125°C, unless otherwise noted. Typical specifications are at T = +25°C. Boldface limits apply across the operating temperature range, -40°C to
A
+125°C. (Continued)
MIN
MAX
PARAMETER
PROTECTION FEATURES
Output Current Limit
Thermal Shutdown
Thermal Shutdown Hysteresis
NOTES:
SYMBOL
TEST CONDITIONS
(Note 8) TYP (Note 8) UNITS
I
V
= 0V
60
118
+165
+20
mA
°C
°C
LIMIT
OUT
Junction Temperature Rising
T
SHDN
T
HYST
6. Dropout voltage is defined as (V - V
) when V
is 2% below the value of V .
OUT
IN OUT
OUT
7. Enable to Regulation is the time the output takes to reach 95% of its final value with V = 14V and EN is taken from V to V in 5ns. The output
IN IL IH
voltage is set at 5V.
8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
FN7970 Rev 2.00
August 11, 2015
Page 5 of 10
ISL80136
Typical Performance Curves
V
= 14V, I
= 1mA, V
= 5V, T = +25 °C unless otherwise specified.
IN
OUT
OUT J
80
30
+125°C
70
25
20
15
10
5
+125°C
60
50
40
+25°C
-40°C
+25°C
-40°C
30
20
10
0
0
0
10
20
INPUT VOLTAGE (V)
30
40
0
10
20
30
40
50
LOAD CURRENT (mA)
FIGURE 4. QUIESCENT CURRENT vs INPUT VOLTAGE (NO LOAD)
FIGURE 3. QUIESCENT CURRENT vs LOAD CURRENT
3.0
2.5
2.0
1.5
1.0
0.5
0
0.010
0.005
V
= 40V
IN
V
= 5V
OUT
0
V
= 14V
IN
V
= 3.3V
OUT
-0.005
-0.010
-50
0
50
TEMPERATURE (°C)
100
150
-50
0
50
100
150
TEMPERATURE (°C)
FIGURE 5. SHUTDOWN CURRENT vs TEMPERATURE (EN = 0)
FIGURE 6. OUTPUT VOLTAGE vs TEMPERATURE (LOAD = 50mA)
5.100
5.075
5.050
5.025
5.000
4.975
4.950
EN AT 500mV/DIV
+125°C
+25°C
-40°C
V
AT 1V/DIV
OUT
4.925
4.900
TIME AT 500µs/DIV
0
10
20
30
40
50
LOAD CURRENT (mA)
FIGURE 8. START-UP WAVEFORM
FIGURE 7. OUTPUT VOLTAGE vs LOAD CURRENT
FN7970 Rev 2.00
August 11, 2015
Page 6 of 10
ISL80136
Typical Performance Curves
V
= 14V, I
= 1mA, V
= 5V, T = +25 °C unless otherwise specified. (Continued)
IN
OUT
OUT J
80
V
= 3.3V
OUT
70
60
50
40
30
20
10
0
I
= 0A
OUT
I
= 25mA
OUT
V
AT 100mV/DIV
OUT
I
= 50mA
OUT
50mA
I
0mA
OUT
TIME AT 5ms/DIV
100
1k
10k
FREQUENCY (Hz)
100k
1M
FIGURE 10. PSRR vs FREQUENCY FOR VARIOUS LOAD CURRENT,
= 3.3V
FIGURE 9. LOAD TRANSIENT RESPONSE
V
OUT
90
80
70
60
50
40
30
20
10
0
10
1
V
= 5V
OUT
I
= 0A
OUT
I
= 25mA
OUT
0.1
0.01
I
= 50mA
V
V
= 14V
OUT
IN
= 3.3V
OUT
C
= 10µF
OUT
OUT
I
= 10mA
100
1k
10k
FREQUENCY (Hz)
100k
1M
10
100
1k
10k
100k
FREQUENCY (Hz)
BW = 100<f<100kHz output noise voltage ~26 µV
RMS
FIGURE 11. PSRR vs FREQUENCY FOR VARIOUS LOAD CURRENT,
= 5V
FIGURE 12. OUTPUT NOISE SPECTRAL DENSITY, I
= 10mA
OUT
V
OUT
10
1
V
V
= 14V
IN
0.1
= 3.3V
= 10µF
OUT
C
OUT
I
= 50mA
OUT
0.01
10
100
1k
10k
100k
FREQUENCY (Hz)
BW = 100<f<100kHz output noise voltage ~33 µV
RMS
FIGURE 13. OUTPUT NOISE SPECTRAL DENSITY, I
= 50mA
OUT
FN7970 Rev 2.00
August 11, 2015
Page 7 of 10
ISL80136
Output Voltage Setting
The output voltage is programmed using an external resistor
divider, as shown in Figure 14.
Functional Description
Functional Overview
The ISL80136 is a high performance, high voltage, low-dropout
regulator (LDO) with 50mA sourcing capability. The part is rated
to operate across the -40°C to +125°C temperature range.
Featuring ultra-low quiescent current, it makes an ideal choice
for “always-on” applications. It works well under a “load dump
condition” where the input voltage could rise up to 40V. The
device also features current limit and thermal shutdown
protection.
OUT
IN
CIN
0.1µF
COUT
10µF
R1
R2
EN
ADJ
(ISL80136)
GND
Enable Control
FIGURE 14. SETTING OUTPUT VOLTAGE
The ISL80136 features an Enable pin. When it is pulled low, the
IC goes into shutdown mode. In this condition, the device draws
less than 2µA. Driving the pin high turns the device on. For
always on operation, the EN pin can be tied directly to IN.
The output voltage is calculated using Equation 1:
R1
-------
+ 1
(EQ. 1)
V
= 1.223V
OUT
R2
Current Limit Protection
The ISL80136 has internal current limit functionality to protect
the regulator during fault conditions. During current limit, the
output sources a fixed amount of current largely independent of
the output voltage. If the short or overload is removed from V
the output returns to normal voltage regulation mode.
Power Dissipation
The junction temperature must not exceed the range specified in
“Recommended Operating Conditions” on page 4. The power
dissipation can be calculated using Equation 2:
,
OUT
P
= V – V
I
+ V I
OUT IN GND
(EQ. 2)
D
IN
OUT
The maximum allowable junction temperature, T
maximum expected ambient temperature, T
A(MAX)
the maximum allowable junction temperature rise (T ), as shown
in Equation 3:
and the
will determine
Thermal Fault Protection
J(MAX)
In the event that the die temperature exceeds typically +165°C,
the output of the LDO will shut down until the die temperature
cools down to typically +145°C. The level of power dissipated,
combined with the ambient temperature and the thermal
impedance of the package, will determine if the junction
temperature exceeds the thermal shutdown temperature. Also
see the section on “Power Dissipation”.
J
(EQ. 3)
T = T
– T
AMAX
J
JMAX
To calculate the maximum ambient operating temperature, use
the junction-to-ambient thermal resistance ( ), as shown in
JA
Equation 4:
(EQ. 4)
T
= P
x + T
DMAX JA A
JMAX
Application Information
Board Layout Recommendations
Input and Output Capacitors
A good PCB layout is important to achieve expected
For the output, a ceramic capacitor (X5R or X7R) with a
capacitance of 10µF is recommended for the ISL80136 to
maintain stability. The ground connection of the output capacitor
should be routed directly to the GND pin of the device and also
placed close to the IC. A minimum of 0.1µF (X5R or X7R) is
recommended at the input.
performance. Consideration should be taken when placing the
components and routing the trace to minimize the ground
impedance, and keep the parasitic inductance low. The input and
output capacitors should have a good ground connection and be
placed as close to the IC as possible. The ADJ feedback trace
should be away from other noisy traces. Connect the exposed
pad to the ground plane using as many vias as possible within
the pad for the best thermal relief.
FN7970 Rev 2.00
August 11, 2015
Page 8 of 10
ISL80136
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you
have the latest Rev.
DATE
REVISION
FN7970.2
CHANGE
Removed DFN package option throughout the datasheet.
August 11, 2015
On page 1, updated Key Differences Table, Replaced “ADJ OR FIXED VOUT” Column with “IC PACKAGE” column.
On page 2, updated Block Diagram, removed two resistors and switched polarity of EA.
Electrical spec table on page 4:
-Removed “C = 0.1μF, C
= 10μF” from the Electrical Specification heading.
IN
OUT
-Updated the ADJ Reference Voltage Test Condition IOUT value from “IOUT = 0.1mA” to “IOUT = 0.1mA to
50mA”
-Updated the Line Regulation
*Symbol, from “V
*Test Conditions, from “3V ≤ V ≤ 40V, I
/V ” to “(V
low line - V
OUT
high line)/V
OUT
low line”.
= 1mA”
OUT
IN OUT
= 1mA” to “6V < V 40V, I
IN
OUT
IN OUT
-Updated the Load Regulation
*Symbol, from “V
/I
” to “(V
OUT
no load - V
OUT
high load)/V no load”
OUT
OUT OUT
*Test Conditions from “V = V
+V ” to “V = 14V”
IN OUT
DO IN
-Updated Dropout Voltage Test Condition VOUT value (First two rows only) from “VOUT = 3.3V” to
“VOUT = 2.5V”.
Updated Note 6 from “Dropout voltage is defined as (V - V
) when V
is 2% below the value of V when
is 2% below the value of V .”
OUT
IN OUT
OUT
OUT
OUT
V
= V
OUT
+ 3V.” to “Dropout voltage is defined as (V - V ) when V
IN
IN OUT
Removed Figure 9, “POWER SUPPLY REJECTION RATIO (LOAD = 50mA)”
Added figures 10 through 13 on page 7.
January 31, 2012
FN7970.1
FN7970.0
Added DFN package option throughout the datasheet.
Initial Release.
December 15, 2011
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support
© Copyright Intersil Americas LLC 2011-2015. All Rights Reserved.
All trademarks and registered trademarks are the property of their respective owners.
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7970 Rev 2.00
August 11, 2015
Page 9 of 10
ISL80136
Small Outline Exposed Pad Plastic Packages (EPSOIC)
M8.15B
N
8 LEAD NARROW BODY SMALL OUTLINE EXPOSED PAD
PLASTIC PACKAGE
INDEX
AREA
0.25(0.010)
M
B M
H
E
INCHES
MILLIMETERS
-B-
SYMBOL
MIN
MAX
MIN
1.43
0.03
0.35
0.19
4.80
3.81
MAX
1.68
0.13
0.49
0.25
4.98
3.99
NOTES
A
A1
B
C
D
E
e
0.056
0.001
0.0138
0.0075
0.189
0.150
0.066
0.005
0.0192
0.0098
0.196
0.157
-
1
2
3
-
TOP VIEW
9
-
L
3
SEATING PLANE
A
4
-A-
D
o
0.050 BSC
1.27 BSC
-
h x 45
H
h
0.230
0.010
0.016
0.244
0.016
0.035
5.84
0.25
0.41
6.20
0.41
0.89
-
-C-
5
L
6
e
B
A1
C
N
8
8
7
0.10(0.004)
0°
-
8°
0°
-
8°
-
11
P
0.25(0.010) M
SIDE VIEW
C A M B S
0.094
0.094
2.387
2.387
P1
-
-
11
Rev. 5 8/10
NOTES:
1
2
3
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
P1
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
N
4. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
P
BOTTOM VIEW
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: INCH. Converted millimeter dimensions
are not necessarily exact.
11. Dimensions “P” and “P1” are thermal and/or electrical enhanced
variations. Values shown are maximum size of exposed pad
within lead count and body size.
FN7970 Rev 2.00
August 11, 2015
Page 10 of 10
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SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9136_11
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SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9137
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SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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