ISL8483EIPZ-T [RENESAS]

LINE TRANSCEIVER, PDIP8, ROHS COMPLIANT, PLASTIC, MS-001BA, 8 PIN;
ISL8483EIPZ-T
型号: ISL8483EIPZ-T
厂家: RENESAS TECHNOLOGY CORP    RENESAS TECHNOLOGY CORP
描述:

LINE TRANSCEIVER, PDIP8, ROHS COMPLIANT, PLASTIC, MS-001BA, 8 PIN

光电二极管
文件: 总14页 (文件大小:454K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ISL8483E, ISL8485E  
®
Data Sheet  
September 9, 2008  
FN6048.9  
ESD Protected to ±15kV, 5V, Low Power,  
High Speed or Slew Rate Limited,  
RS-485/RS-422 Transceivers  
Features  
• Pb-Free Available (RoHS Compliant)  
• Military and Extended Industrial Temperature Options  
(+125°C)  
These Intersil RS-485, RS-422 devices are ESD protected,  
BiCMOS 5V powered, single transceivers that meet both the  
RS-485 and RS-422 standards for balanced communication.  
Each driver output/receiver input is protected against ±15kV  
ESD strikes, without latch-up. Unlike competitive devices,  
this Intersil family is specified for 10% tolerance supplies  
(4.5V to 5.5V).  
• RS-485 I/O Pin ESD Protection . . . . . . . . . . . . . ±15kV HBM  
- Class 3 ESD Level on all Other Pins . . . . . . >7kV HBM  
• Specified for 10% Tolerance Supplies  
• High Data Rate Version (ISL8485E) . . . . . up to 10Mbps  
• Slew Rate Limited Version for Error Free Data  
Transmission (ISL8483E) . . . . . . . . . . . . . up to 250kbps  
The ISL8483E utilizes slew rate limited drivers which reduce  
EMI, and minimize reflections from improperly terminated  
transmission lines, or un-terminated stubs in multidrop and  
multipoint applications.  
• Single Unit Load Allows up to 32 Devices on the Bus  
• 1nA Low Current Shutdown Mode (ISL8483E)  
Data rates up to 10Mbps are achievable by using the  
ISL8485E which features higher slew rates.  
• Low Quiescent Current:  
- 160µA (ISL8483E)  
- 500µA (ISL8485E)  
Both devices present a “single unit load” to the RS-485 bus,  
which allows up to 32 transceivers on the network.  
• -7V to +12V Common Mode Input Voltage Range  
• Three State Rx and Tx Outputs  
Receiver (Rx) inputs feature a “fail-safe if open” design,  
which ensures a logic high Rx output, if Rx inputs are  
floating.  
• 30ns Propagation Delays, 5ns Skew (ISL8485E)  
• Operate from a Single +5V Supply (10% Tolerance)  
Driver (Tx) outputs are short circuit protected, even for  
voltages exceeding the power supply voltage. Additionally,  
on-chip thermal shutdown circuitry disables the Tx outputs to  
prevent damage if power dissipation becomes excessive.  
• Current Limiting and Thermal Shutdown for driver  
Overload Protection  
Applications  
These half duplex configurations multiplex the Rx inputs and  
Tx outputs to allow transceivers with Rx and Tx disable  
functions in 8 lead packages.  
• Factory Automation  
• Security Networks  
• Building Environmental Control Systems  
• Industrial/Process Control Networks  
• Level Translators (e.g., RS-232 to RS-422)  
• RS-232 “Extension Cords”  
TABLE 1. SUMMARY OF FEATURES  
NO. OF  
DEVICES  
PART  
HALF/FULL  
MIL  
ALLOWED DATA RATE SLEW-RATE RECEIVER/DRIVER QUIESCENT LOW POWER  
PIN  
NUMBER  
DUPLEX TEMP? ON BUS  
(Mbps)  
0.25  
10  
LIMITED?  
ENABLE?  
I
(µA)  
SHUTDOWN? COUNT  
CC  
160  
500  
ISL8483E  
ISL8485E  
Half  
Half  
No  
32  
32  
Yes  
Yes  
Yes  
No  
8
8
Yes  
No  
Yes  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright Intersil Americas Inc. 2003, 2004, 2005, 2008. All Rights Reserved.  
1
All other trademarks mentioned are the property of their respective owners.  
ISL8483E, ISL8485E  
Ordering Information  
Pinout  
ISL8483E, ISL8485E  
(8 LD PDIP, SOIC)  
TOP VIEW  
TEMP.  
RANGE  
(°C)  
PART  
PKG.  
PACKAGE DWG. #  
PART NUMBER  
MARKING  
ISL8483ECPZ  
(Note)  
ISL8483ECPZ -0 to +70 8 Ld PDIP* E8.3  
(Pb-free)  
RO  
RE  
DE  
DI  
1
2
3
4
8
7
6
5
V
CC  
R
D
B/Z  
ISL8483EIB**  
8483EIB  
-40 to +85 8 Ld SOIC M8.15  
A/Y  
ISL8483EIBZ** 8483EIBZ  
(Note)  
-40 to +85 8 Ld SOIC M8.15  
(Pb-free)  
GND  
ISL8483EIP  
ISL8483EIP  
-40 to +85 8 Ld PDIP E8.3  
ISL8483EIPZ  
(Note)  
ISL8483EIPZ -40 to +85 8 Ld PDIP* E8.3  
(Pb-free)  
Truth Tables  
ISL8485EABZ** 8485EABZ  
(Note)  
-40 to +125 8 Ld SOIC M8.15  
(Pb-free)  
TRANSMITTING  
INPUTS  
OUTPUTS  
ISL8485ECB**  
8485ECB  
0 to +70 8 Ld SOIC M8.15  
RE  
X
DE  
1
DI  
1
Z
0
Y
1
ISL8485ECBZ** 8485ECBZ  
(Note)  
0 to +70 8 Ld SOIC M8.15  
(Pb-free)  
X
1
0
1
0
ISL8485ECP  
ISL8485ECP  
0 to +70 8 Ld PDIP E8.3  
0
0
X
X
High-Z  
High-Z *  
High-Z  
High-Z *  
ISL8485ECPZ  
(Note)  
ISL8485ECPZ 0 to +70 8 Ld PDIP* E8.3  
(Pb-free)  
1
0
ISL8485EIB**  
8485EIB  
-40 to +85 8 Ld SOIC M8.15  
*Shutdown Mode for ISL8483E (see Note 7)  
ISL8485EIBZ** 8485EIBZ  
(Note)  
-40 to +85 8 Ld SOIC M8.15  
(Pb-free)  
RECEIVING  
INPUTS  
ISL8485EIP  
ISL8485EIP  
-40 to +85 8 Ld PDIP E8.3  
OUTPUT  
ISL8485EIPZ  
(Note)  
ISL8485EIPZ -40 to +85 8 Ld PDIP* E8.3  
(Pb-free)  
RE  
0
DE  
0
A-B  
+0.2V  
-0.2V  
Inputs Open  
X
RO  
1
0
ISL8485EMPZ  
(Note)  
ISL8485EMPZ -55 to +125 8 Ld PDIP* E8.3  
(Pb-free)  
0
0
0
0
1
*Pb-free PDIPs can be used for through hole wave solder  
processing only. They are not intended for use in Reflow solder  
processing applications.  
1
0
High-Z*  
High-Z  
1
1
X
**Add “-T” suffix for tape and reel. Please refer to TB347 for details  
on reel specifications  
*Shutdown Mode for ISL8483E (see Note 7)  
NOTE: These Intersil Pb-free plastic packaged products employ  
special Pb-free material sets; molding compounds/die attach  
materials and 100% matte tin plate plus anneal- (e3 termination  
finish, which is RoHS compliant and compatible with both SnPb and  
Pb-free soldering operations). Intersil Pb-free products are MSL  
classified at Pb-free peak reflow temperatures that meet or exceed  
the Pb-free requirements of IPC/JEDEC J STD-020.  
FN6048.9  
September 9, 2008  
2
ISL8483E, ISL8485E  
Pin Descriptions  
PIN  
FUNCTION  
RO  
RE  
Receiver output: If A > B by at least 0.2V, RO is high; If A < B by 0.2V or more, RO is low; RO = High if A and B are unconnected (floating).  
Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high.  
Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high. They are high impedance when DE is low.  
Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low.  
Ground connection.  
DE  
DI  
GND  
A/Y  
±15kV HBM ESD Protected, RS485, RS4-422 level noninverting receiver input and noninverting driver output. Pin is an input (A) if  
DE = 0; pin is an output (Y) if DE = 1.  
B/Z  
±15kV HBM ESD Protected, RS485, RS4-422 level inverting receiver input and inverting driver output. Pin is an input (B) if DE = 0;  
pin is an output (Z) if DE = 1.  
V
System power supply input (4.5V to 5.5V).  
CC  
Typical Operating Circuits  
ISL8483E, ISL8485E  
+5V  
+5V  
+
+
0.1µF  
0.1µF  
8
8
V
CC  
V
CC  
RO  
1
2
4
DI  
R
D
RE  
DE  
R
R
3
2
T
T
7
6
B/Z  
A/Y  
DE  
RE  
7
6
B/Z  
A/Y  
3
4
DI  
1
RO  
R
D
GND  
GND  
5
5
FN6048.9  
September 9, 2008  
3
ISL8483E, ISL8485E  
Absolute Maximum Ratings  
Thermal Information  
V
to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V  
Thermal Resistance (Typical, Note 1)  
θJA (°C/W)  
CC  
Input Voltages  
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . .  
8 Ld PDIP Package* . . . . . . . . . . . . . . . . . . . . . . . .  
Maximum Junction Temperature (Plastic Package) . . . . . . +150°C  
Maximum Storage Temperature Range. . . . . . . . . .-65°C to +150°C  
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below  
http://www.intersil.com/pbfree/Pb-FreeReflow.asp  
170  
140  
DI, DE, RE . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to (V  
Input/Output Voltages  
+0.5V)  
CC  
A/Y, B/Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -8V to +12.5V  
RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to (V  
Short Circuit Duration  
+0.5V)  
CC  
Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous  
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table  
*Pb-free PDIPs can be used for through hole wave solder processing  
only. They are not intended for use in reflow solder processing  
applications.  
Operating Conditions  
Temperature Range  
ISL8485ECx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C  
ISL848xEIx. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C  
ISL8485EAx . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +125°C  
ISL8485EMx. . . . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to +125°C  
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and  
result in failures not covered by warranty.  
NOTE:  
1. θ is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.  
JA  
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified.  
CC  
Typicals are at V  
= 5V, T = +25°C, (Note 2)  
CC  
A
TEMP  
MIN  
MAX  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
(°C) (Note 12) TYP (Note 12) UNITS  
DC CHARACTERISTICS  
Driver Differential V  
Driver Differential V  
(no load)  
V
V
Full  
Full  
Full  
Full  
-
2
-
3
V
V
V
V
V
OUT  
OD1  
OD2  
CC  
-
(with load)  
R = 50Ω (RS-422), (Figure1)  
R = 27Ω (RS-485), (Figure 1)  
R = 27Ω or 50Ω, (Figure 1)  
OUT  
1.5  
-
2.3  
0.01  
5
Change in Magnitude of Driver  
Differential V for  
ΔV  
0.2  
OD  
OUT  
Complementary Output States  
Driver Common-Mode V  
V
R = 27Ω or 50Ω, (Figure 1)  
R = 27Ω or 50Ω, (Figure 1)  
Full  
Full  
-
-
-
3
V
V
OUT  
Change in Magnitude of Driver  
Common-Mode V for  
OC  
ΔV  
0.01  
0.2  
OC  
OUT  
Complementary Output States  
Logic Input High Voltage  
Logic Input Low Voltage  
Logic Input Current  
V
DE, DI, RE  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
2
-
-
-
-
-
-
-
-
-
-
0.8  
2
V
V
IH  
V
DE, DI, RE  
IL  
I
DE, DI, RE (ISL8483E)  
DI (ISL8485E)  
-2  
-2  
-25  
-
µA  
µA  
µA  
mA  
mA  
V
IN1  
IN1  
IN1  
IN2  
I
I
I
2
DE, RE (ISL8485E)  
25  
1
Input Current (A, B), (Note 10)  
DE = 0V, V  
5.5V  
= 0V or 4.5 to  
V
V
= 12V  
= -7V  
CC  
IN  
IN  
-
-0.8  
0.2  
Receiver Differential Threshold  
Voltage  
V
-7V V  
12V  
-0.2  
TH  
CM  
Receiver Input Hysteresis  
Receiver Output High Voltage  
Receiver Output Low Voltage  
ΔV  
V
= 0V  
25  
-
3.5  
-
70  
-
-
-
mV  
V
TH  
CM  
V
I
I
= -4mA, V = 200mV  
ID  
Full  
Full  
Full  
OH  
O
O
V
= -4mA, V = 200mV  
ID  
-
0.4  
±1  
V
OL  
Three-State (high impedance)  
Receiver Output Current  
I
0.4V V 2.4V  
-
-
µA  
OZR  
O
Receiver Input Resistance  
R
-7V V  
12V  
CM  
Full  
12  
-
-
kΩ  
IN  
FN6048.9  
September 9, 2008  
4
ISL8483E, ISL8485E  
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified.  
CC  
Typicals are at V  
= 5V, T = +25°C, (Note 2) (Continued)  
CC  
A
TEMP  
MIN  
MAX  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
(°C) (Note 12) TYP (Note 12) UNITS  
No-Load Supply Current, (Note 3)  
I
ISL8485E, DI, RE = 0V or V  
DE = V  
Full  
Full  
Full  
Full  
Full  
Full  
-
-
700  
500  
470  
160  
1
900  
565  
650  
250  
50  
µA  
µA  
µA  
µA  
nA  
mA  
CC  
CC  
CC  
DE = 0V  
DE = V  
ISL8483E, DI, RE = 0V or V  
-
CC  
CC  
DE = 0V  
ISL8483E, DE = 0V, RE = V , DI = 0V or V  
-
Shutdown Supply Current  
Driver Short-Circuit Current,  
I
-
SHDN  
CC  
DE = V , -7V V or V 12V, (Note 4)  
CC  
I
35  
-
250  
OSD1  
CC  
Y
Z
V
= High or Low  
O
Receiver Short-Circuit Current  
I
0V V V  
CC  
Full  
7
-
85  
mA  
OSR  
O
SWITCHING CHARACTERISTICS (ISL8485E)  
Driver Input to Output Delay  
Driver Output Skew  
t
, t  
PLH PHL  
R
R
R
C
C
C
C
= 54Ω, C = 100pF, (Figure 2)  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
25  
18  
-
30  
2
50  
10  
25  
70  
70  
70  
70  
150  
-
ns  
ns  
DIFF  
DIFF  
DIFF  
L
t
= 54Ω, C = 100pF, (Figure 2)  
L
SKEW  
t , t  
Driver Differential Rise or Fall Time  
Driver Enable to Output High  
Driver Enable to Output Low  
Driver Disable from Output High  
Driver Disable from Output Low  
Receiver Input to Output Delay  
= 54Ω, C = 100pF, (Figure 2)  
3
-
11  
17  
14  
19  
13  
40  
5
ns  
R
F
L
t
= 100pF, SW = GND, (Figure 3)  
ns  
ZH  
L
L
L
L
t
= 100pF, SW = V , (Figure 3)  
CC  
-
ns  
ZL  
t
= 15pF, SW = GND, (Figure 3)  
-
ns  
HZ  
t
= 15pF, SW = V , (Figure 3)  
CC  
-
ns  
LZ  
, t  
t
(Figure 4)  
(Figure 4)  
30  
-
ns  
PLH PHL  
Receiver Skew | t  
- t  
|
t
ns  
PLH PHL  
SKD  
Receiver Enable to Output High  
Receiver Enable to Output Low  
Receiver Disable from Output High  
Receiver Disable from Output Low  
Maximum Data Rate  
t
C
C
C
C
= 15pF, SW = GND, (Figure 5)  
Full  
Full  
Full  
Full  
Full  
-
9
50  
50  
50  
50  
-
ns  
ZH  
L
L
L
L
t
= 15pF, SW = V , (Figure 5)  
CC  
-
9
ns  
ZL  
t
= 15pF, SW = GND, (Figure 5)  
-
9
ns  
HZ  
t
= 15pF, SW = V , (Figure 5)  
CC  
-
9
ns  
LZ  
f
(Note 11)  
10  
-
Mbps  
MAX  
SWITCHING CHARACTERISTICS (ISL8483E)  
Driver Input to Output Delay  
Driver Output Skew  
t
, t  
PLH PHL  
R
R
R
C
C
C
C
= 54Ω, C = 100pF, (Figure 2)  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
25  
250  
-
800  
160  
800  
-
2000  
800  
2000  
2000  
2000  
3000  
3000  
2000  
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
kbps  
ns  
ns  
DIFF  
DIFF  
DIFF  
L
t
= 54Ω, C = 100pF, (Figure 2)  
L
SKEW  
t , t  
Driver Differential Rise or Fall Time  
Driver Enable to Output High  
Driver Enable to Output Low  
Driver Disable from Output High  
Driver Disable from Output Low  
Receiver Input to Output Delay  
= 54Ω, C = 100pF, (Figure 2)  
250  
250  
250  
300  
300  
250  
-
R
F
L
t
= 100pF, SW = GND, (Figure 3), (Note 5)  
ZH  
L
L
L
L
t
= 100pF, SW = V , (Figure 3), (Note 5)  
CC  
-
ZL  
t
= 15pF, SW = GND, (Figure 3)  
-
HZ  
t
= 15pF, SW = V , (Figure 3)  
CC  
-
LZ  
, t  
t
(Figure 4)  
(Figure 4)  
350  
25  
10  
10  
10  
10  
-
PLH PHL  
Receiver Skew | t  
- t  
|
t
SKD  
PLH PHL  
Receiver Enable to Output High  
Receiver Enable to Output Low  
Receiver Disable from Output High  
Receiver Disable from Output Low  
Maximum Data Rate  
t
C
C
C
C
= 15pF, SW = GND, (Figure 5), (Note 6)  
Full  
Full  
Full  
Full  
Full  
Full  
-
50  
ZH  
L
L
L
L
t
= 15pF, SW = V , (Figure 5), (Note 6)  
CC  
-
50  
ZL  
t
= 15pF, SW = GND, (Figure 5)  
-
50  
HZ  
t
= 15pF, SW = V , (Figure 5)  
CC  
-
50  
LZ  
f
(Note 11)  
(Note 7)  
250  
50  
-
-
MAX  
Time to Shutdown  
t
200  
-
600  
2000  
SHDN  
Driver Enable from Shutdown to  
Output High  
t
C = 100pF, SW = GND, (Figure 3), (Notes 7, 8) Full  
ZH(SHDN) L  
FN6048.9  
September 9, 2008  
5
ISL8483E, ISL8485E  
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified.  
CC  
Typicals are at V  
= 5V, T = +25°C, (Note 2) (Continued)  
CC  
A
TEMP  
MIN  
MAX  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
(°C) (Note 12) TYP (Note 12) UNITS  
Driver Enable from Shutdown to  
Output Low  
t
C = 100pF, SW = V , (Figure 5), (Notes 7, 8) Full  
-
-
-
-
-
-
2000  
2500  
2500  
ns  
ns  
ns  
ZL(SHDN)  
L
L
L
CC  
Receiver Enable from Shutdown to  
Output High  
t
C
C
= 15pF, SW = GND, (Figure 5), (Notes 7, 9) Full  
ZH(SHDN)  
Receiver Enable from Shutdown to  
Output Low  
t
= 15pF, SW = V , (Figure 5), (Notes 7, 9)  
CC  
Full  
ZL(SHDN)  
ESD PERFORMANCE  
RS-485 Pins (A/Y, B/Z)  
All Other Pins  
Human Body Model  
25  
25  
-
-
±15  
>±7  
-
-
kV  
kV  
NOTES:  
2. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless  
otherwise specified.  
3. Supply current specification is valid for loaded drivers when DE = 0V.  
4. Applies to peak current. See “Typical Performance Curves” on page 10 for more information.  
5. When testing the ISL8483E, keep RE = 0 to prevent the device from entering SHDN.  
6. When testing the ISL8483E, the RE signal high time must be short enough (typically <200ns) to prevent the device from entering SHDN.  
7. The ISL8483E is put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 50ns, the parts are guaranteed  
not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See “Low Power  
Shutdown Mode (ISL8483E Only)” on page 9.  
8. Keep RE = V , and set the DE signal low time >600ns to ensure that the device enters SHDN.  
CC  
9. Set the RE signal high time >600ns to ensure that the device enters SHDN.  
10. Devices meeting these limits are denoted as “single unit load (1 UL)” transceivers. The RS-485 standard allows up to 32 Unit Loads on the bus.  
11. Limits established by characterization and are not production tested.  
12. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by  
characterization and are not production tested.  
Test Circuits and Waveforms  
R
DE  
V
CC  
Z
Y
DI  
V
D
OD  
V
R
OC  
FIGURE 1. DRIVER V  
AND V  
OD  
OC  
FN6048.9  
September 9, 2008  
6
ISL8483E, ISL8485E  
Test Circuits and Waveforms (Continued)  
3V  
0V  
DI  
1.5V  
PLH  
1.5V  
PHL  
t
t
t
V
OH  
50%  
50%  
50%  
C
= 100pF  
= 100pF  
OUT (Y)  
L
DE  
DI  
V
V
OL  
CC  
Z
Y
t
PHL  
PLH  
R
DIFF  
D
V
C
OH  
L
OUT (Z)  
50%  
90%  
SIGNAL  
GENERATOR  
V
OL  
+V  
OD  
90%  
10%  
DIFF OUT (Y - Z)  
10%  
-V  
OD  
t
t
R
F
SKEW = |t  
PLH  
(Y or Z) - t  
(Z or Y)|  
PHL  
FIGURE 2B. MEASUREMENT POINTS  
FIGURE 2A. TEST CIRCUIT  
FIGURE 2. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES  
DE  
DI  
Z
Y
500Ω  
V
CC  
D
GND  
SW  
SIGNAL  
GENERATOR  
C
3V  
L
DE  
1.5V  
1.5V  
NOTE 7  
0V  
(SHDN) FOR ISL8483E ONLY  
PARAMETER OUTPUT  
t
, t  
ZH ZH(SHDN)  
NOTE 7  
t
HZ  
RE  
X
DI  
SW  
GND  
C
(pF)  
OUTPUT HIGH  
2.3V  
L
V
OH  
V
- 0.5V  
OH  
t
Y/Z  
Y/Z  
Y/Z  
Y/Z  
Y/Z  
Y/Z  
1 / 0  
0 / 1  
15  
HZ  
OUT (Y, Z)  
0V  
t
X
V
15  
LZ  
CC  
t
0 (Note 5) 1 / 0  
0 (Note 5) 0 / 1  
1 (Note 8) 1 / 0  
1 (Note 8) 0 / 1  
GND  
100  
100  
100  
100  
t
, t  
ZH  
ZL ZL(SHDN)  
t
LZ  
NOTE 7  
V
t
V
CC  
OL  
ZL  
CC  
OUT (Y, Z)  
2.3V  
t
GND  
ZH(SHDN)  
V
+ 0.5V  
V
OL  
OUTPUT LOW  
t
V
CC  
ZL(SHDN)  
FIGURE 3B. MEASUREMENT POINTS  
FIGURE 3A. TEST CIRCUIT  
FIGURE 3. DRIVER ENABLE AND DISABLE TIMES  
3V  
0V  
RE  
15pF  
A
1.5V  
PLH  
1.5V  
PHL  
B
+1.5V  
RO  
R
A
t
t
V
CC  
SIGNAL  
GENERATOR  
50%  
50%  
RO  
0V  
FIGURE 4B. MEASUREMENT POINTS  
FIGURE 4. RECEIVER PROPAGATION DELAY  
FIGURE 4A. TEST CIRCUIT  
FN6048.9  
September 9, 2008  
7
ISL8483E, ISL8485E  
Test Circuits and Waveforms (Continued)  
RE  
B
1kΩ  
V
CC  
RO  
R
GND  
NOTE 7  
SW  
SIGNAL  
A
3V  
0V  
GENERATOR  
15pF  
RE  
1.5V  
1.5V  
HZ  
(SHDN) FOR ISL8483E ONLY  
PARAMETER  
t
, t  
ZH ZH(SHDN)  
t
OUTPUT HIGH  
1.5V  
DE  
A
SW  
GND  
V
OH  
NOTE 7  
RO  
V
- 0.5V  
OH  
t
0
0
0
0
0
0
+1.5V  
-1.5V  
+1.5V  
-1.5V  
+1.5V  
-1.5V  
HZ  
0V  
t
V
LZ  
CC  
t
, t  
ZL ZL(SHDN)  
t
LZ  
t
(Note 6)  
(Note 6)  
GND  
ZH  
V
CC  
OL  
NOTE 7  
RO  
t
V
ZL  
CC  
1.5V  
V
+ 0.5V  
V
t
(Note 9)  
(Note 9)  
GND  
OL  
ZH(SHDN)  
OUTPUT LOW  
t
V
CC  
ZL(SHDN)  
FIGURE 5A. TEST CIRCUIT  
FIGURE 5. RECEIVER ENABLE AND DISABLE TIMES  
FIGURE 5B. MEASUREMENT POINTS  
Receiver inputs function with common mode voltages as  
great as ±7V outside the power supplies (i.e., +12V and  
-7V), making them ideal for long networks where induced  
voltages are a realistic concern.  
Application Information  
RS-485 and RS-422 are differential (balanced) data  
transmission standards for use in long haul or noisy  
environments. RS-422 is a subset of RS-485, so RS-485  
transceivers are also RS-422 compliant. RS-422 is a  
point-to-multipoint (multidrop) standard, which allows only  
one driver and up to 10 (assuming one unit load devices)  
receivers on each bus. RS-485 is a true multipoint standard,  
which allows up to 32 one unit load devices (any  
combination of drivers and receivers) on each bus. To allow  
for multipoint operation, the RS-485 specification requires  
that drivers must handle bus contention without sustaining  
any damage.  
All the receivers include a “fail-safe if open” function that  
guarantees a high level receiver output if the receiver inputs  
are unconnected (floating).  
Receivers easily meet the data rates supported by the  
corresponding driver.  
ISL8483E, ISL8485E receiver outputs are three-stat-able via  
the active low RE input.  
Driver Features  
Another important advantage of RS-485 is the extended  
common mode range (CMR), which specifies that the driver  
outputs and receiver inputs withstand signals that range from  
+12V to -7V. RS-422 and RS-485 are intended for runs as  
long as 4000 feet, so the wide CMR is necessary to handle  
ground potential differences, as well as voltages induced in  
the cable by external fields.  
The RS485, RS-422 driver is a differential output device that  
delivers at least 1.5V across a 54Ω load (RS-485), and at  
least 2V across a 100Ω load (RS-422). The drivers feature  
low propagation delay skew to maximize bit width, and to  
minimize EMI.  
Drivers of the ISL8483E, ISL8485E are tri-stateable via the  
active high DE input.  
Receiver Features  
The ISL8483E driver outputs are slew rate limited to  
minimize EMI, and to minimize reflections in un-terminated  
or improperly terminated networks. Data rate on these slew  
rate limited versions is a maximum of 250kbps. Outputs of  
the ISL8485E driver are not limited, so faster output  
transition times allow data rates of at least 10Mbps.  
These devices utilize a differential input receiver for maximum  
noise immunity and common mode rejection. Input sensitivity  
is ±200mV, as required by the RS422 and RS-485  
specifications.  
Receiver input impedance surpasses the RS-422 spec of  
4kΩ, and meets the RS-485 “Unit Load” requirement of 12kΩ  
minimum.  
FN6048.9  
September 9, 2008  
8
ISL8483E, ISL8485E  
Data Rate, Cables, and Terminations  
Low Power Shutdown Mode (ISL8483E Only)  
RS485, RS-422 are intended for network lengths up to 4000  
feet, but the maximum system data rate decreases as the  
transmission length increases. Devices operating at 10Mbps  
are limited to lengths less than 100 feet, while the 250kbps  
versions can operate at full data rates with lengths in excess  
of 1000 feet.  
These CMOS transceivers all use a fraction of the power  
required by their bipolar counterparts, but the ISL8483E  
includes a shutdown feature that reduces the already low  
quiescent I  
to a 1nA trickle. The ISL8483E enters  
CC  
shutdown whenever the receiver and driver are  
simultaneously disabled (RE = V and DE = GND) for a  
CC  
period of at least 600ns. Disabling both the driver and the  
receiver for less than 50ns guarantees that the ISL8483E  
will not enter shutdown.  
Twisted pair is the cable of choice for RS485, RS-422  
networks. Twisted pair cables tend to pick up noise and  
other electromagnetically induced voltages as common  
mode signals, which are effectively rejected by the  
differential receivers in these ICs.  
Note that receiver and driver enable times increase when  
the ISL8483E enables from shutdown. Refer to Notes 5-8,  
on page 6, at the end of the “Electrical Specifications” table,  
for more information.  
Proper termination is imperative, when using the 10Mbps  
devices, to minimize reflections. Short networks using the  
250kbps versions need not be terminated, but, terminations  
are recommended unless power dissipation is an overriding  
concern.  
ESD Protection  
All pins on these interface devices include class 3 Human  
Body Model (HBM) ESD protection structures, but the  
RS-485 pins (driver outputs and receiver inputs) incorporate  
advanced structures allowing them to survive ESD events in  
excess of ±15kV HBM. The RS-485 pins are particularly  
vulnerable to ESD damage because they typically connect to  
an exposed port on the exterior of the finished product.  
Simply touching the port pins, or connecting a cable, can  
cause an ESD event that might destroy unprotected ICs.  
These new ESD structures protect the device whether or not  
it is powered up, protect without allowing any latchup  
mechanism to activate, and without degrading the RS-485  
common mode range of -7V to +12V. This built-in ESD  
protection eliminates the need for board level protection  
structures (e.g., transient suppression diodes), and the  
associated, undesirable capacitive load they present.  
In point-to-point, or point-to-multipoint (single driver on bus)  
networks, the main cable should be terminated in its  
characteristic impedance (typically 120Ω) at the end farthest  
from the driver. In multi-receiver applications, stubs  
connecting receivers to the main cable should be kept as  
short as possible. multipoint (multi-driver) systems require  
that the main cable be terminated in its characteristic  
impedance at both ends. Stubs connecting a transceiver to  
the main cable should be kept as short as possible.  
Built-In Driver Overload Protection  
As stated previously, the RS-485 specification requires that  
drivers survive worst case bus contentions undamaged. The  
ISL848xE devices meet this requirement via driver output  
short circuit current limits, and on-chip thermal shutdown  
circuitry.  
Human Body Model Testing  
As the name implies, this test method emulates the ESD  
event delivered to an IC during human handling. The tester  
delivers the charge stored on a 100pF capacitor through a  
1.5kΩ current limiting resistor into the pin under test. The  
HBM method determines an IC’s ability to withstand the ESD  
events typically present during handling and manufacturing.  
The driver output stages incorporate short circuit current  
limiting circuitry which ensures that the output current never  
exceeds the RS-485 specification, even at the common  
mode voltage range extremes. Additionally, these devices  
utilize a foldback circuit which reduces the short circuit  
current, and thus the power dissipation, whenever the  
contending voltage exceeds either supply.  
The RS-485 pin survivability on this high ESD family has  
been characterized to be in excess of ±15kV, for discharges  
to GND.  
In the event of a major short circuit condition, ISL848xE  
devices also include a thermal shutdown feature that  
disables the drivers whenever the die temperature becomes  
excessive. This eliminates the power dissipation, allowing  
the die to cool. The drivers automatically re-enable after the  
die temperature drops about 15°. If the contention persists,  
the thermal shutdown/re-enable cycle repeats until the fault  
is cleared. Receivers stay operational during thermal  
shutdown.  
FN6048.9  
September 9, 2008  
9
ISL8483E, ISL8485E  
Typical Performance Curves V = 5V, T = +25°C, ISL8483E and ISL8485E; Unless Otherwise Specified.  
CC  
A
90  
80  
70  
60  
50  
40  
30  
3.6  
3.4  
3.2  
3.0  
2.8  
2.6  
2.4  
2.2  
2.0  
R
= 100Ω  
DIFF  
R
= 54Ω  
20  
10  
0
DIFF  
0
1
2
3
4
5
-40  
0
50  
85  
-25  
25  
75  
DIFFERENTIAL OUTPUT VOLTAGE (V)  
TEMPERATURE (°C)  
FIGURE 6. DRIVER OUTPUT CURRENT vs DIFFERENTIAL  
OUTPUT VOLTAGE  
FIGURE 7. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs  
TEMPERATURE  
160  
140  
120  
700  
ISL8485E, DE = V , RE = X  
CC  
650  
Y OR Z = LOW  
600  
550  
500  
450  
400  
350  
100  
80  
ISL8485E, DE = GND, RE = X,  
60  
40  
20  
0
ISL8483E, DE = V , RE = X  
CC  
-20  
Y OR Z = HIGH  
-40  
300  
250  
200  
150  
-60  
-80  
-100  
ISL8483E, DE = GND, RE = GND  
-120  
-40  
0
50  
85  
-25  
25  
75  
-7 -6  
-4  
-2  
0
2
4
6
8
10  
12  
o
TEMPERATURE ( C)  
OUTPUT VOLTAGE (V)  
FIGURE 9. SUPPLY CURRENT vs TEMPERATURE  
FIGURE 8. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT  
VOLTAGE  
1200  
1100  
400  
t
t
PLHY  
300  
200  
100  
0
PLHZ  
1000  
900  
800  
700  
600  
500  
|t  
- t |  
PHLY PLHZ  
t
PHLY  
|t  
- t |  
PLHY PHLZ  
t
PHLZ  
|CROSS PT. OF YAND Z- CROSS PT. OF YAND Z|  
-40  
0
50  
85  
-25  
25  
75  
-40  
0
50  
85  
-25  
25  
75  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
FIGURE 10. DRIVER PROPAGATION DELAY vs  
TEMPERATURE (ISL8483E)  
FIGURE 11. DRIVER SKEW vs TEMPERATURE (ISL8483E)  
FN6048.9  
September 9, 2008  
10  
ISL8483E, ISL8485E  
Typical Performance Curves V = 5V, T = +25°C, ISL8483E and ISL8485E; Unless Otherwise Specified. (Continued)  
CC  
A
40  
3.0  
35  
2.5  
|t |  
- t  
PHLY PLHZ  
t
PHLY  
t
PHLZ  
30  
25  
20  
|t  
- t |  
PLHY PHLZ  
2.0  
t
PLHZ  
t
PLHY  
1.5  
|CROSSING PT. OF YAND Z- CROSSING PT. OF YAND Z|  
1
-40  
0
50  
85  
-25  
25  
75  
-40  
0
50  
85  
-25  
25  
75  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
FIGURE 12. DRIVER PROPAGATION DELAY vs  
TEMPERATURE (ISL8485E)  
FIGURE 13. DRIVER SKEW vs TEMPERATURE (ISL8485E)  
R
= 54Ω, C = 100pF  
L
R
= 54Ω, C = 100pF  
L
DIFF  
DIFF  
5
0
5
0
DI  
DI  
5
0
5
0
RO  
RO  
4
3
2
4
B/Z  
A/Y  
B/Z  
3
2
A/Y  
1
0
1
0
TIME (400ns/DIV)  
TIME (400ns/DIV)  
FIGURE 14. DRIVER AND RECEIVER WAVEFORMS,  
LOW TO HIGH (ISL8483E)  
FIGURE 15. DRIVER AND RECEIVER WAVEFORMS,  
HIGH TO LOW (ISL8483E)  
R
= 54Ω, C = 100pF  
L
R
= 54Ω, C = 100pF  
L
DIFF  
DIFF  
5
0
5
0
DI  
DI  
5
0
5
0
RO  
RO  
4
3
2
4
B/Z  
A/Y  
A/Y  
B/Z  
3
2
1
0
1
0
TIME (10ns/DIV)  
TIME (10ns/DIV)  
FIGURE 16. DRIVER AND RECEIVER WAVEFORMS,  
LOW TO HIGH (ISL8485E)  
FIGURE 17. DRIVER AND RECEIVER WAVEFORMS,  
HIGH TO LOW (ISL8485E)  
FN6048.9  
September 9, 2008  
11  
ISL8483E, ISL8485E  
Die Characteristics  
SUBSTRATE POTENTIAL (POWERED UP):  
GND  
TRANSISTOR COUNT:  
518  
PROCESS:  
Si Gate CMOS  
FN6048.9  
September 9, 2008  
12  
ISL8483E, ISL8485E  
Dual-In-Line Plastic Packages (PDIP)  
E8.3 (JEDEC MS-001-BA ISSUE D)  
N
8 LEAD DUAL-IN-LINE PLASTIC PACKAGE  
E1  
INDEX  
AREA  
INCHES  
MILLIMETERS  
1
2
3
N/2  
SYMBOL  
MIN  
MAX  
0.210  
-
MIN  
-
MAX  
5.33  
-
NOTES  
-B-  
A
A1  
A2  
B
-
4
-A-  
D
E
0.015  
0.115  
0.014  
0.045  
0.008  
0.355  
0.005  
0.300  
0.240  
0.39  
2.93  
0.356  
1.15  
0.204  
9.01  
0.13  
7.62  
6.10  
4
BASE  
PLANE  
0.195  
0.022  
0.070  
0.014  
0.400  
-
4.95  
0.558  
1.77  
0.355  
10.16  
-
-
A2  
A
-C-  
-
SEATING  
PLANE  
L
C
L
B1  
C
8, 10  
D1  
B1  
eA  
-
A
A
1
D1  
e
D
5
eC  
C
B
eB  
D1  
E
5
0.010 (0.25) M  
C
B S  
0.325  
0.280  
8.25  
7.11  
6
NOTES:  
E1  
e
5
1. Controlling Dimensions: INCH. In case of conflict between  
0.100 BSC  
0.300 BSC  
2.54 BSC  
7.62 BSC  
-
English and Metric dimensions, the inch dimensions control.  
e
e
6
A
B
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.  
-
0.430  
0.150  
-
10.92  
3.81  
7
3. Symbols are defined in the “MO Series Symbol List” in Section  
2.2 of Publication No. 95.  
L
0.115  
2.93  
4
9
4. Dimensions A, A1 and L are measured with the package seated  
N
8
8
in JEDEC seating plane gauge GS-3.  
Rev. 0 12/93  
5. D, D1, and E1 dimensions do not include mold flash or protru-  
sions. Mold flash or protrusions shall not exceed 0.010 inch  
(0.25mm).  
e
6. E and  
pendicular to datum  
7. e and e are measured at the lead tips with the leads uncon-  
are measured with the leads constrained to be per-  
A
-C-  
.
B
C
strained. e must be zero or greater.  
C
8. B1 maximum dimensions do not include dambar protrusions.  
Dambar protrusions shall not exceed 0.010 inch (0.25mm).  
9. N is the maximum number of terminal positions.  
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3,  
E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch  
(0.76 - 1.14mm).  
FN6048.9  
September 9, 2008  
13  
ISL8483E, ISL8485E  
Small Outline Plastic Packages (SOIC)  
M8.15 (JEDEC MS-012-AA ISSUE C)  
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE  
N
INDEX  
AREA  
0.25(0.010)  
M
B M  
H
INCHES MILLIMETERS  
E
SYMBOL  
MIN  
MAX  
MIN  
1.35  
0.10  
0.33  
0.19  
4.80  
3.80  
MAX  
1.75  
0.25  
0.51  
0.25  
5.00  
4.00  
NOTES  
-B-  
A
A1  
B
C
D
E
e
0.0532  
0.0040  
0.013  
0.0688  
0.0098  
0.020  
-
-
1
2
3
L
9
SEATING PLANE  
A
0.0075  
0.1890  
0.1497  
0.0098  
0.1968  
0.1574  
-
-A-  
3
h x 45°  
D
4
-C-  
0.050 BSC  
1.27 BSC  
-
α
H
h
0.2284  
0.0099  
0.016  
0.2440  
0.0196  
0.050  
5.80  
0.25  
0.40  
6.20  
0.50  
1.27  
-
e
A1  
C
5
B
0.10(0.004)  
L
6
0.25(0.010) M  
C
A M B S  
N
α
8
8
7
NOTES:  
0°  
8°  
0°  
8°  
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of  
Publication Number 95.  
Rev. 1 6/05  
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.  
3. Dimension “D” does not include mold flash, protrusions or gate burrs.  
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006  
inch) per side.  
4. Dimension “E” does not include interlead flash or protrusions. Inter-  
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per  
side.  
5. The chamfer on the body is optional. If it is not present, a visual index  
feature must be located within the crosshatched area.  
6. “L” is the length of terminal for soldering to a substrate.  
7. “N” is the number of terminal positions.  
8. Terminal numbers are shown for reference only.  
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater  
above the seating plane, shall not exceed a maximum value of  
0.61mm (0.024 inch).  
10. Controlling dimension: MILLIMETER. Converted inch dimensions  
are not necessarily exact.  
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.  
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality  
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without  
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see www.intersil.com  
FN6048.9  
September 9, 2008  
14  

相关型号:

ISL8483E_05

ESD Protected to 【15kV, 5V, Low Power, High Speed or Slew Rate Limited, RS-485/RS-422 Transceivers
INTERSIL

ISL8483IB

5V, Low Power, High Speed or Slew Rate Limited, RS-485/RS-422 Transceivers
INTERSIL

ISL8483IB

LINE TRANSCEIVER, PDSO8, PLASTIC, MS-012AA, SOIC-8
ROCHESTER

ISL8483IB-T

5V, Low Power, High Speed or Slew Rate Limited, RS-485/RS-422 Transceivers
INTERSIL

ISL8483IBZ

5V, Low Power, High Speed or Slew Rate Limited, RS-485/RS-422 Transceivers
INTERSIL

ISL8483IBZ-T

5V, Low Power, High Speed or Slew Rate Limited, RS-485/RS-422 Transceivers
INTERSIL

ISL8483IP

5V, Low Power, High Speed or Slew Rate Limited, RS-485/RS-422 Transceivers
INTERSIL

ISL8483IPZ

5V, Low Power, High Speed or Slew Rate Limited, RS-485/RS-422 Transceivers
INTERSIL

ISL8483_06

5V, Low Power, High Speed or Slew Rate Limited, RS-485/RS-422 Transceivers
INTERSIL

ISL8484

Ultra Low ON-Resistance, +1.65V to +4.5V, Single Supply, Dual SPDT Analog Switch
INTERSIL

ISL8484IR

Ultra Low ON-Resistance, +1.65V to +4.5V, Single Supply, Dual SPDT Analog Switch
INTERSIL

ISL8484IR

DUAL 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, PDSO10, 3 X 3 MM, PLASTIC, MO-229WEED-3, TDFN-10
RENESAS