RJK03C2DPB-00-J5 [RENESAS]
Silicon N Channel Power MOS FET with Schottky Barrier Diode Power Switching; 硅N沟道功率MOS FET与肖特基二极管的功率开关
| 型号： | RJK03C2DPB-00-J5 |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | Silicon N Channel Power MOS FET with Schottky Barrier Diode Power Switching |
| 文件： | 总7页 (文件大小：263K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Preliminary
RJK03C2DPB
Silicon N Channel Power MOS FET with Schottky Barrier Diode
REJ03G1831-0200
Power Switching
Rev.2.00
Sep 29, 2009
Features
•
•
•
•
•
High speed switching
Capable of 4.5 V gate drive
Low drive current
High density mounting
Low on-resistance
RDS(on) = 1.9 mΩ typ. (at VGS = 10 V)
•
•
Pb-free
Halogen-free
Outline
RENESAS Package code: PTZZ0005DA-A
(Package name: LFPAK)
5
6
7 8
D D D D
5
1, 2, 3 Source
4
4
5
Gate
Drain
G
4
3
2
1
S
1
S S
3
2
Absolute Maximum Ratings
(Ta = 25°C)
Item
Drain to source voltage
Gate to source voltage
Drain current
Symbol
VDSS
VGSS
ID
Ratings
30
Unit
V
±20
55
V
A
Note1
Drain peak current
ID(pulse)
220
55
A
Body-drain diode reverse drain current
Avalanche current
IDR
A
Note 2
IAP
25
A
Note 2
Avalanche energy
EAR
62.5
60
mJ
W
Channel dissipation
Pch Note3
θch-C
Tch
Channel to Case Thermal Resistance
Channel temperature
2.09
150
°C/W
°C
°C
Storage temperature
Tstg
–55 to +150
Notes: 1. PW ≤ 10 μs, duty cycle ≤ 1%
2. Value at Tch = 25°C, Rg ≥ 50 Ω
3. Tc = 25°C
REJ03G1831-0200 Rev.2.00 Sep 29, 2009
Page 1 of 6
RJK03C2DPB
Preliminary
Electrical Characteristics
(Ta = 25°C)
Item
Symbol
Min
Typ
Max
Unit
Test Conditions
Drain to source breakdown
voltage
V(BR)DSS
30
—
—
V
ID = 10 mA, VGS = 0
Gate to source leak current
Zero gate voltage drain current
Gate to source cutoff voltage
IGSS
IDSS
VGS(off)
RDS(on)
RDS(on)
|yfs|
—
—
1.2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
±0.5
1
μA
m A
V
VGS = ±20 V, VDS = 0
VDS = 30 V, VGS = 0
—
2.5
2.5
3.5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
VDS = 10 V, ID = 1 mA
Static drain to source on state
resistance
1.9
2.5
115
4900
1050
420
0.5
33
mΩ
mΩ
S
ID = 27.5 A, VGS = 10 V Note4
ID = 27.5 A, VGS = 4.5 V Note4
ID = 27.5 A, VDS = 10 V Note4
Forward transfer admittance
Input capacitance
Ciss
Coss
Crss
Rg
pF
pF
pF
Ω
VDS = 10 V, VGS = 0,
f = 1 MHz
Output capacitance
Reverse transfer capacitance
Gate Resistance
Total gate charge
Qg
nC
nC
nC
ns
ns
ns
ns
V
VDD = 10 V, VGS = 4.5 V,
ID = 55 A
Gate to source charge
Gate to drain charge
Turn-on delay time
Rise time
Qgs
Qgd
td(on)
tr
13
9
16
VGS = 10 V, ID = 27.5 A,
VDD ≅ 10 V, RL = 0.36 Ω,
Rg = 4.7 Ω
17
Turn-off delay time
Fall time
td(off)
tf
64
13
Body–drain diode forward voltage
VDF
0.39
34
IF = 2 A, VGS = 0 Note4
Body–drain diode reverse
recovery time
trr
ns
IF = 55 A, VGS = 0
diF/ dt = 100 A/ μs
Notes: 4. Pulse test
REJ03G1831-0200 Rev.2.00 Sep 29, 2009
Page 2 of 6
RJK03C2DPB
Preliminary
Main Characteristics
Power vs. Temperature Derating
Maximum Safe Operation Area
80
1000
100
10
60
40
20
1 ms
PW = 10 ms
Operation in
this area is
limited by RDS(on)
1
Tc = 25°C
1 shot Pulse
0.1
0
0.1
50
100
150
200
1
10
100
Drain to Source Voltage VDS (V)
Case Temperature Tc (°C)
Typical Output Characteristics
Typical Transfer Characteristics
100
80
100
80
4.5 V
10 V
Pulse Test
2.8 V
VDS = 10 V
Pulse Test
3.0 V
60
60
2.6 V
40
40
25°C
Tc = 75°C
V
GS = 2.4 V
20
20
–25°C
0
0
5
1
2
3
4
2
4
6
8
10
Gate to Source Voltage VGS (V)
Drain to Source Voltage VDS (V)
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
Static Drain to Source on State Resistance
vs. Drain Current
10
200
Pulse Test
Pulse Test
150
100
50
3
VGS = 4.5 V
10 V
1
0.3
0.1
I
D = 20 A
10 A
5 A
0
4
8
12
16
20
1
3
10
30
100 300 1000
Gate to Source Voltage VGS (V)
Drain Current ID (A)
REJ03G1831-0200 Rev.2.00 Sep 29, 2009
Page 3 of 6
RJK03C2DPB
Preliminary
Static Drain to Source on State Resistance
vs. Temperature
Typical Capacitance vs.
Drain to Source Voltage
10
10000
3000
1000
Pulse Test
Ciss
8
6
Coss
Crss
300
100
ID = 5 A, 10 A, 20 A
4
VGS = 4.5 V
2
0
30
10
VGS = 0
10 V
5 A, 10 A, 20 A
f = 1 MHz
0
10
20
30
–25
0
25
50 75 100 125 150
Case Temperature Tc
(°C)
Drain to Source Voltage VDS (V)
Reverse Drain Current vs.
Source to Drain Voltage
Dynamic Input Characteristics
100
50
40
30
20
10
0
20
16
12
8
ID = 55 A
Pulse Test
VGS
10 V
VDD = 25 V
10 V
80
60
40
20
5 V
VDS
VGS = 0, –5V
4
VDD = 25 V
10 V
0
200
0
0.4
0.8
1.2
1.6
2.0
0
40
80
120
160
Source to Drain Voltage VSD (V)
Gate Charge Qg (nc)
Maximum Avalanche Energy vs.
Channel Temperature Derating
100
80
60
40
20
0
25
50
75
100
125
150
Channel Temperature Tch (°C)
REJ03G1831-0200 Rev.2.00 Sep 29, 2009
Page 4 of 6
RJK03C2DPB
Preliminary
Normalized Transient Thermal Impedance vs. Pulse Width
3
1
Tc = 25°C
D = 1
0.5
0.3
0.1
PW
T
D =
PDM
0.03
0.01
PW
T
1 m
10 m
100 m
1
10
Pulse Width PW (s)
Avalanche Test Circuit
Avalanche Waveform
VDSS
1
2
EAR
=
L • IAP
•
L
VDSS – VDD
2
VDS
Monitor
IAP
Monitor
V(BR)DSS
IAP
Rg
VDS
VDD
D. U. T
ID
Vin
15 V
VDD
0
Switching Time Test Circuit
Switching Time Waveform
90%
Vout
Monitor
Vin Monitor
D.U.T.
Rg
10%
10%
Vin
RL
Vout
10%
VDS
= 10 V
Vin
10 V
90%
90%
t
t
t
t
f
d(on)
r
d(off)
REJ03G1831-0200 Rev.2.00 Sep 29, 2009
Page 5 of 6
RJK03C2DPB
Preliminary
Package Dimensions
Package Name
LFPAK
JEITA Package Code
SC-100
RENESAS Code
PTZZ0005DA-A
Previous Code
LFPAKV
MASS[Typ.]
0.080g
Unit: mm
4.9
5.3 Max
0.25–+00..0035
3.3
4.0 0.2
5
0.20 +–00..0035
1
4
0° – 8°
0.75 Max
0.10
1.27
0.40 0.06
0.25
M
(Ni/Pd/Au plating)
Ordering Information
Part No.
Quantity
Shipping Container
RJK03C2DPB-00-J5
2500 pcs
Taping
REJ03G1831-0200 Rev.2.00 Sep 29, 2009
Page 6 of 6
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Colophon .7.2
相关型号：
RJK03C5DPA-00-J53
Silicon N Channel Power MOS FET with Schottky Barrier Diode Power Switching
RENESAS
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