RJK0452DPB-00-J5 [RENESAS]
Silicon N Channel Power MOS FET Power Switching; 硅N通道功率MOS FET电源开关型号: | RJK0452DPB-00-J5 |
厂家: | RENESAS TECHNOLOGY CORP |
描述: | Silicon N Channel Power MOS FET Power Switching |
文件: | 总7页 (文件大小:81K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Preliminary Datasheet
RJK0452DPB
Silicon N Channel Power MOS FET
Power Switching
R07DS0074EJ0102
(Previous: REJ03G1764-0101)
Rev.1.02
Jul 30, 2010
Features
High speed switching
Capable of 4.5 V gate drive
Low drive current
Low on-resistance
DS(on) = 2.8 m typ. (at VGS = 10 V)
Pb-free
R
High density mounting
Halogen-free
Outline
RENESAS Package code: PTZZ0005DA-A
(Package name: LFPAK)
5
D
5
1, 2, 3 Source
4
G
4
5
Gate
Drain
4
3
2
1
S S S
1
2 3
Application
Switching Mode Power Supply
Absolute Maximum Ratings
(Ta = 25°C)
Item
Drain to source voltage
Gate to source voltage
Drain current
Symbol
VDSS
VGSS
ID
Ratings
40
Unit
V
V
20
45
A
Note1
Drain peak current
ID(pulse)
180
45
A
Body-drain diode reverse drain current
Avalanche current
IDR
A
Note 2
IAP
22.5
40.5
55
A
Note 2
Avalanche energy
EAR
mJ
W
Channel dissipation
Pch Note3
ch-C
Tch
Channel to Case Thermal Resistance
Channel temperature
2.27
150
C/W
C
C
Storage temperature
Tstg
–55 to +150
Notes: 1. PW 10 s, duty cycle 1%
2. Value at Tch = 25C, Rg 50
3. Tc = 25C
This product is for the low voltage drive ( 10V).
If the driving voltage is over 10 V under normal conditions, please use the product for high gate to source cutoff voltage
(VGS(off)) which characteristics has been improved.
R07DS0074EJ0102 Rev.1.02
Jul 30, 2010
Page 1 of 6
RJK0452DPB
Preliminary
Electrical Characteristics
(Ta = 25°C)
Item
Symbol
V(BR)DSS
IGSS
Min
40
—
—
1.2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Typ
—
Max
—
Unit
V
Test Conditions
Drain to source breakdown voltage
Gate to source leak current
Zero gate voltage drain current
Gate to source cutoff voltage
ID = 10 mA, VGS = 0 V
—
0.1
1
A
A
V
VGS = 20 V, VDS = 0 V
VDS = 40 V, VGS = 0 V
IDSS
—
VGS(off)
RDS(on)
RDS(on)
|yfs|
—
2.5
3.5
4.7
—
VDS = 10 V, ID = 1 mA
Static drain to source on state
resistance
2.8
3.5
108
4030
650
270
0.4
26
m
m
S
ID = 22.5 A, VGS = 10 V Note4
ID = 22.5 A, VGS = 4.5 V Note4
ID = 22.5 A, VDS = 10 V Note4
Forward transfer admittance
Input capacitance
Ciss
Coss
Crss
Rg
—
pF
pF
pF
VDS = 10 V, VGS = 0 V,
f = 1 MHz
Output capacitance
Reverse transfer capacitance
Gate Resistance
—
—
—
Total gate charge
Qg
—
nC
nC
nC
ns
ns
ns
ns
V
VDD = 10 V, VGS = 4.5 V,
ID = 45 A
Gate to source charge
Gate to drain charge
Turn-on delay time
Rise time
Qgs
Qgd
td(on)
tr
12
—
6.6
18
—
—
VGS = 10 V, ID = 22.5 A,
VDD 10 V, RL = 0.44 ,
Rg = 4.7
6.0
65
—
Turn-off delay time
Fall time
td(off)
tf
—
8.5
0.83
35
—
Body–drain diode forward voltage
VDF
1.1
—
IF = 45 A, VGS = 0 V Note4
Body–drain diode reverse recovery
time
trr
ns
IF = 45 A, VGS = 0 V
diF/ dt = 100 A/ s
Notes: 4. Pulse test
R07DS0074EJ0102 Rev.1.02
Jul 30, 2010
Page 2 of 6
RJK0452DPB
Preliminary
Main Characteristics
Power vs. Temperature Derating
Maximum Safe Operation Area
80
1000
100
10
10 μs
60
40
20
PW = 10 ms
Operation in this area
is limited by RDS(on)
1
Tc = 25°C
1 shot Pulse
DC Operation
10
0.1
0.1
0
1
100
50
100
150
200
Drain to Source Voltage VDS (V)
Case Temperature Tc (°C)
Typical Output Characteristics
Typical Transfer Characteristics
50
40
30
20
10
50
40
30
20
10
3.0 V
4.5 V
Pulse Test
2.8 V
VDS = 10 V
Pulse Test
10 V
2.6 V
25°C
Tc = 75°C
V
GS = 2.4 V
–25°C
0
0
5
1
2
3
4
2
4
6
8
10
Gate to Source Voltage VGS (V)
Drain to Source Voltage VDS (V)
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
Static Drain to Source on State Resistance
vs. Drain Current
100
200
Pulse Test
Pulse Test
160
10
120
80
VGS = 4.5 V
10 V
ID = 20 A
1
40
10 A
5 A
0.1
0
4
8
12
16
20
1
10
100
1000
Gate to Source Voltage VGS (V)
Drain Current ID (A)
R07DS0074EJ0102 Rev.1.02
Jul 30, 2010
Page 3 of 6
RJK0452DPB
Preliminary
Static Drain to Source on State Resistance
vs. Temperature
Typical Capacitance vs.
Drain to Source Voltage
10000
10
Pulse Test
D = 22.5 A
I
Ciss
8
6
1000
100
VGS = 4.5 V
10 V
4
2
0
Coss
Crss
40
VGS = 0 V
f = 1 MHz
0
10
20
30
–25
0
25 50 75 100 125 150
Case Temperature Tc (°C)
Drain to Source Voltage VDS (V)
Reverse Drain Current vs.
Source to Drain Voltage
Dynamic Input Characteristics
ID = 45 A
50
40
30
20
10
50
40
30
20
10
0
20
16
12
8
Pulse Test
VGS
10 V
5 V
VDD = 25 V
10 V
VDS
VGS = 0
4
VDD = 25 V
10 V
0
100
0
0.4
0.8
1.2
1.6
2.0
0
20
40
60
80
Gate Charge Qg (nC)
Source to Drain Voltage VSD (V)
Maximum Avalanche Energy vs.
Channel Temperature Derating
50
40
30
20
IAP = 22.5 A
VDD = 15 V
duty < 0.1 %
Rg ≥ 50 Ω
10
0
25
50
75
100
125
150
Channel Temperature Tch (°C)
R07DS0074EJ0102 Rev.1.02
Jul 30, 2010
Page 4 of 6
RJK0452DPB
Preliminary
Normalized Transient Thermal Impedance vs. Pulse Width
3
1
Tc = 25°C
D = 1
0.5
0.3
0.1
θch – c (t) = γ s (t) • θch – c
θch – c = 2.27°C/W, Tc = 25°C
PW
T
D =
PDM
0.03
0.01
PW
T
10 μ
100 μ
1 m
10 m
100 m
1
10
Pulse Width PW (s)
Avalanche Test Circuit
Avalanche Waveform
VDSS
VDSS – VDD
1
2
2
L • IAP •
EAR
=
L
VDS
Monitor
IAP
Monitor
V(BR)DSS
IAP
Rg
VDS
VDD
D. U. T
ID
Vin
15 V
50 Ω
VDD
0
Switching Time Test Circuit
Switching Time Waveform
90%
Vout
Monitor
Vin Monitor
D.U.T.
Rg
10%
10%
Vin
RL
Vout
10%
VDS
Vin
10 V
= 10 V
90%
90%
t
t
t
t
f
d(on)
r
d(off)
R07DS0074EJ0102 Rev.1.02
Jul 30, 2010
Page 5 of 6
RJK0452DPB
Preliminary
Package Dimensions
Package Name
LFPAK
JEITA Package Code
SC-100
RENESAS Code
PTZZ0005DA-A
Previous Code
LFPAKV
MASS[Typ.]
0.080g
Unit: mm
4.9
5.3 Max
0.25+–00..0035
3.3
4.0 ± 0.2
5
0.20 +–00..0035
1
4
0° – 8°
0.75 Max
0.10
1.27
0.40 ± 0.06
0.25
M
(Ni/Pd/Au plating)
Ordering Information
Part No.
Quantity
Shipping Container
RJK0452DPB-00-J5
2500 pcs
Taping
R07DS0074EJ0102 Rev.1.02
Jul 30, 2010
Page 6 of 6
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