RJK0629JPE-00-J3 [RENESAS]

60 V - 85 A - Silicon N Channel MOS FET High Speed Power Switching; 60 V - 85 A - 硅N沟道MOS FET高速电源开关


型号：	RJK0629JPE-00-J3
厂家：	RENESAS TECHNOLOGY CORP
描述：	60 V - 85 A - Silicon N Channel MOS FET High Speed Power Switching 60 V - 85 A - 硅N沟道MOS FET高速电源开关晶体开关晶体管功率场效应晶体管电源开关
文件：	总7页 (文件大小：101K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Preliminary Datasheet

RJK0629JPE

60 V - 85 A - Silicon N Channel MOS FET

High Speed Power Switching

R07DS1075EJ0100

Rev.1.00

Jun 17, 2013

Features

•

For Automotive application

AEC-Q101 compliant

Low on-resistance : R_DS(on)= 3.75 mΩ typ.

Capable of 4.5 V gate drive

Low input capacitance : Ciss = 4100 pF typ

Outline

RENESAS Package code: PRSS0004AE-B

(Package name: LDPAK(S)-(1) )

2, 4

1. Gate

2. Drain

3. Source

4. Drain

1 G

Absolute Maximum Ratings

(Ta = 25°C)

Item

Drain to source voltage

Gate to source voltage

Drain current

Symbol

Value

Unit

V_DSS

V_GSS

I_D

I_D(pulse) ^Note

I_DR

Drain peak current

340

Body-drain diode reverse drain current

Body-drain diode reverse drain peak current

Avalanche current

I_DR(pulse) ^Note

340

Note

I_AP

Note

Avalanche energy

E_AR

°C

259

Channel dissipation

Pch ^Note

Tch^Note

120

Channel temperature

175

Storage temperature

Tstg

–55 to +150

Notes: 1. PW ≤ 10 μs, duty cycle ≤ 1%

2. Tch = 25°C, Rg ≥ 50 Ω

3. Tc = 25°C

4. AEC-Q101 compliant

Thermal Impedance Characteristics

•

Channel to case thermal impedance θch-c: 1.25°C/W

R07DS1075EJ0100 Rev.1.00

Jun 17, 2013

Page 1 of 6

RJK0629JPE

Preliminary

Electrical Characteristics

(Ta = 25°C)

Item

Symbol

I_GSS

Min

—

1.0

—

Typ

—

Max

Unit

μA

Test Conditions

Gate to source leak current

Zero gate voltage drain current

Gate to source cutoff voltage

V_GS= 20 V, V_DS= 0

V_DS= 60 V, V_GS= 0

I_D= 1 mA, V_DS= 10 V

I_D= 43 A, V_GS= 10 V^Note

I_DSS

—

V_GS(off)

R_DS(on)

—

2.0

4.5

6.6

—

Static drain to source on state

resistance

3.75

4.9

4100

1000

780

mΩ

I_D= 43 A, V_GS= 4.5 V^Note

Input capacitance

Ciss

Coss

Crss

V_DS= 10 V, V_GS= 0

f = 1 MHz

Output capacitance

Reverse transfer capacitance

Total gate charge

—

V_DD= 25 V, V_GS= 10 V,

I_D= 85 A

Gate to source charge

Gate to drain charge

Turn-on delay time

Rise time

Qgs

Qgd

t_d(on)

t_r

—

I_D= 43A, R_L= 0.698 Ω,

V_GS= 10 V, R_G= 4.7 Ω

—

Turn-off delay time

Fall time

t_d(off)

t_f

100

—

Body-drain diode forward voltage

V_DF

t_rr

0.92

1.2

—

I_F= 85 A, V_GS= 0^Note

Body-drain diode reverse recovery

time

I_F= 85 A, V_GS= 0,

di_F/dt = 100 A/μs

Note: 5. Pulse test

R07DS1075EJ0100 Rev.1.00

Jun 17, 2013

Page 2 of 6

RJK0629JPE

Preliminary

Main Characteristics

Maximum Safe Operation Area

Power vs. Temperature Derating

1000

100

200

150

100

Operation

in this area

is limited R_DS(on)

0.1

Tc = 25°C

1 shot Pulse

0.01

100

150

200

0.1

100

Case Temperature Tc (°C)

Drain to Source Voltage V_DS(V)

Typical Output Characteristics

10 V

5 V

Typical Transfer Characteristics

100

3 V

Tc = 175°C

25°C

0.1

V_GS= 2.7 V

−40°C

0.01

0.001

_DS= 10 V

Tc = 25°C

Pulse Test

4 5

Pulse Test

Drain to Source Voltage V_DS(V)

Gate to Source Voltage V_GS(V)

Drain Source Saturation Voltage vs.

Gate to Source Voltage

Static Drain to Source State Resistance

vs. Drain Current

100

I_D= 43 A

Tc = 25°C

Pulse Test

Tc = 175°C

V_GS= 4.5 V

10 V

25°C

−40°C

100

Gate to Source Voltage V_GS(V)

Drain Current I_D(A)

R07DS1075EJ0100 Rev.1.00

Jun 17, 2013

Page 3 of 6

RJK0629JPE

Preliminary

Static Drain to Source on State Resistance

vs. Temperature

Typical Capacitance vs.

Drain to Source Voltage

10000

Pulse Test

_D= 43 A

Ciss

3000

1000

V_GS= 4.5 V

Coss

Crss

300

100

10 V

Tc = 25°C

_GS= 0

f = 1 MHz

−50

100

150

200

Case Temperature Tc (°C)

Drain to Source Voltage V_DS(V)

Reverse Drain Current vs.

Source to Drain Voltage

Dynamic Input Characteristics

100

Tc = 25°C

I_D= 85 A

Tc = 25°C

Pulse Test

10 V

V_GS

V_DD= 25 V

10 V

5 V

V_DS

V_GS= 0, −5 V

V_DD= 25 V

10 V

5 V

0.4

0.8

1.2

1.6

2.0

120

160

200

Gate Charge Qg (nC)

Source to Drain Voltage V_SD(V)

Avalanche Energy vs.

Channel Temperature Derating

500

400

300

200

I_AP= 55 A

V_DD= 25 V

duty < 0.1 %

Rg ≥ 50 Ω

100

100 125 150 175

Channel Temperature Tch (°C)

R07DS1075EJ0100 Rev.1.00

Jun 17, 2013

Page 4 of 6

RJK0629JPE

Preliminary

Normalized Transient Thermal Impedance vs. Pulse Width

D = 1

θch – c(t) = γs (t) • θch – c

θch – c = 1.25°C/W, Tc = 25°C

0.1

0.01

P_DM

D =

100 μ

1 m

10 m

100 m

10 μ

Pulse Width PW (s)

Avalanche Test Circuit

Avalanche Waveform

V_DSS

V_{DSS –}V_DD

L • I_AP•

E_AR

V_DS

Monitor

I_AP

Monitor

V_(BR)DSS

V_DD

I_AP

D. U. T

V_DS

I_D

Vin

50 Ω

15 V

V_DD

Switching Time Test Circuit

Switching Time Waveform

90%

Vout

Monitor

Vin Monitor

D.U.T.

10%

Vin

R_L

Vout

10%

V_DS

= 30 V

Vin

10 V

90%

d(off)

d(on)

R07DS1075EJ0100 Rev.1.00

Jun 17, 2013

Page 5 of 6

RJK0629JPE

Preliminary

Package Dimensions

Package Name

LDPAK(S)-(1)

JEITA Package Code

SC-83

RENESAS Code

PRSS0004AE-B

Previous Code

MASS[Typ.]

1.30g

Unit: mm

LDPAK(S)-(1) / LDPAK(S)-(1)V

4.44 0.2

7.8

6.6

10.2 0.3

1.3 0.15

2.49 0.2

+ 0.2

0.1

– 0.1

2.2

1.37 0.2

0.4 0.1

+ 0.2

– 0.1

1.3 0.2

0.86

2.54 0.5

Ordering Information

Orderable Part Number

Quantity

Shipping Container

RJK0629JPE-00-J3

1000 pcs

Taping (Sinistrorse)

Note: The symbol of 2nd "-" is occasionally presented as "#".

R07DS1075EJ0100 Rev.1.00

Jun 17, 2013

Page 6 of 6

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Colophon 2.2

RJK0629JPE-00-J3 [RENESAS]

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