TJA1041U [RENESAS]
DATACOM, INTERFACE CIRCUIT, UUC14, DIE-14;
| 型号： | TJA1041U |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | DATACOM, INTERFACE CIRCUIT, UUC14, DIE-14 |
| 文件： | 总24页 (文件大小：119K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TJA1041
High speed CAN transceiver
Product specification
2003 Oct 14
Supersedes data of 2003 Feb 13
Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041
FEATURES
• Over-temperature protection with diagnosis
• Undervoltage detection on pins VCC, VI/O and VBAT
Optimized for in-vehicle high speed communication
• Automotive environment transient protected bus pins
and pin VBAT
• Fully compatible with the ISO 11898 standard
• Communication speed up to 1 Mbit/s
• Short-circuit proof bus pins and pin SPLIT (to battery
and to ground)
• Very low ElectroMagnetic Emission (EME)
• Differential receiver with wide common-mode range,
offering high ElectroMagnetic Immunity (EMI)
• Bus line short-circuit diagnosis
• Bus dominant clamping diagnosis
• Cold start diagnosis (first battery connection).
• Passive behaviour when supply voltage is off
• Automatic I/O-level adaptation to the host controller
supply voltage
GENERAL DESCRIPTION
• Recessive bus DC voltage stabilization for further
improvement of EME behaviour
The TJA1041 provides an advanced interface between the
protocol controller and the physical bus in a Controller
Area Network (CAN) node. The TJA1041 is primarily
intended for automotive high-speed CAN applications (up
to 1 Mbit/s). The transceiver provides differential transmit
capability to the bus and differential receive capability to
the CAN controller. The TJA1041 is fully compatible to the
ISO 11898 standard, and offers excellent EMC
performance, very low power consumption, and passive
behaviour when supply voltage is off. The advanced
features include:
• Listen-only mode for node diagnosis and failure
containment
• Allows implementation of large networks (more than
110 nodes).
Low-power management
• Very low-current in standby and sleep mode, with local
and remote wake-up
• Capability to power down the entire node, still allowing
• Low-power management, supporting local and remote
wake-up with wake-up source recognition and the
capability to control the power supply in the rest of the
node
local and remote wake-up
• Wake-up source recognition.
Protection and diagnosis (detection and signalling)
• Several protection and diagnosis functions including
short circuits of the bus lines and first battery connection
• TXD dominant clamping handler with diagnosis
• RXD recessive clamping handler with diagnosis
• TXD-to-RXD short-circuit handler with diagnosis
• Automatic adaptation of the I/O-levels, in line with the
supply voltage of the controller.
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
VERSION
SOT108-1
−
TJA1041T
TJA1041U
SO14
plastic small outline package; 14 leads; body width 3.9 mm
−
bare die; 1930 × 3200 × 380 µm
2003 Oct 14
2
Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041
QUICK REFERENCE DATA
SYMBOL
VCC
PARAMETER
CONDITIONS
operating range
MIN. MAX. UNIT
DC voltage on pin VCC
DC voltage on pin VI/O
DC voltage on pin VBAT
VBAT input current
4.75
2.8
5
5.25
5.25
27
V
VI/O
operating range
V
VBAT
IBAT
operating range
V
VBAT = 12 V
10
30
µA
V
VCANH
VCANL
VSPLIT
Vesd
DC voltage on pin CANH
DC voltage on pin CANL
DC voltage on pin SPLIT
electrostatic discharge voltage
0 < VCC < 5.25 V; no time limit
0 < VCC < 5.25 V; no time limit
0 < VCC < 5.25 V; no time limit
Human Body Model (HBM)
pins CANH, CANL and SPLIT
all other pins
−27
−27
−27
+40
+40
+40
V
V
−6
+6
kV
kV
ns
−4
+4
tPD(TXD-RXD)
Tvj
propagation delay TXD to RXD
virtual junction temperature
VSTB = 0 V
40
255
−40
+150 °C
2003 Oct 14
3
Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041
BLOCK DIAGRAM
V
V
V
I/O
CC
3
BAT
5
10
TJA1041
7
1
INH
TXD
TEMPERATURE
PROTECTION
TIME-OUT
LEVEL
6
ADAPTOR
EN
13
CANH
DRIVER
14
CANL
STB
12
V
BAT
V
CC
9
8
WAKE
COMPARATOR
WAKE
MODE
CONTROL
+
FAILURE
DETECTOR
+
11
SPLIT
SPLIT
V
I/O
ERR
WAKE-UP
DETECTOR
V
BAT
RXD
RECESSIVE
DETECTION
LOW POWER
RECEIVER
V
I/O
V
CC
4
RXD
NORMAL
RECEIVER
2
MGU166
GND
Fig.1 Block diagram.
2003 Oct 14
4
Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041
PINNING
SYMBOL PIN
DESCRIPTION
transmit data input
TXD
GND
VCC
1
2
3
4
ground
transceiver supply voltage input
handbook, halfpage
TXD
1
2
3
4
5
6
7
14 STB
RXD
receive data output; reads out data
from the bus lines
GND
13 CANH
12 CANL
11 SPLIT
VI/O
EN
5
6
7
I/O-level adapter voltage input
enable control input
V
CC
RXD
TJA1041T
INH
inhibit output for switching external
voltage regulators
V
10
9
V
BAT
I/O
ERR
8
9
error and power-on indication output
(active LOW)
WAKE
ERR
EN
INH
8
WAKE
VBAT
local wake-up input
MGU165
10 battery voltage input
SPLIT
CANL
CANH
STB
11 common-mode stabilization output
12 LOW-level CAN bus line
13 HIGH-level CAN bus line
14 standby control input (active LOW)
Fig.2 Pinning configuration.
FUNCTIONAL DESCRIPTION
Operating modes
The primary function of a CAN transceiver is to provide the
CAN physical layer as described in the ISO 11898
standard. In the TJA1041 this primary function is
complemented with a number of operating modes,
fail-safe features and diagnosis features, which offer
enhanced system reliability and advanced power
management functionality.
The TJA1041 can be operated in five modes, each with
specific features. Control pins STB and EN select the
operating mode. Changing between modes also gives
access to a number of diagnostics flags, available via
pin ERR. The following sections describe the five
operating modes. Table 1 shows the conditions for
selecting these modes. Figure 3 illustrates the mode
transitions when VCC, VI/O and VBAT are present.
2003 Oct 14
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Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041
Table 1 Operating mode selection
CONTROL PINS
INTERNAL FLAGS
OPERATING MODE
sleep mode; note 2
PIN INH
STB
EN
UVNOM
UVBAT
pwon, wake-up
X
X
set
X
X(1)
floating
H
cleared
set
one or both set standby mode
both cleared
no change from sleep mode
standby mode from any other mode
floating
H
H
L
L
L
cleared
cleared
cleared
cleared
one or both set standby mode
both cleared
no change from sleep mode
standby mode from any other mode
one or both set standby mode
floating
H
H
H
both cleared
no change from sleep mode
floating
H(3)
go-to-sleep command mode from any
other mode; note 3
H
H
L
cleared
cleared
cleared
cleared
X
X
pwon/listen-only mode
normal mode; note 4
H
H
H
Notes
1. Setting the pwon flag or the wake-up flag will clear the UVNOM flag.
2. The transceiver directly enters sleep mode and pin INH is set floating when the UVNOM flag is set (so after the
undervoltage detection time on either VCC or VI/O has elapsed before that voltage level has recovered).
3. When go-to-sleep command mode is selected for longer than the minimum hold time of the go-to-sleep command,
the transceiver will enter sleep mode and pin INH is set floating.
4. On entering normal mode the pwon flag and the wake-up flag will be cleared.
2003 Oct 14
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Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041
STB = H
and
EN = H
STB = H
and
EN = L
PWON/LISTEN-
ONLY MODE
NORMAL
MODE
STB = H
and
EN = H
STB = H
and
STB = H
EN = L
STB = H
and
EN = H
and
EN = L
STB = L
and
(EN = L or flag set)
STB = L
and
EN = H
STB = L and EN = H
and
flags cleared
STB = L
and
EN = L
GO-TO-SLEEP
COMMAND
MODE
STB = L and EN = H
and
STANDBY
MODE
flags cleared
STB = L
and
(EN = L or flag set)
flags cleared
and
STB = L
STB = H and EN = H
and
STB = H and EN = L
and
and
t > t
flag set
h(min)
UV
cleared
UV
cleared
NOM
NOM
SLEEP
MODE
LEGEND:
MGU983
= H, = L
flag set
logical state of pin
setting pwon and/or wake-up flag
pwon and wake-up flag both cleared
flags cleared
Fig.3 Mode transitions when VCC, VI/O and VBAT are present.
NORMAL MODE
behaviour. The receiver will still convert the analog bus
signal on pins CANH and CANL into digital data, available
for output to pin RXD. As in normal mode the bus pins are
biased at 0.5VCC, and pin INH remains active.
Normal mode is the mode for normal bi-directional CAN
communication. The receiver will convert the differential
analog bus signal on pins CANH and CANL into digital
data, available for output to pin RXD. The transmitter will
convert digital data on pin TXD into a differential analog
signal, available for output to the bus pins. The bus pins
are biased at 0.5VCC (via Ri(cm)). Pin INH is active, so
voltage regulators controlled by pin INH (see Fig.4) will be
active too.
STANDBY MODE
The standby mode is the first-level power saving mode of
the transceiver, offering reduced current consumption.
In standby mode the transceiver is not able to transmit or
receive data and the low-power receiver is activated to
monitor bus activity. The bus pins are biased at ground
level (via Ri(cm)). Pin INH is still active, so voltage
PWON/LISTEN-ONLY MODE
regulators controlled by this pin INH will be active too.
In pwon/listen-only mode the transmitter of the transceiver
is disabled, effectively providing a transceiver listen-only
2003 Oct 14
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Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041
Pins RXD and ERR will reflect any wake-up requests
(provided that VI/O and VCC are present).
command mode, and also when the undervoltage
detection time on either VCC or VI/O elapses before that
voltage level has recovered. In sleep mode the transceiver
still behaves as described for standby mode, but now
pin INH is set floating. Voltage regulators controlled by
pin INH will be switched off, and the current into pin VBAT
is reduced to a minimum. Waking up a node from sleep
mode is possible via the wake-up flag and (as long as the
UVNOM flag is not set) via pin STB.
GO-TO-SLEEP COMMAND MODE
The go-to-sleep command mode is the controlled route for
entering sleep mode. In go-to-sleep command mode the
transceiver behaves as if in standby mode, plus a
go-to-sleep command is issued to the transceiver. After
remaining in go-to-sleep command mode for the minimum
hold time (th(min)), the transceiver will enter sleep mode.
The transceiver will not enter the sleep mode if the state of
pins STB or EN is changed or the UVBAT, pwon or
wake-up flag is set before th(min) has expired.
Internal flags
The TJA1041 makes use of seven internal flags for its
fail-safe fallback mode control and system diagnosis
support. Table 1 shows the relation between flags and
operating modes of the transceiver. Five of the internal
flags can be made available to the controller via pin ERR.
Table 2 shows the details on how to access these flags.
The following sections describe the seven internal flags.
SLEEP MODE
The sleep mode is the second-level power saving mode of
the transceiver. Sleep mode is entered via the go-to-sleep
Table 2 Accessing internal flags via pin ERR
Internal flag
UVNOM
Flag is available on pin ERR (1)
Flag is cleared
no
no
by setting the pwon or wake-up flag
when VBAT has recovered
UVBAT
pwon
in pwon/listen-only mode (coming from standby
mode, go-to-sleep command mode, or sleep mode)
on entering normal mode
wake-up
in standby mode, go-to-sleep command mode, and on entering normal mode, or by setting the
sleep mode (provided that VI/O and VCC are present) pwon or UVNOM flag
wake-up source in normal mode (before the fourth dominant to
recessive edge on pin TXD; note 2)
on leaving normal mode, or by setting the
pwon flag
bus failure
in normal mode (after the fourth dominant to
recessive edge on pin TXD; note 2)
on re-entering normal mode
local failure
in pwon/listen-only mode (coming from normal
mode)
on entering normal mode or when RXD is
dominant while TXD is recessive (provided
that all local failures are resolved)
Notes
1. Pin ERR is an active-LOW output, so a LOW level indicates a set flag and a HIGH level indicates a cleared flag. Allow
pin ERR to stabilize for at least 8 µs after changing operating modes.
2. Allow for a TXD dominant time of at least 4 µs per dominant-recessive cycle.
2003 Oct 14
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Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041
UVNOM FLAG
power-on, or when the UVNOM flag is set or the transceiver
enters normal mode.
UVNOM is the VCC and VI/O undervoltage detection flag.
The flag is set when the voltage on pin VCC drops below
VCC(sleep) for longer than tUV(VCC) or when the voltage on
WAKE-UP SOURCE FLAG
Wake-up source recognition is provided via the wake-up
source flag, which is set when the wake-up flag is set by a
local wake-up request via pin WAKE. The wake-up source
flag can only be set after the pwon flag is cleared.
In normal mode the wake-up source flag can be made
available on pin ERR. The flag is cleared at power-on or
when the transceiver leaves normal mode.
pin VI/O drops below VI/O(sleep) for longer than tUV(VI/O)
.
When the UVNOM flag is set, the transceiver will enter
sleep mode to save power and not disturb the bus. In sleep
mode the voltage regulators connected to pin INH are
disabled, avoiding the extra power consumption in case of
a short-circuit condition. After a waiting time (fixed by the
same timers used for setting UVNOM) any wake-up request
or setting of the pwon flag will clear UVNOM and the timers,
allowing the voltage regulators to be reactivated at least
until UVNOM is set again.
BUS FAILURE FLAG
The bus failure flag is set if the transceiver detects a bus
line short-circuit condition to VBAT, VCC or GND during four
consecutive dominant-recessive cycles on pin TXD, when
trying to drive the bus lines dominant. In normal mode the
bus failure flag can be made available on pin ERR. The
flag is cleared when the transceiver re-enters normal
mode.
UVBAT FLAG
UVBAT is the VBAT undervoltage detection flag. The flag is
set when the voltage on pin VBAT drops below VBAT(stb)
.
When UVBAT is set, the transceiver will try to enter standby
mode to save power and not disturb the bus. UVBAT is
cleared when the voltage on pin VBAT has recovered. The
transceiver will then return to the operating mode
determined by the logic state of pins STB and EN.
LOCAL FAILURE FLAG
In normal mode or pwon/listen-only mode the transceiver
can recognize five different local failures, and will combine
them into one local failure flag. The five local failures are:
TXD dominant clamping, RXD recessive clamping, a
TXD-to-RXD short circuit, bus dominant clamping, and
over-temperature. Nature and detection of these local
failures is described in Section “Local failures”.
In pwon/listen-only mode the local failure flag can be made
available on pin ERR. The flag is cleared when entering
normal mode or when RXD is dominant while TXD is
recessive, provided that all local failures are resolved.
PWON FLAG
Pwon is the VBAT power-on flag. This flag is set when the
voltage on pin VBAT has recovered after it dropped below
VBAT(pwon), particularly after the transceiver was
disconnected from the battery. By setting the pwon flag,
the UVNOM flag and timers are cleared and the transceiver
cannot enter sleep mode. This ensures that any voltage
regulator connected to pin INH is activated when the node
is reconnected to the battery. In pwon/listen-only mode the
pwon flag can be made available on pin ERR. The flag is
cleared when the transceiver enters normal mode.
Local failures
The TJA1041 can detect five different local failure
conditions. Any of these failures will set the local failure
flag, and in most cases the transmitter of the transceiver
will be disabled. The following sections give the details.
WAKE-UP FLAG
The wake-up flag is set when the transceiver detects a
local or a remote wake-up request. A local wake-up
request is detected when a logic state change on
pin WAKE remains stable for at least twake. A remote
wake-up request is detected when the bus remains in
dominant state for at least tBUS. The wake-up flag can only
be set in standby mode, go-to-sleep command mode or
sleep mode. Setting of the flag is blocked during the
UVNOM flag waiting time. By setting the wake-up flag, the
UVNOM flag and timers are cleared. The wake-up flag is
immediately available on pins ERR and RXD (provided
that VI/O and VCC are present). The flag is cleared at
TXD DOMINANT CLAMPING DETECTION
A permanent LOW level on pin TXD (due to a hardware or
software application failure) would drive the CAN bus into
a permanent dominant state, blocking all network
communication. The TXD dominant time-out function
prevents such a network lock-up by disabling the
transmitter of the transceiver if pin TXD remains at a LOW
level for longer than the TXD dominant time-out tdom(TXD)
The tdom(TXD) timer defines the minimum possible bit rate
.
2003 Oct 14
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Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041
of 40 kbit/s. The transmitter remains disabled until the
local failure flag is cleared.
Recessive bus voltage stabilization
In recessive state the output impedance of transceivers is
relatively high. In a partially powered network (supply
voltage is off in some of the nodes) any deactivated
transceiver with a significant leakage current is likely to
load the recessive bus to ground. This will cause a
common-mode voltage step each time transmission starts,
resulting in increased ElectroMagnetic Emission (EME).
Using pin SPLIT of the TJA1041 in combination with split
termination (see Fig.5) will reduce this step effect. In
normal mode and pwon/listen-only mode pin SPLIT
provides a stabilized 0.5VCC DC voltage. In standby mode,
go-to-sleep command mode and sleep mode pin SPLIT is
set floating.
RXD RECESSIVE CLAMPING DETECTION
An RXD pin clamped to HIGH level will prevent the
controller connected to this pin from recognizing a bus
dominant state. So the controller can start messages at
any time, which is likely to disturb all bus communication.
RXD recessive clamping detection prevents this effect by
disabling the transmitter when the bus is in dominant state
without RXD reflecting this. The transmitter remains
disabled until the local failure flag is cleared.
TXD-TO-RXD SHORT-CIRCUIT DETECTION
A short-circuit between pins RXD and TXD would keep the
bus in a permanent dominant state once the bus is driven
dominant, because the low-side driver of RXD is typically
stronger than the high-side driver of the controller
connected to TXD. The TXD-to-RXD short-circuit
detection prevents such a network lock-up by disabling the
transmitter. The transmitter remains disabled until the local
failure flag is cleared.
I/O level adapter
The TJA1041 is equipped with a built-in I/O-level adapter.
By using the supply voltage of the controller (to be supplied
at pin VI/O) the level adapter ratio-metrically scales the
I/O-levels of the transceiver. For pins TXD, STB and EN
the digital input threshold level is adjusted, and for
pins RXD and ERR the HIGH-level output voltage is
adjusted. This allows the transceiver to be directly
interfaced with controllers on supply voltages between
2.8 V and 5.25 V, without the need for glue logic.
BUS DOMINANT CLAMPING DETECTION
A CAN bus short circuit (to VBAT, VCC or GND) or a failure
in one of the other network nodes could result in a
differential voltage on the bus high enough to represent a
bus dominant state. Because a node will not start
transmission if the bus is dominant, the normal bus failure
detection will not detect this failure, but the bus dominant
clamping detection will. The local failure flag is set if the
Pin WAKE
Pin WAKE of the TJA1041 allows local wake-up triggering
by a LOW to HIGH state change as well as a HIGH to LOW
state change. This gives maximum flexibility when
designing a local wake-up circuit. To keep current
consumption at a minimum, after a twake delay the internal
bias voltage of pin WAKE will follow the logic state of this
pin. A HIGH level on pin WAKE is followed by an internal
pull-up to VBAT. A LOW level on pin WAKE is followed by
an internal pull-down towards GND. To ensure EMI
performance in applications not using local wake-up it is
recommended to connect pin WAKE to pin VBAT or to pin
GND.
dominant state on the bus persists for longer than tdom(bus)
By checking this flag, the controller can determine if a
.
clamped bus is blocking network communication. There is
no need to disable the transmitter. Note that the local
failure flag does not retain a bus dominant clamping
failure, and is released as soon as the bus returns to
recessive state.
OVER-TEMPERATURE DETECTION
To protect the output drivers of the transceiver against
overheating, the transmitter will be disabled if the virtual
junction temperature exceeds the shutdown junction
temperature Tj(sd). The transmitter remains disabled until
the local failure flag is cleared.
2003 Oct 14
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Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
VCC
PARAMETER
CONDITIONS
no time limit
MIN.
−0.3
MAX.
+6
UNIT
DC voltage on pin VCC
V
V
V
V
V
V
V
V
V
V
V
V
operating range
no time limit
4.75
−0.3
2.8
5.25
VI/O
DC voltage on pin VI/O
DC voltage on pin VBAT
+6
operating range
no time limit
5.25
VBAT
−0.3
5
+40
operating range
load dump
27
−
40
VTXD
VRXD
VSTB
VEN
DC voltage on pin TXD
DC voltage on pin RXD
DC voltage on pin STB
DC voltage on pin EN
DC voltage on pin ERR
DC voltage on pin INH
DC voltage on pin WAKE
DC current on pin WAKE
DC voltage on pin CANH
DC voltage on pin CANL
DC voltage on pin SPLIT
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−0.3
−
VI/O + 0.3
VI/O + 0.3
VI/O + 0.3
VI/O + 0.3
VI/O + 0.3
VERR
VINH
VBAT + 0.3 V
VBAT + 0.3 V
VWAKE
IWAKE
VCANH
VCANL
VSPLIT
Vtrt
−15
+40
+40
+40
+200
mA
0 < VCC < 5.25 V; no time limit
0 < VCC < 5.25 V; no time limit
0 < VCC < 5.25 V; no time limit
−27
−27
−27
V
V
V
V
transient voltages on
pins CANH, CANL, SPLIT
and VBAT
according to ISO 7637; see Fig.6 −200
Vesd
electrostatic discharge voltage
Human Body Model (HBM); note 1
pins CANH, CANL and SPLIT
all other pins
−6
+6
kV
kV
V
−4
+4
Machine Model (MM); note 2
note 3
−200
−40
−55
+200
+150
+150
Tvj
virtual junction temperature
storage temperature
°C
°C
Tstg
Notes
1. Equivalent to discharging a 100 pF capacitor via a 1.5 kΩ series resistor.
2. Equivalent to discharging a 200 pF capacitor via a 0.75 µH series inductor and a 10 Ω series resistor.
3. Junction temperature in accordance with IEC 60747-1. An alternative definition is: Tvj = Tamb + P × Rth(vj-amb), where
Rth(vj-amb) is a fixed value. The rating for Tvj limits the allowable combinations of power dissipation (P) and ambient
temperature (Tamb).
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
thermal resistance from junction to ambient in SO14 package in free air
thermal resistance from junction to substrate of bare die in free air
CONDITIONS
VALUE
UNIT
Rth(j-a)
Rth(j-s)
120
40
K/W
K/W
2003 Oct 14
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Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041
QUALITY SPECIFICATION
Quality specification in accordance with “AEC-Q100”.
CHARACTERISTICS
VCC = 4.75 to 5.25 V; VI/O = 2.8 V to VCC; VBAT = 5 to 27 V; RL = 60 Ω; Tvj = −40 to +150 °C; unless specified
otherwise; all voltages are defined with respect to ground; positive currents flow into the device; note 1.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies (pins VBAT, VCC and VI/O
)
VCC(sleep)
VI/O(sleep)
VBAT(stb)
VBAT(pwon)
ICC
VCC undervoltage detection
level for forced sleep mode
VBAT = 12 V (fail-safe)
2.75
3.3
4.5
V
VI/O undervoltage detection
level for forced sleep mode
0.5
2.75
2.5
25
1.5
3.3
3.3
55
6
2
V
VBAT voltage level for fail-safe VCC = 5 V (fail-safe)
fallback mode
4.5
4.1
80
10
V
VBAT voltage level for setting VCC = 0 V
pwon flag
V
VCC input current
VI/O input current
VBAT input current
normal mode; VTXD = 0 V
(dominant)
mA
mA
normal or pwon/listen-only
mode; VTXD = VI/O
(recessive)
2
standby or sleep mode
−
1
10
µA
µA
II/O
normal mode; VTXD = 0 V
(dominant)
100
350
1000
normal or pwon/listen-only
mode; VTXD = VI/O
(recessive)
15
80
200
µA
standby or sleep mode
−
0
5
µA
µA
IBAT
normal or pwon/listen-only
mode
15
30
40
standby mode;
10
10
20
20
30
30
µA
µA
VCC > 4.75 V; VI/O = 2.8 V;
VINH = VWAKE = VBAT = 12 V
sleep mode;
VINH = VCC = VI/O = 0 V;
VWAKE = VBAT = 12 V
Transmitter data input (pin TXD)
VIH
VIL
IIH
HIGH-level input voltage
0.7VI/O
−0.3
−5
−
−
0
VCC + 0.3 V
LOW-level input voltage
HIGH-level input current
0.3VI/O
+5
V
normal or pwon/listen-only
mode; VTXD = VI/O
µA
IIL
Ci
LOW-level input current
input capacitance
normal or pwon/listen-only
mode; VTXD = 0.3VI/O
−70
−250
−500
µA
not tested
−
5
10
pF
2003 Oct 14
12
Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041
SYMBOL
Receiver data output (pin RXD)
IOH HIGH-level output current
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VRXD = VI/O − 0.4 V;
VI/O = VCC
−1
−3
−6
12
mA
mA
IOL
LOW-level output current
VRXD = 0.4 V; VTXD = VI/O
;
2
5
bus dominant
Standby and enable control inputs (pins STB and EN)
VIH
VIL
IIH
HIGH-level input voltage
LOW-level input voltage
HIGH-level input current
LOW-level input current
0.7VI/O
−
−
4
0
VCC + 0.3 V
−0.3
1
0.3VI/O
10
V
VSTB = VEN = 0.7VI/O
VSTB = VEN = 0 V
µA
µA
IIL
−
−1
Error and power-on indication output (pin ERR)
IOH
HIGH-level output current
VERR = VI/O − 0.4 V;
−4
−20
−50
µA
VI/O = VCC
IOL
LOW-level output current
VERR = 0.4 V
0.1
0.2
0.35
mA
Local wake-up input (pin WAKE)
IIH
IIL
HIGH-level input current
LOW-level input current
threshold voltage
VWAKE = VBAT − 1.9 V
VWAKE = VBAT − 3.1 V
VSTB = 0 V
−1
−5
−10
µA
µA
V
1
5
10
Vth
VBAT − 3 VBAT − 2.5 VBAT − 2
Inhibit output (pin INH)
∆VH
HIGH-level voltage drop
leakage current
IINH = −0.18 mA
0.05
0.2
0
0.8
5
V
IL
sleep mode
−
µA
Bus lines (pins CANH and CANL)
VO(dom)
dominant output voltage
VTXD = 0 V
pin CANH
pin CANL
3
3.6
1.4
−
4.25
V
V
V
0.5
−0.1
1.75
VO(dom)(m)
matching of dominant output
voltage
+0.15
(VCC − VCANH − VCANL
differential bus output voltage VTXD = 0 V (dominant);
(VCANH − VCANL 45 Ω < RL < 65 Ω
TXD = VI/O (recessive); no −50
)
VO(dif)(bus)
1.5
−
3.0
+50
3
V
)
V
−
mV
V
load
VO(reces)
recessive output voltage
normal or pwon/listen-only
mode; VTXD = VI/O; no load
2
0.5VCC
0
standby or sleep mode; no −0.1
+0.1
V
load
IO(sc)
short-circuit output current
recessive output current
VTXD = 0 V (dominant)
pin CANH; VCANH = 0 V
pin CANL; VCANL = 40 V
−27 V < VCAN < 32 V
−45
45
−70
70
−
−95
95
mA
mA
mA
IO(reces)
−2.5
+2.5
2003 Oct 14
13
Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041
SYMBOL
Vdif(th)
PARAMETER
CONDITIONS
MIN.
0.5
TYP.
0.7
MAX.
0.9
UNIT
differential receiver threshold normal or pwon/listen-only
V
voltage
mode (see Fig.7);
−12 V < VCANH < 12 V;
−12 V < VCANL < 12 V
standby or sleep mode;
−12 V < VCANH < 12 V;
−12 V < VCANL < 12 V
0.4
50
0.7
70
1.15
100
V
Vhys(dif)
differential receiver
hysteresis voltage
normal or pwon/listen-only
mode (see Fig.7);
mV
−12 V < VCANH < 12 V;
−12 V < VCANL < 12 V
ILI
input leakage current
VCC = 0 V;
VCANH = VCANL = 5 V
100
15
170
25
0
250
35
µA
kΩ
%
Ri(cm)
Ri(cm)(m)
common-mode input
resistance
common-mode input
resistance matching
VCANH = VCANL
−3
+3
Ri(dif)
Ci(cm)
differential input resistance
25
50
75
20
kΩ
common-mode input
capacitance
VTXD = VCC; not tested
−
−
pF
Ci(dif)
differential input capacitance VTXD = VCC; not tested
−
−
−
10
50
pF
Rsc(bus)
detectable short-circuit
normal mode
0
Ω
resistance between bus lines
and VBAT, VCC and GND
Common-mode stabilization output (pin SPLIT)
Vo
output voltage
normal or pwon/listen-only
mode;
0.3VCC 0.5VCC
0.7VCC
V
−500 µA < ISPLIT < 500 µA
IL
leakage current
standby or sleep mode;
−
0
5
µA
−22 V < VSPLIT < 35 V
Timing characteristics; see Figs 8 and 9
td(TXD-BUSon)
td(TXD-BUSoff)
td(BUSon-RXD)
delay TXD to bus active
delay TXD to bus inactive
delay bus active to RXD
normal mode
normal mode
25
10
15
70
50
65
110
95
ns
ns
ns
normal or pwon/listen-only
mode
115
td(BUSoff-RXD)
tPD(TXD-RXD)
delay bus inactive to RXD
normal or pwon/listen-only
mode
35
40
5
100
−
160
255
12.5
ns
ns
ms
propagation delay TXD to
RXD
VSTB = 0 V
tUV(VCC)
tUV(VI/O)
tdom(TXD)
tdom(bus)
,
undervoltage detection time
on VCC and VI/O
10
TXD dominant time-out
bus dominant time-out
VTXD = 0 V
Vdif > 0.9 V
300
300
600
600
1000
1000
µs
µs
2003 Oct 14
14
Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041
SYMBOL
th(min)
PARAMETER
CONDITIONS
MIN.
20
TYP.
MAX.
50
UNIT
minimum hold time of
go-to-sleep command
35
µs
tBUS
dominant time for wake-up
via bus
standby or sleep mode;
0.75
5
1.75
25
5
µs
µs
VBAT = 12 V
twake
minimum wake-up time after standby or sleep mode;
50
receiving a falling or rising
edge
VBAT = 12 V
Thermal shutdown
Tj(sd)
shutdown junction
temperature
155
165
180
°C
Note
1. All parameters are guaranteed over the virtual junction temperature range by design, but only 100% tested at
Tamb = 125 °C for dies on wafer level and in addition to this, 100% tested at Tamb = 125 °C for cased products, unless
specified otherwise. For bare dies, all parameters are only guaranteed with the reverse side of the die connected to
ground.
TEST AND APPLICATION INFORMATION
3 V
5 V
BAT
V
V
V
I/O
INH
BAT
CC
V
CC
STB
EN
WAKE
GND
Port x, y, z
ERR
MICRO-
CONTROLLER
TJA1041
RXD
TXD
RXD
TXD
CANH
CANL
SPLIT
MGU173
CAN bus wires
Fig.4 Typical application with 3 V microcontroller.
2003 Oct 14
15
Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041
V
CC
TJA1041
CANH
SPLIT
CANL
R
60 Ω
60 Ω
V
= 0.5V
CC
SPLIT
in normal mode
V
SPLIT
and pwon/listen-only
mode;
otherwise floating
R
MGU169
GND
Fig.5 Stabilization circuitry and application.
+
12 V
+
5 V
47 µF
100 nF
V
V
V
BAT
10 µF
I/O
CC
5
3
10
1 nF
1 nF
TXD
EN
CANH
CANL
1
13
12
TRANSIENT
GENERATOR
6
STB
14
9
WAKE
SPLIT
ERR
INH
TJA1041
11
8
500 kHz
7
RXD
4
2
GND
MGW337
The waveforms of the applied transients will be in accordance with ISO 7637 part 1, test pulses 1, 2, 3a, 3b, 5, 6 and 7.
Fig.6 Test circuit for automotive transients.
2003 Oct 14
16
Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041
MGS378
V
RXD
HIGH
LOW
(V)
hysteresis
0.5
0.9
V
i(dif)(bus)
Fig.7 Hysteresis of the receiver.
+
12 V
+
5 V
47 µF
100 nF
V
V
V
BAT
10 µF
I/O
CC
5
3
10
TXD
EN
CANH
1
13
R
C
L
100 pF
L
6
60 Ω
STB
CANL
SPLIT
ERR
INH
14
9
12
11
8
WAKE
TJA1041
7
RXD
4
2
15 pF
GND
MGW338
Fig.8 Test circuit for timing characteristics.
17
2003 Oct 14
Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041
HIGH
LOW
TXD
CANH
CANL
dominant
(BUS on)
0.9 V
0.5 V
(1)
V
i(dif)(bus)
recessive
(BUS off)
HIGH
0.7V
CC
RXD
0.3V
CC
LOW
t
t
d(TXD-BUSon)
d(TXD-BUSoff)
t
t
d(BUSon-RXD)
d(BUSoff-RXD)
t
t
PD TXD-RXD
(
)
(
)
PD TXD-RXD
MGS377
(1) Vi(dif)(bus) = VCANH − VCANL
.
Fig.9 Timing diagram.
BONDING PAD LOCATIONS
COORDINATES(1)
SYMBOL
PAD
x
y
1
14
handbook, halfpage
2
3
13
12
TXD
GND
VCC
1
2
664.25
75.75
115.5
115.5
115.5
264.5
667.75
1076.75
1765
3004.5
3044.25
2573
3
RXD
VI/O
4
1862.75
115.5
114
5
4
EN
6
TJA1041U
11
10
INH
7
85
ERR
WAKE
VBAT
SPLIT
CANL
CANH
STB
8
115.5
85
9
10
11
12
13
14
1765
792.5
1442.25
2115
1765
5
1765
9
x
0
6
7
8
1751
3002.5
3004.5
0
MGU984
y
940.75
Note
The reverse side of the bare die must be connected to ground.
1. All x/y coordinates represent the position of the centre
of each pad (in µm) with respect to the left hand bottom
corner of the top aluminium layer.
Fig.10 Bonding pad locations.
2003 Oct 14
18
Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041
PACKAGE OUTLINE
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
D
E
A
X
c
y
H
v
M
A
E
Z
8
14
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
7
e
detail X
w
M
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.75
1.27
0.05
1.05
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.024
0.028
0.012
inches
0.041
0.01 0.004
0.069
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT108-1
076E06
MS-012
2003 Oct 14
19
Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041
SOLDERING
If wave soldering is used the following conditions must be
observed for optimal results:
Introduction to soldering surface mount packages
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certain surface mount ICs, but it is not suitable for fine pitch
SMDs. In these situations reflow soldering is
recommended.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
Reflow soldering
The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Driven by legislation and environmental forces the
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
worldwide use of lead-free solder pastes is increasing.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
Typical dwell time of the leads in the wave ranges from
3 to 4 seconds at 250 °C or 265 °C, depending on solder
material applied, SnPb or Pb-free respectively.
Typical reflow peak temperatures range from
215 to 270 °C depending on solder paste material. The
top-surface temperature of the packages should
preferably be kept:
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
• below 220 °C (SnPb process) or below 245 °C (Pb-free
process)
Manual soldering
– for all BGA and SSOP-T packages
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
– for packages with a thickness ≥ 2.5 mm
– for packages with a thickness < 2.5 mm and a
volume ≥ 350 mm3 so called thick/large packages.
• below 235 °C (SnPb process) or below 260 °C (Pb-free
process) for packages with a thickness < 2.5 mm and a
volume < 350 mm3 so called small/thin packages.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
Moisture sensitivity precautions, as indicated on packing,
must be respected at all times.
Wave soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
2003 Oct 14
20
Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE(1)
WAVE
not suitable
REFLOW(2)
BGA, LBGA, LFBGA, SQFP, SSOP-T(3), TFBGA, VFBGA
suitable
DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP,
HTSSOP, HVQFN, HVSON, SMS
not suitable(4)
suitable
PLCC(5), SO, SOJ
LQFP, QFP, TQFP
SSOP, TSSOP, VSO, VSSOP
PMFP(8)
suitable
suitable
not recommended(5)(6) suitable
not recommended(7)
suitable
not suitable
not suitable
Notes
1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy
from your Philips Semiconductors sales office.
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
3. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account
be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature
exceeding 217 °C ± 10 °C measured in the atmosphere of the reflow oven. The package body peak temperature
must be kept as low as possible.
4. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.
5. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
6. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
7. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than
0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
8. Hot bar or manual soldering is suitable for PMFP packages.
REVISION HISTORY
REV
DATE
CPCN
DESCRIPTION
Product specification (9397 750 11838)
Modification:
4
20031014
200307014
• Change ‘Vdif(th) = 0.5 V’ in standby or sleep mode into ‘Vdif(th) = 0.4 V’
• Change ‘provided that VI/O is present’ into ‘provided that VI/O and VCC
are present’
• Add Chapter QUALITY SPECIFICATION
• Add Chapter REVISION HISTORY
Product specification (9397 750 10785)
3
20030213
−
2003 Oct 14
21
Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041
DATA SHEET STATUS
DATA SHEET
STATUS(1)
PRODUCT
STATUS(2)(3)
LEVEL
DEFINITION
I
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
Application information
Applications that are
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2003 Oct 14
22
Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041
Bare die
All die are tested and are guaranteed to
comply with all data sheet limits up to the point of wafer
sawing for a period of ninety (90) days from the date of
Philips' delivery. If there are data sheet limits not
guaranteed, these will be separately indicated in the data
sheet. There are no post packing tests performed on
individual die or wafer. Philips Semiconductors has no
control of third party procedures in the sawing, handling,
packing or assembly of the die. Accordingly, Philips
Semiconductors assumes no liability for device
functionality or performance of the die or systems after
third party sawing, handling, packing or assembly of the
die. It is the responsibility of the customer to test and
qualify their application in which the die is used.
2003 Oct 14
23
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2003
SCA75
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
R16/04/pp24
Date of release: 2003 Oct 14
Document order number: 9397 750 11838
相关型号：
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