UPA1731G-E2-A [RENESAS]

N Channel Power MOSFET, SOP, /Embossed Tape;
UPA1731G-E2-A
型号: UPA1731G-E2-A
厂家: RENESAS TECHNOLOGY CORP    RENESAS TECHNOLOGY CORP
描述:

N Channel Power MOSFET, SOP, /Embossed Tape

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DATA SHEET  
MOS FIELD EFFECT TRANSISTOR  
µPA1731  
SWITCHING  
P-CHANNEL POWER MOS FET  
INDUSTRIAL USE  
DESCRIPTION  
PACKAGE DRAWING (Unit : mm)  
The µPA1731 is P-Channel MOS Field Effect Transistor  
designed for power management applications of  
8
5
notebook computers and Li-ion battery protection circuit.  
; Source  
; Gate  
; Drain  
1,2,3  
4
5,6,7,8  
FEATURES  
Low on-resistance  
6.0 ±0.3  
4.4  
RDS(on)1 = 10.3 mTYP. (VGS = –10 V, ID = –5.0 A)  
RDS(on)2 = 14.6 mTYP. (VGS = –4.5 V, ID = –5.0 A)  
RDS(on)3 = 16.5 mTYP. (VGS = –4.0 V, ID = –5.0 A)  
Low Ciss : Ciss =2600 pF TYP.  
0.8  
0.5 ±0.2  
0.10  
Built-in G-S protection diode  
ax.  
Small and surface mount package (Power SOP8)  
0.12 M  
ORDERING INFORMATION  
PART NUMBER  
PAC
µPA1731G  
P
ABSOLUTE MAXIMUM erminals are connected.)  
EQUIVALENT CIRCUIT  
Drain to Source Voltage
Gate to Source Voltage (V
Drain Current (DC)  
Drain Current (pulse) Note1  
Total Power Dissipation (TA = 25°C) Note2  
S  
ID(DC)  
ID(pulse)  
PT  
–30  
V
V
Drain  
20  
10  
40  
m
m
m
A
Body  
Diode  
Gate  
A
2.0  
150  
W
°C  
Gate  
Protection  
Diode  
Channel Temperature  
Tch  
Source  
Storage Temperature  
Tstg  
–55 to + 150 °C  
Notes 1. PW 10 µs, Duty Cycle 1 %  
2. Mounted on ceramic substrate of 1200 mm2 x 2.2 mm  
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When  
this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated  
voltage may be applied to this device.  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all devices/types available in every country. Please check with local NEC representative for  
availability and additional information.  
Document No.  
Date Published May 2001 NS CP(K)  
Printed in Japan  
G14285EJ2V1DS00 (2nd edition)  
The mark shows major revised points.  
1999  
©
µPA1731  
ELECTRICAL CHARACTERISTICS (TA = 25 °C, All terminals are connected.)  
CHARACTERISTICS  
SYMBOL  
RDS(on)1  
RDS(on)2  
RDS(on)3  
VGS(off)  
| yfs |  
IDSS  
TEST CONDITIONS  
VGS = 10 V, ID = 5.0 A  
MIN. TYP. MAX. UNIT  
Drain to Source On-state Resistance  
10.3  
14.6  
16.5  
13.0  
19.5  
22.0  
mΩ  
mΩ  
mΩ  
V
VGS = 4.5 V, ID = 5.0 A  
VGS = 4.0 V, ID = 5.0 A  
VDS = 10 V, ID = 1 mA  
VDS = 10 V, ID = 5.0 A  
VDS = 30 V, VGS = 0 V  
Gate to Source Cut-off Voltage  
Forward Transfer Admittance  
Drain Leakage Current  
Gate to Source Leakage Current  
Input Capacitance  
1.0 1.6 2.5  
8.0  
18.0  
S
1  
10  
µA  
µA  
pF  
pF  
pF  
ns  
VGS = 20 V, VDS = 0 V  
IGSS  
m
m
Ciss  
VDS = 10 V  
VGS = 0 V  
2600  
810  
350  
32  
Output Capacitance  
Coss  
Reverse Transfer Capacitance  
Turn-on Delay Time  
Crss  
f = 1 MHz  
td(on)  
ID = 5.0 A  
Rise Time  
tr  
VGS(on) = 10 V  
VDD = 15 V  
RG = 10 Ω  
185  
5  
110  
46  
ns  
Turn-off Delay Time  
td(off)  
ns  
Fall Time  
tf  
ns  
Total Gate Charge  
QG  
ID = 10 A  
nC  
nC  
nC  
V
Gate to Source Charge  
Gate to Drain Charge  
Body Diode Forward Voltage  
QGS  
VDD =
VG
6.5  
QGD  
12  
VF(S-D)  
0.80  
Reverse Recovery Time  
Reverse Recovery Charge  
t
50  
46  
ns  
nC  
TEST CIRCUIT 2 GATE CHARGE  
TEST CIRCUIT 1 SWITC
D.U.T.  
=2mA  
D.U.T.  
I
G
R
L
90%  
V
GS (on)  
10%  
10%  
RG  
0
50Ω  
PG.  
PG.  
RG  
= 10Ω  
V
DD  
V
90%  
ID  
90%  
10%  
I
D
V
0
GS  
I
D
0
Wave Form  
t
d (on)  
t
r
t
d (off)  
t
f
τ
t
on  
t
off  
µ
τ = 1 s  
Duty Cycle  
1 %  
2
Data Sheet G14285EJ2V1DS  
µPA1731  
TYPICAL CHARACTERISTICS (TA = 25 °C)  
DERATING FACTOR OF FORWARD BIAS  
SAFE OPERATING AREA  
TOTAL POWER DISSIPATION vs.  
AMBIENT TEMPERATURE  
2.8  
2.4  
2.0  
1.6  
1.2  
0.8  
0.4  
Mounted on ceramic  
substrate of  
1200 mm2 x 2.2 mm  
100  
80  
60  
40  
20  
0
20 40 80 100 120 140 160  
emperature - ˚C  
0
20 40 60 80 100 120 140 160  
- Ambient Temperature - ˚C  
T
T
A
FORWARD BIAS SAFE OPERATING AREA  
100  
10  
1  
ited  
I
D(pulse) = 40 A  
)
Lim  
10 V  
PW = 1 ms  
RDS(on)  
(at V  
=
GS  
Rsubstrate of  
10 ms  
I
D(DC) = 10 A  
m  
100 ms  
P
o
w
er Dissipation Limited  
0.1  
TA  
= 25˚C  
Single Pulse  
0.01  
1  
0.1  
V
DS -  
Drain t
ERMAL RESISTANCE vs. PULSE WIDTH  
1000  
Rth(ch-A) = 62.5˚C  
100  
10  
1
0.1  
0.01  
Mounted on ceramic  
substrateof1200mm2 x 2.2 mm  
Single Pulse  
0.001  
10m  
10  
100  
1m  
100m  
100  
1000  
µ
µ
1
10  
PW - Pulse Width - s  
3
Data Sheet G14285EJ2V1DS  
µPA1731  
DRAIN CURRENT vs.  
FORWARD TRANSFER CHARACTERISTICS  
100  
DRAIN TO SOURCE VOLTAGE  
50  
40  
Pulsed  
Pulsed  
4.5V 4.0V  
10  
1  
V
GS =10V  
T = 50˚C  
A
25˚C  
25˚C  
30  
75˚C  
125˚C  
150˚C  
0.1  
0.01  
20  
10  
0.001  
0.0001  
V
DS =10V  
0.4  
DS to Source Voltage - V  
0.8  
0
0.6  
0.2  
0
1.0  
2.0  
3.0  
4.0  
V
VGS  
- Gate to Source Voltage - V  
FORWARD TRANSFER ADMITTANCE vs.  
DRAIN CURRENT  
DRESISTANCE vs.  
100  
10  
1
Pulsed  
TA  
= 50˚C  
25˚C  
25˚C  
75˚C  
125˚C  
150˚C  
I
D
=10 A  
5.0 A  
15  
0
5  
10  
0.1  
1  
I
D-
V
GS - Gate to Source Voltage - V  
GATE TO SOURCE CUT-OFF VOLTAGE vs.  
CHANNEL TEMPERATURE  
DRAIN TO SO
RESISTANCE vsNT  
20  
15  
2.0  
1.5  
1.0  
V
DS = 10 V  
Pulsed  
I
D
= 1 mA  
V
GS = 4.0 V  
4.5 V  
10 V  
10  
5
0.5  
0
0
0.1  
1  
10  
100  
100  
150  
50  
0
50  
100  
ID - Drain Current - A  
T
ch - Channel Temperature - ˚C  
4
Data Sheet G14285EJ2V1DS  
µPA1731  
DRAIN TO SOURCE ON-STATE RESISTANCE vs.  
CHANNEL TEMPERATURE  
SOURCE TO DRAIN DIODE  
FORWARD VOLTAGE  
25  
100  
10  
Pulsed  
V
GS = 4.0 V  
4.5 V  
VGS = 4.5 V  
0 V  
20  
15  
1
10 V  
10  
5
0.1  
0.01  
I
D
= 5.0 A  
0.001  
0
0
1.0  
1.5  
0
.5  
50  
100  
150  
50  
Vto Drain Voltage - V  
T
ch - Channel Temperature - ˚C  
CAPACITANCE vs. DRAIN TO  
SOURCE VOLTAGE  
RISTICS  
10000  
1000  
t
r
Ciss  
off)  
t
f
Coss  
t
d(on)  
C
100  
10  
1
V
V
=15V  
DS =10V  
V
GS = 0 V  
RGS  
G
= 10Ω  
f = 1 MHz  
0.1  
1  
1  
10  
100  
0.1  
V
DS - Drain
I
D
- Drain Current - A  
REVERSE R
DIODE CURR
DYNAMIC INPUT/OUTPUT CHARACTERISTICS  
40  
30  
20  
10  
14  
10000  
1000  
µ
dt=100A/  
s
I
D
=10A  
GS =0V  
12  
10  
8  
V
GS  
V
DS = 24 V  
15 V  
6 V  
100  
10  
1
6  
4  
2  
V
DS  
0
0
10  
20  
30  
40  
50  
1  
10  
100  
0.1  
Q
G
- Gate Charge - nC  
I
F
- Diode Current - A  
5
Data Sheet G14285EJ2V1DS  
µPA1731  
[MEMO]  
6
Data Sheet G14285EJ2V1DS  
µPA1731  
[MEMO]  
7
Data Sheet G14285EJ2V1DS  
µPA1731  
The information in this document is current as of May, 2001. The information is subject to change  
without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data  
books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products  
and/or types are available in every country. Please check with an NEC sales representative for  
availability and additional information.  
No part of this document may be copied or reproduced in any fy any means without prior  
written consent of NEC. NEC assumes no responsibility for any erropear in this document.  
NEC does not assume any liability for infringement of patents, copectual property rights of  
third parties by or arising from the use of NEC semiconductor cument or any other  
liability arising from the use of such products. No license, e, is granted under any  
patents, copyrights or other intellectual property rights of N
Descriptions of circuits, software and other related inare provided for illustrative  
purposes in semiconductor product operation aThe incorporation of these  
circuits, software and information in the desit shall be done under the full  
responsibility of customer. NEC assumes no es incurred by customers or third  
parties arising from the use of these circuit
While NEC endeavours to enhance the qf NEC semiconductor products, customers  
agree and acknowledge that the posannot be eliminated entirely. To minimize  
risks of damage to property oto persons arising from defects in NEC  
semiconductor products, custoicient safety measures in their design, such as  
redundancy, fire-containmen
NEC semiconductor produllowing three quality grades:  
"Standard", "Special" aic" quality grade applies only to semiconductor products  
developed based ouality assurance program" for a specific application. The  
recommended apptor product depend on its quality grade, as indicated below.  
Customers must cheof each semiconductor product before using it in a particular  
application.  
"Standard": Computers, ofment, communications equipment, test and measurement equipment, audio  
and visual equip, home electronic appliances, machine tools, personal electronic equipment  
and industrial robots  
"Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster  
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed  
for life support)  
"Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life  
support systems and medical equipment for life support, etc.  
The quality grade of NEC semiconductor products is "Standard" unless otherwise expressly specified in NEC's  
data sheets or data books, etc. If customers wish to use NEC semiconductor products in applications not  
intended by NEC, they must contact an NEC sales representative in advance to determine NEC's willingness  
to support a given application.  
(Note)  
(1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries.  
(2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for  
NEC (as defined above).  
M8E 00. 4  

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