UPA2736GR [RENESAS]
P-channel MOSFET -30 V, -14 A, 7.0 m; P沟道MOSFET -30 V， -14 ， 7.0米
| 型号： | UPA2736GR |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | P-channel MOSFET -30 V, -14 A, 7.0 m |
| 文件： | 总8页 (文件大小：205K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet
μPA2736GR
P-channel MOSFET
–30 V, –14 A, 7.0 mΩ
R07DS0868EJ0100
Rev.1.00
Aug 28, 2012
Description
The μ PA2736GR is P-channel MOS Field Effect Transistor designed for DC/DC converter and power management
applications of portable equipment.
Features
•
•
VDSS = −30 V (TA = 25°C)
Low on-state resistance
⎯ RDS(on) = 7.0 mΩ MAX. (VGS = −10 V, ID = −14 A)
4.5 V Gate-drive available
Small and surface mount package (Power SOP8)
Pb-free and Halogen free
•
•
•
Power SOP8
Ordering Information
Part No.
μ PA2736GR-E1-AT
μ PA2736GR-E2-AT
LEAD PLATING
PACKING
Package
Pure Sn
Tape 2500 p/reel
Power SOP8
0.08 g TYP.
Absolute Maximum Ratings (TA = 25°C)
Item
Symbol
Ratings
−30
Unit
V
Drain to Source Voltage (VGS = 0 V)
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC)
VDSS
VGSS
ID(DC)
ID(pulse)
PT1
m20
V
m14
A
1
Drain Current (pulse) ∗
m140
1.1
A
2
Total Power Dissipation ∗
Total Power Dissipation (PW = 10 sec) ∗
W
W
°C
°C
A
2
PT2
2.5
Channel Temperature
Tch
150
Storage Temperature
Single Avalanche Current ∗
Single Avalanche Energy ∗
Tstg
−55 to +150
14
3
IAS
3
EAS
19.6
mJ
Thermal Resistance
Channel to Ambient Thermal Resistance ∗2
Rth(ch-A)
114
°C/W
Notes: ∗1. PW ≤ 10 μs, Duty Cycle ≤ 1%
∗2. Mounted on a glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mmt
∗3. Starting Tch = 25°C, VDD = −15 V, RG = 25 Ω, VGS = −20 → 0 V, L = 100 μH
R07DS0868EJ0100 Rev.1.00
Aug 28, 2012
Page 1 of 6
μPA2736GR
Electrical Characteristics (TA = 25°C)
Item
Symbol
MIN.
TYP.
MAX.
−1
Unit
μA
nA
V
Test Conditions
VDS = −30 V, VGS = 0 V
VGS = m20 V, VDS = 0 V
VDS = −10 V, ID = −1 mA
VDS = −10 V, ID = −7 A
VGS = −10 V, ID = −14 A
VGS = −4.5 V, ID = −14 A
VDS = −10 V,
Zero Gate Voltage Drain Current IDSS
Gate Leakage Current
IGSS
VGS(off)
| yfs |
RDS(on)1
RDS(on)2
Ciss
m100
−2.5
Gate Cut-off Voltage
Forward Transfer Admittance ∗
−1.0
1
6
S
Drain to Source On-state
5.8
9.2
3400
1600
1450
30
7.0
mΩ
mΩ
pF
pF
pF
ns
1
Resistance ∗
13.5
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Coss
Crss
td(on)
tr
VGS = 0 V,
f = 1 MHz
VDD = −15 V, ID = −7 A,
VGS = −10 V,
45
ns
Turn-off Delay Time
Fall Time
td(off)
tf
100
100
80
ns
RG = 10 Ω
ns
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage ∗
Reverse Recovery Time
Reverse Recovery Charge
Note: ∗1. Pulsed
QG
nC
nC
nC
V
VDD = −24 V,
QGS
QGD
VF(S-D)
trr
5
VGS = −10 V,
40
ID = −14 A
1
0.84
55
IF = 14 A, VGS = 0 V
IF = 14 A, VGS = 0 V,
di/dt = 100 A/μs
ns
Qrr
70
nC
TEST CIRCUIT 2 SWITCHING TIME
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
D.U.T.
L
R
G
= 25 Ω
V
V
GS(−)
R
L
90%
V
GS
VGS
10%
V
DD
50 Ω
PG.
GS = −20 → 0 V
Wave Form
0
RG
V
PG.
V
DD
DS(−)
90%
90%
−
BVDSS
IAS
V
DS
V
0
GS(−)
V
DS
10% 10%
V
DS
0
Wave Form
ID
t
d(on)
t
r
t
d(off)
t
f
V
DD
τ
t
on
t
off
τ = 1
μ
s
Starting Tch
Duty Cycle ≤ 1%
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
I
G
= −2 mA
R
L
PG.
VDD
50 Ω
R07DS0868EJ0100 Rev.1.00
Aug 28, 2012
Page 2 of 6
μPA2736GR
TYPICAL CHARACTERISTICS (TA = 25°C)
FORWARD BIAS SAFE OPERATING AREA
DERATING FACTOR OF FORWARD BIAS SAFE
OPERATING AREA
140
120
100
80
-1000
ID(pulse) = –140 A
ID(DC) = –14 A
100 ms
30 ms
-100
-10
μ
d
e
it
im
)
V
L
0
)
1
n
o
60
(
–
-1
RDS
=
VGS
(
40
Single Pulse
-0.1
TA = 25°C
20
Mounted on glass epoxy board of
25.4 mm x 25.4 mm x 0.8 mmt
-0.01
0
-0.01
-0.1
-1
-10
-100
0
25
50
75 100 125 150 175
VDS - Drain to Source Voltage – V
TA - Ambient Temperature - °C
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
100
10
Rth(ch-A) = 114°C/W
1
R
th(ch-A)：Mounted on glass epoxy board of
0.1
0.01
25.4 mm x 25.4 mm x 0.8 mmt
Single pulse
100 μ
1 m
10 m
100 m
1
10
100
1000
PW - Pulse Width - s
DRAIN CURRENT vs.
FORWARD TRANSFER CHARACTERISTICS
DRAIN TO SOURCE VOLTAGE
-150
-100
-50
-0
-100
VGS = –10 V
-10
-1
TA = 150°C
75°C
25°C
–55°C
-0.1
-0.01
–4.5 V
Pulsed
VDS = –10 V
Pulsed
-0.001
-0
-0.5
-1
-1.5
-0
-1
-2
-3
-4
V
DS - Drain to Source Voltage - V
VGS - Gate to Source Voltage - V
R07DS0868EJ0100 Rev.1.00
Aug 28, 2012
Page 3 of 6
μPA2736GR
GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
FORWARD TRANSFER ADMITTANCE vs. DRAIN
CURRENT
-3
-2
-1
-0
100
TA = 150°C
75°C
10
1
25°C
–55°C
Pulsed
VDS = –10 V
ID = –1 mA
Pulsed
VDS = –10 V
0.1
-50
0
50
100
150
-0.01
-0.1
-1
-10
Tch - Channel Temperature - °C
ID - Drain Current - A
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
20
30
Pulsed
Pulsed
ID = –14 A
25
20
15
10
5
16
12
8
VGS = –4.5
–10 V
4
0
0
-1
-10
-100
-1000
-0
-5
-10
-15
-20
ID - Drain Current - A
VGS - Gate to Source Voltage - V
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
15
10000
Pulsed
ID = –14 A
Ciss
VGS = –4.5 V
10
5
Coss
Crss
1000
100
VGS = –10 V
VGS = 0 V
f = 1 MHz
0
-0.1
-1
-10
-100
-50
0
50
100
150
VDS - Drain to Source Voltage - V
Tch - Channel Temperature - °C
R07DS0868EJ0100 Rev.1.00
Aug 28, 2012
Page 4 of 6
μPA2736GR
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
SOURCE TO DRAIN DIODE FORWARD VOLTAGE
1000
-25
-20
-15
-10
-5
-10
-8
VDS
VDD = –24 V
–12 V
–6 V
VGS = –10 V
100
10
1
-6
VGS
–4.5 V
0 V
-4
-2
ID = –14 A
Pulsed
1.2 1.4
VF(S-D) - Source to Drain Voltage - V
-0
-0
0
0.2 0.4 0.6 0.8
1
0
20
40
60
80
Q
G - Gate Charge - nC
R07DS0868EJ0100 Rev.1.00
Aug 28, 2012
Page 5 of 6
μPA2736GR
Package Drawings (Unit: mm)
Power SOP8
8
5
1, 2, ꢀ
4
: Source
: Gate
5, 6, 7, 8 : Drain
6.0 0.ꢀ
4.4
1
4
5.ꢀ7 MAX.
0.8
0.5 0.2
0.10
1.27 0.78 MAX.
+0.10
–0.05
0.40
0.12 M
Equivalent Circuit
Drain
Body
Diode
Gate
Source
Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and
ultimately degrade the device operation. Steps must be taken to stop generation of static
electricity as much as possible, and quickly dissipate it once, when it has occurred.
R07DS0868EJ0100 Rev.1.00
Aug 28, 2012
Page 6 of 6
Revision History
μPA2736GR Data Sheet
Description
Summary
Rev.
1.00
Date
Page
Aug 28, 2012
−
First Edition Issued
All trademarks and registered trademarks are the property of their respective owners.
C - 1
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