UPD16510AGR-8JG-E2-A [RENESAS]
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| 型号： | UPD16510AGR-8JG-E2-A |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | 暂无描述 |
| 文件： | 总15页 (文件大小：231K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Preliminary Data Sheet
R07DS0243EJ0100
Rev.1.00
μPD16510A
Feb 03, 2011
VERTICAL DRIVER FOR CCD SENSOR
Description
The μPD16510A is a vertical driver dedicated for CCD area image sensors that incorporates a level conversion circuit
and a three-level output function. It contains a CCD vertical register driver (4 channels) and a VOD shutter driver
(1 channel).
The μPD16510A, which uses the CMOS process, provides optimum transmission delay and output ON resistance
characteristics for the vertical drive of CCD sensors. It can be used for low-voltage logic (logic power-supply voltage:
2.0 to 5.5 V).
Features
•
•
•
•
•
•
CCD vertical register driver : 4 channels, VOD shutter driver: 1 channel
Small package : 20-pin plastic SSOP (5.72 mm (225))
High breakdown voltage : 33 V MAX.
Low output ON resistance : 30 Ω TYP.
Low voltage operation (logic power-supply voltage: 2.0 to 5.5 V)
Latch-up free
Applications
•
Camcorders
Ordering Information
Part No.
Packing
Tape 2500 p/reel
Tape 2500 p/reel
Package
20-pin plastic SSOP (5.72 mm (225))
20-pin plastic SSOP (5.72 mm (225))
1
μPD16510AGR-8JG-E1-A ∗
1
μPD16510AGR-8JG-E2-A ∗
Note: ∗1. Pb-free (This product does not contain Pb in the external electrode and other parts.)
R07DS0243EJ0100 Rev.1.00
Feb 03, 2011
Page 1 of 13
μPD16510A
Chapter Title
Block Diagram
V
sb
20
16
4
V
V
DD2a
DD2b
V
DD1
19
V
DD1
V
SS
2
7
V
DD2a
Three
level
5
3
TO
1
TI
1
V
SS
PG
1
1
2
2
2
8
V
DD2b
Two
level
BO
1
BI
9
V
V
SS
V
DD1
TI
14
13
12
DD2a
Input interface
(2.0 to 5.5 V)
Three
level
17
18
1
TO
2
PG
BI
V
SS
V
DD2b
Two
level
BO
2
SUBI
NC
10
11
V
V
SS
sb
Two
level
SUBO
VCC
6
V
SS
GND
15
R07DS0243EJ0100 Rev.1.00
Feb 03, 2011
Page 2 of 13
μPD16510A
Chapter Title
Pin Configuration
20-pin plastic SSOP (5.72 mm (225))
SUBO
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
V
sb
V
SS
DD2b
BO
1
BO
2
V
DD2a
TO
2
TO1
V
DD1
V
CC
GND
TI
PG
BI
NC
TI
1
1
1
2
PG
BI
2
2
SUBI
Pin Functions
No
1
Symbol
I/O
Pin Function
SUBO
VSS
O
−
O
−
O
−
I
VOD shutter drive pulse output
VL power supply
2
3
BO1
VDD2a
TO1
VCC
Two-level pulse output
4
VMa (Three-level driver) power supply
Three-level pulse output
5
6
Logic power supply
7
Tl1
Three-level driver input (See Functions table on p. 4)
8
PG1
BI1
I
9
I
Two-level driver input (See Functions table on p. 4)
VOD shutter drive pulse input
10
11
12
13
14
15
16
17
18
19
20
SUBI
NC
I
−
I
Non connect
BI2
Two-level driver input (See Functions table on p. 4)
Three-level driver input (See Functions table on p. 4)
PG2
TI2
I
I
GND
VDD1
TO2
BO2
VDD2b
Vsb
−
−
O
O
−
−
Ground
VH power supply
Three-level pulse output
Two-level pulse output
VMb (Two-level driver) power supply
VHH (for SUB drive) power supply
R07DS0243EJ0100 Rev.1.00
Feb 03, 2011
Page 3 of 13
μPD16510A
Chapter Title
Functions
VL = VSS, VMa = VDD2a, VMb = VDD2b, VH = VDD1, VHH = Vsb
Pin TO1
Pin TO2
Input
Input
Output (TO1)
Output (TO2)
TI1
PG1
TI2
PG2
L
L
VH
VMa
VL
L
L
VH
VMa
VL
L
H
H
H
L
L
H
H
H
L
H
H
Pin BO1
Pin BO2
Pin SUBO
Input
Input
Input
Output
(SUBO)
Output (BO1)
Output (BO2)
BI1
BI2
SUBI
L
VMb
VL
L
VMb
VL
L
VHH
VL
H
H
H
R07DS0243EJ0100 Rev.1.00
Feb 03, 2011
Page 4 of 13
μPD16510A
Chapter Title
Electrical Specifications
ABSOLUTE MAXIMUM RATINGS (Unless otherwise specified, TA = 25°C, GND = 0 V)
Parameter
Symbol
VCC
VDD1
VDD2
VSb
Conditions
Rating
Unit
V
Power Supply Voltage
VSS–0.3 to VSS+20.0
VSS–0.3 to VSS+33.0
VSS–0.3 to VSS+33.0
VSS–0.3 to VSS+33.0
VSS–0.3 to VCC+0.3
–25 to +85
V
V
V
Input Voltage
VI
V
Operating Ambient Temperature
Storage Temperature
Power Dissipation
TA
°C
°C
mW
TStg
Pd
–40 to +125
TA = 85°C
260
Caution Exposure to Absolute Maximum Rating for extended periods may affect device reliability;
exceeding the ratings could cause permanent damage. The parameters apply independently.
Recommended Operating Conditions (TA = 25°C, GND = 0 V)
Parameter
Symbol
VCC
Conditions
MIN.
2.0
TYP.
MAX.
5.5
Unit
V
Power Supply Voltage
VDD1
10.5
20.5
–1.0
–1.0
–10.0
15.0
21.0
31.0
+4.0
+4.0
–6.0
31.0
VCC
V
Note
Note
VDD1-VSS
VDD2a
VDD2b
VSS
V
V
V
V
VSb-VSS
VIH
V
Note
Input Voltage, high
0.8 VCC
0
V
Input Voltage, low
VIL
0.3 VCC
+70
V
Operating Ambient Temperature
TA
–20
°C
Note: Set the values of VDD1 and VSS to conform to VDD1–VSS specification value.
R07DS0243EJ0100 Rev.1.00
Feb 03, 2011
Page 5 of 13
μPD16510A
Chapter Title
Electrical Characteristics
(Unless otherwise specified, VDD1 = +15 V, VDD2a = 0 V, VDD2b = +1.0 V, Vsb = +21.5 V, VCC = +2.5 V,
SS = –7.0 V, TA = 25°C, GND = 0 V)
V
Parameter
Symbol
VH
Conditions
MIN.
TYP.
MAX.
VDD1
VDD2a
VDD2b
VSS
Vsb
Unit
V
Output Voltage, high
IO = –20 μA
IO = 20 μA
VDD1 –0.1
VDD2a –0.1
VDD2b –0.1
VSS +0.1
VSb –0.1
VSS +0.1
Output Voltage, middle
VMa
VMb
VL
V
V
Output Voltage, low
V
Output Voltage, sub high
Output Voltage, sub low
Output ON Resistance
VsubH
VsubL
RL
IO = –20 μA
IO = 20 μA
IO = 10 mA
IO = 10 mA
IO = –10 mA
V
VSS
30
V
20
30
30
30
Ω
Ω
RM
45
RH
40
Ω
Ω
Rsub
40
Transmission Delay Time 1 TD1
Transmission Delay Time 2 TD2
Transmission Delay Time 3 TD3
No load, see Figure 2. Timing Chart.
200
200
200
500
500
200
1.0
ns
ns
ns
ns
ns
ns
mA
mA
mA
mA
mA
Rise/Fall Time 1
Rise/Fall Time 2
Rise/Fall Time 3
Consumption Current
TP1
TP2
TP3
ICC
See Figure 1. Output Load Circuit.
See Figure 2. Timing Chart.
See Figure 1. Output Load Circuit.
See Figure 3. Input Waveform.
0.5
3.0
3.0
1.5
1.2
IDD2a
IDD2b
IDD1
ISb
5.0
5.0
3.0
1.8
Figure 1. Output Load Circuit
2000 pF
2000 pF
1000 pF
TO1
BO
2
3000 pF
2000 pF
3000 pF
2000 pF
1000 pF
SUBO
BO
1
TO2
1600 pF
R07DS0243EJ0100 Rev.1.00
Feb 03, 2011
Page 6 of 13
μPD16510A
Chapter Title
Figure 2. Timing Chart
BI1
, BI
2
TI , TI
1
2
T
T
T
D1
D2
D3
T
T
T
D1
D2
D3
V
V
Mb
Ma
BO
1
, BO
2
TO , TO
1
2
V
L
T
T
T
P1
P2
P3
T
T
T
P1
P2
P3
PG
1
, PG
2
V
V
H
TO
1
, TO
2
Ma
SUBI
V
V
HH
SUBO
L
R07DS0243EJ0100 Rev.1.00
Feb 03, 2011
Page 7 of 13
μPD16510A
Chapter Title
Figure 3. Input Waveform
Input pulse timing diagram
μ
μ
s
63.5
s
127
μ
2
s
TI2
TI1
BI1
BI2
PG
1
2
μ
s
2.5
PG
μ
s
63.5
μ
s
2.5
16.7 ms
μ
s
2
SUBI
Overlap section enlarged diagram
TI1
BI1
TI2
BI2
μ
4.9 s
0
0.7
1.4
2.1
2.8
3.5
4.2
R07DS0243EJ0100 Rev.1.00
Feb 03, 2011
Page 8 of 13
μPD16510A
Chapter Title
Note On Use
Power ON/OFF Sequence
In the μPD16510A, a PN junction (diode) exists between VDD2 → VDD1, input pin (TI1, TI2, PG1, PG2, BI1, BI2 and
SUBI) → VCC, so that in the case of voltage conditions: VDD2 > VDD1, input pin voltage (TI1, TI2, PG1, PG2, BI1, BI2 and
SUBI) > VCC, an abnormal current flows. Therefore, when turning the power ON/OFF, make sure that the following
voltage conditions are satisfied: VDD2 ≤ VDD1, input pin voltage (TI1, TI2, PG1, PG2, BI1, BI2 and SUBI) ≤ VCC. Also, to
minimize the negative potential applied to the SUB pin of the CCD image sensor, following the power ON/OFF
sequence described below.
(1) Power ON
<1> Powering ON VCC
Make sure that input pin voltage (TI1 TI2, PG1, PG2, BI1, BI2 and SUBI) ≤ VCC. Also, when Vsb = 2 V, make sure
that VCC reaches the rated voltage.
<2> Powering ON Vsb, VDD1, VDD2a, VDD2b and VSS
At this time, make SUBI high level (0.8VCC or higher)
V
V
sb
DD1
V
V
CC
2 V
DD2a, VDD2b
0 V
<1> <2>
V
SS
Time
R07DS0243EJ0100 Rev.1.00
Feb 03, 2011
Page 9 of 13
μPD16510A
Chapter Title
(2) Power OFF
<1> Powering OFF Vsb, VDD1, VDD2a, VDD2b and VSS
Until VCC power OFF, keep SUBI high level (0.8 VCC or higher).
<2> Powering OFF VCC
Power OFF VCC when Vsb becomes 2 V or lower. At this time, make sure that the input pin voltage (TI1, TI2,
PG1, PG2, BI1, BI2 and SUBI) ≤ VCC.
<1>
V
sb
V
DD1
<2>
V
CC
2 V
V
DD2a, VDD2b
0 V
VSS
Time
Recommended Connection of Unused Pins
Handle input pins and output pins that are not used as follows.
Input pin : High level (connect to VCC)
Output pin: Leave open
R07DS0243EJ0100 Rev.1.00
Feb 03, 2011
Page 10 of 13
μPD16510A
Chapter Title
Application Circuit Example
VSS
V
F
F
CC
V
sb
V
DD1
V
SUB
CCD
0.1 μF
SUB
1 MΩ
1
2
3
4
5
6
7
8
9
SUBO
V
sb 20
μ
μ
0.1
0.1
F
0.1
μ
V
SS
VDD2b 19
V1
V2
V3
V4
BO
1
BO
2
2
18
17
VDD2a
TO
μ
SSG
TO1
V
DD1 16
F
SUB
TG
V1
μ
0.1
VCC
GND 15
TI
PG
BI
1
TI
PG
BI
2
2
2
14
13
12
V2
1
V3
V4
1
10 SUBI
NC 11
R07DS0243EJ0100 Rev.1.00
Feb 03, 2011
Page 11 of 13
μPD16510A
Chapter Title
Package Drawings
20-PIN PLASTIC SSOP (5.72 mm (225))
20
11
detail of lead end
P
1
10
A
H
I
F
G
J
S
L
N
S
C
K
D
M
M
B
E
NOTE
Each lead centerline is located within 0.10 mm of
its true position (T.P.) at maximum material condition.
ITEM MILLIMETERS
A
B
C
6.7 0.3
0.575 MAX.
0.65 (T.P.)
+0.10
0.22
D
−0.05
E
F
G
H
I
0.1 0.1
1.45 MAX.
1.15 0.1
6.4 0.2
4.4 0.1
1.0 0.2
J
+0.10
0.15
K
−0.05
L
M
N
0.5 0.2
0.10
0.10
+7°
3°
P
−3°
P20GR-65-225C-3
R07DS0243EJ0100 Rev.1.00
Feb 03, 2011
Page 12 of 13
μPD16510A
Chapter Title
Recommended Soldering Conditions
When soldering this product, it is highly recommended to observe the conditions as shown below. If other soldering
processes are used, or if the soldering is performed under different conditions, please make sure to consult with our
sales offices.
For technical information, see the following website.
Semiconductor Device Mount Manual (http:// www.renesas.com/prod/package/manual/)
Surface Mount Device
μPD16510AGR-8JG: 20-pin plastic SSOP (225 mil)
Process
Conditions
Symbol
Infrared ray reflow
Peak temperature: 260°C or below (Package surface temperature),
Reflow time: 60 seconds or less (at 220°C or higher),
Maximum number of reflow processes: 3 times.
IR60-00-3
Wave soldering
Solder temperature: 260°C or below, Flow time: 10 seconds or less,
Maximum number of flow processes: 1 time,
WS60-00-1
Pre-heating temperature: 120°C or below (Package surface temperature).
Pin temperature: 350°C or below,
Partial heating method
−
Heat time: 3 seconds or less (Per each side of the device).
Caution Apply only one kind of soldering condition to a device, except for “partial heating method”, or the
device will be damaged by heat stress.
R07DS0243EJ0100 Rev.1.00
Feb 03, 2011
Page 13 of 13
Revision History
μPD16510A Data Sheet
Description
Summary
Rev.
1.00
Date
Page
Feb 03, 2011
−
First Edition Issued
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C - 1
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