ZSSC3224BI3R [RENESAS]

High End 24-Bit Sensor Signal Conditioner IC;
ZSSC3224BI3R
型号: ZSSC3224BI3R
厂家: RENESAS TECHNOLOGY CORP    RENESAS TECHNOLOGY CORP
描述:

High End 24-Bit Sensor Signal Conditioner IC

文件: 总48页 (文件大小:1162K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
High End 24-Bit Sensor Signal  
Conditioner IC  
ZSSC3224  
Datasheet  
Brief Description  
Features  
The ZSSC3224 is a sensor signal conditioner (SSC) IC for high-  
accuracy amplification and analog-to-digital conversion of a differ-  
ential or pseudo-differential input signal. Designed for high resolu-  
tion sensor module applications, the ZSSC3224 can perform offset,  
span, and 1st and 2nd order temperature compensation of the  
measured signal. Developed for correction of resistive bridge or  
absolute voltage sensors, it can also provide a corrected tempera-  
ture output measured with an internal sensor.  
.
Flexible, programmable analog front-end design; up to 24-bit  
analog-to-digital converter (ADC)  
.
Fully programmable gain amplifier for optimizing sensor  
signals: gain range 6.6 to 216 (linear)  
.
.
Internal auto-compensated 18-bit temperature sensor  
Digital compensation of individual sensor offset; 1st and 2nd  
order digital compensation of sensor gain as well as 1st and  
2nd order temperature gain and offset drift  
The measured and corrected sensor values are provided at the  
digital output pins, which can be configured as I2C (3.4MHz) or  
SPI (20MHz). Digital compensation of signal offset, sensitivity,  
temperature, and non-linearity is accomplished via a 26-bit internal  
digital signal processor (DSP) running a correction algorithm.  
Calibration coefficients are stored on-chip in a highly reliable, non-  
volatile, multiple-time programmable (MTP) memory. Programming  
the ZSSC3224 is simple via the serial interface. The interface is  
used for the PC-controlled calibration procedure, which programs  
the set of calibration coefficients in memory. The ZSSC3224  
provides accelerated signal processing, increased resolution, and  
improved noise immunity in order to support high-speed control,  
safety, and real-time sensing applications with the highest  
requirements for energy efficiency.  
.
.
Programmable interrupt operation  
High-speed sensing: e.g., 18-bit conditioned sensor  
signal measurement rate >200s-1  
.
.
Typical sensor elements can achieve an accuracy of better  
than ±0.10% full scale output (FSO) at -40 to 85°C  
Integrated 26-bit calibration math digital signal  
processor (DSP)  
.
.
Fully corrected signal at digital output  
Layout customized for die-die bonding with sensor for high-  
density chip-on-board assembly  
.
.
.
.
.
.
One-pass calibration minimizes calibration costs  
No external trimming, filter, or buffering components required  
Highly integrated CMOS design  
Applications  
Integrated reprogrammable non-volatile memory  
Excellent for low-voltage and low-power battery applications  
.
Barometric altitude measurement for portable navigation or  
emergency call systems; altitude measurement for car  
navigation  
Optimized for operation in calibrated resistive  
(e.g., pressure) sensor or calibrated absolute voltage (e.g.,  
thermopile) sensor modules  
.
.
.
.
.
Weather forecast  
Fan control  
.
.
.
.
.
Supply voltage range: 1.68V to 3.6V  
Operating mode current: ~1.0mA (typical)  
Sleep Mode current: 20nA (typical)  
Temperature resolution: <0.7mK/LSB  
Industrial, pneumatic, and liquid pressure  
High-resolution temperature measurements  
Object-temperature radiation (via thermopile)  
Excellent energy-efficiency:  
ZSSC3224 Application Example  
with 18-bit resolution: <100pJ/step  
with 24-bit resolution: <150nJ/step  
VSS  
VDD  
VDD  
.
.
.
Small die size  
Stacked-Die Sensor Module  
Operation temperature: 40°C to +85°C  
VDD  
ZSSC3224  
SS  
Delivery options: 4.0mm x 4.0mm 24-PQFN and die for wafer  
bonding  
VSS  
VSS  
VDDB  
INP(+)  
SS  
MOSI  
SDA  
RES  
RES  
INP  
sensor element  
SCLK  
SCL  
VDDB  
INN  
Microcontroller  
VSSB  
EOC  
EOC  
MOSI  
SDA  
INN(-)  
VSSB  
MISO  
MISO  
SCLK  
SCL  
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November 12, 2018  
ZSSC3224 Block Diagram  
VDDB  
Vreg int  
VDD  
VTP  
Temperature  
Reference  
Sensor  
AGND / CM  
Generator  
BiasCurrent  
Generator  
Voltage Regulator  
VTN  
Power Ctr.  
VSS  
ZSSC3224  
DSP Core  
(Calculations,  
Communication)  
A
EOC  
INP  
INN  
D
Sensor  
Bridge  
24 Bit  
Pre-amplifier  
VSSB  
SCLK/SCL  
SS  
MOSI/SDA  
MISO  
SPI  
I2C  
System  
Control  
Unit  
Clock  
Generator  
MTP  
Power-ON  
Reset  
RES  
Oscillator  
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November 12, 2018  
Contents  
1. Pin and Pad Assignments and Descriptions.................................................................................................................................................6  
1.1 ZSSC3224 Die Pad Assignments and Descriptions............................................................................................................................6  
1.2 ZSSC3224 24-PQFN Pin Assignments and Pin Descriptions .............................................................................................................7  
2. Absolute Maximum Ratings..........................................................................................................................................................................8  
3. Recommended Operating Conditions ..........................................................................................................................................................9  
4. Electrical Characteristics ............................................................................................................................................................................10  
4.1 Power Supply Rejection Ratio (PSRR) versus Frequency ................................................................................................................11  
5. Circuit Description ......................................................................................................................................................................................12  
5.1 Brief Description ................................................................................................................................................................................12  
5.2 Signal Flow and Block Diagram.........................................................................................................................................................12  
5.3 Analog Front End...............................................................................................................................................................................13  
5.3.1  
5.3.2  
5.3.3  
5.3.4  
5.3.5  
5.3.6  
Amplifier..............................................................................................................................................................................13  
Analog-to-Digital Converter ................................................................................................................................................15  
Selection of Gain and Offset Sensor System Dimensioning............................................................................................17  
Temperature Measurement................................................................................................................................................18  
External Sensor Supply: Bridge Sensors............................................................................................................................18  
External Sensor: Absolute Voltage Source Sensors ..........................................................................................................18  
5.4 Digital Section....................................................................................................................................................................................19  
5.4.1  
5.4.2  
5.4.3  
5.4.4  
5.4.5  
Digital Signal Processor (DSP) Core..................................................................................................................................19  
MTP Memory......................................................................................................................................................................19  
Clock Generator .................................................................................................................................................................19  
Power Supervision..............................................................................................................................................................19  
Interface..............................................................................................................................................................................19  
6. Functional Description................................................................................................................................................................................20  
6.1 Power Up...........................................................................................................................................................................................20  
6.2 Measurements...................................................................................................................................................................................20  
6.3 Interrupt (EOC Pin)............................................................................................................................................................................20  
6.4 Operational Modes ............................................................................................................................................................................21  
6.4.1  
SPI/I2C Commands............................................................................................................................................................24  
6.5 Communication Interface...................................................................................................................................................................26  
6.5.1  
6.5.2  
6.5.3  
Common Functionality........................................................................................................................................................26  
SPI......................................................................................................................................................................................27  
I2C......................................................................................................................................................................................30  
6.6 Multiple Time Programmable (MTP) Memory....................................................................................................................................31  
6.6.1  
6.6.2  
Programming Memory........................................................................................................................................................31  
Memory Contents ...............................................................................................................................................................32  
6.7 Calibration Sequence ........................................................................................................................................................................37  
6.7.1  
6.7.2  
Calibration Step 1 Assigning Unique Identification..........................................................................................................37  
Calibration Step 2 Data Collection...................................................................................................................................37  
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6.7.3  
6.7.4  
6.7.5  
Calibration Step 3a) Coefficient Calculations ..................................................................................................................38  
Calibration Step 3b) Post-Calibration Offset Correction ..................................................................................................38  
SSC Measurements ...........................................................................................................................................................39  
6.8 The Calibration Math .........................................................................................................................................................................39  
6.8.1  
6.8.2  
6.8.3  
Bridge Signal Compensation..............................................................................................................................................39  
Temperature Signal Compensation....................................................................................................................................41  
Measurement Output Data Format.....................................................................................................................................42  
7. Package Outline Drawings .........................................................................................................................................................................43  
7.1 ZSSD3224 Die Dimensional Drawings..............................................................................................................................................43  
7.2 24-PQFN Package Dimensions.........................................................................................................................................................44  
8. Quality and Reliability.................................................................................................................................................................................45  
9. Related Documents....................................................................................................................................................................................45  
10. Glossary .....................................................................................................................................................................................................45  
11. Marking Diagram ........................................................................................................................................................................................46  
12. Ordering Information...................................................................................................................................................................................46  
13. Document Revision History ........................................................................................................................................................................47  
List of Figures  
Figure 1.1 ZSSC3224 Die Pad Assignments.....................................................................................................................................................6  
Figure 1.2 Pin Assignments: 4.0 4.0 0.85 mm 24-PQFN Package.............................................................................................................7  
Figure 5.1 ZSSC3224 Functional Block Diagram with Resistive-Bridge Sensor .............................................................................................12  
Figure 5.2 ZSSC3224 Functional Block Diagram with Voltage-Source Sensor...............................................................................................13  
Figure 5.3 ADC Gain and Offset Setup ...........................................................................................................................................................18  
Figure 6.1 Interrupt Functionality.....................................................................................................................................................................21  
Figure 6.2 Operational Flow Chart: Power Up.................................................................................................................................................22  
Figure 6.3 Operational Flow Chart: Command Mode and Normal Mode (Sleep and Cyclic) ..........................................................................23  
Figure 6.4 SPI Configuration CPHA=0 ............................................................................................................................................................28  
Figure 6.5 SPI Configuration CPHA=1 ............................................................................................................................................................28  
Figure 6.6 SPI Command Request..................................................................................................................................................................29  
Figure 6.7 SPI Read Status.............................................................................................................................................................................29  
Figure 6.8 SPI Read Data................................................................................................................................................................................29  
Figure 6.9 I2C Command Request..................................................................................................................................................................30  
Figure 6.10 I2C Read Status .............................................................................................................................................................................30  
Figure 6.11 I2C Read Data................................................................................................................................................................................30  
Figure 7.1 Approximate ZSSC3224 Pad Layout..............................................................................................................................................43  
Figure 7.2 General 24-PQFN Package Dimensions........................................................................................................................................44  
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November 12, 2018  
List of Tables  
Table 1.1 ZSSC3224 Die Pad Assignments.....................................................................................................................................................6  
Table 1.2 ZSSC3224 Pin Descriptions: 24-PQFN Package.............................................................................................................................7  
Table 2.1 Absolute Maximum Ratings..............................................................................................................................................................8  
Table 3.1 Recommended Operating Conditions ..............................................................................................................................................9  
Table 3.2 Requirements for VDD Power-on Reset...........................................................................................................................................9  
Table 4.1 Electrical Characteristics ................................................................................................................................................................10  
Table 5.1 Amplifier Gain: Stage 1...................................................................................................................................................................14  
Table 5.2 Amplifier Gain: Stage 2...................................................................................................................................................................14  
Table 5.3 Gain Polarity...................................................................................................................................................................................14  
Table 5.4 ADC Conversion Times for a Single Analog-to-Digital Conversion ................................................................................................15  
Table 5.5 ADC Offset Shift .............................................................................................................................................................................16  
Table 5.6 Typical Conversion Times versus Noise Performance with Full Sensor Signal Conditioning for Measurement including AZSM,  
SM, AZTM, and TM (Bridge-Type Sensor).....................................................................................................................................16  
Table 6.1 SPI/I2C Commands........................................................................................................................................................................24  
Table 6.2 Get_Raw Commands .....................................................................................................................................................................26  
Table 6.3 General Status Byte .......................................................................................................................................................................27  
Table 6.4 Mode Status ...................................................................................................................................................................................27  
Table 6.5 MTP Memory Content Assignments...............................................................................................................................................32  
Table 6.6 Measurement Results of ADC Raw Measurement Request (Two’s Complement) ........................................................................42  
Table 6.7 Calibration Coefficients (Factors and Summands) in Memory (Sign Magnitude) ...........................................................................42  
Table 6.8 Output Results from SSC-Correction Math or DSPSensor and Temperature ............................................................................42  
Table 6.9 Interrupt Thresholds TRSH1 and TRSH2Format as for SSC-Correction Math Output ...............................................................42  
Table 7.1 Physical Package Dimensions .......................................................................................................................................................44  
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November 12, 2018  
1. Pin and Pad Assignments and Descriptions  
The ZSSC3224 is available in die form or in the 24-PQFN package.  
1.1 ZSSC3224 Die Pad Assignments and Descriptions  
Figure 1.1 ZSSC3224 Die Pad Assignments  
VDD  
VSS  
ZMDI-test  
ZMDI-test  
SS  
ZMDI-test  
RES  
ZMDI-test  
INP  
VDDB  
INN  
VSSB  
EOC  
MISO  
MOSI/SDA  
SCLK/SCL  
ZMDI-test  
Table 1.1 ZSSC3224 Die Pad Assignments  
Name  
VDD  
Direction  
Type  
Supply  
Supply  
Digital  
Analog  
Description  
IN  
IN  
Positive supply voltage for the ZSSC3224.  
Ground reference voltage signal.  
VSS  
RES  
IN  
ZSSC3224 reset (low active, internal pull-up).  
Positive external bridge-sensor supply.  
VDDB  
OUT  
Negative sensor signal (or sensor-ground for absolute voltage-sources  
sensors).  
INN  
IN  
Analog  
EOC  
MISO  
OUT  
OUT  
IN  
Digital  
Digital  
Digital  
Analog  
Analog  
Digital  
Digital  
End of conversion or interrupt output.  
Data output for SPI.  
SS  
Slave select for SPI.  
INP  
IN  
Positive sensor signal.  
VSSB  
OUT  
IN/OUT  
IN  
Negative external bridge-sensor supply (sensor ground).  
Data input for SPI; data in/out for I2C.  
Clock input for SPI/I2C.  
MOSI/SDA  
SCLK/SCL  
ZMDI-test  
Do not connect to these pads.  
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November 12, 2018  
1.2 ZSSC3224 24-PQFN Pin Assignments and Pin Descriptions  
Figure 1.2 Pin Assignments: 4.0 4.0 0.85 mm24-PQFN Package  
Note: Drawing is not to scale. See section 7 for dimensions.  
24  
23  
22  
21  
20  
19  
1
2
3
4
5
18  
17  
16  
15  
14  
13  
ZMDI-test  
RES  
ZMDI-test  
SS  
VDDB  
INN  
ZMDI-test  
INP  
24-PQFN  
TOP VIEW  
EOC  
VSSB  
6
MISO  
MOSI/SDA  
7
8
9
11  
12  
10  
Table 1.2 ZSSC3224 Pin Descriptions: 24-PQFN Package  
Note: In the following table, “n.c.” stands for not connected / no connection required / not bonded.  
Pin No.  
Name  
ZMDI-test  
RES  
Direction  
Type  
Description  
1
2
3
Do not connect.  
IN  
Digital  
Analog  
ZSSC3224 reset (low active, internal pull-up).  
Positive external bridge-sensor supply.  
VDDB  
OUT  
Negative sensor signal (or sensor ground for absolute voltage-  
source sensors).  
4
INN  
IN  
Analog  
5
6
EOC  
MISO  
ZMDI-test  
n.c.  
OUT  
Digital  
End of conversion or interrupt output.  
OUT  
Digital  
Data output for SPI.  
7
Do not connect.  
8
9
n.c.  
10  
11  
n.c.  
n.c.  
7
November 12, 2018  
 
Pin No.  
12  
Name  
SCLK/SCL  
MOSI/SDA  
VSSB  
Direction  
Type  
Description  
IN  
Digital  
Clock input for SPI/I2C.  
Data input for SPI; data in/out for I2C.  
13  
IN/OUT  
Digital  
14  
OUT  
IN  
Analog  
Negative external bridge-sensor supply (sensor ground).  
15  
INP  
Analog  
Positive sensor signal.  
16  
ZMDI-test  
SS  
Do not connect.  
17  
IN  
Digital  
Slave select for SPI  
18  
ZMDI-test  
ZMDI-test  
n.c.  
Do not connect.  
19  
Do not connect.  
20  
21  
n.c.  
Supply  
22  
VDD  
IN  
Positive supply voltage for the ZSSC3224.  
23  
n.c.  
24  
VSS  
IN  
Supply  
Ground reference voltage signal.  
Do not connect electrically.  
25  
Exposed Pad  
2. Absolute Maximum Ratings  
Note: The absolute maximum ratings are stress ratings only. The ZSSC3224 might not function or be operable above the recommended  
operating conditions. Stresses exceeding the absolute maximum ratings might also damage the device. In addition, extended exposure to  
stresses above the recommended operating conditions might affect device reliability. IDT does not recommend designing to the “Absolute  
Maximum Ratings.”  
Table 2.1 Absolute Maximum Ratings  
PARAMETER  
SYMBOL  
VSS  
Min  
0
TYP  
MAX  
0
UNITS  
Voltage Reference  
V
V
Analog Supply Voltage  
VDD  
-0.4  
-0.5  
-100  
±4000  
-50  
3.63  
VDD+0.5  
100  
-
Voltage at all Analog and Digital IO Pins  
VA_IO, VD_IO  
IIN  
V
Input Current into Any Pin except RES, ZMDI-test, SS [a], [b]  
Electrostatic Discharge Tolerance Human Body Model (HBM1) [c]  
Storage Temperature  
mA  
V
VHBM1  
TSTOR  
150  
°C  
[a] Latch-up current limit for RES, ZMDI-test, and SS: ±70mA.  
[b] Latch-up resistance; reference for pin is 0V.  
[c] HBM1: C = 100pF charged to VHBM1 with resistor R = 1.5kin series based on MIL 883, Method 3015.7. ESD protection referenced to the  
Human Body Model is tested with devices in ceramic dual in-line packages (CDIP) during product qualification.  
8
November 12, 2018  
 
 
 
3. Recommended Operating Conditions  
Note: The reference for all voltages is Vss.  
Table 3.1 Recommended Operating Conditions  
PARAMETER  
Supply Voltage  
SYMBOL  
VDD  
MIN  
TYP  
MAX  
3.6  
UNIT  
V
1.68  
VDD Rise Time  
tVDD  
200  
1.8  
μs  
Bridge Current [a]  
IVDDB  
mA  
16.5  
85  
Operation Temperature Range  
TAMB  
CL  
-40  
°C  
nF  
External (Parasitic) Capacitance between VDDB and VSS  
0.01  
50  
[a] Power supply rejection is reduced if a current in the range of 16.5mA > IVDDB > 1.8mA is drawn out of VDDB.  
A dynamic power-on-reset circuit is implemented in order to achieve minimum current consumption in Sleep Mode. The VDD low level and the  
subsequent rise time and VDD rising slope must meet the requirements in Table 3.2 to guarantee an overall IC reset; lower VDD low levels  
allow slower rising of the subsequent on-ramp of VDD. Other combinations might also be possible. For example, the reset trigger can be  
influenced by increasing the power-down time and lowering the VDD rising slope requirement. Alternatively, the RES pin can be connected and  
used to control safe resetting of the ZSSC3224. RES is active-low; a VDD-VSS-VDD transition at the RES pin leads to a complete ZSSC3224  
reset.  
Table 3.2 Requirements for VDD Power-on Reset  
PARAMETER  
Power-Down Time (duration of VDD Low Level)  
VDD Low Level  
SYMBOL  
tSPIKE  
MIN  
3
TYP  
MAX  
UNIT  
µs  
VDDlow  
SRVDD  
0
0.2  
V
VDD Rising Slope  
10  
V/ms  
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November 12, 2018  
 
 
 
4. Electrical Characteristics  
All parameter values are valid only under the specified operating conditions. All voltages are referenced to Vss.  
Table 4.1 Electrical Characteristics  
Note: See important table notes at the end of the table.  
Parameter  
Symbol  
Conditions/Comments  
Min  
Typ  
Max  
Unit  
Supply  
External Sensor Supply Voltage, ADC  
Reference Voltage  
VDDB  
Internally generated  
1.60  
1.68  
1.75  
V
Active State, average  
Sleep Mode, idle current, 85°C  
VDD = 1.8V  
1050  
20  
1500  
250  
88  
µA  
nA  
dB  
Current Consumption  
IVDD  
Power Supply Rejection  
17  
32  
60  
20·log10(VDD/VDDB  
(see section 4.1)  
)
PSRVDD  
VDD = 2V  
65  
91  
dB  
Analog-to-Digital Converter (ADC, A2D)  
Resolution  
rADC  
fADC  
12  
24  
Bit  
ADC Clock Frequency  
Internal ADC clock  
0.9  
1
1.1  
MHz  
Conversions per second for single  
24-bit external sensor A2D  
conversion (without auto-zero  
measurement AZ)  
144  
2.3  
Hz  
Conversion Rate  
fS,raw  
Conversions per second for single  
16-bit temperature sensor A2D  
conversion (without AZ)  
kHz  
Amplifier  
Gain  
Gamp  
Gerr  
64 steps  
6.6  
216  
2.5  
Gain Error  
Referenced to nominal gain  
-2.5  
%
Sensor Signal Conditioning Performance  
Accuracy error for sensor that is  
ideally linear (in temperature and  
measurand)  
ZSSC3224 Accuracy Error [a]  
ErrA,IC  
0.01  
60  
%FSO  
Hz  
Conversion per second for fully  
corrected 24-bit measurement  
Conversion Rate  
fS, SSC  
58  
10  
Input  
Input voltage range at INP and INN  
pins  
Input Voltage Range  
VINP, VINN  
0.65  
1.05  
V
Full power supply disturbance  
rejection (PSRR) capabilities  
1
50  
kΩ  
External Sensor Bridge Resistance  
RBR  
Reduced PSRR, but full functionality  
100  
999  
Ω
10  
November 12, 2018  
 
 
Parameter  
Symbol  
Conditions/Comments  
Min  
Typ  
Max  
Unit  
Power-Up  
VDD ramp up to interface  
communication (see section 6.1)  
tSTA1  
tSTA2  
tWUP1  
1
ms  
ms  
ms  
Start-up Time  
VDD ramp up to analog operation  
2.5  
0.5  
Sleep to Active State interface  
communication  
Wake-up Time  
Sleep to Active State analog  
operation  
tWUP2  
2
ms  
Oscillator  
Internal Oscillator Frequency  
Internal Temperature Sensor  
Temperature Resolution  
Interface and Memory  
fCLK  
3.6  
4
4.4  
MHz  
-40°C to +85°C  
0.7  
mK/LSB  
Maximum capacitance at MISO line:  
40pF at VDD=1.8V  
SPI Clock Frequency  
I2C Clock Frequency  
Program Time  
fC,SPI  
fC,I2C  
tprog  
1
20  
3.4  
16  
MHz  
MHz  
ms  
MTP programming time per 16-bit  
register  
5
Endurance  
nMTP  
Number of reprogramming cycles  
1000h at 125°C  
1000  
10  
10000  
Numeric  
Years  
Data Retention  
tRET_MTP  
[a] Percentage referred to maximum full-scale output (FSO); e.g. for 24-bit measurements:  
ErrA,IC [%FSO] = 100 · MAX{ | ADCmeas ADCideal | } / 224  
.
4.1 Power Supply Rejection Ratio (PSRR) versus Frequency  
11  
November 12, 2018  
 
5. Circuit Description  
5.1 Brief Description  
The ZSSC3224 provides a highly accurate amplification of bridge sensor signals. The compensation of sensor offset, sensitivity, temperature  
drift, and non-linearity is accomplished via a 26-bit DSP core running a correction algorithm with calibration coefficients stored in a non-volatile  
memory. The ZSSC3224 can be configured for a wide range of resistive bridge sensor types and for absolute voltage source sensors. A digital  
interface (SPI or I2C) enables communication. The ZSSC3224 supports two operational modes: Normal Mode and Command Mode. Normal  
Mode is the standard operating mode. Typically in Normal Mode, the ZSSC3224 wakes up from Sleep Mode (low power), runs a measurement  
in Active State, and automatically returns to the Sleep Mode. (See section 6.4 for details on operational modes.)  
5.2 Signal Flow and Block Diagram  
See Figure 5.1 and Figure 5.2 for the ZSSC3224 block diagram for different input sensors. The sensor bridge supply VDDB and the power supply  
for analog circuitry are provided by a voltage regulator, which is optimized for power supply disturbance rejection (PSRR). See section 4.1 for  
a graph of PSRR versus frequency. To improve noise suppression, the digital blocks are powered by a separate voltage regulator. A power  
supervision circuit monitors all supply voltages and generates appropriate reset signals for initializing the digital blocks.  
The System Control Unit controls the analog circuitry to perform the three measurement types: external sensor, temperature, and offset  
measurement. The multiplexer selects the signal input to the amplifier, which can be the external signals from the input pins INP and INN or the  
internal temperature reference sensor signals. A full measurement request will trigger an automatic sequence of all measurement types and all  
input signals.  
Figure 5.1 ZSSC3224 Functional Block Diagram with Resistive-Bridge Sensor  
VDDB  
Vreg int  
VDD  
VSS  
VTP  
VTN  
Temperature  
Reference  
Sensor  
AGND / CM  
Generator  
BiasCurrent  
Generator  
Voltage Regulator  
Power Ctr.  
ZSSC3224  
DSP Core  
(Calculations,  
Communication)  
A
EOC  
INP  
INN  
D
24 Bit  
Sensor  
Bridge  
Pre-amplifier  
VSSB  
SCLK/SCL  
SS  
MOSI/SDA  
MISO  
SPI  
I2C  
System  
Control  
Unit  
Clock  
Generator  
MTP  
Power-ON  
Reset  
RES  
Oscillator  
12  
November 12, 2018  
 
Figure 5.2 ZSSC3224 Functional Block Diagram with Voltage-Source Sensor  
VDDB  
Vreg int  
VDD  
VSS  
VTP  
VTN  
Temperature  
Reference  
Sensor  
AGND / CM  
Generator  
BiasCurrent  
Generator  
Voltage Regulator  
Power Ctr.  
ZSSC3224  
DSP Core  
(Calculations,  
Communication)  
A
EOC  
INP  
INN  
D
24-Bit  
Pre-amplifier  
VSSB  
SCLK/SCL  
SS  
MOSI/SDA  
MISO  
SPI  
I2C  
System  
Control  
Unit  
Clock  
Generator  
MTP  
Power-On  
Reset (POR)  
RES  
Oscillator  
The amplifier consists of two stages with programmable gain values.  
The ZSSC3224 employs a programmable analog-to-digital converter (ADC) optimized for conversion speed and noise suppression. The  
programmable resolution from 12 to 24 bits provides flexibility for adapting the conversion characteristics. To improve power supply noise  
suppression, the ADC uses the bridge supply VDDB as its reference voltage leading to a ratiometric measurement topology if the external sensor  
is a bridge-type element.  
The remaining ZSSC3224-internal offset and the sensor element offset, i.e., the overall system offset for the amplifier and ADC, can be canceled  
by means of an offset and auto-zero measurement, respectively.  
The DSP accomplishes the auto-zero, span, and 1st and 2nd order temperature compensation of the measured external sensor signal. The  
correction coefficients are stored in the MTP memory.  
The ZSSC3224 supports SPI and I2C interface communication for controlling the ZSSC3224, configuration, and measurement result output.  
5.3 Analog Front End  
5.3.1 Amplifier  
The amplifier has a fully differential architecture and consists of two stages. The amplification of each stage and the external sensor gain polarity  
are programmable via settings in the Measurement Configuration Register SM_config1 and SM_config2 (addresses 12HEX and 16HEX; see  
section 6.6.2) in the MTP memory (for details, see section 5.4.2).  
Note: Only one of these two possible configurations is used for the measurement. The default configuration is SM_config1. Alternately,  
SM_config2 can be implemented by sending a command to select this configuration for the measurement (see section 6.5.1). The term  
SM_config is used in explanations for general register content and functionality for both SM_config1 and SM_config2, as the registers’ bit  
assignments are exactly the same for both registers.  
The first 6 bits of SM_config are the programmable gain settings Gain_stage1 and Gain_stage2. The options for the programmable gain settings  
are listed in Table 5.1 and Table 5.2.  
13  
November 12, 2018  
 
Table 5.1 Amplifier Gain: Stage 1  
Gain_stage1  
SM_config Bit 1  
SM_config Bit 2  
SM_config Bit 0  
Gainamp1  
6
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
12  
20  
30  
40  
60  
80  
120  
Table 5.2 Amplifier Gain: Stage 2  
Gain_stage2  
SM_config Bit 4 SM_config Bit 3  
SM_config Bit 5  
Gainamp2  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1.1  
1.2  
1.3  
1.4  
1.5  
1.6  
1.7  
1.8  
If needed, the polarity of the sensor bridge gain can be reversed by setting the Gain_polarity bit, which is bit 6 in the SM_config register (see  
section 6.6.2). Changing the gain polarity is achieved by inverting the chopper clock. Table 5.3 gives the settings for the Gain_polarity bit. This  
feature enables applying a sensor to the ZSSC3224 with swapped input signals at INN and INP; e.g., to avoid crossing wires for the final sensor  
module’s assembly.  
Table 5.3 Gain Polarity  
Gain_polarity (SM_config Bit 6)  
Gain  
+1  
Setting Description  
No polarity change.  
Gain polarity is inverted.  
0
1
-1  
14  
November 12, 2018  
 
5.3.2 Analog-to-Digital Converter  
An analog-to-digital converter (ADC) is used to digitize the amplifier signal. To allow optimizing the trade-off between conversion time and  
resolution, the resolution can be programmed in a range from 12-bit to 24-bit (Adc_bits bit field in the SM_config register; section 6.6.2). The  
ADC processes differential input signals.  
Table 5.4 ADC Conversion Times for a Single Analog-to-Digital Conversion  
Resolution (Bits)  
Conversion Time in µs (typical)  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
140  
185  
250  
335  
470  
640  
890  
1250  
1760  
2460  
3480  
4890  
6940  
The ADC can perform an offset shift in order to adapt input signals with offsets to the ADC input range. The shift feature is enabled by setting  
the SM_config register’s bit 15 = 1 (Shift_method = 1). The respective analog offset shift can be set up with bits [14:12], the Offset bit field in  
SM_config. The offset shift causes the ADC to perform an additional amplification of the ADC’s input signal by a factor of 2. This must be taken  
into consideration for a correct analog sensor setup via configuration of the pre-amplifier’s gain, the ADC offset shift, and the potential ADC  
gain.  
The overall analog amplification Gaintotal = Gainamp1 Gainamp2 GainADC can be determined for the following options:  
If no offset shift is selected, i.e., Shift_method = 0 and Offset = 000 in SM_config,  
Gaintotal = Gainamp1 Gainamp2 1  
If ADC offset shift is selected, i.e., Shift_method = 1 and Offset 000 in SM_config,  
Gaintotal = Gainamp1 Gainamp2 2  
15  
November 12, 2018  
Table 5.5 ADC Offset Shift  
Offset Shift in ADC  
Offset:  
SM_config Bit 15  
(Shift_method)  
Offset:  
Offset:  
ADC Offset Shift of Input Signal as a  
Percent of Full Scale  
SM_config Bit 14 SM_config Bit 13 SM_config Bit 12  
GainADC  
0
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
1
2
2
2
2
2
2
2
2
0%  
0%  
6.75%  
12.50%  
19.25%  
25.00%  
31.75%  
38.50%  
43.25%  
Important note: If the required configuration is no offset shift and no additional gain factor (and therefore GainADC = 1), then the only valid  
settings are Shift_method = 0 and Offset = 000 in SM_config. Any other setup using Shift_method = 0 combined with Offset 000 leads to  
erroneous analog setups.  
The setting for ADC resolution for the external sensor (bridge or voltage-source sensor) affects the typical measurement duration and noise  
performance as shown in Table 5.6 for the example of a bridge sensor measurement using the “Measure” command (AAHEX; see section 6.4.1).  
See section 6.2 for definitions of measurement types AZSM, SM, AZTM, and TM.  
Table 5.6 Typical Conversion Times versus Noise Performance with Full Sensor Signal Conditioning for  
Measurement including AZSM, SM, AZTM, and TM (Bridge-Type Sensor)  
Note: See important notes at the end of the table.  
ADC Resolution: Internal  
Temperature Sensor  
Typical ADC Resolution:  
External Sensor Setting  
Typical Measurement Duration [a],  
MEASURE, (AAHEX) (ms)  
Typical 3-Sigma Noise for SSC-  
Corrected Output [b] (counts)  
18  
18  
18  
18  
18  
18  
18  
16  
17  
18  
19  
20  
21  
22  
4.1  
4.4  
4.9  
5.6  
6.6  
8.1  
10.1  
4.9  
8.3  
16.1  
33.5  
65.0  
118.1  
233.9  
16  
November 12, 2018  
 
 
ADC Resolution: Internal  
Temperature Sensor  
Typical ADC Resolution:  
External Sensor Setting  
Typical Measurement Duration [a],  
MEASURE, (AAHEX) (ms)  
Typical 3-Sigma Noise for SSC-  
Corrected Output [b] (counts)  
18  
18  
23  
24  
12.9  
17.0  
466.3  
922.0  
[a] Measurement duration is defined as the time from the high/low transition at the EOC pin at the beginning of the measurement until the next  
low/high transition of the EOC signal at the end of a single measurement in Sleep Mode.  
[b] Reference noise values normalized to the external sensor’s ADC resolution, obtained with the following setup:  
40ksensor bridge, 25°C operating temperature, Gain=52, ADC Offset=25%, VDD=1.79V.  
5.3.3 Selection of Gain and Offset Sensor System Dimensioning  
The optimal gain (and offset) setup for a specific sensor element can be determined by the following steps:  
1. Collect sensor element’s characteristic, statistical data (over temperature, ambient sensor parameter, and over production  
tolerances):  
a. Minimum differential output voltage: Vmin  
b. Maximum differential output voltage: Vmax  
Note: The best possible setup can only be determined if the absolute value of Vmax is larger than the absolute value of Vmin. If this is  
not the case, the gain polarity should be reversed by means of the Gain_polarity bit in the MTP’s SM_config register.  
2. Calculate:  
a. Common mode level; i.e., differential offset of the sensor output: VCM = 0.5 (Vmax + Vmin  
)
V
CM  
[ ]  
b. Relative or percentage offset of the sensor output: Offsetsensor % =  
100%  
min  
V
– V  
max  
3. Determine which of the two following cases is valid:  
a. If Offsetsensor[%] > 43% then select Offset = 111 (i.e., 43.25%)  
b. If 0% < Offsetsensor[%] 43% then select Offset Offsetsensor[%]  
(see Table 5.5 for possible ADC Offset setup values)  
4. The totally required, optimum gain can be determined as  
1.4V  
Gaintotal, opt  
=
Offset  
sensor  
100  
V
max  
∗ (1 –  
)
Configure gain factors in the following step such that Gaintotal Gaintotal,opt (see section 5.3.1).  
5. The gain setup can be separated into the three factors Gainamp1, Gainamp2 (for the 2-stage amplifier), and GainADC (1 for no shift or 2  
for shift operation) according to  
Gaintotal = Gainamp1 Gainamp2 GainADC  
.
a. If no offset shift is performed (Shift_method = 0 and Offset = 000), the amplifier gain is Gaintotal  
b. If an offset shift is performed (Shift_method = 1), the amplifier gain is 0.5 Gaintotal  
17  
November 12, 2018  
 
 
 
Figure 5.3 ADC Gain and Offset Setup  
VDDB  
INP  
A
DSP  
SPI  
I2C  
Gainamp1  
Gainamp2  
GainADC  
Sensor  
Bridge  
INN  
Pre-amplifier  
D
VSSB  
Vdifferential, IN  
VAMP1, OUT  
VAMP2, OUT  
VADC, IN  
Digital ADC Out, 24-bit  
1.4V  
8.389M  
0V  
Gainamp2  
GainADC , -Offset  
Gainamp1  
digitize  
0V  
-1.4V  
-8.389M  
5.3.4 Temperature Measurement  
The ZSSC3224 provides an internal temperature sensor measurement to allow compensation for temperature effects. See section 4 for the  
temperature sensor resolution. The temperature output signal is a differential voltage that is adapted by the amplifier for the ADC input.  
For temperature measurements, the respective settings are defined and programmed in the MTP by IDT.  
5.3.5 External Sensor Supply: Bridge Sensors  
The ZSSC3224 provides dedicated supply pins VDDB and VSSB for resistive bridge-type sensors (AbsV_enable bit 11 = 0 in SM_config, MTP  
registers 12HEX or 16HEX). The ADC reference voltages for the sensor bridge measurement are derived from these internal voltages such that  
bridge supply disturbances are suppressed. The current drive ability of VDDB is limited (see IVDDB in section 3).  
5.3.6 External Sensor: Absolute Voltage Source Sensors  
Alternatively, the ZSSC3224 can process signals from an absolute-voltage source sensor; e.g., a thermopile element. The respective input-  
type selection can be done with the AbsV_enable bit 11 =1 in SM_config, MTP registers 12HEX or 16HEX. The respective sensor element must  
be connected between the INP and INN pins; INN is internally connected to the ZSSC3224s analog ground (important: this is not VSSB). Do  
not connect VDDB and VSSB if an absolute-voltage source sensor is applied. The offset shift should be set to maximum in this case,  
Shift_method = 1 and Offset = 111 in SM_config. The required gain can be determined according to the procedure described in section 5.3.3.  
18  
November 12, 2018  
5.4 Digital Section  
5.4.1 Digital Signal Processor (DSP) Core  
The DSP Coreblock performs the algorithm for correcting the sensor signal. The required coefficients are stored in the MTP memory.  
When the measurement results are available, the end of conversionsignal is set at the EOC pin if no interrupt-threshold has been set up  
(bits[8:7] = 00 in memory register 02HEX). The internal EOC information is valid only if both the measurement and calculation have been  
completed. Alternatively, the EOC pin can indicate exceeding or underrunning of a certain threshold or leaving a valid-result range as described  
in section 6.3.  
5.4.2 MTP Memory  
The ZSSC3224’s memory is designed with a true multiple time programmable (MTP) structure. The memory is organized in 16-bit registers that  
can be re-written multiple times (at least 1000). The user has access to a 57 16-bit storage area for values such as calibration coefficients.  
The required programming voltage is generated internally in the ZSSC3224. A checksum of the entire memory is evaluated be for integrity-  
check purposes. The checksum can be generated with the command 90HEX (see section 6.4.1).  
5.4.3 Clock Generator  
The clock generator provides approximately 4MHz and 1MHz clock signals as the time base for ZSSC3224-internal signal processing. The  
frequency is trimmed during production test.  
5.4.4 Power Supervision  
The power supervision block, which is a part of the voltage regulator combined with the digital section, monitors all power supplies to ensure a  
defined reset of all digital blocks during power-up or power supply interruptions. “Brown-out” cases at the supply that do not meet the power-on  
reset (POR) requirements (see Table 3.2), must be resolved with a reset pulse at the RES pin.  
5.4.5 Interface  
The ZSSC3224 can communicate with the user’s communication master or computer via an SPI or I2C interface. The interface type is selectable  
with the first activity at the interface after power-up or reset:  
.
.
If the first command is an I2C command and the SS pin has been inactive until receiving this command, the ZSSC3224 enters I2C Mode.  
If the first interface action is the SS pin being set to active (HIGH-active or LOW-active depending on the SS_polarity bit[9] in memory  
interface register 02HEX), then the ZSSC3224 enters SPI Mode.  
During the initiation sequence (after power-up or reset), any potential transition on SS is ignored. Switching to the SPI Mode is only possible  
after the power-up sequence. If SS is not connected, the SS pin internal pull-up keeps the ZSSC3224 in I2C Mode.  
To also provide interface accessibility in Sleep Mode (all features inactive except for the digital interface logic), the interface circuitry is directly  
supplied by VDD.  
19  
November 12, 2018  
6. Functional Description  
6.1 Power Up  
Specifications for this section are given in sections 3 and 4. On power-up, the ZSSC3224 communication interface is able to receive the first  
command after a time tSTA1 from when the VDD supply is within operating specifications. The ZSSC3224 can begin the first measurement after  
a time of tSTA2, from when the VDD supply is operational. Alternatively, instead of a power-on reset, a reset and new power-up sequence can  
be triggered by an IC-reset signal (high low) at the RES pin.  
The wake up time from Sleep Mode to Active State (see section 6.4) after receiving the activating command is defined as tWUP1 and tWUP2. In  
Command Mode, subsequent commands can be sent after tWUP1. The first measurement starts after tWUP2 if a measurement request was sent.  
6.2 Measurements  
Available measurement procedures are  
.
.
.
.
AZSM: auto-zero (external) sensor measurement  
SM: (external) sensor measurement  
AZTM: auto-zero temperature measurement  
TM: temperature measurement  
AZSM: The configuration is loaded for measuring the external sensor; i.e., a resistive bridge or an absolute voltage source. The Multiplexer”  
block connects the amplifier input to the AGND analog ground reference. An analog-to-digital (A2D) conversion is performed so that the inherent  
system offset for the configuration is converted by the ADC to a digital word with a resolution according to the respective MTP configuration.  
SM: The configuration is loaded for measuring the external sensor; i.e., a resistive bridge or an absolute voltage source. The “Multiplexer” block  
connects the amplifier input to the INP and INN pins. An A2D conversion is performed. The result is a digital word with a resolution according  
to the MTP configuration.  
AZTM: The configuration for temperature measurements is loaded. The “Multiplexer” block connects the amplifier input to AGND. An analog-  
to-digital conversion is performed so that the inherent system offset for the temperature configuration is converted by the ADC with a resolution  
according to the respective MTP configuration.  
TM: The configuration for temperature measurements is loaded. The “Multiplexer” block connects the amplifier input to the internal temperature  
sensor. An A2D conversion is performed. The result is a digital word with a resolution according to the MTP configuration.  
The typical application’s measurement cycle is a complete SSC measurement (using one of the commands AAHEX to AFHEX; see section 6.4.1)  
with AZSM, SM, AZTM, and TM followed by a signal correction calculation.  
6.3 Interrupt (EOC Pin)  
The EOC pin can be programmed to operate either as a pure “measurement busy” and end-of-conversion (EOC) indicator or as a configurable  
interrupt indicator. The basic operation must be programmed to the INT_setup bits [8:7] in register 02HEX (see Table 6.5). One or two 24-bit-  
quantized thresholds can be programmed (TRSH1 and TRSH2 in memory registers 13HEX, 14HEX, and 15HEX).  
The thresholds are programmed left-aligned in the memory; i.e., they must be programmed with the threshold’s MSB in the memory register’s  
MSB, etc. The number of LSB threshold bits that are used is equal to the number of bits for the selected ADC resolution (determined by the  
Adc_bits field in registers 12HEX and 16HEX); unused LSB bits are ignored.  
The interrupt functionality is only available for digital values from the SSC-calculation unit (i.e., after sensor signal conditioning); raw values  
cannot be monitored by the interrupt feature. Figure 6.1 shows the different setup options and the respective response at the EOC pin. The use  
of the interrupt functionality is recommended for cyclic operation (command ABHEX with the respective power-down setup in the Interface  
Configuration memory register 02HEX). The EOC level continuously represents the respective SSC-measurement results only during cyclic  
operation. For single or oversample measurement requests without cyclic operation, the EOC output signal is reset to logical zero at the  
beginning of each new measurement, even though the interrupt thresholds are established correctly at the end of each measurement (setting  
EOC to logical one or zero is dependent on the interrupt setup).  
20  
November 12, 2018  
 
 
Figure 6.1 Interrupt Functionality  
INT_setup=01:  
INT_setup=10:  
Measurement < threshold1  
Measurement > threshold1  
Measurement  
Measurement  
Result  
Result  
max.  
max.  
threshold 1  
threshold 1  
0
0
Time  
Time  
Time  
EOC / INT  
EOC / INT  
1
0
1
0
Time  
INT_setup=11  
Case A:  
threshold1 > threshold2  
Case B:  
threshold1 < threshold2  
Measurement  
Measurement  
Result  
Result  
max.  
max.  
threshold 1  
threshold 2  
threshold 2  
threshold 1  
0
0
Time  
Time  
Time  
Time  
EOC / INT  
EOC / INT  
1
0
1
0
6.4 Operational Modes  
Figure 6.2 illustrates the ZSSC3224 power-up sequence and subsequent operation depending on the selected interface communication mode  
(I2C or SPI) as determined by interface-related first activities after power-up or reset. If the first command after power-up is a valid I2C command,  
the interface will function as an I2C interface until the next power-on reset (POR). If there is no valid I2C command, but an active signal at the  
SS pin is detected as the first valid activity, then the interface will respond as an SPI slave. With either interface, after the voltage regulators  
are switched on, the ZSSC3224’s low-voltage section (LV) is active while the related interface configuration information is read from memory.  
Then the LV section is switched off, the ZSSC3224 goes into Sleep Mode, and the interface is ready to receive commands. The interface is  
always powered by VDD, so it is referred to as the high voltage section (HV).  
See Table 6.1 for definitions of the commands.  
21  
November 12, 2018  
Figure 6.3 shows the ZSSC3224 operation in Normal Mode (with two operation principles: “Sleep” and “Cyclic”) and Command Mode, including  
when the LV and HV sections are active as indicated by the color legend. The Normal Mode automatically returns to Sleep Mode after executing  
the requested measurements, or periodically wakes up and conducts another measurement according to the setting for the sleep duration  
configured by CYC_period (bits[14:12] in memory register 02HEX). In Command Mode, the ZSSC3224 remains active if a dedicated command  
(e.g., Start_NOM) is sent, which is helpful during calibration. Command Mode can only be entered if Start_CM (command A9HEX; see Table  
6.1) is the first command received after a POR.  
Figure 6.2 Operational Flow Chart: Power Up  
I2Cslave addressis loaded, and  
IC Power On  
SS_polarity determinesif SS pin is  
active high or low  
Color Legend:  
LV Operation  
Command:= load I/O setup  
HV Operation  
IO_mode = I2C  
no  
I2C Address /  
CMD Valid?  
no  
SS Pin Active?  
yes  
yes  
IO_mode:=SPI  
Power up LV  
Power up LV  
LV Operation  
LV Operation  
Save: IC ID / Data / Status  
Save: Setup / Data / Status  
CommandMode  
==active || Test==1  
CommandMode  
==active || Test==1  
yes  
no  
no  
no  
yes  
no  
Power Down (switch off LV  
and wait for command)  
Power Down (switch off LV  
and wait for command)  
no  
Receive: Command  
no  
Received CMD ID  
== IC-ID  
RST(SS)==1  
yes  
yes  
Receive: Command  
Read_bit == 1  
(Data Fetch)  
NOP  
yes  
Execute: Data Fetch  
yes  
Execute: Data Fetch  
22  
November 12, 2018  
Figure 6.3 Operational Flow Chart: Command Mode and Normal Mode (Sleep and Cyclic)  
Start LV  
Color Legend:  
LV Operation  
Get Command fromHV  
HV Operation  
CYCLIC_ACTIVE?  
yes  
no  
CMD==Start_CM  
no  
yes  
SETUP_LV:= New  
Command s Setup  
New command  
CM active  
Case (Command)  
REGULAR_CMD  
INVALID_CMD  
New Measurement Command or  
STOP_CYCLE?  
Power up all LV  
Receive: Command  
INVALID_CMD  
Case (Command)  
STOP_CYCLE  
Start_NOM  
Count Waiting Period  
no  
Do: SETUP_LV  
Keep Existing  
SETUP_LV  
Power Down all LV  
Except Oscillator  
Execute: Command  
CM inactive  
REGULAR_CMD  
Safe Command and SETUP_LV  
yes  
Cyclic Measurement?  
no  
Reset LV  
Execute: Command  
CYCLIC_ACITVE! to  
HV  
End LV  
Command Mode  
Cyclic Mode  
Sleep Mode  
23  
November 12, 2018  
6.4.1 SPI/I2C Commands  
The SPI/I2C commands supported by the ZSSC3224 are listed in Table 6.1. The command to read an address in the user memory is the same  
as its address. The command to write to an address in user memory is the address plus 40HEX  
.
There is an IDT-reserved section of memory that can be read but not over-written by the user.  
Table 6.1 SPI/I2C Commands  
Note: Every return starts with a status byte followed by the data word as described in section 6.5.1.  
Note: See important table notes at the end of the table.  
Normal  
Mode  
Command  
Mode  
Command (Byte)  
Return  
16-bit user data  
Description  
00HEX to 39HEX  
Read data in the user memory address (00HEX to  
39HEX) matching the command (might not be using all  
addresses).  
Yes  
Yes  
3AHEX to 3FHEX  
16-bit IDT-reserved memory  
data  
Read data in IDT-reserved memory at address (3AHEX  
to 3FHEX).  
Yes  
Yes  
Yes  
Yes  
40HEX to 79HEX  
followed by data  
(0000HEX to FFFFHEX  
Write data to user memory at address specified by  
command minus 40HEX (addresses 00HEX to 39HEX  
respectively; might not be using all addresses).  
)
90HEX  
Calculate and write memory checksum (CRC), which  
is register address 39HEX).  
Yes  
Yes  
Yes  
Yes  
A0HEX to A7HEX  
followed by XXXXHEX  
24-bit formatted raw data  
Get_Raw This command can be used to perform a  
measurement and write the raw ADC data into the  
output register. The LSB of the command determines  
how the AFE configuration register is loaded for the  
Get_Raw measurement (see Table 6.2).  
(see Table 6.2)  
A8HEX  
A9HEX  
Start_NOM Exit Command Mode and transition to  
Normal Mode (Sleep or Cyclic).  
No  
Yes  
No  
Start_CM Exit Normal Mode and transition to  
Command Mode (as very first command after power-  
up).  
Yes  
AAHEX  
24-bit formatted fully corrected  
Measure Trigger full measurement cycle (AZSM,  
Yes  
Yes  
Yes  
Yes  
sensor measurement data + 24- SM, AZTM, and TM, as described in section 6.2) and  
bit corrected temperature data [a] calculation and storage of data in the output buffer  
using the configuration from MTP.  
ABHEX  
24-bit formatted fully corrected  
Measure Cyclic This command triggers a  
sensor measurement data + 24- continuous full measurement cycle (AZSM, SM,  
bit corrected temperature data [a] AZTM, and TM; see section 6.2) and calculation and  
storage of data in the output buffer using the  
configuration from MTP followed by a pause  
determined by CYC_period (bits[14:12] in memory  
register 02HEX).  
ACHEX  
24-bit formatted fully corrected  
Oversample-2 Measure Mean value generation: 2  
Yes  
Yes  
sensor measurement data + 24- full measurements are conducted (as in command  
bit corrected temperature data [a] AAHEX), the measurements’ mean value is calculated,  
and data is stored in the output buffer using the  
configuration from MTP; no power down or pause  
between the 2 measurements.  
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Normal  
Mode  
Command  
Mode  
Command (Byte)  
Return  
Description  
ADHEX  
24-bit formatted fully corrected  
Oversample-4 Measure Mean value generation: 4  
Yes  
Yes  
Yes  
Yes  
sensor measurement data + 24- full measurements (as in command AAHEX) are  
bit corrected temperature data [a] conducted, the measurements’ mean value is  
calculated, and data is stored in the output buffer  
using the configuration from MTP; no power down or  
pause between the 4 measurements.  
AEHEX  
24-bit formatted fully corrected  
Oversample-8 Measure Mean value generation: 8  
Yes  
Yes  
sensor measurement data + 24- full measurements (as in command AAHEX) are  
bit corrected temperature data [a] conducted, the measurements’ mean value is  
calculated, and data is stored in the output buffer  
using the configuration from MTP; no power down or  
pause between the 8 measurements.  
AFHEX  
24-bit formatted fully corrected  
Oversample-16 Measure Mean value generation:  
sensor measurement data + 24- 16 full measurements (as in command AAHEX) are  
bit corrected temperature data [a] conducted, the measurements’ mean value is  
calculated, and data is stored in the output buffer  
using the configuration from MTP; no power down or  
pause between the 16 measurements.  
B0HEX  
Select SM_config1 register (12HEX in memory) For  
any measurement using the memory contents for the  
analog front-end and sensor setup, the respective  
setup is loaded from the SM_config1 register; status  
bit[1]==0 (default).  
Yes  
Yes  
Yes  
Yes  
B1HEX  
Select SM_config2 register (16HEX in memory) For  
any measurement using the memory contents for the  
analog front-end and sensor setup, the respective  
setup is loaded from the SM_config2 register, status  
bit[1]==1  
BFHEX  
FXHEX  
STOP_CYC This command causes a power-down  
halting the update / cyclic measurement operation  
and causing a transition from Normal to Sleep Mode.  
Yes  
Yes  
Yes  
Yes  
Status followed by last  
24-bit data  
NOP Only valid for SPI (see sections 6.5.1 and  
6.5.2).  
[a] Note: Any ADC measurement and SSC calculation output is formatted as a 24-bit data word, regardless of the effective ADC resolution used.  
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November 12, 2018  
 
Table 6.2 Get_Raw Commands  
Command  
Measurement  
AFE Configuration Register  
SM_config. See section 6.5.1.  
A0HEX followed by 0000HEX  
A1HEX followed by ssssHEX  
SM Sensor Measurement  
SM Sensor Measurement  
ssss is the user’s configuration setting for the measurement  
provided via the interface. The format and purpose of the  
configuration bits must be according to the definitions for  
SM_config (see Table 6.5).  
A2HEX followed by 0000HEX  
A3HEX followed by ssssHEX  
SM-AZSM Auto-Zero Corrected Sensor SM_config. See section 6.5.1.  
Measurement [a]  
SM-AZSM Auto-Zero Corrected Sensor ssss is the user’s configuration setting for the measurement  
Measurement [b]  
provided via the interface. The format and purpose of the  
configuration bits must be according to the definitions for  
SM_config.  
A4HEX followed by 0000HEX  
A5HEX followed by ssssHEX  
TM Temperature Measurement  
TM Temperature Measurement  
IDT-defined register.  
ssss is the user’s configuration setting for the measurement  
provided via the interface. The format and purpose of  
configuration bits must be according to the definitions for  
SM_config and valid for temperature measurement in this case  
(bits [15:12] will be ignored).  
A6HEX followed by 0000HEX  
A7HEX followed by ssssHEX  
TM-AZTM Auto-Zero Corrected  
IDT-defined register.  
Temperature Measurement [a]  
TM-AZTM Auto-Zero Corrected  
Temperature Measurement [b]  
ssss is the user’s configuration setting for the measurement  
provided via the interface. The format and purpose of these  
configuration bits must be according to the definitions for  
SM_config and valid for temperature measurement in this case  
(bits [15:12] will be ignored).  
[a] Recommended for raw data collection during calibration coefficient determination using the measurement setups pre-programmed in MTP.  
[b] Recommended for raw data collection during calibration coefficient determination using un-programmed (not in MTP), external measurement  
setups; e.g., for evaluation purposes.  
6.5 Communication Interface  
6.5.1 Common Functionality  
Commands are handled by the command interpreter in the LV section. Commands that need additional data are not treated differently than  
other commands because the HV interface is able to buffer the command and all the data that belongs to the command and the command  
interpreter is activated as soon as a command byte is received.  
Every response starts with a status byte followed by the data word. The data word depends on the previous command. It is possible to read the  
same data more than once if the read request is repeated (I2C) or a NOP command is sent (SPI). If the next command is not a read request  
(I2C) or a NOP (SPI), it invalidates any previous data.  
The ZSSC3224 supports the parallel setup of two amplifier-ADC-configurations using SM_config1 (default) and SM_config2. Switching between  
the two setups can be done with the commands B0HEX (selects SM_config1) and B1HEX (selects SM_config2). Note that the respective activation  
command must always be sent prior to the measurement request.  
26  
November 12, 2018  
 
 
 
 
The status byte contains the following bits in the sequence shown in Table 6.3:  
.
Power indication (bit 6): 1 if the device is powered (VDDB on); 0 if not powered. This is needed for the SPI Mode where the master reads all  
zeroes if the device is not powered or in power-on reset (POR).  
.
Busy indication (bit 5): 1 if the device is busy, which indicates that the data for the last command is not available yet. No new commands  
are processed if the device is busy.  
Note: The device is always busy if the cyclic measurement operation has been set up and started.  
.
.
Currently active ZSSC3224 mode (bits [4:3]): 00 = Normal Mode; 01 = Command Mode; 1X = IDT reserved.  
Memory integrity/error flag (bit 2): 0 if integrity test passed; 1 if test failed. This bit indicates whether the checksum-based integrity check  
passed or failed. The memory error status bit is calculated only during the power-up sequence, so a newly written CRC will only be used  
for memory verification and status update after a subsequent ZSSC3224 power-on reset (POR) or reset via the RES pin.  
.
.
Config Setup (bit 1): This bit indicates which SM_config register is being used for the active configuration: SM_config1 (12HEX) or  
SM_config2 (16HEX). The two alternate configuration setups allow for two different configurations of the external sensor channel in order to  
support up to two application scenarios with the use of only one sensor-ZSSC3224 pair. This bit is 0 if SM_config1 was selected (default).  
This bit is 1 if SM_config2 was selected.  
ALU saturation (bit 0): If the last command was a measurement request, this bit is 0 if any intermediate value and the final SSC result are  
in a valid range and no SSC-calculation internal saturation occurred in the arithmetic logic unit (ALU). If the last command was a  
measurement request, this bit is 1 if an SSC-calculation internal saturation occurred. This bit is also 0 for any non-measurement  
command.  
Table 6.3 General Status Byte  
Bit  
7
6
5
4
3
2
1
0
Meaning  
0
Powered?  
Busy?  
Mode  
Memory error?  
Config Setup  
ALU Saturation?  
Table 6.4 Mode Status  
Status[4:3]  
Mode  
00  
01  
10  
11  
Normal Mode (sleep and cyclic operations)  
Command Mode  
IDT reserved  
IDT reserved  
Further status information can be provided by the EOC pin. The EOC pin is set high when a measurement and calculation have been completed  
(if no interrupt threshold is used, i.e. INT_setup==00BIN; see section 6.3).  
6.5.2 SPI  
The SPI Mode is available if the first interface activity after the ZSSC3224 power-up is an active signal at the SS pin. The polarity and phase of  
the SPI clock are programmable via the CKP_CKE setting in bits [11:10] in address 02HEX as described in Table 6.5. CKP_CKE is two bits:  
CPHA (bit 10), which selects which edge of SCLK latches data, and CPOL (bit 11), which indicates whether SCLK is high or low when it is idle.  
The polarity of the SS signal and pin are programmable via the SS_polarity setting (bit 9). The different combinations of polarity and phase are  
illustrated in the figures below.  
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November 12, 2018  
 
Figure 6.4 SPI Configuration CPHA=0  
CPHA=0  
SCLK (CPOL=0)  
SCLK (CPOL=1)  
MOSI  
MISO  
MSB  
MSB  
Bit6  
Bit6  
Bit5  
Bit5  
Bit4  
Bit4  
Bit3  
Bit3  
Bit2  
Bit2  
Bit1  
Bit1  
LSB  
LSB  
/SS  
SAMPLE  
Figure 6.5 SPI Configuration CPHA=1  
CPHA=1  
SCLK (CPOL=0)  
SCLK (CPOL=1)  
MOSI  
MISO  
MSB  
MSB  
Bit6  
Bit6  
Bit5  
Bit5  
Bit4  
Bit4  
Bit3  
Bit3  
Bit2  
Bit2  
Bit1  
Bit1  
LSB  
LSB  
/SS  
SAMPLE  
In SPI mode, each command except NOP is started as shown in Figure 6.6. After the execution of a command (busy = 0), the expected data  
can be read as illustrated in Figure 6.7 or if no data are returned by the command, the next command can be sent. The status can be read at  
any time with the NOP command (see Figure 6.8).  
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November 12, 2018  
Figure 6.6 SPI Command Request  
Command Request  
Command  
other than  
NOP  
CmdDat  
<15:8>  
CmdDat  
<7:0>  
MOSI  
MISO  
Status  
Data  
Data  
Note: A command request always consists of 3 bytes. If the command is shorter, then it must be completed with 0s.  
The data on MISO depend on the preceding command.  
Figure 6.7 SPI Read Status  
Read Status  
Command  
MOSI  
= NOP  
MISO  
Status  
Figure 6.8 SPI Read Data  
Read Data  
(a) Example: after the completion of a Memory Read command  
Command  
= NOP  
MOSI  
MISO  
00HEX  
00HEX  
MemDat  
<15:8>  
MemDat  
<7:0>  
Status  
(b) Example: after the completion of a Measure command (AAHEX  
)
Command  
= NOP  
MOSI  
MISO  
00HEX  
00HEX  
00HEX  
00HEX  
00HEX  
00HEX  
SensorDat SensorDat SensorDat TempDat  
<24:16> <15:8> <7:0> <24:16>  
TempDat  
<15:8>  
TempDat  
<7:0>  
Status  
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November 12, 2018  
6.5.3 I2C  
I2C Mode will be selected if the very first interface activity after ZSSC3224 power-up is an I2C command. In I2C Mode, each command is  
started as shown in Figure 6.9. Only the number of bytes that are needed for the command must be sent. An exception is the I2C High Speed  
Mode (see Slave_Addr in Table 6.5) for which 3 bytes must always be sent as in SPI Mode. After the execution of a command (busy = 0), the  
expected data can be read as illustrated in Figure 6.11 or if no data are returned by the command, the next command can be sent. The status  
can be read at any time as illustrated in Figure 6.10.  
Figure 6.9 I2C Command Request  
Command Request (I2C Write)  
from master to slave  
from slave to master  
S
P
A
N
START condition  
STOP condition  
acknowledge  
S
S
SlaveAddr  
SlaveAddr  
0
A
A
Command  
Command  
A
A
P
write  
0
CmdDat  
<15:8>  
CmdDat  
<7:0>  
A
A
P
not acknowledge  
write  
Figure 6.10 I2C Read Status  
Read Status (I2C Read)  
S
SlaveAddr  
1
A
Status  
N P  
read  
Figure 6.11 I2C Read Data  
Read Data (I2C Read)  
(a) Example: after the completion of a Memory Read command  
MemDat  
<15:8>  
MemDat  
<7:0>  
S
SlaveAddr  
1
A
Status  
A
A
N P  
read  
(b) Example: after the completion of a Full Measurement command (AAHEX  
)
SensorDat  
<23:16>  
SensorDat  
<15:8>  
SensorDat  
<7:0>  
TempDat  
A
TempDat  
<15:8>  
TempDat  
<7:0>  
S
SlaveAddr  
1
A
Status  
A
A
A
A
A
N P  
<23:16>  
read  
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November 12, 2018  
 
 
 
All mandatory I2C-bus protocol features are implemented. Optional protocol features such as clock stretching, 10-bit slave address, etc., are  
not supported by the ZSSC3224’s interface.  
In I2C-High-Speed Mode, a command consists of a fixed length of three bytes.  
6.6 Multiple Time Programmable (MTP) Memory  
In the ZSSC3224, the memory is organized in 16-bit registers and can be programmed multiple times (at least 1000). There are 57 x 16-bit  
registers available for customer use. Each register can be re-programmed. Basically, there are two MTP content sectors:  
.
Customer use: accessible by means of regular write operations: 40HEX to 79HEX. It contains the customer ID, interface setup data,  
measurement setup information, calibration coefficients, etc.  
.
IDT use: only accessible for write operations by IDT. The IDT sector contains specific trim information and is programmed during  
manufacturing test by IDT.  
6.6.1 Programming Memory  
Programming memory is possible with any specified supply voltage level at VDD. The MTP programming voltage itself is generated by means  
of an integrated charge pump, generating an internal memory programming voltage; no additional, external voltage, other than VDD (as  
specified) is needed. A single 16-bit register write will be completed within 16ms after the respective programming command has been sent.  
After the memory is programmed, it must be read again to verify the validity of the memory contents.  
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November 12, 2018  
 
6.6.2 Memory Contents  
Table 6.5 MTP Memory Content Assignments  
MTP  
Address  
Word / Bit  
Range  
Default  
Setting  
Description  
Notes / Explanations  
00HEX  
01HEX  
15:0  
15:0  
0000HEX  
0000HEX  
Cust_ID0  
Cust_ID1  
Customer ID byte 0 (combines with memory word 01HEX to form customer ID).  
Customer ID byte 1 (combines with memory word 00HEX to form customer ID).  
Interface Configuration  
I2C slave address; valid range: 00HEX to 7FHEX (default: 00HEX). Note: address  
codes 04HEX to 07HEX are reserved for entering the I2C High Speed Mode.  
6:0  
000 0000BIN  
Slave_Addr  
INT_setup  
Interrupt configuration, EOC pin functionality (see section 6.3):  
00  
01  
End-of-conversion signal  
0-1 transition on EOC/INT if conditioned measurement result (MEAS)  
exceeds threshold1 (TRSH1) and 1-0 transition if MEAS falls below  
threshold1 again  
10  
11  
0-1 transition if MEAS falls below threshold1 and 1-0 transition if  
MEAS rises above threshold1 again  
8:7  
00BIN  
EOC is determined by threshold settings :  
If (TRSH1>TRSH2) then EOC/INT (interrupt level) = 0 if (TRSH1 > MEAS ≥  
TRSH2). Otherwise EOC/INT=1.  
If (TRSH1 ≤ TRSH2) then EOC/INT = 1 if (TRSH1 ≤ MEAS < TRSH2).  
Otherwise EOC/INT = 0.  
Determines the polarity of the Slave Select pin (SS) for SPI operation:  
0 Slave Select is active low (SPI and ZSSC3224 are active if SS==0)  
1 Slave Select is active high (SPI and ZSSC3224 are active if SS==1)  
9
0BIN  
SS_polarity  
CKP_CKE  
Clock polarity and clock-edge selectdetermines polarity and phase of SPI  
interface clock with the following modes:  
02HEX  
00 SCLK is low in idle state, data latch with rising edge and data output  
with falling edge  
01 SCLK is low in idle state, data latch with falling edge and data output  
11:10  
00BIN  
with rising edge  
10 SCLK is high in idle state, data latch with falling edge and data output  
with rising edge  
11 SCLK is high in idle state, data latch with rising edge and data output  
with falling edge  
Update period (ZSSC3224 sleep time, except oscillator) in cyclic operation:  
000 not assigned  
001 125ms  
100 1000ms  
101 2000ms  
110 4000ms  
111 not assigned  
14:12  
15  
000BIN  
CYC_period  
SOT_curve  
010 250ms  
011 500ms  
Type/shape of second-order curve correction for the sensor signal.  
0 parabolic curve  
0BIN  
1 s-shaped curve  
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MTP  
Address  
Word / Bit  
Range  
Default  
Setting  
Description  
Notes / Explanations  
Signal Conditioning Parameters  
Bits [15:0] of the 24-bit sensor offset correction coefficient Offset_S. (The MSBs  
03HEX  
04HEX  
05HEX  
15:0  
15:0  
15:0  
0000HEX  
0000HEX  
0000HEX  
Offset_S[15:0] of this coefficient including sign are Offset_S[23:16], which is bits [15:8] in  
0DHEX.)  
Bits [15:0] of the 24-bit value of the sensor gain coefficient Gain_S. (The MSBs  
Gain_S[15:0]  
of this coefficient including sign are Gain_S[23:16], which is bits [7:0] in 0DHEX.)  
Bits [15:0] of the 24-bit coefficient Tcg for the temperature correction of the  
Tcg[15:0]  
Tco[15:0]  
sensor gain. (The MSBs of this coefficient including sign are Tcg[23:16], which  
is bits [15:8] in 0EHEX.)  
Bits [15:0] of the 24-bit coefficient Tco for temperature correction of the sensor  
offset. (The MSBs of this coefficient including sign are Tco[23:16], which is bits  
[7:0] in 0EHEX.)  
06HEX  
15:0  
0000HEX  
Bits [15:0] of the 24-bit 2nd order term SOT_tco applied to Tco. (The MSBs of  
this term including sign are SOT_tco[23:16], which is bits[15:8] in 0FHEX.)  
07HEX  
08HEX  
15:0  
15:0  
0000HEX  
0000HEX  
SOT_tco[15:0]  
SOT_tcg[15:0]  
Bits [15:0] of the 24-bit 2nd order term SOT_tcg applied to Tcg. (The MSBs of  
this term including sign are SOT_tcg[23:16], which is bits[7:0] in 0FHEX.)  
Bits [15:0] of the 24-bit 2nd order term SOT_sens applied to the sensor readout.  
09HEX  
15:0  
15:0  
0000HEX  
0000HEX  
SOT_sens[15:0] (The MSBs of this term including sign are SOT_sens[23:16], which is bits[15:8]  
in 10HEX.)  
Bits [15:0] of the 24-bit temperature offset correction coefficient Offset_T. (The  
Offset_T[15:0] MSBs of this coefficient including sign are Offset_T[23:16], which is bits[7:0] in  
10HEX.)  
0AHEX  
Bits [15:0] of the 24-bit absolute value of the temperature gain coefficient  
Gain_T.  
0BHEX  
15:0  
15:0  
0000HEX  
0000HEX  
Gain_T[15:0]  
(The MSBs of this coefficient including sign are Gain_T[23:16], which is bits  
[15:8] in 11HEX.)  
Bits [15:0] of the 24-bit 2nd-order term SOT_T applied to the temperature  
reading.  
(The MSBs of this coefficient including sign are SOT_T[23:16], which is bits  
0CHEX  
SOT_T[15:0]  
[7:0] in 11HEX.)  
Bits [23:16] including sign for the 24-bit sensor gain correction coefficient  
Gain_S[23:16]  
7:0  
15:8  
7:0  
00HEX  
00HEX  
00HEX  
00HEX  
00HEX  
00HEX  
Gain_S. (The LSBs of this coefficient are Gain_S[15:0] in register 04HEX.)  
0DHEX  
0EHEX  
0FHEX  
Bits [23:16] including sign for the 24-bit sensor offset correction coefficient  
Offset_S[23:16]  
Offset_S. (The LSBs are Offset_S[15:0] in register 03HEX.)  
Bits [23:16] including sign for the 24-bit coefficient Tco for temperature  
Tco[23:16]  
correction for the sensor offset. (The LSBs are Tco[15:0] in register 06HEX.)  
Bits [23:16] including sign for the 24-bit coefficient Tcg for the temperature  
Tcg[23:16]  
15:8  
7:0  
correction of the sensor gain. (The LSBs are Tcg[15:0] in register 05HEX.)  
Bits [23:16] including sign for the 24-bit 2nd order term SOT_tcg applied to Tcg.  
SOT_tcg[23:16]  
(The LSBs are SOT_tcg[15:0] in register 08HEX.)  
Bits [23:16] including sign for the 24-bit 2nd order term SOT_tco applied to Tco.  
SOT_tco[23:16]  
15:8  
(The LSBs are SOT_tco[15:0] in register 07HEX.)  
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November 12, 2018  
MTP  
Address  
Word / Bit  
Range  
Default  
Setting  
Description  
Notes / Explanations  
Bits [23:16] including sign for the 24-bit temperature offset correction coefficient  
Offset_T. (The LSBs are Offset_T[15:0] in register 0AHEX.)  
7:0  
00HEX  
00HEX  
Offset_T[23:16]  
10HEX  
Bits [23:16] including sign for the 24-bit 2nd order term SOT_sens applied to the  
SOT_sens[23:16] sensor readout.  
(The LSBs are SOT_sens[15:0] in register 09HEX.)  
15:8  
Bits [23:16] including sign for the 24-bit 2nd-order term SOT_T applied to the  
temperature reading. (The LSBs are SOT_T[15:0] in register 0CHEX.)  
7:0  
00HEX  
00HEX  
SOT_T[23:16]  
Gain_T[23:16]  
11HEX  
Bits [23:16] including sign for the 24-bit absolute value of the temperature gain  
coefficient Gain_T. (The LSBs are Gain_T[15:0] in register 0BHEX.)  
15:8  
Measurement Configuration Register 1 (SM_config1)  
Gain setting for the 1st PREAMP stage with Gain_stage1 Gainamp1  
:
000 6  
001 12  
010 20  
011 30  
100 40  
101 60  
110 80  
2:0  
000BIN  
Gain_stage1  
111 120 (might affect noise and accuracy  
specifications depending on sensor setup)  
Gain setting for the 2nd PREAMP stage with  
Gain_stage2 Gainamp2  
:
000 1.1  
001 1.2  
010 1.3  
011 1.4  
100 1.5  
101 1.6  
110 1.7  
111 1.8  
5:3  
000BIN  
Gain_stage2  
Gain_polarity  
Adc_bits  
Set up the polarity of the sensor bridge’s gain  
(inverting of the chopper) with  
12HEX  
6
0BIN  
0 positive (no polarity change)  
1 negative (180° polarity change)  
Absolute number of bits for the ADC conversion ADC_bits:  
0000 12-bit  
0001 13-bit  
0010 14-bit  
0011 15-bit  
0100 16-bit  
0101 17-bit  
0110 18-bit  
0111 19-bit  
1000 20-bit  
1001 21-bit  
1010 22-bit  
1011 23-bit  
10:7  
11  
0000BIN  
1100 24-bit  
1101 to 1111 not assigned  
Enable bit for thermopile input selection (INN connected to AGND, INP  
connected to absolute voltage source) with AbsV_enable:  
0BIN  
AbsV_enable  
0 absolute voltage input disabled (default)  
1 absolute voltage input enabled (e.g., for a thermopile)  
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November 12, 2018  
MTP  
Address  
Word / Bit  
Range  
Default  
Setting  
Description  
Notes / Explanations  
Differential signal’s offset shift in the ADC; compensation of signal offset by x%  
of input signal:  
000 no offset compensation  
001 6.75% offset  
100 25% offset  
101 31.75% offset  
110 38.5% offset  
111 43.25% offset  
14:12  
000BIN  
Offset  
010 12.5% offset  
011 19.25% offset  
Note: Shift_method (bit 15 below) must be set to 1 to enable the offset shift.  
Offset shift method selection:  
0 No offset shift. Offset (bits [14:12] in 12HEX) must be set to 000BIN  
GainADC = 1  
;
15  
0BIN  
Shift_method  
1Offset shift ADC; GainADC = 2  
Bits [15:0] of the 24-bit interrupt threshold1, TRSH1. (The MSB bits for this  
threshold are TRSH1[23:16], which is bits [7:0] of register 15HEX.)  
13HEX  
14HEX  
15:0  
15:0  
7:0  
0000HEX  
0000HEX  
00HEX  
TRSH1[15:0]  
TRSH2[15:0]  
TRSH1[23:16]  
TRSH2[23:16]  
Bits [15:0] of the 24-bit interrupt threshold2, TRSH2. (The MSB bits for this  
threshold are TRSH2[23:16], which is bits [15:8] of register 15HEX.)  
Bits [23:16] of the 24-bit interrupt threshold1, TRSH1. (The LSB bits for this  
threshold are TRSH1[15:0], which is bits [15:0] of register 13HEX.)  
15HEX  
Bits [23:16] of the 24-bit interrupt threshold2, TRSH2. (The LSB bits for this  
threshold are TRSH2[15:0], which is bits [15:0] of register 14HEX.)  
15:8  
00HEX  
Measurement Configuration Register 2 (SM_config2)  
Gain setting for the 1st PREAMP stage with Gain_stage1 Gainamp1  
:
000 6  
001 12  
010 20  
011 30  
100 40  
101 60  
110 80  
2:0  
000BIN  
Gain_stage1  
111 120 (might affect noise and accuracy  
specifications depending on sensor setup)  
Gain setting for the 2nd PREAMP stage with Gain_stage2 Gainamp2  
:
000 1.1  
001 1.2  
010 1.3  
011 1.4  
100 1.5  
101 1.6  
110 1.7  
111 1.8  
5:3  
6
000BIN  
Gain_stage2  
Gain_polarity  
16HEX  
Set up the polarity of the sensor bridge’s gain (inverting of the chopper) with  
0 positive (no polarity change)  
0BIN  
1 negative (180° polarity change)  
Absolute number of bits for the ADC conversion ADC_bits:  
0000 12-bit  
0001 13-bit  
0010 14-bit  
0011 15-bit  
0100 16-bit  
0101 17-bit  
0110 18-bit  
0111 19-bit  
1000 20-bit  
1001 21-bit  
1010 22-bit  
1011 23-bit  
10:7  
0000BIN  
Adc_bits  
1100 24-bit  
1101 to 1111 not assigned  
35  
November 12, 2018  
MTP  
Address  
Word / Bit  
Range  
Default  
Setting  
Description  
Notes / Explanations  
Enable bit for thermopile input selection (INN connected to AGND, INP  
connected to absolute voltage source) with AbsV_enable:  
11  
14:12  
15  
0BIN  
000BIN  
0BIN  
AbsV_enable  
0 absolute voltage input disabled (default)  
1 absolute voltage input enabled (e.g. for a thermopile)  
Differential signal’s offset shift in the ADC; compensation of signal offset by x%  
of input signal:  
000 no offset compensation  
001 6.75% offset  
010 12.5% offset  
011 19.25% offset  
Offset  
100 25% offset  
101 31.75% offset  
110 38.5% offset  
111 43.25% offset  
Note: Shift_method (bit 15 below) must be set to 1 to enable the offset shift.  
Offset shift method selection:  
0   
GainADC = 1  
1 Offset Shift ADC, GainADC = 2  
No offset shift. Offset (bits[14:12] in 16HEX) must be set to 000BIN;  
Shift_method  
Post-Calibration Offset Correction Coefficients  
Bits [15:0] of the post-calibration sensor offset shift coefficient SENS_Shift.  
(The MSB bits of SENS_Shift are bits [7:0] of register 19HEX.)  
17HEX  
18HEX  
15:0  
15:0  
7:0  
0000HEX  
0000HEX  
00HEX  
SENS_Shift[15:0]  
T_Shift[15:0]  
Bits [15:0] of the post-calibration temperature offset shift coefficient T_Shift.  
(The MSB bits of T_Shift are bits [15:8] of register 19HEX.)  
Bits [23:16] of the post-calibration sensor offset shift coefficient SENS_Shift.  
(The LSB bits of SENS_Shift are in register 17HEX.)  
SENS_Shift[23:16]  
T_Shift[23:16]  
19HEX  
Bits [23:16] of the post-calibration temperature offset shift coefficient T_Shift.  
(The LSB bits of T_Shift are in register 18HEX.)  
15:8  
00HEX  
Free Memory Arbitrary Use  
20HEX  
21HEX  
15:0  
15:0  
0000HEX  
0000HEX  
Not assigned (e.g., can be used for Cust_IDx customer identification number)  
Not assigned (e.g., can be used for Cust_IDx customer identification number)  
Not assigned (e.g., can be used for Cust_IDx customer identification number)  
Not assigned (e.g., can be used for Cust_IDx customer identification number)  
Not assigned (e.g., can be used for Cust_IDx customer identification number)  
37HEX  
38HEX  
15:0  
15:0  
0000HEX  
0000HEX  
Checksum generated for the entire memory through a linear feedback shift  
register (LFSR);  
39HEX  
15:0  
-
Checksum  
signature is checked on power-up to ensure memory content integrity  
36  
November 12, 2018  
The memory integrity checksum (referred to as CRC) is generated through a linear feedback shift register with the following polynomial:  
g(x) = x16 + x15 + x2 + 1  
with the initialization value: FFFFHEX  
.
If the CRC is valid, then the “Memory Error” status bit is set to 0.  
6.7 Calibration Sequence  
Calibration essentially involves collecting raw signal and temperature data from the sensor-ZSSC3224 system for different known sensor-  
element values (i.e., for a resistive bridge or an absolute voltage source) and temperatures. This raw data can then be processed by the  
calibration master (assumed to be the user’s computer), and the calculated calibration coefficients can then be written to on-chip memory.  
Here is a brief overview of the three main steps involved in calibrating the ZSSC3224.  
Assigning a unique identification to the ZSSC3224. This identification is written to shadow RAM and programmed in MTP memory. This unique  
identification can be stored in the two 16-bit registers dedicated to the customer ID (00HEX and 01HEX; see Table 6.5). It can be used as an index  
into a database stored on the calibration PC. This database will contain all the raw values of the connected sensor-element readings and  
temperature readings for that part, as well as the known sensor-element measurand conditions and temperature to which the sensor-element  
was exposed.  
Data collection. Data collection involves getting uncorrected (raw) data from the external sensor at different known measurand values and  
temperatures. Then this data is stored on the calibration master using the unique identification of the device as the index to the database.  
Coefficient calculation and storage in MTP memory. After enough data points have been collected to calculate all the desired coefficients, the  
coefficients can be calculated by the calibration master. Then the coefficients can be programmed to the MTP memory.  
Result. The sensor signal and the characteristic temperature effect on output will be linearized according to the setup-dependent maximum  
output range.  
It is essential to perform the calibration with a fixed programming setup during the data collection phase. In order to prevent any accidental  
incorrect processing, it is further recommended that the MTP memory setup is kept stable during the entire calibration process as well as in the  
subsequent operation. A ZSSC3224 calibration only fits the setup used during its calibration. Changes in functional parameters after a  
successful calibration can decrease the precision and accuracy performance of the ZSSC3224 as well as of the entire application.  
The ZSSC3224 supports operation with different sensor setups by means of the SM_config1 and SM_config2 registers. However, only one  
calibration coefficient set is supported. Therefore, either an alternative ZSSC3224-external signal calibration using the alternate SM_config  
settings must be performed to ensure that the programmed SSC coefficients are valid for both setups, or a full reprogramming of the SSC  
coefficients must be performed each time the sensor setup is changed. The selection of the external sensor setup (i.e., the AFE configuration)  
can be done with the interface commands B0HEX and B1HEX (see Table 6.1).  
6.7.1 Calibration Step 1 Assigning Unique Identification  
Assign a unique identification number to the ZSSC3224 by using the memory write command (40HEX + data and 41HEX + data; see Table 6.1  
and Table 6.5) to write the identification number to Cust_ID0 at memory address 00HEX and Cust_ID1 at address 01HEX as described in section  
6.6.1. These two 16-bit registers allow for more than 4 billion unique devices.  
6.7.2 Calibration Step 2 Data Collection  
The number of unique points (measurand and/or temperature) at which calibration must be performed generally depends on the requirements  
of the application and the behavior of the sensor in use. The minimum number of points required is equal to the number of correction coefficients  
to be corrected with a minimum of three different temperatures at three different sensor values. For a full calibration resulting in values for all 7  
possible (external) sensor coefficients and 3 possible temperature coefficients, a minimum of 7 pairs of sensor with temperature measurements  
must be collected.  
37  
November 12, 2018  
Within this minimum field of 3 measurand measurements x 3 temperature measurements, data must be collected for the specific value pairs (at  
known conditions) and then processed to calculate the coefficients. In order to obtain the potentially best and most robust coefficients, it is  
recommended that measurement pairs (temperature versus measurand) be collected at the outer corners of the intended operation range or at  
least at points that are located far from each other. It is also essential to provide highly precise reference values as nominal, expected values.  
The measurement precision of the external calibration-measurement equipment should be ten times more accurate than the expected  
ZSSC3224 output accuracy after calibration in order to avoid accuracy losses caused by the nominal reference values (e.g., measurand signal  
and temperature deviations).  
Note: The coefficients SENS_shift and T_shift must not be determined during this calibration step.  
Strong recommendation: Set these coefficients to zero until after initial calibration.  
Note: An appropriate selection of measurement pairs can significantly improve the overall system performance.  
The determination of the measurand-related coefficients will use all of the measurement pairs. For the temperature-related correction  
coefficients, 3 of the measurement pairs (at three different temperatures) will be used.  
Note: There is an inherent redundancy in the 7 sensor-related and 3 temperature-related coefficients. Since the temperature is a necessary  
output (which also needs correction), the temperature-related information is mathematically separated, which supports faster and more efficient  
DSP calculations during the normal usage of the sensor-ZSSC3224 system. The recommended approach for data collection is to make use of  
the raw-measurement commands described in Table 6.2.  
For external sensor values, either of the following commands can be used depending on the user’s requirements:  
.
A2HEX + 0000HEX  
Single sensor measurement for which the configuration register will be loaded from the SM_config1 register (12HEX in  
MTP); preprogramming the measurement setup in the MTP is required.  
Note: SM_config1 is the default configuration. Alternatively, SM_config2 (16HEX in MTP) can be used by first sending the command B1HEX  
(see section 6.7.5).  
.
A3HEX + ssssHEX  
Single sensor measurement for which the SM_config configuration register (Gain, ADC, Offset, etc.) will be loaded  
as the user’s configuration ssssHEX, which must be provided externally via the interface as the data part of this command.  
For temperature values, either of the following commands can be used depending on the user’s requirements:  
.
A6HEX + 0000HEX  
Single temperature measurement for which the configuration register will be loaded from an internal temperature  
configuration register (preprogrammed by IDT in the MTP); preprogramming of the respective configuration is done by IDT prior to  
ZSSC3224 delivery. This is the recommended approach for temperature data collection.  
.
A7HEX + ssssHEX  
Single temperature measurement for which the configuration register (Gain, ADC, Offset, etc.) will be loaded as the  
user’s configuration ssssHEX, which must be provided externally via the interface as the data part of this command. The format and  
purpose of these configuration bits must be according to the definitions for SM_config and valid for temperature measurement; in this  
case (bits [15:12] will be ignored).  
6.7.3 Calibration Step 3a) Coefficient Calculations  
The math to perform the coefficient calculation is complicated and will not be discussed in detail. There is a brief overview in the next section.  
IDT provides software (DLLs) to perform the coefficient calculation (external to the sensor-ZSSC3224 system) based on auto-zero corrected  
values. After the coefficients are calculated, the final step is to write them to the MTP memory of the ZSSC3224.  
6.7.4 Calibration Step 3b) Post-Calibration Offset Correction  
There are two special SSC coefficients, SENS_shift and T_shift. Normally, these coefficients must be set to zero during the initial sensor  
calibration. The primary purpose of these two coefficients is to cancel additional offset shifts that could occur during or after final sensor  
assembly; e.g. if a respective sensor is finally placed and soldered on an application board.  
If the final sensor assembly induced any kind of offset (on either the temperature or external sensor signal), the respective influence can be  
directly compensated by means of the SENS_shift and T_shift coefficients without the need to change the original SSC coefficient set. However,  
this post-calibration offset correction must be done under known ambient conditions (i.e., sensor measurand and/or temperature).  
38  
November 12, 2018  
6.7.5 SSC Measurements  
After the completion of the calibration procedure, linearized external sensor and temperature readings can be obtained using the commands  
AAHEX to AFHEX as described in Table 6.1.  
Typically, only one external sensor is used in a single analog configuration using the setup in the SM_config1 MTP register (12HEX). However,  
the ZSSC3224 can support a second analog configuration that is set up in the SM_config2 MTP register (16HEX). This might be useful in cases  
where only one sensor-ZSSC3224 pair must support the measurand ranges for two different external sensors that have different precisions,  
required amplification, and sensor offset.  
If a respective switching between setups is to be performed, the SSC coefficients for the alternate external sensor must be handled with one of  
the following methods:  
.
The programmed SSC coefficients are not used for the alternate external sensor. The ZSSC3224 performs only a one-to-one transfer, i.e.  
no effective digital SSC correction only a transfer of the auto-zero corrected raw ADC readings to the ZSSC3224 output without any  
scaling, etc.  
.
The coefficients are re-programmed each time the analog setup is changed.  
SM_config1 is selected as the analog setup register by default, so no specific activation is needed if only SM_config1 is used. If SM_config2  
will also be used, the activation command B1HEX must be sent once prior to the measurement request. To switch to using SM_config1, the  
activation command B0HEX must be sent prior to use. This activation must be refreshed after any power-on reset or RES pin reset.  
6.8 The Calibration Math  
6.8.1 Bridge Signal Compensation  
The saturation check in the ZSSC3224 detects saturation effects of the internal calculation steps, allowing the final correction output to be  
determined despite the saturation. It is possible to get potentially useful signal conditioning results that have had an intermediate saturation  
during the calculations. These cases are detectable by observing the status bit 0 for each measurement result. Details about the saturation  
limits and the valid ranges for values are provided in the following equations.  
The calibration math description assumes a calculation with integer numbers. The description is numerically correct concerning values, dynamic  
range, and resolution.  
SOT_curve selects whether second-order equations compensate for sensor nonlinearity with a parabolic or S-shaped curve. The parabolic  
compensation is recommended for most sensor types.  
For the following equations, the terms are as follows:  
S
=
=
=
=
=
=
=
=
=
=
Corrected sensor reading output via I2C or SPI; range [0HEX to FFFFFFHEX  
Raw sensor reading from ADC after AZ correction; range [-7FFFFHEX, 7FFFFHEX  
Sensor gain term; range [-7FFFFHEX, 7FFFFHEX  
Sensor offset term; range [-7FFFFHEX, 7FFFFHEX  
Temperature coefficient gain term; range [-7FFFFHEX, 7FFFFHEX  
Temperature coefficient offset term; range [-7FFFFHEX, 7FFFFHEX  
Raw temperature reading after AZ correction; range [-7FFFFHEX, 7FFFFHEX  
]
S_Raw  
Gain_S  
Offset_S  
Tcg  
]
]
]
]
Tco  
]
T_Raw  
SOT_tcg  
SOT_tco  
SOT_sens  
]
Second-order term for Tcg non-linearity; range [-7FFFFHEX, 7FFFFHEX  
]
]
Second-order term for Tco non-linearity; range [-7FFFFHEX, 7FFFFHEX  
Second-order term for sensor non-linearity; range [-7FFFFHEX, 7FFFFHEX  
]
SENS_shift = Post-calibration, post-assembly sensor offset shift; range [-7FFFFHEX, 7FFFFHEX  
]
   
ll  
=
=
Absolute value  
Bound/saturation number range from ll to ul, over/under-flow is reported as saturation in the status byte  
ul  
39  
November 12, 2018  
The correction formula for the differential signal reading is represented as a two-step process depending on the SOT_curve setting.  
Equations for the parabolic SOT_curve setting (SOT_curve = 0):  
Simplified:  
T _Raw  
4SOT_tcg  
K1 223  
T _Raw 4Tcg  
223  
223  
(1)  
(2)  
T _Raw  
223  
4SOT_tco  
K2 4Offset_S S_Raw   
T _Raw 4Tco  
223  
4Gain _S K1  
(delimited to positive number range)  
(delimited to positive number range)  
ZSP  
K2 223  
223  
223  
(3)  
(4)  
ZBP  
4SOT_sens  
S
ZSP 223 SENS_shift  
223  
223  
Complete:  
25  
2
1  
25  
2
1  
25  
1  
25  
1  
2  
2  
T _ Raw  
SOT_ tcg  
23  
K1 2  
T _ Raw  
4Tcg  
25  
(5)  
(6)  
223  
221  
2  
25  
2  
25  
2  
25  
2  
25  
2
1  
25  
2
1  
25  
2
1  
25  
1  
2  
25  
1  
2  
T _ Raw  
SOT_ tco  
K2 4 Offset_S S _ Raw   
T _ Raw  
4Tco  
25  
223  
221  
2  
25  
2  
25  
2  
25  
2  
25  
2  
25  
1  
2  
25  
2
1  
25  
1  
Gain _S  
K
1
223  
2  
ZSP  
K2  
223  
(7)  
(8)  
221  
25  
2  
25  
2  
0  
24  
1  
2  
25  
1  
2  
25  
1  
2  
ZSP  
SOT_sens  
223  
SENS_shift  
B
ZBP  
223  
221  
25  
2  
25  
2  
0  
40  
November 12, 2018  
Equations for the S-shaped SOT_curve setting (SOT_curve = 1):  
Simplified:  
4Gain _S K1  
ZSS  
K2  
223  
223  
(9)  
ZSS  
223  
4SOT_sens  
Z SS 223 223 SENS_shift  
(delimited to positive number range)  
S
223  
(10)  
Complete:  
25  
2
1  
25  
1  
2  
Gain _S  
K
1
223  
ZSS  
K2  
(11)  
(12)  
221  
25  
2  
25  
2  
24  
1  
25  
2
1  
2  
25  
1  
2  
25  
1  
2  
ZSS  
SOT_sens  
S
ZSS  
223  
223 SENS_shift  
223  
221  
25  
2  
25  
2  
25  
2  
0  
6.8.2 Temperature Signal Compensation  
Temperature is measured internally. Temperature correction contains both linear gain and offset terms as well as a second-order term to correct  
for any nonlinearities. For temperature, second-order compensation for nonlinearity is always parabolic.  
For the following equations, the terms are as follows:  
T
=
=
=
=
=
=
Corrected temperature sensor reading output via I2C or SPI; range [0HEX to FFFFFFHEX  
Gain coefficient for temperature; range [-7FFFFFHEX to 7FFFFFHEX  
Raw temperature reading after AZ correction; range [-7FFFFFHEX to 7FFFFFHEX  
Offset coefficient for temperature; range [-7FFFFFHEX to 7FFFFFHEX  
Second-order term for temperature source non-linearity; range [-7FFFFFHEX to 7FFFFFHEX  
Shift for post-calibration/post-assembly offset compensation; range [-7FFFFFHEX to 7FFFFFHEX  
]
Gain_T  
T_Raw  
Offset_T  
SOT_T  
T_Shift  
]
]
]
]
]
The correction formula is best represented as a two-step process as follows:  
Simplified:  
4Gain _T  
(delimited to positive number range)  
(delimited to positive number range)  
ZT  
T
T _Raw 4Offset _T  
223  
223  
(13)  
(14)  
ZT  
4SOT_T  
ZT 223 T_Shift  
223  
223  
41  
November 12, 2018  
Complete:  
25  
1  
2  
25  
2
1  
25  
Gain _T  
1  
2
ZT  
T _Raw 4Offset _T225  
223  
221  
25  
(15)  
(16)  
2  
0  
24  
1  
2  
25  
1  
2  
25  
1  
2  
ZT  
SOT_T  
221  
T
ZT  
223  
T_Shift  
223  
25  
2  
25  
2  
0  
6.8.3 Measurement Output Data Format  
The data format and bit assignment of the raw measurement and SSC-corrected outputs of the ZSSC3224 are defined in the following tables.  
Any ADC measurement and SSC calculation output is formatted as a 24-bit data word, regardless of the effective ADC resolution used. The  
values are either in two’s complement or sign-absolute format.  
Table 6.6 Measurement Results of ADC Raw Measurement Request (Two’s Complement)  
Bit  
Meaning,  
23  
22  
21  
20  
1
0
-20  
2-1  
2-2  
2-3  
2-22  
2-23  
Weighting  
Table 6.7 Calibration Coefficients (Factors and Summands) in Memory (Sign Magnitude)  
Bit  
Meaning,  
23  
22  
21  
20  
1
0
0=positive  
1=negative  
21  
20  
2-1  
2-20  
2-21  
weighting  
Table 6.8 Output Results from SSC-Correction Math or DSPSensor and Temperature  
Bit  
Meaning,  
23  
22  
21  
20  
1
0
20  
2-1  
2-2  
2-3  
2-22  
2-23  
weighting  
Table 6.9 Interrupt Thresholds TRSH1 and TRSH2Format as for SSC-Correction Math Output  
Bit  
Meaning,  
23  
22  
21  
20  
1
0
20  
2-1  
2-2  
2-3  
2-22  
2-23  
weighting  
42  
November 12, 2018  
7. Package Outline Drawings  
7.1 ZSSD3224 Die Dimensional Drawings  
Figure 7.1 provides an illustration of the approximate pad layout. See the ZSSC3224 Technical Note Delivery Specifications for the die  
dimensions and related specifications.  
Figure 7.1 Approximate ZSSC3224 Pad Layout  
Seal Ring  
IC Core  
VDD  
VSS  
ZMDI-test  
ZMDI-test  
SS  
ZMDI-test  
RES  
ZMDI-test  
INP  
VDDB  
INN  
VSSB  
EOC  
MISO  
MOSI/SDA  
SCLK/SCL  
ZMDI-test  
43  
November 12, 2018  
 
7.2 24-PQFN Package Dimensions  
Figure 1.2 provides dimensions for the 24-PQFN package (ZSSC3224BI3R).  
Figure 7.2 General 24-PQFN Package Dimensions  
Table 7.1 Physical Package Dimensions  
Parameter / Dimension  
Min (mm)  
0.80  
Max (mm)  
0.90  
A
A1  
b
0.00  
0.05  
0.18  
0.30  
e
0.5 nom  
HD  
HE  
L
3.90  
3.90  
0.35  
4.10  
4.10  
0.45  
44  
November 12, 2018  
8. Quality and Reliability  
The ZSSC3224 is available as a qualified IC for consumer-market applications. All data specified parameters are guaranteed if not stated  
otherwise.  
9. Related Documents  
Visit the ZSSC3224 product page www.IDT.com/ZSSC3224 or contact your nearest sales office for the latest version of ZSSC3224 documents.  
The following document is available on request: ZSSC3224 Technical Note Delivery Specifications.  
10. Glossary  
Term  
Description  
A2D  
ACK  
ADC  
ALU  
AZ  
Analog-to-Digital  
Acknowledge (interface’s protocol indicator for successful data/command transfer)  
Analog-to-Digital Converter or Conversion  
Arithmetic Logic Unit  
Auto-Zero (unspecific)  
AZSM  
AZTM  
Au  
Auto-Zero Measurement for (external) Sensor Path  
Auto-Zero Measurement for Temperature Path  
Gold  
CLK  
Cu  
Clock  
Copper  
DAC  
DF  
Digital-to-Analog Conversion or Converter  
Data Fetch (command type)  
DSP  
EOC  
FSO  
LSB  
LFSR  
MR  
Digital Signal Processor  
End of Conversion  
Full Scale Output (value in percent relative to the ADC maximum output code; resolution dependent)  
Least Significant Bit  
Linear Feedback Shift Register  
Measurement Request (command type)  
Most Significant Bit  
MSB  
MTP  
NACK  
POR  
Multiple-Time Programmable Memory  
Not Acknowledge (interface’s protocol indicator for unsuccessful data/command transfer)  
Power-on Reset  
PreAmp  
PSRR  
Preamplifier  
Power Supply Disturbance Rejection Ratio  
45  
November 12, 2018  
Term  
Description  
SM  
SOT  
TC  
Signal Measurement  
Second-Order Term  
Temperature Coefficient (of a resistor or the equivalent bridge resistance)  
Temperature Measurement  
TM  
11. Marking Diagram  
Line 1 3224B the truncated part number  
Line 2 YYWW are the last 2 digits of the year and week that the part was assembled  
Line 3 Last 5 digits of lot number  
3224B  
YYWW  
XXXXX  
12. Ordering Information  
Contact IDT Sales for additional information.  
Orderable Part Number  
ZSSC3224BI1B  
Description and Package  
MSL Rating  
Not applicable  
Not applicable  
MSL1  
Carrier Type  
Unsawn wafer  
Unsawn wafer  
Reel  
Temperature  
40°C to +85 °C  
-40°C to +85 °C  
-40°C to +85 °C  
ZSSC3224 die: thickness 304µm  
ZSSC3224BI2B  
ZSSC3224 die: thickness 725µm (without backlapping)  
ZSSC3224 24-PQFN: 4.0 4.0 0.85 mm  
ZSSC3224BI3R  
ZSSC3224KITV1P0  
Evaluation Kit for ZSSC3224, including boards, cable, software, and 5 samples  
46  
November 12, 2018  
13. Document Revision History  
Date  
Description  
November 12, 2018  
.
.
.
24-PQFN is now available for production rather than as engineering samples.  
Update for template.  
Minor edits.  
October 24, 2016  
April 20, 2016  
Correction for Table 4.1 The ADC “Conversion Rate” is 144Hz.  
Changed to IDT branding. Revision number is now the release date.  
First release.  
January 14, 2016  
(Rev. 1.00)  
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