RT6203B_技术文档

®

RT6203B

5A, 18V, 700kHz ACOT^TMSynchronous Step-Down

Converter with VID Control

General Description

Features

^VID Control Range Via I²C Compatitable Interface :

The RT6203B is an adaptive on-time mode synchronous

Buck converter. The main control loop of the RT6203B

uses an adaptive on-time mode control which provides a

very fast transient response with no external components.

The RT6203B operates from 4.5V to 18V VINinput. After

the initial power-up, the output voltage can be changed by

codes sent into the IC via an I²C compatible VID control

bus. There are special codes which can be used to program

current limit level and thermal shutdown level. Shutdown

and startup can be also programmed by special codes.

The device also features an adjustable soft-start time.

Output voltage is adjustable by resistor divider through

the FB pin between 0.8V to 8V.

0.72V to 1.48V in 10mV Steps

^Adjustable Current Limit

^Adjustable Thermal Shutdown

^Fast Transient Response

^Adjustable Output Voltage from 0.8V to 8V

^Steady 700kHz Switching Frequency

^Optimized for All Ceramic Capacitors

^Externally-Adjustable, Pre-Biased Compatible Soft-

Start

^Input Under-Voltage Lockout

 Output Over- and Under-Voltage Protection

 Power Good Output

 Thermal Shutdown

Pin Configuration

 RoHS Compliant and Halogen Free

(TOP VIEW)

Applications

20 19 18 17 16

 Industrial and Commercial Low Power Systems

1

15

PVCC

SW

 Computer Peripherals

2

3

14

13

12

11

PGOOD

A0

SW

PGND

 LCDMonitors and TVs

SW

4

5

A1

SCL

PGND

21

 Green Electronics/Appliances

 Point of Load Regulation for High-Performance DSPs,

FPGAs, and ASICs

6

7

8

9

10

WQFN-20L 4x4

Simplified Application Circuit

RT6203B

V

VS

IN

VIN

C1

L1

VCC

V

SW

OUT

C5

C4

R3

R1

R2

C

FF

BOOT

FB

PGOOD

PVCC

Power Good

C3

SS

C

SS

Enable

EN

SCL

SDA

2

A0

A1

Address

Selection

I C Control

PGND AGND

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RT6203B

Marking Information

Ordering Information

RT6203B

2G= : Product Code

YMDNN : Date Code

2G=YM

Package Type

DNN

QW : WQFN-20L 4x4 (W-Type)

(Exposed Pad-Option 1)

Lead Plating System

G : Green (Halogen Free and Pb Free)

UVP Trim Operation

L : Latch-off

PWM/PSM Mode

B : PWM Mode

Note :

Richtek products are :

 RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

 Suitable for use in SnPb or Pb-free soldering processes.

Functional Pin Description

Pin No.

Pin Name

PVCC

PGOOD

A0

Pin Function

1

2

3

4

5

6

7

5V power supply output. Connect a capacitor (typical 1F) to AGND.

Open-drain power good indicator output.

LSB of chip address. Tie to GND for 0, pull high for 1.

LSB+1 of chip address. Tie to GND for 0, pull high for 1.

A1

I²C clock input.

I²C data input.

SCL

SDA

SS

Soft-start time setting. Connect an external capacitor to GND.

Feedback voltage input. Connect to output voltage feedback resistor

divider.

8

FB

9

VS

Output voltage controlled by VID.

Analog ground.

10

AGND

11, 12,

21 (Exposed Pad)

Power ground. The exposed pad must be soldered to a large PCB and

connected to GND for maximum thermal dissipation.

PGND

13, 14, 15

16, 17

18

SW

VIN

VCC

EN

Switch node.

Power input. Connect to high-side MOSFET Drain.

Power input for internal circuit.

Enable control Input.

19

Bootstrap supply for high-side gate driver. This capacitor is needed to drive

the power switch's gate above the supply voltage. It is connected between

the SW and BS pins to form a floating supply across the power switch

driver. A 0.1F capacitor is recommended for use.

20

BOOT

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DS6203B-01 July 2017

RT6203B

Functional Block Diagram

VCC

PVCC

BOOT

PVCC

Reg

Min.

Off

PVCC

VIN

VIBIAS

V

REF

UGATE

LGATE

AGND

OC

Control

Driver

SW

VREG5

UV & OV

6µA

EXT

INT

PGND

SW

ZC

DAC OUT

+

-

SS

FB

Comparator

EXT

PGOOD

Comparator

+

-

INT

VIN

EXT

DAC OUT

92.5%

VREF

On-Time

VS

INT

Serial

Interface

SDA

SCL

A0

DAC

7bits

DAC OUT

Chip

Address

01101A1A0

V

OUT

= 0.72V

to 1.48V

A1

EN

Operation

Constant On-Time (COT) Control

The RT6203B is a high-performance 700kHz 5Astep-down

regulator with internal power switches and synchronous

rectifiers. It features an Advanced Constant On-Time

(ACOT^TM) control architecture that provides stable

operation with ceramic output capacitors without

complicated external compensation, among other benefits.

The ACOT^TMcontrol mode also provides fast transient

response, especially for low output voltages and low duty

cycles. The input voltage range is from 4.5V to 18V and

the output is adjustable from 0.8V to 8V. The proprietary

ACOT^TMcontrol scheme improves upon other constant

on-time architectures, achieving nearly constant switching

frequency over line, load, and output voltage ranges. The

RT6203B are optimized for ceramic output capacitors.

Since there is no internal clock, response to transients is

nearly instantaneous and inductor current can ramp quickly

to maintain output regulation without large bulk output

capacitance.

The heart of any COT architecture is the on-time one shot.

Each on-time is a pre-determined “fixed” period that is

triggered by a feedback comparator. This robust

arrangement has high noise immunity and is ideal for low

duty cycle applications.After the on-time one-shot period,

there is a minimum off-time period before any further

regulation decisions can be considered. This arrangement

avoids the need to make any decisions during the noisy

time periods just after switching events, when the

switching node (SW) rises or falls. Because there is no

fixed clock, the high-side switch can turn on almost

immediately after load transients and further switching

pulses can ramp the inductor current higher to meet load

requirements with minimal delays. Traditional current

mode or voltage mode control schemes typically must

monitor the feedback voltage, current signals (also for

current limit), and internal ramps and compensation

signals, to determine when to turn off the high-side switch

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RT6203B

and turn on the synchronous rectifier. Weighing these small

signals in a switching environment is difficult to do just

after switching large currents, making those architectures

problematic at low duty cycles and in less than ideal board

layouts. Because no switching decisions are made during

noisy time periods, COT architectures are preferable in

low duty cycle and noisy applications. However, traditional

COT control schemes suffer from some disadvantages

that preclude their use in many cases. Many applications

require a known switching frequency range to avoid

interference with other sensitive circuitry. True constant

on-time control, where the on-time is actually fixed,

exhibits variable switching frequency. In a step-down

converter, the duty factor is proportional to the output

voltage and inversely proportional to the input voltage.

Therefore, if the on-time is fixed, the off-time (and therefore

the frequency) must change in response to changes in

input or output voltage. Modern pseudo-fixed frequency

COT architectures greatly improve COT by making the

one-shot on-time proportional to V_OUTand inversely

proportional to V_IN. In this way, an on-time is chosen as

approximately what it would be for an ideal fixed-frequency

PWM in similar input/output voltage conditions. The result

is a big improvement but the switching frequency still varies

considerably over line and load due to losses in the

switches and inductor and other parasitic effects. Another

problem with many COT architectures is their dependence

on adequate ESR in the output capacitor, making it difficult

to use highly-desirable, small, low-cost, but low-ESR

ceramic capacitors. Most COT architectures use AC

current information from the output capacitor, generated

by the inductor current passing through the ESR, to

function in a way like a current mode control system.

With ceramic capacitors the inductor current information

is too small to keep the control loop stable, like a current

mode system with no current information.

be greater than the measured output voltage. As the load

changes, the switch voltage drops change causing a

switching frequency variation with load current. Also, at

light loads if the inductor current goes negative, the switch

dead-time between the synchronous rectifier turn-off and

the high-side switch turn-on allows the switching node to

rise to the input voltage. This increases the effective on

time and causes the switching frequency to drop

noticeably. One way to reduce these effects is to measure

the actual switching frequency and compare it to the

desired range. This has the added benefit eliminating the

need to sense the actual output voltage, potentially saving

one pin connection.ACOT^TMuses this method, measuring

the actual switching frequency and modifying the on-time

with a feedback loop to keep the average switching

frequency in the desired range. To achieve good stability

with low-ESR ceramic capacitors, ACOT^TMuses a virtual

inductor current ramp generated inside the IC. This internal

ramp signal replaces the ESR ramp normally provided by

the output capacitor ESR. The ramp signal and other

internal compensations are optimized for low-ESR ceramic

output capacitors.

ACOT^TMOne-Shot Operation

The RT6203B control algorithm is simple to understand.

The feedback voltage, with the virtual inductor current ramp

added, is compared to the reference voltage. When the

combined signal is less than the reference and the on-

time one-shot is triggered, as long as the minimum off-

time one-shot is clear and the measured inductor current

(through the synchronous rectifier) is below the current

limit. The on-time one-shot turns on the high-side switch

and the inductor current ramps up linearly. After the on

time, the high-side switch is turned off and the synchronous

rectifier is turned on and the inductor current ramps down

linearly. At the same time, the minimum off-time one-shot

is triggered to prevent another immediate on-time during

the noisy switching time and allow the feedback voltage

and current sense signals to settle. The minimum off-time

is kept short (230ns typical) so that rapidly-repeated on-

times can raise the inductor current quickly when needed.

ACOT^TMControl Architecture

Making the on-time proportional to V_OUTand inversely

proportional to V_INis not sufficient to achieve good

constant-frequency behavior for several reasons. First,

voltage drops across the MOSFET switches and inductor

cause the effective input voltage to be less than the

measured input voltage and the effective output voltage to

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DS6203B-01 July 2017

RT6203B

Shutdown, Start-Up and Enable (EN)

Internal Regulator (PVCC)

An internal linear regulator (PVCC) produces a 5V supply

from V_IN. The 5V power supplies the internal control circuit,

such as internal gate drivers, PWM logic, reference, analog

circuitry, and other blocks. 1μF ceramic capacitor for

decoupling and stability is required.

The enable input (EN) has a logic-low level of 0.4V. When

V_ENis below this level the IC enters shutdown mode and

supply current drops to less than 10μA. When V_ENexceeds

its logic-high level of 2V the IC is fully operational. Unlike

many competing devices, EN is a high voltage input that

can be safely connected to V_IN(up to 18V) for automatic

start-up.

Over-Temperature Protection

The RT6203B includes an Over-Temperature Protection

(OTP) circuitry to prevent overheating due to excessive

power dissipation. The OTP will shut down switching

operation when the junction temperature exceeds 150°C.

Once the junction temperature cools down by

approximately 20°C the IC will resume normal operation

with a complete soft-start. For continuous operation,

provide adequate cooling so that the junction temperature

does not exceed 150°C.

Input Under-Voltage Lockout

In addition to the enable function, the RT6203B feature an

Under-Voltage Lockout (UVLO) function that monitors the

internal linear regulator output (PVCC). To prevent

operation without fully-enhanced internal MOSFET

switches, this function inhibits switching when V_CCdrops

below the UVLO falling threshold. The IC resumes

switching when V_CCexceeds the UVLO rising threshold.

Soft-Start (SS)

The RT6203B soft-start uses an external pin (SS) to clamp

the output voltage and allow it to slowly rise. After V_ENis

high and V_INexceeds its UVLO threshold, the IC begins

to source 6μA from the SS pin. An external capacitor at

SS is used to adjust the soft-start timing. Following below

equation to get the minimum capacitance range in order

to avoid UV occurs.

C_OUT V_OUT0.751.2

t =

I

Load Current 0.8





LIM

t6A

C_SS



V_REF

Do not leave SS unconnected. During start-up the SS

capacitor is charged and the RT6203B operates in

discontinuous switching mode with very small pulses. This

prevents negative inductor currents and keeps the circuit

from sinking current. Therefore, the output voltage may

be pre-biased to some positive level before start-up. Once

the V_SSramp charges enough to raise the internal reference

above the feedback voltage, switching will begin and the

output voltage will smoothly rise from the pre-biased level

to its regulated level. After V_SSrises above about 2.2V

output over- and under-voltage protections are enabled and

the RT6203B begins continuous-switching operation.

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RT6203B

Absolute Maximum Ratings (Note 1)

 Supply Voltage, VIN----------------------------------------------------------------------------------------------- −0.3V to 20V

 Switch Voltage, SW----------------------------------------------------------------------------------------------- −0.3V to 20.3V

BOOT Voltage ----------------------------------------------------------------------------------------------------- − 0.3V to 26.3V

 Enable Voltage, EN ----------------------------------------------------------------------------------------------- −0.3V to 20V

 Boot to Switch Voltage, Boot − SW--------------------------------------------------------------------------- −0.3V to 6V

 Other Pins ----------------------------------------------------------------------------------------------------------- −0.3V to 6V

 PowerDissipation, P_D@ T_A= 25°C

WQFN-20L 4x4 ---------------------------------------------------------------------------------------------------- 3.57W

 Package Thermal Resistance (Note 2)

WQFN-20L 4x4, θ_JA----------------------------------------------------------------------------------------------- 28°C/W

WQFN-20L 4x4, θ_Jc----------------------------------------------------------------------------------------------- 7°C/W

 Junction Temperature --------------------------------------------------------------------------------------------- 150°C

Lead Temperature (Soldering, 10 sec.) ---------------------------------------------------------------------- 260°C

 Storage Temperature Range------------------------------------------------------------------------------------- −65°C to 150°C

 ESD Susceptibility (Note 3)

HBM (Human Body Model)-------------------------------------------------------------------------------------- 2kV

Recommended Operating Conditions (Note 4)

 Supply Voltage, VIN ---------------------------------------------------------------------------------------------- 4.5V to 18V

 Junction Temperature Range------------------------------------------------------------------------------------ −40°C to 125°C

 Ambient Temperature Range------------------------------------------------------------------------------------ −40°C to 85°C

Electrical Characteristics

(V_IN= 12V, T_A= 25°C, unless otherwise specified)

Parameter

Supply Current

Symbol

Test Conditions

Min

Typ

Max

Unit

Shutdown Current

I_SHDN

V_EN= 0V

--

1.5

75

10

105

1.2

A

Shutdown Current by VID

I_{SHDN_VID}Special code = 1110110

Quiescent Current

I_Q

V_EN= 2V, V_FB= 1V

0.55

mA

Logic Threshold

Logic-Low V_IL

Logic-High V_IH

--

2

--

1

0.4

--

EN Input Voltage

V

EN Pull-High Current

--

A

V_FBVoltage and Discharge Resistance

Feedback Voltage

V_FB

Regulation mode

I²C mode

0.792

0.8

0.808

V

Ideal

V_OUT

1.5%

Ideal

V_OUT

+1.5%

Ideal

V_OUT

Output Voltage

V_OUT

Minimum Output Voltage

Rising Time per 10mV

Special code = 1100001 (default)

--

1

--

s

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DS6203B-01 July 2017

RT6203B

Parameter

Symbol

Test Conditions

Min

Typ

Max

Unit

Maximum Output Voltage

Rising Time per 10mV

Special code = 1101000

--

8

--

s

V_PVCCOutput

6V = V_IN= 18V,

0 < I_PVCC< 5mA

V_PVCCOutput Voltage

V_PVCC

4.8

5

5.2

V

Line Regulation

Load Regulation

Output Current

R_DS(ON)

V_LINE

V_LOAD

I_PVCC



6V = V_IN= 18V, I_PVCC₌5mA

0 < I_PVCC< 5mA

--

20

30

--

mV

mA

V_IN= 6V, V_PVCC= 4V

100

210

R_{DS(ON)_H}V_BOOT– V_SW= 5V

R_{DS(ON)_L}

--

60

30

100

50

Switch-On Resistance

m

Current Limit

Special code = 1110000 (default)

Special code = 1110001

Special code = 1110010

5.8

4.15

2.4

7

5

3

8.2

5.85

3.6

Current Limit

I_LIM

A

On-Time Timer Control

Switching Frequency

Minimum Off-Time

Soft-Start

f_SW

--

700

230

--

kHz

ns

t_OFF(MIN)

SS Charge Current

UVLO

V_SS= 0V

5

6

7

A

Wake Up V_PVCC

Hysteresis

3.55 3.85 4.15

UVLO Threshold

Power Good

V

--

0.4

--

FB rising

90

--

92.5

87.5

10

95

--

%

PGOOD Threshold

FB falling

PGOOD Fault Delay

PGOOD Sink Current

Special code = 1111001 (default)

PGOOD = 0.5V

--

s

mA

5

--

Output Under-Voltage and Over-Voltage Protection

OVP Trip Threshold

OVP Prop Delay

OVP detect

120

--

125

120

75

130

--

%

s

%

UVP Trip Threshold

UVP Prop Delay

OVP detect

70

--

80

--

250

s

Thermal Shutdown

Special Code = 1110011 (default)

Special Code = 1110100

--

150

130

110

--

Thermal Shutdown

Threshold

T_SD

°C

Special Code = 1110101

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RT6203B

Parameter

Symbol

Test Conditions

Min

Typ

Max

Unit

Serial Interface (SDA AND SCL pins) Note 5

Low-Level V_IL

High-Level V_IH

--

0.9

--

Low Level Input

Voltage

V

2.5

Hysteresis of Schmitt Trigger

Inputs

V_HYS

V_OL1

0.16

--

V

Low Level SDA Output Voltage

(Open drain, 3mA sink current)

0.4

Pulse Width of Spikes

Suppressed by Input Filter

t_SP

50

--

400

--

ns

kHz

μs

SCL Clock Frequency

f_SCL

Hold Time (repeated) Start

Condition

t_HD;STA

0.6

μs

Low Period of SCL Clock

High Period of SCL Clock

t_LOW

1.3

0.6

--

t_HIGH

Set-Up Time for a Repeated Start

Condition

t_SU;STA

0.6

--

μs

Data Hold Time

t_HD;DAT

t_SU;DAT

t_R

50

100

--

900

--

ns

μs

Data Set-Up Time

Rise Time (SDA or SCL)

Fall time (SDA or SCL)

20 + 0.1C_b

0.6

300

--

t_F

Set-Up Time for STOP Condition t_SU;STO

Bus Free Time between STOP

t_BUF

1.3

--

μs

and START Condition

Capacitive Load for Each Bus

C_b

400

pF

Line

SDA

t

LOW

t

F

t

SU,DAT

t

F

R

SP

t

R

HD,STA

t

BUF

SCL

t

SU,STO

HD,STA

SU,STA

t

HIGH

HD,DAT

S

P

S

r

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DS6203B-01 July 2017

RT6203B

Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are

stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the

operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect

device reliability.

Note 2. θ_JAis measured under natural convection (still air) at T_A= 25°C with the component mounted on a high effective-

thermal-conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard. θ_JCis measured at the

exposed pad of the package.

Note 3. Devices are ESD sensitive. Handling precaution is recommended.

Note 4. The device is not guaranteed to function outside its operating conditions.

Note 5. Guaranteed by design and characterized.

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RT6203B

Typical Application Circuit

RT6203B

9

16, 17

V

VS

IN

VIN

L1

18

C1

10µF

1.5µH

VCC

13, 14, 15

C2

10µF

V

OUT

SW

R3

100k

C5

22µF x 2

C4

100nF

20

8

R1

10k

2

1

C

FF

BOOT

FB

PGOOD

PVCC

Power Good

C3

1µF

7

R2

10k

SS

C

SS

19

5

6

Enable

EN

SCL

SDA

3

4

2

Address

Selection

A0

A1

I C Control

PGND AGND

10

11, 12,

21 (Exposed Pad)

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DS6203B-01 July 2017

RT6203B

Typical Operating Characteristics

Efficiency vs. Output Current

Output Voltage vs. Input Voltage

100

1.210

1.205

1.200

1.195

1.190

90

80

V_IN= 4.5V

V_IN= 12V

V_IN= 18V

70

60

50

40

30

20

10

0

I_OUT= 0A

I_OUT= 1A

I

_OUT= 2A

_OUT= 3A

I_OUT= 4A

_OUT= 5A

I

V_OUT= 1.2V, L = 1.5μH

V_OUT= 1.2V

0

1

2

3

4

5

4

5

6

7

8

9

10 11 12 13 14 15 16 17 18

Output Current (A)

Input Voltage (V)

Output Voltage vs. Temperature

Output Voltage vs. Output Current

1.220

1.210

1.205

1.200

1.195

1.190

1.215

1.210

1.205

1.200

1.195

1.190

1.185

1.180

V_IN= 18V

V_IN= 12V

V

_IN= 12V

_IN= 4.5V

V_IN= 4.5V

V_OUT= 1.2V, I_OUT= 0A

V_OUT= 1.2V

4 5

-50

-25

0

25

50

75

100

125

0

1

2

3

Temperature (°C)

Output Current (A)

I²C Shutdown Current vs. Input Voltage

Choke Valley Current Limit vs. Input Voltage

8.00

150

140

130

120

110

100

90

V_IN= 12V, V_OUT= 1.2V

7.50

7.00

6.50

6.00

5.50

5.00

4.50

4.00

3.50

3.00

2.50

OC = 7A

OC = 5A

OC = 3A

80

70

60

50

4

6

8

10

12

14

16

18

4

5

6

7

8

9 10 11 12 13 14 15 16 17 18

Input Voltage (V)

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RT6203B

UVLO Voltage vs. Temperature

EN Pin Threshold vs. Temperature

4.40

4.20

4.00

3.80

3.60

3.40

3.20

1.60

1.55

1.50

1.45

1.40

1.35

1.30

1.25

1.20

1.15

1.10

1.05

1.00

Rising

Falling

Rising

Falling

V_OUT= 1.2V, I_OUT= 0A

50 75 100 125

V_IN= 12V, V_OUT= 1.2V, I_OUT= 0A

-50

-25

0

25

-50

-25

0

25

50

75

100

125

Temperature (°C)

Load Transient Response

Output Ripple Voltage

V_IN= 12V, V_OUT= 1.2V, I_OUT= 0A to 5A,

V_IN= 12V, V_OUT= 1.2V, I_OUT= 0A,

L = 1.5μH, C_OUT= 22μF x 2

V_OUT

(20mV/Div)

V_OUT

(20mV/Div)

I_OUT

(2A/Div)

V_SW

(5V/Div)

Time (100μs/Div)

Time (2μs/Div)

Output Ripple Voltage

Power On from EN

V_IN= 12V, V_OUT= 1.2V, I_OUT= 5A,

L = 1.5μH, C_OUT= 22μF x 2

V_OUT

(20mV/Div)

V_OUT

(400mV/Div)

V_SW

(5V/Div)

V_EN

(3V/Div)

V_SW

(5V/Div)

V_IN= 12V, V_OUT= 1.2V,

I_OUT= 5A

I_OUT

(5A/Div)

Time (2μs/Div)

Time (2ms/Div)

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DS6203B-01 July 2017

RT6203B

Power On from VIN

Power Off from EN

V_IN= 12V, V_OUT= 1.2V,

_OUT= 5A

V_OUT

(400mV/Div)

I

V_OUT

(400mV/Div)

V_SW

(5V/Div)

V_SW

(5V/Div)

V_EN

(3V/Div)

V_IN

(10V/Div)

I_OUT

(5A/Div)

V_IN= 12V, V_OUT= 1.2V,

I_OUT= 5A

I_OUT

(5A/Div)

Time (2ms/Div)

Time (5ms/Div)

Power Off from VIN

VID Rising

V_IN= 12V, V_OUT= 1.2V,

I_OUT= 5A

V_IN= 12V, VID 0.72V to VID 1.48V,

V_OUTslew rate = 10mV/1μs, I_OUT= 5A

V_OUT

(400mV/Div)

V_OUT

(300mV/Div)

V_SW

(5V/Div)

V_IN

(10V/Div)

I_OUT

(5A/Div)

V_SW

(5V/Div)

Time (5ms/Div)

Time (20μs/Div)

VID Falling

V_IN= 12V, VID 1.48V to VID 0.72V,

V_OUTslew rate = 10mV/1μs, I_OUT= 5A

V_OUT

(300mV/Div)

V_SW

(5V/Div)

Time (20μs/Div)

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RT6203B

Application Information

I²C Interface Function

The 7-bit address of the RT6203B with a WRITE operation bit can become an 8 bits I²C address byte. By using user-

selectable A1 and A0 pins, there will be up to 4 the RT6203Bs been controlled on the same serial bus. Table 1 explains

how to use A1/A0 and the range of the RT6203B address.

Table 1. Selectable RT6203B Address by using A1 and A0 pins

RT6203 Address

A1

A0

RT6203 Address (Hex)

(Binary)

GND (0)

Pull high (1)

GND (0)

01101000

68h

6Ah

6Ch

6Eh

01101010

01101100

01101110

Pull high (1)

Table 2 is the structure of the RT6203BData Byte. Bit0 to Bit6 are the 7-bit code for one of 77 output voltage and special

function. After the soft-start time, Master can sent 8 bits data to control the V_OUTof the RT6203B. The voltages can be

selected from table 3 and table 4 shows how to use special function. The bit7 is check-sum bit and Master should set

this bit to be the Exclusive-OR of [Bit6:Bit0]. In other words, the sum is even. If not, the RT6203B will not send an ACK

bit.

Table 2. Structure of RT6203B Data Byte

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

ChkSum

D6

D5

D4

D3

D2

D1

D0

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DS6203B-01 July 2017

RT6203B

Table 3. VID Function

Code V_OUT

Code

0

Binary

0000000

0000001

0000010

0000011

0000100

0000101

0000110

0000111

0001000

0001001

0001010

0001011

0001100

0001101

0001110

0001111

0010000

0010001

0010010

0010011

0010100

0010101

0010110

0010111

0011000

V_OUT

0.720

0.730

0.740

0.750

0.760

0.770

0.780

0.790

0.800

0.810

0.820

0.830

0.840

0.850

0.860

0.870

0.880

0.890

0.900

0.910

0.920

0.930

0.940

0.950

0.960

Binary

0011010

0011011

0011100

0011101

0011110

0011111

0100000

0100001

0100010

0100011

0100100

0100101

0100110

0100111

0101000

0101001

0101010

0101011

0101100

0101101

0101110

0101111

0110000

0110001

0110010

Code

52

53

54

55

56

57

58

59

60

61

62

63

64

65

66

67

68

69

70

71

72

73

74

75

76

Binary

V_OUT

1.240

1.250

1.260

1.270

1.280

1.290

1.300

1.310

1.320

1.330

1.340

1.350

1.360

1.370

1.380

1.390

1.400

1.410

1.420

1.430

1.440

1.450

1.460

1.470

1.480

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

0.980

0.990

1.000

1.010

1.020

1.030

1.040

1.050

1.060

1.070

1.080

1.090

1.100

1.110

1.120

1.130

1.140

1.150

1.160

1.170

1.180

1.190

1.200

1.210

1.220

0110100

0110101

0110110

0110111

0111000

0111001

0111010

0111011

0111100

0111101

0111110

0111111

1000000

1000001

1000010

1000011

1000100

1000101

1000110

1000111

1001000

1001001

1001010

1001011

1001100

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

Illegal /

Special

25

0011001

0.970

51

0110011

1.230

>76

>1001100

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RT6203B

Table 4 shows special codes and relative function. Special

codes are valid during the soft-start time.

1110110 to 1110111 : To shut down and start up IC.

1111000 to 1111011 : When V_OUTis changed for a large

step, especially at light load conditions, it maybe need a

long setting time. It is easy to trig UV/OV function and

will cause the fault power good signal. Users can use the

special codes to set the PGOOD delay time to avoid

undesired behavior.

1111111 : The V_OUTis controlled by I2C codes. If users

want V_OUTto be controlled by external resistor divider, it

can be done by sending the special code.

1110000 to 1110010 : To change the over current limit level.

1110011 to 1110101 : To change the over temperature

protection level.

1100001 to 1101000 : To change the V_OUTslew rate when

it is controlled from low level voltage to high level voltage.

Table 4. Special Function

Special Codes

1111111

Function

Disable VID, return to FB control

1110000

1110001

1110010

1110011

1110100

1110101

1110110

1110111

1111000

1111001

1111010

1111011

1100001

1100010

1100011

1100100

1100101

1100110

1100111

1101000

OC = 7A (default)

OC = 5A

OC = 3A

OT = 150°C (default)

OT = 130°C

OT = 110°C

Shutdown code

Start-up code

PGOOD fault delay set to 0s

PGOOD fault delay set to 10s (default)

PGOOD fault delay set to 20s

PGOOD fault delay set to 40s

V_OUTslew rate = 10mV/1s (default)

V_OUTslew rate = 10mV/2s

V_OUTslew rate = 10mV/3s

V_OUTslew rate = 10mV/4s

V_OUTslew rate = 10mV/5s

V_OUTslew rate = 10mV/6s

V_OUTslew rate = 10mV/7s

V_OUTslew rate = 10mV/8s

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DS6203B-01 July 2017

RT6203B

Inductor Selection

1

2

1

2

The consideration of inductor selection includes

inductance, RMS current rating and, saturation current

rating. The inductance selection is generally flexible and

is optimized for the low cost, low physical size, and high

system performance.

I_L(PEAK)= I_OUT(MAX)



I_L= 5 +

= 5.5A

Inductor saturation current should be chosen over IC’s

current limit. Set valley current limit of the RT6203B is 7A

by I²C. When touching current limit of the RT6203B, the

peak inductor current is :

Choosing lower inductance to reduce physical size and

cost, and it is useful to improve the transient response.

However, it causes the higher inductor peak current and

output ripple voltage to decrease system efficiency.

Conversely, higher inductance increase system efficiency,

but the physical size of inductor will become larger and

transient response will be slow because more transient

time is required to change current (up or down) by inductor.

Agood compromise between size, efficiency, and transient

response is to set a inductor ripple current (ΔI_L) about

20% to 50% of the desired full output load current.

I_L(PEAK)= I_L(VALLEY)+ I_L= 7 + 1 = 8A

It will be safe to choose inductor saturation current larger

than 8.1A.

Input Capacitor Selection

The input filter capacitors are needed to smooth out the

RMS input ripple current drawn from the input power source

and ripple voltage seen at the input of the converter. The

voltage rating of the input filter capacitors must be greater

than the maximum input voltage. It's also important to

consider the ripple current capabilities of capacitors.

Calculate the approximate inductance by the input voltage,

output voltage, switching frequency (f_SW), maximum rated

output current (I_OUT(MAX)) and inductor ripple current (ΔI_L).

The RMS input ripple current (I_RMS) is a function of the

input voltage (V_IN), output voltage (V_OUT), and rated output

current (I_OUT) :

V

 V  V

IN OUT





OUT

V

IN

V

OUT

L =

I

= I



1

RMS

OUT

V f

I

L

IN SW

IN

Once the inductance is chosen, the inductor ripple current

The maximum RMS input ripple current occurs at

maximum output load and it needs to be concerned about

the ripple current capabilities of capacitors at maximum

output load.

(ΔI_L) and peak inductor current can be calculated.

V_OUT V_IN V_OUT





I_L=

V f_SWL

IN

1

2

I_L(PEAK)= I_OUT(MAX)



I_L

Ceramic capacitors are most often used because of their

low cost, small size, high RMS current ratings, and robust

surge current capabilities. It should pay attention that value

of capacitors change as temperature, bias voltage, and

operating frequency change. For example the capacitance

value of a capacitor decreases as the dc bias across the

capacitor increases.

1

2

I_L(VALLY)= I_OUT(MAX)



I_L

The typical operating circuit design for the RT6203B, the

output voltage is 1.2V, maximum rated output current is

5A, input voltage is 12V, and inductor ripple current is 1A

which is 20% of the maximum rated output current, the

calculated inductance value is :

However, take care when these capacitors are used at

the input of circuits supplied by a wall adapter or other

supply connected through long and thin wires. Current

surges through the inductive wires can induce ringing at

the IC's power input which could potentially cause large,

damaging voltage spikes at VIN pin. If this phenomenon

is observed, some bulk input capacitance may be

required. Ceramic capacitors can be placed in parallel with

other types such as tantalum, electrolytic, or polymer to

1.2 121.2





= 1.53μH

L =

3

1270010 1

The inductor ripple current can be set larger than 1A and

so we select 1.5μH inductance. The actual inductor ripple

current and required peak current is shown as below :

1.2 121.2





I =

L

= 1.02A

-6

3

1270010 1.510

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RT6203B

reduce voltage ringing and overshoot.

But some modern digital loads can exhibit nearly

instantaneous load changes and the following section

shows how to calculate the worst-case voltage swings in

response to very fast load steps.

Choose capacitors rated at higher temperatures than

required. Several ceramic capacitors may be paralleled to

meet the RMS current, size, and height requirements of

the application.

The output voltage transient undershoot and overshoot each

have two components : the voltage steps caused by the

output capacitor's ESR, and the voltage sag and soar due

to the finite output capacitance and the inductor current

slew rate. Use the following formulas to check if the ESR

is low enough (typically not a problem with ceramic

capacitors) and the output capacitance is large enough to

prevent excessive sag and soar on very fast load step

edges, with the chosen inductor value.

Output Capacitor Selection

The RT6203B is optimized for output terminal with ceramic

capacitors application and best performance will be

obtained using them. The total output capacitance value

is usually determined by the desired output ripple voltage

level and transient response requirements for sag which

is undershoot on positive load steps and soar which is

overshoot on negative load steps.

The amplitude of the ESR step up or down is a function of

the load step and the ESR of the output capacitor :

Output Ripple Voltage

V_{ESR_STEP}= I_OUTR_ESR

Output ripple voltage at the switching frequency is caused

by the inductor current ripple and its effect on the output

capacitor's ESR and stored charge. These two ripple

components are called ESR ripple and capacitive ripple.

The amplitude of the capacitive sag is a function of the

load step, the output capacitor value, the inductor value,

the input-to-output voltage differential, and the maximum

duty cycle. The maximum duty cycle during a fast transient

is a function of the on-time and the minimum off-time since

the ACOT^TMcontrol scheme will ramp the current using

on-times spaced apart with minimum off-times, which is

as fast as allowed. Calculate the approximate on-time

(neglecting parasitic) and maximum duty cycle for a given

input and output voltage as :

Since ceramic capacitors have extremely low ESR and

relatively little capacitance, both components are similar

in amplitude and both should be considered if ripple is

critical.

V_RIPPLE= V_RIPPLE(ESR) V_RIPPLE(C)

V_RIPPLE(ESR)= I_LR_ESR

I_L

V_RIPPLE(C)

=

V_OUT

 f_SW

t_ON

8C_OUTf_SW

t_ON

=

and D_MAX=

V

IN

t_ON+ t_OFF(MIN)

Output Transient Undershoot and Overshoot

The actual on-time will be slightly longer as the IC

compensates for voltage drops in the circuit, but we can

neglect both of these since the on-time increase

compensates for the voltage losses. Calculate the output

In addition to output ripple voltage at the switching

frequency, the output capacitor and its ESR also affect

the voltage sag (undershoot) and soar (overshoot) when

the load steps up and down abruptly. TheACOT^TMtransient

response is very quick and output transients are usually

small. However, the combination of small ceramic output

capacitors (with little capacitance), low output voltages

(with little stored charge in the output capacitors), and

low duty cycle applications (which require high inductance

to get reasonable ripple currents with high input voltages)

increases the size of voltage variations in response to

very quick load changes. Typically, load changes occur

slowly with respect to the IC's switching frequency.

voltage sag as :

2

L(I

)

OUT

V

SAG

=

2C

 V

D  V

MAX OUT





OUT

IN(MIN)

The amplitude of the capacitive soar is a function of the

load step, the output capacitor value, the inductor value

and the output voltage :

2

L(I

)

OUT

V

SOAR

=

2C

 V

OUT

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RT6203B

Output Voltage Setting

EN

RT6203B

GND

The output voltage is set by a resistive divider from the

output to ground with the midpoint connected to FB. The

resistive divider allows the FB pin to sense a fraction of

the output voltage as shown in Figure 1, and the output

voltage can be calculated by the following equation :

R1

C

EN

Figure 2. Enable Timing Control

V_OUT 0.8V(1 +

)

R2

V

OUT

EN

RT6203B

GND

Q1

Enable

R1

FB

RT6203B

R2

Figure 3. Logic Control for the EN Pin

GND

R

Figure 1. Output Voltage Setting

EN1

V

IN

EN

The placement of resistive divider components should be

within 5mm of the FB pin. In order to minimize the power

consumption at light loads and reduce the noise injected

from FB pin, The suggested value of R2 is between 10kΩ

and 100kΩ. For output voltage accuracy, use divider

resistors with 1% or better tolerance.

R

EN2

RT6203B

GND

Figure 4. ResistorDivider for Lockout Threshold Setting

External Soft-Start Function

The RT6203B provides an adjustable soft-start function.

The soft-start function is used to prevent large inrush

current while the converter is being powered-up. The soft-

start timing is the output voltage rising time from 0V to

settled level and can be programmed by the external

capacitor between the SS andGNDpins.An internal current

source I_SS(typically, 6μA) charges the external capacitor

to build a soft-start ramp voltage. The FB voltage will track

the internal ramp voltage during soft-start. The typical soft-

start time can be calculated as follows :

Enable Operation (EN)

EN is a high voltage input pin. For automatic start-up, the

EN pin can be connected to VIN directly. The inherent

hysteresis makes EN useful as a simple timing delay. To

add an additional time delay, the ENpin can be connected

to GND through a capacitor C_EN, as shown in Figure 2.

The additional time delay for switching operation to start

can be calculated with the EN's internal logic threshold.

(typically 2V).

An external MOSFET can be added to implement an logic-

controlled EN pin, as shown in Figure 3. The MOSFET

Q1 can provide the logic control on the EN pin, pulling it

down. To prevent enabling circuit when V_INis smaller than

the V_OUTtarget value or some other desired voltage level,

a resistive divider can be placed to control the ENvoltage

as the additional input under voltage lockout function, as

shown in Figure 4.

C

(nF)  V

T

SS

Soft-Start Time t (ms) =

SS

I

(A)

SS

C

SS

(nF)  1.3

6A

=

For example, If a 10nF capacitor is used, the typical soft-

start will be 2.16ms. Do not leave SS unconnected.

Power-Good Output

The PGOODpin is an open-drain power-good output and

requires an external pull-up resistor, connected to an

external supply or the on-chip PVCC output. When the

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RT6203B

5V

output voltage drops below 87.5% of its nominal voltage,

PGOOD will be pulled low. It will be held low until the

output voltage rises to 92.5% of the nominal voltage.During

soft-start and in shutdown mode (ENpin pull low), PGOOD

is actively held low. When the output voltage has reached

90% of its nominal voltage and the soft-start sequence is

finished, PGOOD is high impedance and will be pulled

high by the external pull-up resistor.

BOOT

R

RT6203B

SW

0.1µF

Figure 5. External BootstrapDiode and BOOT Capacitor

Series Resistor

External Bootstrap Diode

Thermal Considerations

Connect a 0.1μF low ESR ceramic capacitor between the

BOOT and SW pins. This capacitor provides the gate driver

voltage for the high-side MOSFET. It is recommended to

add an external bootstrap diode between an external 5V

and BOOT pin for efficiency improvement when input

voltage is lower than 5.5V. The bootstrap diode can be a

low cost one such as IN4148 or BAT54. The external 5V

can be a 5V fixed input from system or a 5V output of the

RT6203BNote that the external boot voltage must be lower

than 5.5V.

The junction temperature should never exceed the

absolute maximum junction temperature T_J(MAX), listed

under Absolute Maximum Ratings, to avoid permanent

damage to the device. The maximum allowable power

dissipation depends on the thermal resistance of the IC

package, the PCB layout, the rate of surrounding airflow,

and the difference between the junction and ambient

temperatures. The maximum power dissipation can be

calculated using the following formula :

P_D(MAX)= (T_J(MAX)− T_A) / θ_JA

External BOOT Capacitor Series Resistor

where T_J(MAX)is the maximum junction temperature, T_Ais

the ambient temperature, and θ_JAis the junction-to-ambient

thermal resistance.

The internal power MOSFET gate driver is not only

optimized to turn the switch on fast enough to minimize

switching loss, but also slow enough to reduce EMI. Since

the switch rapidly turn-on will induce high di/dt noise which

let EMI issue much worse. During switch turn-off, SW is

discharged relatively slowly by the inductor current during

the dead time between high-side and low-side switch on-

times. In some cases it is desirable to reduce EMI further,

at the expense of some additional power dissipation. The

switch turn-on can be slowed by placing a small (<47Ω)

resistance between BOOT and the external bootstrap

capacitor. This will slow the high-side switch turn-on speed

and V_SW's rise. The recommended external diode

connection is shown in Figure 5, using external diode to

charge the BOOT capacitor, and place a resistor between

BOOT and the capacitor/diode connection to reduce turn-

on speed for any EMI issue consideration.

For continuous operation, the maximum operating junction

temperature indicated under Recommended Operating

Conditions is 125°C. The junction-to-ambient thermal

resistance, θ_JA, is highly package dependent. For a

WQFN-20L 4x4 package, the thermal resistance, θ_JA, is

28°C/W on a standard JEDEC 51-7 high effective-thermal-

conductivity four-layer test board. The maximum power

dissipation at T_A= 25°C can be calculated as below :

P_D(MAX)= (125°C − 25°C) / (28°C/W) = 3.57W for a

WQFN-20L 4x4 package.

The maximum power dissipation depends on the operating

ambient temperature for the fixed T_J(MAX)and the thermal

resistance, θ_JA. The derating curves in Figure 6 allows

the designer to see the effect of rising ambient temperature

on the maximum power dissipation.

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DS6203B-01 July 2017

RT6203B

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

Four-Layer PCB

0

25

50

75

100

125

Ambient Temperature (°C)

Figure 6. Derating Curve of Maximum PowerDissipation

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RT6203B

Outline Dimension

1

2

1

2

DETAILA

Pin #1 ID and Tie Bar Mark Options

Note : The configuration of the Pin #1 identifier is optional,

but must be located within the zone indicated.

Dimensions In Millimeters

Dimensions In Inches

Symbol

Min

Max

Min

Max

A

A1

A3

b

0.700

0.000

0.175

0.150

3.900

2.650

2.100

3.900

2.650

2.100

0.800

0.050

0.250

0.300

4.100

2.750

2.200

4.100

2.750

2.200

0.028

0.000

0.007

0.006

0.154

0.104

0.083

0.154

0.104

0.083

0.031

0.002

0.010

0.012

0.161

0.108

0.087

0.161

0.108

0.087

D

Option 1

Option 2

D2

E2

E

Option 1

Option 2

e

0.500

0.020

L

0.350

0.450

0.014

0.018

W-Type 20L QFN 4x4 Package

Richtek Technology Corporation

14F, No. 8, Tai Yuen 1^stStreet, Chupei City

Hsinchu, Taiwan, R.O.C.

Tel: (8863)5526789

Richtek products are sold by description only. Customers should obtain the latest relevant information and data sheets before placing orders and should verify

that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek

product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use;

nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent

or patent rights of Richtek or its subsidiaries.

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DS6203B-01 July 2017


型号：	RT6203B
厂家：	RICHTEK TECHNOLOGY CORPORATION
描述：	5A, 18V, 700kHz ACOTTM Synchronous Step-Down Converter with VID Control
文件：	总22页 (文件大小：427K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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RT6208

RT6210

RT6211B

RT6212A

RT6212AHGJ6F