RT8058中文资料_数据手册_规格书

Preliminary

RT8058

1MHz, 2A, High Efficiency PWM Step-Down DC/DC Converter

General Description

Features

l 0.6V Reference Allows Low Output Voltage

l Low Dropout Operation : 100% Duty Cycle

l 2A Load Current

The RT8058 is a current mode PWM step-down converter.

The chip is ideal for fixed frequency and low ripple

applications over full range of load conditions. Its input

voltage range is from 2.6V to 5.5V with a constant 1MHz

switching frequency that allows it to adopt tiny, low cost

capacitors and inductors with 2mm or less in height making

it ideal for single-cell Li-lon/polymer battery applications.

The low on resistance internal MOSFET can achieve high

efficiency without the need of external schottky diodes in

wide operating ranges and the output voltage is adjustable

from 0.6V to 5V that can provide up to 2A load current.

The RT8058 operates at 100% duty cycle for low dropout

operation that extends battery life in portable devices.

l < 2uA Shutdown Current

l Up to 95% Efficiency

l No Schottky Diode Required

l 1MHZ Constant Switching Frequency

l Low R_DS(ON)Internal Switches

l Internally Compensated

l Internal Soft-Start

l Over temperature Protection

l Short Circuit Protection

l Small 16-Lead WQFN Package

l RoHS Compliant and 100% Lead (Pb)-Free

The RT8058 is available in a WQFN-16L 3x3 package.

Applications

Ordering Information

l Portable Instruments

l Microprocessors andDSP Core supplies

l CellularTelephones

RT8058

Package Type

QW : WQFN-16L 3x3 (W-Type)

l Wireless andDSL Modems

l Digital Cameras

Operating Temperature Range

P : Pb Free with Commercial Standard

G : Green (Halogen Free with Commer-

cial Standard)

l PC Cards

Note :

Pin Configurations

Richtek Pb-free and Green products are :

}RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

(TOP VIEW)

16 15 14 13

}Suitable for use in SnPb or Pb-free soldering processes.

}100% matte tin (Sn) plating.

12 PVDD

PGND

FB

1

2

3

4

11

PVDD

PGND

10

PVDD

17

VDD

9

5

6

7

8

WQFN-16L 3x3

DS8058-02 August 2007

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1

Preliminary

RT8058

Typical Application Circuit

L1

3.3uH

RT8058

PVDD

13,14,15

4

10,11,12

V

LX

OUT

IN

1.2V/2A

2.6V to 5.5V

7

R1

100k

EN

9

C

OUT2

FB

OUT1

VDD

22uF

C

IN

10uF

R2

100k

GND

5

PGND

1, 2, 3,

Exposed Pad (17)

Functional Pin Description

Pin No.

Pin Name

Pin Function

Power Ground. Connect this pin close to the (–) terminal of C and C

exposed pad must be soldered to a large PCB and connected to PGND for

maximum power dissipation.

. The

OUT

IN

1, 2, 3

Exposed Pad (17)

PGND

Feedback Input Pin. Receives the feedback voltage from a resistive divider

connected across the output.

4

FB

Signal Ground. Return the feedback resistive dividers to this ground, which in turn

connects to PGND at one point.

No Internal Connection.

Enable pin. A logical high level at this pin enables the converter, while a logical low

level causes the converter to shut down.

5

6, 8, 16

7

GND

NC

EN

Signal Input Supply. Decouple this pin to GND with a capacitor. Normally VDD is

equal to PVDD. Keep the voltage difference between VDD and PVDD less than

0.5V.

9

VDD

Power Input Supply of converter power stage. Decouple this pin to PGND with a

capacitor.

Internal Power MOSFET Switches Output of converter. Connect this pin to the

inductor.

10, 11, 12

13, 14, 15

PVDD

LX

Function Block Diagram

PVDD

ISEN

Slope

Com

OSC

0.6V

Output

Clamp

OC

Limit

EA

FB

Driver

Int-SS

LX

0.3V

Control

Logic

OT

PGND

GND

POR

VREF

Temp-SEN

VDD

EN

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DS8058-02 August 2007

Preliminary

Absolute Maximum Ratings (Note 1)

RT8058

l Supply Input VoltageVDD, PVDD ------------------------------------------------------------------------------------ - 0.3V to 6V

l LX Pin Switch Voltage -------------------------------------------------------------------------------------------------- - 0.3V to 6V

l Other I/O Pin Voltage --------------------------------------------------------------------------------------------------- - 0.3V to 6V

l PowerDissipation, P_D@ T_A= 25°C

WQFN-6L 3x3 ------------------------------------------------------------------------------------------------------------ 1.471W

l Package Thermal Resistance (Note 4)

WQFN-16L 3x3, q_JA----------------------------------------------------------------------------------------------------- 68°C/W

WQFN-16L 3x3, q_JC----------------------------------------------------------------------------------------------------- 7°C/W

l Lead Temperature (Soldering, 10 sec.)------------------------------------------------------------------------------ 260°C

l StorageTemperature Range ------------------------------------------------------------------------------------------- - 65°C to 150°C

l JunctionTemperature --------------------------------------------------------------------------------------------------- 150°C

l ESD Susceptibility (Note 2)

HBM (Human Body Mode) --------------------------------------------------------------------------------------------- 2kV

MM (Machine Mode) ---------------------------------------------------------------------------------------------------- 200V

Recommended Operating Conditions (Note 3)

l Supply Input Voltage ---------------------------------------------------------------------------------------------------- 2.6V to 5.5V

l Junction Temperature Range ------------------------------------------------------------------------------------------ - 40°C to 125°C

l AmbientTemperature Range ------------------------------------------------------------------------------------------ - 40°Cto 85°C

Electrical Characteristics

(V_DD= V_PVDD= 3.6V, T_A= 25°C, unless otherwise specified)

Parameter

Input Voltage Range

Symbol

Test Conditions

Min

2.6

0.582

--

Typ

--

Max

5.5

0.618

--

Units

V

IN

Feedback Voltage

V

0.6

3.4

340

--

V

FB

Active, No Load

mA

V

DC Bias Current

--

Active, Not Switching, V = 0.5V

FB

(PVDD, VDD total)

Shutdown, EN = 0

--

2

Under voltage Lockout

Threshold

2.3

--

2.43

150

2.55

--

V

DD

V

DD

Rising

UVLO

mV

Hysteresis

Oscillator Frequency

Switching Frequency

f

0.75

1.4

--

1.0

--

1.25

--

MHz

V

OSC

EN High-Level Input Voltage

EN Low-Level Input Voltage

Switch On Resistance, High

V

R

EN_H

EN_L

--

0.4

V

I

= 200mA

--

142

96

210

160

--

mW

A

DS(ON)_P OUT

Switch On Resistance, Low

Peak Current Limit

I

DS(ON)_N OUT

I_LIM

2.2

--

3

Output Voltage Line Regulation

Output Voltage Load Regulation

0.05

0.15

--

%/V

%/A

V

IN

= 2.6V to 5.5V

--

I

= 0Aà2A

--

LOAD

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Preliminary

RT8058

Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for

stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the

operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended

periods may remain possibility to affect device reliability.

Note 2. Devices are ESD sensitive. Handling precaution recommended.

Note 3. The device is not guaranteed to function outside its operating conditions.

Note 4. q_JAis measured in the natural convection at T_A= 25°C on a high effective four layers thermal conductivity test board of

JEDEC 51-7 thermal measurement standard. The case point of q_JCis on the expose pad for the WQFN package.

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DS8058-02 August 2007

Preliminary

Typical Operating Characteristics

RT8058

Efficiency vs. Output Current

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

V_IN= 5V

V_IN= 3.3V

V_OUT= 1.8V, L = 3.3mH, C_OUT= 22mFx2

V_OUT= 1.2V, L = 3.3mH, C_OUT= 22mFx2

0

500

1000

1500

2000

0

500

1000

1500

2000

Output Current (mA)

Reference Voltage vs. Input Voltage

Output Voltage vs. Outout Current

0.6010

0.6008

0.6006

0.6004

0.6002

0.6000

0.5998

0.5996

0.5994

0.5992

0.5990

1.2000

1.1998

1.1996

1.1994

1.1992

1.1990

1.1988

1.1986

1.1984

1.1982

1.1980

V_IN= 5V

V_IN= 3.3V

2.7

3.1

3.5

3.9

4.3

4.7

5.1

5.5

0

250 500 750 1000 1250 1500 1750 2000

Input Voltage (V)

Outout Current (mA)

Output Voltage vs. Temperature

Frequency vs. Temperature

1100

1050

1000

950

1.205

1.203

1.201

1.199

1.197

1.195

1.193

1.191

1.189

1.187

1.185

900

V_IN= 3.6V, V_OUT= 1.2V, I_OUT= 0A

25 50 75 100 125

V_IN= 3.6V

850

-50

-25

0

-50

-25

0

25

50

75

100

125

Temperature (°C)

Temperature

(°C)

DS8058-02 August 2007

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Preliminary

RT8058

Quiescent Current vs. Input Voltage

Quiescent Current vs. Temperature

450

400

350

300

250

450

400

350

300

250

V_IN= 3.6V

2.7

3.1

3.5

3.9

4.3

4.7

5.1

5.5

-50

-25

0

25

50

75

100

125

(°C)

Temperature

Input Voltage(V)

Peak Current limit vs. Input Voltage

Peak Current limit vs. Temperature

3.5

3.3

3.1

2.9

2.7

2.5

3.3

3.2

3.1

3.0

2.9

2.8

V_IN= 3.6V, V_OUT= 1.2V

50 75 100 125

V_OUT= 1.2V

4.7 5.1 5.5

-50

-25

0

25

2.7

3.1

3.5

3.9

4.3

(°C)

Temperature

Input Voltage (V)

Load Transient Response

V_IN= 3.3V, V_OUT= 1.2V, I_OUT= 0A to 1A

V_IN= 3.3V, V_OUT= 1.2V, I_OUT= 0A to 2A

V_OUT

(50mV/Div)

I_OUT

(1A/Div)

Time (25ms/Div)

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DS8058-02 August 2007

Preliminary

RT8058

Load Transient Response

V_IN= 3.3V, V_OUT= 1.2V, I_OUT= 0.5A to 1.5A

V_IN= 3.3V, V_OUT= 1.2V, I_OUT= 1A to 2A

V_OUT

(50mV/Div)

V_OUT

(50mV/Div)

I_OUT

(1A/Div)

I_OUT

(1A/Div)

Time (25ms/Div)

Load Transient Response

V_IN= 5V, V_OUT= 1.2V, I_OUT= 0A to 1A

V_IN= 5V, V_OUT= 1.2V, I_OUT= 0A to 2A

V_OUT

(50mV/Div)

I_OUT

(1A/Div)

Time (25ms/Div)

Load Transient Response

V_IN= 5, V_OUT= 1.2V, I_OUT= 1A to 2A

V_IN= 5V, V_OUT= 1.2V, I_OUT= 0.5A to 1.5A

V_OUT

(50mV/Div)

I_OUT

(1A/Div)

Time (25ms/Div)

DS8058-02 August 2007

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Preliminary

RT8058

Output Ripple Noise

V_IN= 3.3V, V_OUT= 1.2V, I_OUT= 1.5A

V_IN= 3.3V, V_OUT= 1.2V, I_OUT= 2A

V_OUT

(5mV/Div)

V_LX

(5V/Div)

I_OUT

(1A/Div)

Time (500ns/Div)

Output Ripple Noise

V_IN= 5V, V_OUT= 1.2V, I_OUT= 2A

V_IN= 5V, V_OUT= 1.2V, I_OUT= 1.5A

V_OUT

(5mV/Div)

V_LX

(5V/Div)

I_OUT

(1A/Div)

Time (500ns/Div)

Power On from EN

V_IN= 3.3V, V_OUT= 1.2V, R_LOAD= 0.6W

V_IN= 5V, V_OUT= 1.2V, R_LOAD= 0.6W

V_EN

(2V/Div)

V_OUT

(1V/Div)

V_OUT

(1V/Div)

I_OUT

(2A/Div)

Time (500ms/Div)

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DS8058-02 August 2007

Preliminary

RT8058

Soft-Start & Inrush Current

V_IN= 5V, V_OUT= 1.2V, I_OUT= 1.5A

V_IN= 3.3V, V_OUT= 1.2V, I_OUT= 1.5A

V_IN

(2V/Div)

V_OUT

(1V/Div)

V_OUT

(1V/Div)

I_IN

(1A/Div)

Time (2.5ms/Div)

DS8058-02 August 2007

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9

Preliminary

RT8058

Application Information

Function Description

The resistive divider allows the FB pin to sense a fraction

of the output voltage as shown in Figure 1.

The RT8058 is a 1MHz constant frequency, current mode

PWM step-down converter. High switching frequency and

high efficiency make it suitable for applications where high

efficiency and small size are critical.

V

OUT

R1

FB

Frequency compensation is done internally. The output

voltages are set by external dividers returned to the FB

pin. The output voltage can be set from 0.8V to 5V.

RT8058

GND

R2

Figure 1. Setting the Output Voltage

Main Control Loop

Slope Compensation and Inductor Peak Current

During normal operation, the internal top power switch

(P-MOSFET) is turned on at the beginning of each clock

cycle. Current in the inductor increases until the peak

inductor current reach the value defined by the output

voltage of the error amplifier. The error amplifier adjusts its

output voltage by comparing the feedback signal from a

resistor divider on the FB pin with an internal 0.6V

reference. When the load current increases, it causes a

reduction in the feedback voltage relative to the reference.

The error amplifier raisesitsoutput voltageuntil the average

inductor current matches the new load current. When the

top power MOSFET shuts off, the synchronous power

switch (N-MOSFET) turns on until the beginning of the

next clock cycle.

Slope compensation provides stability in constant

frequency architectures by preventing sub harmonic

oscillations at duty cycles greater than 50%. It is

accomplished internally by adding a compensating ramp

to the inductor current signal. Normally, the maximum

inductor peak current is reduced when slope compensation

is added. In RT8058, however, separated inductor current

signal is used to monitor over current condition and this

keeps the maximum output current relatively constant

regardless of duty cycle.

Dropout Operation

When input supply voltage decreases toward the output

voltage, the duty cycle increases toward the maximum

on time. Further reduction of the supply voltage forces

the main switch to remain on for more than one cycle

eventually reaching 100% duty cycle. The output voltage

will then be determined by the input voltage minus the

voltage drop across the internal P-MOSFET and the

inductor.

Soft Start / Enable

For convenience of power up sequence control, RT8058

has an enable pin. Logic high at EN pin will enable the

converter. When the converter is enabled, the clamped

error amplifier output ramps up during 1024-clock period

to increase the current provided by converter until the

output voltage reach the target voltage. If EN is kept at

high during Vin applying, RT8058 will be enabled when

VDD surpass Under-Voltage Lockout threshold.

Low Supply Operation

The RT8058 is designed to operate down to an input supply

voltage of 2.7V. One important consideration at low input

supply voltages is that the R_DS(ON)of the P-Channel and

N-Channel power switches increases. The user should

calculate the power dissipation when the RT8058 is used

at 100% duty cycle with low input voltages to ensure that

thermal limits are not exceeded.

Output Voltage Programming

The output voltage is set by an external resistive divider

according to the following equation :

V_OUT= V_REFx (1+ R1/R2)

where V_REFequals to 0.6V typical.

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DS8058-02 August 2007

Preliminary

RT8058

Short-Circuit Protection

forcing the use of more expensive ferrite or mollypermalloy

cores. Actual core loss is independent of core size for a

fixed inductor value but it is very dependent on the

inductance selected. As the inductance increases, core

losses decrease. Unfortunately, increased inductance

requires more turns of wire and therefore copper losses

will increase.

At overload condition, current mode operation provides

cycle-by-cycle current limit to protect the internal power

switches. When the output is shorted to ground, the

inductor current will decays very slowly during a single

switching cycle. A current runaway detector is used to

monitor inductor current. As current increasing beyond

the control of current loop, switching cycles will be skipped

toprevent current runaway fromoccurring. If the FB voltage

is smaller than 0.3V after the completion of soft-start

period, under voltage protection (UVP) will lock the output

to high-z to protect the converter. UVP lock can only be

cleared by recycling the input power.

Ferrite designs have very low core losses and are preferred

at high switching frequencies, so design goals can

concentrate on copper loss and preventing saturation.

Ferrite core material saturates “hard”, which means that

inductance collapses abruptly when the peak design

current is exceeded. This result in an abrupt increase in

inductor ripple current and consequent outputvoltageripple.

Thermal Protection

Do not allow the core to saturate!

If the junction temperature of RT8058 reaches certain

temperature (150°C), both converters will be disabled. The

RT8058 will be re-enabled and automatically initializes

internal soft start when the junction temperature drops

below 110°C.

Different core materials and shapes will change the size/

current and price/current relationship of an inductor. Toroid

or shielded pot cores in ferrite or permalloy materials are

small and don' t radiate energy but generally cost more

than powdered iron core inductors with similar

characteristics. The choice of which style inductor to use

mainly depends on the price vs. size requirements and

any radiated field/EMI requirements.

Inductor Selection

For a given input and output voltage, the inductor value

and operating frequency determine the ripple current. The

ripple current DI_Lincreases with higher VIN and decreases

with higher inductance.

C_INand C_OUTSelection

The input capacitance, C_IN, is needed to filter the

trapezoidal current at the source of the top MOSFET. To

prevent large ripple voltage, a low ESR input capacitor

sized for the maximum RMS current should be used. RMS

current is given by :

V

f ´ L

V

OUT

V

IN

é

ù é

ù

OUT

ΔI =

´ 1-

ú ê

L

ê

ú

ë

û ë

û

Having a lower ripple current reduces the ESR losses in

the output capacitors and the output voltage ripple. Highest

efficiency operation is achieved at low frequency with small

ripple current. This, however, requires a large inductor. A

reasonable starting point for selecting the ripple current

is DI_L= 0.4(IMAX). The largest ripple current occurs at

the highest V_IN. To guarantee that the ripple current stays

below a specified maximum, the inductor value should be

chosen according to the following equation :

V_OUT

V

IN

I_RMS= I_OUT(MAX)

- 1

V

V_OUT

IN

This formula has a maximum at V_IN= 2V_OUT, where IRMS

= I_OUT/2. This simple worst-case condition is commonly

used for design because even significant deviations do

not offer much relief. Note that ripple current ratings from

capacitor manufacturers are often based on only 2000

hours of life which makes it advisable to further derate the

capacitor, or choose a capacitor rated at a higher

temperature than required. Several capacitors may also

be paralleled to meet size or height requirements in the

design.

é

ù é

´ 1-

ù

V

f ´ DI

V

OUT

V

IN(MAX)

OUT

L =

ê

ú ê

ú

L(MAX)

ë

û ë

û

Inductor Core Selection

Once the value for L is known, the type of inductor must

be selected. High efficiency converters generally cannot

afford the core loss found in low cost powdered iron cores,

DS8058-02 August 2007

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11

Preliminary

RT8058

The selection of C_OUTis determined by the effective series

resistance (ESR) that is required to minimize voltage ripple

and load step transients, as well as the amount of bulk

capacitance that is necessary to ensure that the control

loop is stable. Loop stability can be checked by viewing

the load transient response as described in a later section.

The output ripple, DV_OUT, is determined by :

Checking Transient Response

The regulator loop response can be checked by looking

at the load transient response. Switching regulators take

several cycles to respond to a step in load current. When

a load step occurs, V_OUTimmediately shifts by an amount

equal to DI_LOAD(ESR), where ESR is the effective series

resistance of C_OUT. DI_LOADalso begins to charge or

discharge C_OUTgenerating a feedback error signal used

by the regulator to return V_OUTto its steady-state value.

During this recovery time, V_OUTcan be monitored for

overshoot or ringing that would indicate a stability problem.

é

ù

1

ΔV

£ ΔI ESR +

OUT

L

ê

ë

ú

8fC

OUT

û

The output ripple is highest at maximum input voltage

since DI_Lincreases with input voltage. Multiple capacitors

placed in parallel may be needed to meet the ESR and

RMS current handling requirements. Dry tantalum, special

polymer, aluminum electrolytic and ceramic capacitors are

all available in surface mount packages. Special polymer

capacitors offer very low ESR but have lower capacitance

density than other types. Tantalum capacitors have the

highest capacitance density but it is important to only

use types that have been surge tested for use in switching

power supplies. Aluminum electrolytic capacitors have

significantly higher ESR but can be used in cost-sensitive

applications provided that consideration is given to ripple

current ratings and long term reliability. Ceramic capacitors

have excellent low ESR characteristics but can have a

high voltage coefficient and audible piezoelectric effects.

The high Q of ceramic capacitors with trace inductance

can also lead to significant ringing.

Efficiency Considerations

The efficiency of a switching regulator is equal to the output

power divided by the input power times 100%. It is often

useful to analyze individual losses to determine what is

limiting the efficiency and which change would produce

the most improvement. Efficiency can be expressed as:

Efficiency = 100% - (L1+ L2+ L3+ ...) where L1, L2, etc.

are the individual losses as a percentage of input power.

Although all dissipative elements in the circuit produce

losses, two main sources usually account for most of the

losses : V_DDquiescent current and I²R losses. The VDD

quiescent current loss dominates the efficiency loss at

very low load currents whereas the I²R loss dominates

the efficiency loss at medium to high load currents. In a

typical efficiency plot, the efficiency curve at very low load

currents can be misleading since the actual power lost is

of no consequence.

Using Ceramic Input and Output Capacitors

Higher values, lower cost ceramic capacitors are now

becoming available in smaller case sizes. Their high ripple

current, high voltage rating and low ESR make them ideal

for switching regulator applications. However, care must

be taken when these capacitors are used at the input and

output. When a ceramic capacitor is used at the input

and the power is supplied by a wall adapter through long

wires, a load step at the output can induce ringing at the

input, V_IN. At best, this ringing can couple to the output

and be mistaken as loop instability. At worst, a sudden

inrush of current through the long wires can potentially

cause a voltage spike at V_INlarge enough to damage the

part.

1. The VDD quiescent current is due to two components :

theDC bias current as given in the electrical characteristics

and the internal main switch and synchronous switch gate

charge currents. The gate charge current results from

switching the gate capacitance of the internal power

MOSFET switches. Each time the gate is switched from

high to low to high again, a packet of charge DQ moves

from VDD to ground. The resulting DQ/Dt is the current

out of VDD that is typically larger than theDC bias current.

In continuous mode,

I_GATECHG= f(Q_T+Q_B)

where Q_Tand Q_Bare the gate charges of the internal top

and bottom switches. Both the DC bias and gate charge

losses are proportional to VDD and thus their effects will

be more pronounced at higher supply voltages.

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DS8058-02 August 2007

Preliminary

RT8058

2. I²R losses are calculated from the resistances of the

internal switches, R_SWand external inductor R_L. In

continuous mode the average output current flowing

through inductor L is “chopped” between the main switch

and the synchronous switch. Thus, the series resistance

looking into the LX pin is a function of both top and bottom

MOSFET R_DS(ON)and the duty cycle (D) as follows :

derating curves allows the designer to see the effect of

rising ambient temperature on the maximum power

allowed.

1.6

Four Layers PCB

1.4

1.2

1

R_SW= R_DS(ON)TOPx D + R_DS(ON)BOTx (1- D)

0.8

0.6

0.4

0.2

0

The R_DS(ON)for both the top and bottom MOSFETs can be

obtained from the Typical Performance Characteristics

curves. Thus, to obtain I²R losses, simply add R_SWto R_L

and multiply the result by the square of the average output

current. Other losses including C_INand C_OUTESR

dissipative losses and inductor core losses generally

account for less than 2% of the total loss.

0

25

50

75

100

125

150

Ambient Temperature (°C)

Thermal Considerations

Figure 2. Derating Curves for RT8058 Package

For continuous operation, do not exceed the maximum

operation junction temperature 125°C. The maximum

power dissipation depends on the thermal resistance of

IC package, PCB layout, the rate of surroundings airflow

and temperature difference between junction to ambient.

The maximum power dissipation can be calculated by

following formula :

Layout Considerations

Follow the PCB layout guidelines for optimal performance

of RT8058.

}A ground plane is recommended. If a ground plane layer

is not used, the signal and power grounds should be

segregated with all small-signal components returning

to the GND pin at one point that is then connected to

the PGND pin close to the IC. The exposed pad should

be connected toGND.

P_D(MAX)= ( T_J(MAX)- T_A) / q_JA

Where T_J(MAX)is the maximum operation junction

temperature 125°C, T_Ais the ambient temperature and

the q_JAis the junction to ambient thermal resistance.

}Connect the terminal of the input capacitor(s), C_IN, as

close as possible to the PVDD pin. This capacitor provides

the AC current into the internal power MOSFETs.

For recommended operating conditions specification of

RT8058, where T_J(MAX)is the maximum junction

temperature of the die and T_Ais the maximum ambient

temperature. The junction to ambient thermal resistance

q_JAis layout dependent. For WQFN-16L 3x3 packages,

the thermal resistance q_JAis 68°C/W on the standard

JEDEC 51-7 four-layers thermal test board.

}LX node is with high frequency voltage swing and should

be kept small area. Keep all sensitive small-signal nodes

away from LX node to prevent stray capacitive noise pick-

up.

}Flood all unused areas on all layers with copper. Flooding

with copper will reduce the temperature rise of power

components. You can connect the copper areas to any

DC net (PVDD, VDD, VOUT, PGND, GND, or any other

DC rail in your system).

The maximum power dissipation at T_A= 25°C can be

calculated by following formula :

P_D(MAX)= ( 125°C - 25°C ) / 68°C/W = 1.471 W for

WQFN-16L 3x3 packages

The maximum power dissipation depends on operating

ambient temperature for fixed T_J(MAX)and thermal

resistance q_JA. For RT8058 packages, the Figure 2 of

}Connect the FB pin directly to the feedback resistors.

The resistor divider must be connected between VOUT

andGND.

DS8058-02 August 2007

www.richtek.com

13

Preliminary

RT8058

Figure 3. Top Layer

Figure 4. Bottom Layer

Table 1. Recommended Inductors

Component

Series

Inductance

DCR

(mW)

70

22

20

Current Rating

Dimensions

(mm)

Supplier

(mH)

3.3

(mA)

2000

2600

2500

2600

2360

TAIYO YUDEN

Murata

NR 4018

LQH66S

4 x 4 x 1.8

6.3 x 6.3 x 4.7

7 x 7 x 4.5

5.8 x 5.8 x 1.8

5 x 5 x 2.8

TDK

Sumida

GOTREND

SLF7045T

CDRH5D16

GTSD53

36

34

Table 2. Recommended Capacitors for C_INand C_OUT

Component Supplier

TDK

Part No.

Capacitance (mF)

Case Size

1210

C3225X5R0J226M

C2012X5R0J106M

ECJ4YB1A226M

ECJ4YB1A106M

LMK325BJ226ML

JMK316BJ226ML

JMK212BJ106ML

22

10

22

10

22

10

TDK

0805

Panasonic

1210

Panasonic

1210

TAIYO YUDEN

1210

1206

0805

www.richtek.com

14

DS8058-02 August 2007

Preliminary

RT8058

Outline Dimension

SEE DETAIL A

D

D2

L

1

E

E2

1

2

1

2

e

b

DETAILA

A

A3

Pin #1 ID and Tie Bar Mark Options

A1

Note : The configuration of the Pin #1 identifier is optional,

but must be located within the zone indicated.

Dimensions In Millimeters

Dimensions In Inches

Symbol

Min

Max

0.800

0.050

0.250

0.300

3.050

1.750

3.050

1.750

Min

Max

0.031

0.002

0.010

0.012

0.120

0.069

0.120

0.069

A

A1

A3

b

0.700

0.000

0.175

0.180

2.950

1.300

2.950

1.300

0.028

0.000

0.007

0.116

0.051

0.116

0.051

D

D2

E

E2

e

0.500

0.020

L

0.350

0.450

0.014

0.018

W-Type 16L QFN 3x3 Package

Richtek Technology Corporation

Headquarter

Richtek Technology Corporation

Taipei Office (Marketing)

5F, No. 20, Taiyuen Street, Chupei City

Hsinchu, Taiwan, R.O.C.

8F, No. 137, Lane 235, Paochiao Road, Hsintien City

Taipei County, Taiwan, R.O.C.

Tel: (8863)5526789 Fax: (8863)5526611

Tel: (8862)89191466 Fax: (8862)89191465

Email: marketing@richtek.com

DS8058-02 August 2007

www.richtek.com

15

Status：	Active	Vin (min) (V)：	2.6
Vin (max) (V)：	5.5	Number of Outputs：	1
Vout (min) (V)：	0.6	Vout (max) (V)：	5
Preset Vout (V)：		Output Adj. Method：	Resistor
Iout (max) (A)：	2	Current Limit (typ) (A)：	3
Freq (typ) (kHz)：	1000	Freq (min) (kHz)：
Freq (max) (kHz)：		Ext Sync：	No
Ron_HS (typ) (mOhm)：	142	Ron_LS (typ) (mOhm)：	96
Iq (typ) (mA)：	0.34	Features：	100% Duty Cycle;Current Mode Control;Enable Input;Force PWM;Internal Compensation;OCP;Stable with Ceramic Capacitor;UVP
Package Type：	WQFN3x3-16

型号	制造商	描述	价格	文档
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RT8061A	RICHTEK	3A, 1MHz, Synchronous Step-Down Converter	获取价格
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RT8058

RT8058 概述

RT8058 规格参数

RT8058 数据手册

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