RT8239BGQW_技术文档

®

RT8239A/B/C

High Efficiency, Main Power Supply Controller

for Notebook Computers

General Description

Features

^z5.5V to 25V Input Voltage Range

^z2V to 5.5V Output Voltage Range

^zNo Current Sense Resistor Needed

^z5V/3.3V Linear Regulators

The RT8239A/B/C is a dual step down, Switch Mode Power

Supply (SMPS) controller which generates logic supply

voltages for battery powered systems. It includes two

Pulse Width Modulation (PWM) controllers adjustable

from 2V to 5.5V and also two fixed 5V/3.3V linear

regulators. One of the controllers (LDO5) provides

automatic switch over to the BYP1 input connected to

the main SMPS1 output for maximized efficiency. An

optional external charge pump can be monitored through

SECFB (RT8239B/C). Other features include on board

power up sequencing, a power good output, internal soft-

start, and a soft discharge output that prevents negative

voltage during shutdown.

^z4700ppm/°C R_DS(ON)Current Sensing

^zInternal Current Limit Soft-Start and Soft Discharge

Output

^zBuilt In OVP/UVP/OCP

^zSelectable Operation Mode with Switcher Enable

Control (RT8239A)

^zSECFB Input Maintains Charge Pump Voltage

(RT8239B/C)

z Power Good Indicator (RT8239B/C includes SECFB)

z RoHS Compliant and Halogen Free

Aconstant on-time PWM control scheme operates without

sense resistors and assures fast load transient response

while maintaining nearly constant switching frequency. To

eliminate noise in audio applications, an ultrasonic mode

is included, which maintains the switching frequency

above 25kHz. Moreover, a diode emulation mode

maximizes efficiency for light load applications. The

SMPS1/SMPS2 switching frequency can be adjustable

from 200kHz/233kHz to 400kHz/466kHz respectively.

Applications

z Notebook computers

z System Power Supplies

z 3- and 4- Cell Li+ Battery-PoweredDevice

Ordering Information

RT8239A/B/C

Package Type

QW : WQFN-20L 3x3 (W-Type)

The RT8239A/B/C is available in a WQFN-20L 3x3

package, and operates over an extended temperature range

from −40°C to 85°C.

Lead Plating System

G : Green (Halogen Free and Pb Free)

Z : ECO (Ecological Element with

Halogen Free and Pb free)

Pin Function With

A : ENM

B : SECFB

C : SECFB, Ultrasonic Mode

Note :

Richtek products are :

` RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

` Suitable for use in SnPb or Pb-free soldering processes.

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1

RT8239A/B/C

Pin Configurations

(TOP VIEW)

20 19 18 17 16

1

2

3

4

5

15

14

13

12

11

1

2

3

4

5

15

14

13

12

11

FB1

ENTRIP1

TON

ENTRIP2

FB2

FB1

ENTRIP1

TON

ENTRIP2

FB2

LDO3

LDO5

SECFB

ENLDO

VIN

LDO3

LDO5

ENM

ENLDO

VIN

GND

21

6

7

8

9

10

6

7

8

9 10

RT8239A

RT8239B/C

WQFN-20L 3x3

Marking Information

RT8239B

RT8239A

JB= : Product Code

YMDNN : Date Code

JC= : Product Code

YMDNN : Date Code

JB=YM

DNN

JC=YM

DNN

JB : Product Code

YMDNN : Date Code

JC : Product Code

YMDNN : Date Code

JB YM

DNN

JC YM

DNN

RT8239C

JD= : Product Code

YMDNN : Date Code

JD=YM

DNN

JD : Product Code

YMDNN : Date Code

JD YM

DNN

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DS8239A/B/C-06 October 2012

RT8239A/B/C

Typical Application Circuit

V

IN

5.5V to 25V

R1

C2

C1

RT8239A

UGATE2

C6

10µF

8

7

11

12

18

N3

VIN

R5

0.1µF

ENLDO

BOOT2

UGATE1

BOOT1

C7

N1

0.1µF

L2

9

V

OUT2

R2

19

PHASE2

LGATE2

3.3V

10

C4

0.1µF

N4

C8

L1

V

17

16

OUT1

5V

R6

PHASE1

LGATE1

6.5k

5

4

N2

C3

FB2

R8

100k

R3

15k

R7

10k

ENTRIP2

1

3

R9

100k

FB1

2

R4

10k

R

TON

ENTRIP1

LDO3

TON

15

3.3V Alwa

ys On

20

13

C9

BYP1

ENM

4.7µF

C5

1µF

Chip Enable

14

6

LDO5

ys On

5V Alwa

C10

10µF

R10

100k

21 (Exposed Pad)

PGOOD

GND

Figure 1. RT8239ANB Main Supply Typical Application Circuit

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RT8239A/B/C

V

IN

5.5V to 25V

R1

C2

C1

RT8239B/C

C6

10µF

8

7

11

12

18

UGATE2

BOOT2

VIN

N3

N4

R5

0.1µF

ENLDO

UGATE1

C7

N1

0.1µF

L2

V

OUT2

9

R2

19

PHASE2

LGATE2

BOOT1

3.3V

10

C4

0.1µF

C8

L1

V

17

16

R6

OUT1

5V

PHASE1

LGATE1

6.5k

5

4

N2

C3

FB2

R8

100k

R3

15k

R7

10k

ENTRIP2

1

3

R9

100k

FB1

2

R4

10k

R

TON

ENTRIP1

TON

On

Off

20

BYP1

C5

1µF

C11

15

0.1µF

3.3

V Always On

LDO3

LDO5

C9

C13

4.7µF

0.1µF

C12

0.1µF

14

6

n

5V Always O

C10

10µF

R10

100k

R11

200k

PGOOD

GND

C14

13

0.1µF

SECFB

21 (Exposed Pad)

R12

39k

C15

V

CP

Figure 2. RT8239B/C NB Main Supply Typical Application Circuit

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DS8239A/B/C-06 October 2012

RT8239A/B/C

Functional Pin Description

Pin No.

Pin Name

Pin Function

SMPS1 Feedback Input. Connect FB1 to a resistive voltage divider from SMPS1

output to GND for adjustable output from 2V to 5.5V.

1

FB1

Channel 1 Enable and Current Limit Setting Input. Connect resistor to GND to set

the threshold for Channel 1 synchronous R

sense. The GND-PHASE1

DS(ON)

2

3

4

ENTRIP1

TON

current limit threshold is 1/10th the voltage seen at ENTRIP1 over a 0.5V to 3V

range. There is an internal 10μA current source from LDO5 to ENTRIP1. Leave

ENTRIP1 floating or drive it above 4.5V to shut down channel 1.

ON-Time/Frequency Adjustment Input. Connect to GND with 56kΩ to 100kΩ.

Channel 2 Enable and Current Limit Setting Input. Connect resistor to GND to set

the threshold for Channel 2 synchronous R

sense. The GND-PHASE2

DS(ON)

ENTRIP2

current limit threshold is 1/10th the voltage seen at ENTRIP2 over a 0.5V to 3V

range. There is an internal 10μA current source from LDO5 to ENTRIP2. Leave

ENTRIP2 floating or drive it above 4.5V to shut down channel 2.

SMPS2 Feedback Input. Connect FB2 to a resistive voltage divider from SMPS2

output to GND for adjustable output from 2V to 5.5V.

5

6

FB2

Power Good Output for Channel 1 and Channel 2 (RT8239A).

PGOOD

Power Good Output for Channel 1, Channel 2 and SECFB (RT8239B/C).

Boost Flying Capacitor Connection for SMPS2. Connect to an external capacitor

according to the typical application circuits.

7

8

9

BOOT2

Upper Gate Driver Output for SMPS2. UGATE2 swings between PHASE2 and

BOOT2.

UGATE2

PHASE2

Switch Node for SMPS2. PHASE2 is the internal lower supply rail for the UGATE2

high side gate driver. PHASE2 is also the current sense input for the SMPS2.

10

11

LGATE2

VIN

Lower Gate Drive Output for SMSP2. LGATE2 swings between GND and LDO5.

Supply Input for LDO5.

Master Enable Input. LDO5/LDO3 is enabled if it is within logic high level and

disabled if it is less than the logic low level. Leave ENLDO floating to default

enable LDO5/LDO3.

12

13

ENLDO

ENM

(RT8239A)

Mode Selection with Enable Input. Pull up to LDO5 (Ultrasonic mode) or LDO3

(DEM) to turn on both switch Channels. Short to GND for shutdown.

Change Pump Feedback Pin. The SECFB is used to monitor the optional external

charge pump. Connect a resistive divider from the change pump output to GND to

detect the output. If SECFB drops below its feedback threshold, an ultrasonic

pulse occurs to refresh the charge pump driven by LGATE1 or LGATE2.

If SECFB drops below its UV threshold, the switcher channels stop working and

enter into discharge-mode. Pull up to LDO5 or LDO3 to disable SECFB UVP

function.

SECFB

(RT8239B/C)

5V Linear Regulator Output. LDO5 is the supply voltage for the low side MOSFET

driver and also the analog supply voltage for the device. Bypass a minimum 4.7μF

ceramic capacitor to GND

14

LDO5

3.3V Linear Regulator Output. Bypass a minimum 4.7μF ceramic capacitor to

GND.

15

16

17

LDO3

LGATE1

PHASE1

Lower Gate Driver Output for SMPS1. LGATE1 swings between GND and LDO5.

Switch Node SMPS1. PHASE1 is the internal lower supply rail for the UGATE1

high side gate driver. PHASE1 is also the current sense input for the SMPS1.

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RT8239A/B/C

Pin No.

Pin Name

Pin Function

Upper Gate Driver Output for SMPS1. UGATE1 swings between PHASE1 and

BOOT1.

18

UGATE1

Boost Flying Capacitor Connection for SMPS1. Connect to an external

capacitor according to the typical application circuits.

19

20

BOOT1

BYP1

Switch Over Source Voltage Input for LDO5.

Analog Ground and Power Ground. The exposed pad must be soldered to a

large PCB and connected to GND for maximum power dissipation.

21 (Exposed Pad) GND

Function Block Diagram

BOOT1

BOOT2

UGATE1

UGATE2

PHASE2

LDO5

PHASE1

LDO5

SMPS1

PWM

Buck

SMPS2

PWM

Buck

LGATE1

LGATE2

Controller

LDO5

10µA

LDO5

10µA

FB2

FB1

ENTRIP2

ENTRIP1

On Time

ENM (RT8239A)

TON

SECFB (RT8239B/C)

Switch Over Threshold

BYP1

LDO5

PGOOD

GND

LDO3

REF

LDO5

Power-On

Sequence

Clear Fault Latch

VIN

ENLDO

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DS8239A/B/C-06 October 2012

RT8239A/B/C

Absolute Maximum Ratings (Note 1)

z VIN, ENLDO toGND ------------------------------------------------------------------------------------------------------ −0.3V to 30V

z BOOTx to PHASEx ------------------------------------------------------------------------------------------------------- −0.3V to 6V

z ENTRIPx, FBx, TON, BYP1, PGOOD, LDO5, LDO3, ENM/SECFB to GND ------------------------------- −0.3V to 6V

z PHASEx to GND

DC----------------------------------------------------------------------------------------------------------------------------- −0.3V to 30V

< 20ns ----------------------------------------------------------------------------------------------------------------------- −8V to 38V

z UGATEx to PHASEx

DC----------------------------------------------------------------------------------------------------------------------------- −0.3V to 6V

< 20ns ----------------------------------------------------------------------------------------------------------------------- −5V to 7.5V

z LGATEx toGND

DC----------------------------------------------------------------------------------------------------------------------------- −0.3V to 6V

< 20ns ----------------------------------------------------------------------------------------------------------------------- −2.5V to 7.5V

z PowerDissipation, P_D@ T_A= 25°C

WQFN-20L 3x3 ------------------------------------------------------------------------------------------------------------ 3.33W

z Package Thermal Resistance (Note 2)

WQFN-20L 3x3, θ_JA------------------------------------------------------------------------------------------------------- 30°C/W

WQFN-20L 3x3, θ_JC------------------------------------------------------------------------------------------------------ 7.5°C/W

z Lead Temperature (Soldering, 10 sec.)------------------------------------------------------------------------------- 260°C

z Junction Temperature ----------------------------------------------------------------------------------------------------- 150°C

z Storage Temperature Range -------------------------------------------------------------------------------------------- −65°C to 150°C

z ESD Susceptibility (Note 3)

HBM (Human Body Model)---------------------------------------------------------------------------------------------- 2kV

Recommended Operating Conditions (Note 4)

z Supply Input Voltage, VIN ----------------------------------------------------------------------------------------------- 5.5V to 25V

z Junction Temperature Range-------------------------------------------------------------------------------------------- −40°C to 125°C

z Ambient Temperature Range-------------------------------------------------------------------------------------------- −40°C to 85°C

Electrical Characteristics

(V_IN= 12V, V_ENLDO= 5V, V_ENTRIPx= 2V, V_BYP1= 5V, No Load on LDO5, LDO3, T_A= 25°C, unless otherwise specified)

Parameter

Input Supply

Symbol

Test Conditions

Min

Typ

Max

Unit

Rising Threshold

Falling Threshold

I_{VIN_SHDN}V_ENLDO= GND

--

5.1

--

5.5

4.5

VIN Power On Reset

V

3.5

VIN Shutdown Current

--

20

40

μA

VIN Standby Supply Current

Both SMPS Off

250

350

I_{VIN_SBY}

Both SMPSs on, FBx = 2.1V,

BYP1 = 5V, ENM = 3.3V (RT8239A)

Quiescent Power Consumption

--

5

7

mW

I_Q

SMPS Output and FB Voltage

FBx, CCM Operation

FBx, DEM Operation

--

2

--

FBx Regulation Voltage

V

V_FBx

1.98 2.006 2.03

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RT8239A/B/C

Parameter

Symbol

Test Conditions

SMPS1, SMPS2

Min

2

Typ Max

Unit

Output Voltage Adjustable

Range

--

2

5.5

V

SECFB Voltage

RT8239B

1.92

2.08

V_SECFB

On-Time

--

256

220

--

V_PHASE1= 2V

_PHASE2= 2V

V_IN= 20V

On-Time Pulse Width

Minimum Off-Time

Frequency Range

ns

t_UGATEx

R

_TON= 56kΩ

V

--

400

466

--

t_LGATEx

f_SMPS1

f_SMPS2

f_ASM

V_FBx= 1.8V

SMPS1 Operating Frequency

SMPS2 Operating Frequency

RT8239C, V_PHASEx= 50mV

200

233

25

--

kHz

--

Ultrasonic Mode Frequency

--

Soft-Start

Zero to 200mV Current Limit Threshold

from ENTRIPx Enable

Soft-Start Time

--

2

--

ms

t_SSx

Current Sense

Current Limit Current Source

Temperature Coefficient of

I_ENTRIPx

9.4

--

10

10.6

--

μA

I_ENTRIPx

V_ENTRIPx= 0.9V

4700

On The Basis of 25°C

ppm/°C

Current Limit Adjustment

Range

0.5

--

2.7

V

V_ENTRIPx= I_ENTRIPxx R_ENTRIPx

Current Limit Threshold

Zero-Current Threshold

180

--

200

3

225

--

mV

V_ENTRIPx

V_ZC

GND − PHASEx, V_ENTRIPx= 2V

GND − PHASEx, FBx = 2.1V

Internal Regulator and Reference

4.8

5

5.2

V_BYP1= 0V, I_LDO5< 100mA

V_BYP1= 0V, I_LDO5< 100mA ,

6.5V < V_IN< 25V

4.75

--

5.25

LDO5 Output Voltage

V

V_LDO5

V_BYP1= 0V, I_LDO5< 50mA,

5.5V < V_IN< 25V

4.75

--

5.25

--

LDO5 Output Current

5V Switchover Threshold

5V Switch R_DS(ON)

I_SHORT5

V_BYP1TH

R_BYPSW

V_BYP1= 0V, V_LDO5= 4.5V

225

mA

V

Falling Edge, Rising Edge with FB1

Regulation Point

4.53 4.66 4.79

V_BYP1= 5V, I_LDO5= 50mA

V_BYP1= 0V, I_LDO3< 100mA

V_BYP1= 5V, I_LDO3< 100mA

V_BYP1= 0V, V_LDO3= 2.9V

--

3.2

--

1.5

3.3

150

3

Ω

3.46

--

V

LDO3 Output Voltage

V_LDO3

LDO3 Output Current

I_SHORT3

mA

V

UVLO

Rising Edge

Falling Edge

Both SMPS Off

--

3.9

--

4.35

4.05

2.2

4.5

4.2

--

LDO5 UVLO Threshold

V_UVLO5

V_UVLO3

LDO3 UVLO Threshold

Power Good

PGOOD Detect, Rising edge with

soft-start delay time. Hysteresis = 2.5%

PGOOD Threshold

V_PGOOD

−14

−10

−6

%

PGOOD Propagation Delay t_{PD_PGOOD}Falling Edge

--

5

--

μs

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DS8239A/B/C-06 October 2012

RT8239A/B/C

Parameter

Symbol

Test Conditions

Min

--

Typ

--

Max Unit

PGOOD Leakage Current

PGOOD Output Low Voltage

I

High State, Forced to 5.5V

1

μA

LK_PGOOD

V

I

= 4mA

--

0.4

V

SINK_PGOOD SINK

SECFB Power Good

Threshold

SECFB with Respect to 2V

(RT8239B/C)

V

40

50

60

%

SFB_PGOOD

Fault Detection

Over Voltage Protection Trip

Threshold

V

t

OVP Detect, FBx Rising Edge

Rising Edge

108

--

112

5

116

--

%

OVP

Over Voltage Protection

Propagation Delay

μs

DLY_OVP

V

UVP Detect, FBx Falling Edge.

53

58

--

63

%

V

UVP

Under Voltage Protection Trip

Threshold

V

UVP Detect, SECFB Falling Edge.

0.8

1.2

SFB_UVP

Under Voltage Protection

Shutdown Blanking Time

t

From ENTRIPx or ENM Enable

--

5

--

ms

SSHx

Thermal Shutdown

T_SD

--

150

10

--

°C

Thermal Shutdown Hysteresis ΔT

SD

Logic Input

ENTRIPx Input Voltage

V

Clear Fault Level/SMPSx Off Level

Rising Edge Threshold

4.5

1.2

0.9

--

2

1

V

ENTRIPx

1.6

Falling Edge Threshold

0.95

ENLDO Input Voltage

V

ENLDO

ENM

When ENLDO is Floating (Default

Enable)

2.1

--

Clear Fault Level/SMPSs Off Level

SMPSs On, DEM Operation

--

0.8

3.6

ENM Input Voltage

(RT8239A)

2.3

V

SMPSs On, Ultrasonic Mode

Operation

4.5

--

1

3

I

V

= 0V or 5V

FBx

−1

FBx

Input Leakage Current

ENM/SECFB = 0V or 5V

ENLDO = 0V or 5V

I

μA

P13

I

ENLDO

Internal BOOT Switch

Internal Boost Charging

Switch On-Resistance

LDO5 to BOOTx, 10mA

--

90

R

BOOTx

Ω

Power MOSFET Drivers

--

5

2

8

4

8

3

--

R

Source, V

Sink, V

− V

= 0.1V

UGATEsr

UGATEsk

LGATEsr

LGATEsk

BOOTx

UGATEx

UGATEx On-Resistance

Ω

− V

= 0.1V

UGATEx

PHASEx

5

Source, V

− V

LGATEx

LDO5

LGATEx On-Resistance

Dead Time

1.5

30

40

Sink, V

= 0.1V

LGATEx

UGATEx Off to LGATEx On

LGATEx Off to UGATEx On

t

LGATERx

ns

t

UGATERx

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RT8239A/B/C

Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are

stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in

the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may

affect device reliability.

Note 2. θ_JAis measured at T_A= 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θ_JCis

measured at the exposed pad of the package.

Note 3. Devices are ESD sensitive. Handling precaution is recommended.

Note 4. The device is not guaranteed to function outside its operating conditions.

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DS8239A/B/C-06 October 2012

RT8239A/B/C

Typical Operating Characteristics

V_OUT1Efficiency vs. Load Current

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

DEM

ASM

DEM

ASM

60

50

40

30

20

V_IN= 8V, R_TON= 100kΩ, V_ENTRIP1= 1.5V

V_ENTRIP2= 5V, ENLDO = 5V

0

V_IN= 12V, R_TON= 100kΩ, V_ENTRIP1= 1.5V

10

V_ENTRIP2= 5V, ENLDO = 5V

0.001

0.01

0.1

1

10

0.001

0.01

0.1

1

10

Load Current (A)

V_OUT1Efficiency vs. Load Current

V_OUT2Efficiency vs. Load Current

100

90

80

70

60

50

40

30

20

10

0

90

80

70

60

50

40

30

20

10

0

DEM

ASM

DEM

ASM

V_IN= 20V, R_TON= 100kΩ, V_ENTRIP1= 1.5V

_ENTRIP2= 5V, ENLDO = 5V

V_IN= 8V, R_TON= 100kΩ, V_ENTRIP1= 5V,

V_ENTRIP2= 1.5V, ENLDO = 5V

V

0.001

0.01

0.1

1

10

0.001

0.01

0.1

1

Load Current (A)

V_OUT2Efficiency vs. Load Current

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

DEM

ASM

DEM

ASM

V_IN= 12V, R_TON= 100kΩ, V_ENTRIP1= 5V,

V_ENTRIP2= 1.5V, ENLDO = 5V

V_IN= 20V, R_TON= 100kΩ, V_ENTRIP1= 5V,

V_ENTRIP2= 1.5V, ENLDO = 5V

0.001

0.01

0.1

1

10

0.001

0.01

0.1

1

Load Current (A)

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RT8239A/B/C

V_OUT1Switching Frequency vs. Load Current

260

240

220

200

180

160

140

120

100

80

V_IN= 12V, R_TON= 100kΩ,

ENLDO = VIN, V_ENTRIP1= 1.5V,

V_ENTRIP2= 5V

V_IN= 8V, R_TON= 100kΩ,

ENLDO = VIN, V_ENTRIP1= 1.5V,

V_ENTRIP2= 5V

240

220

200

180

160

140

120

100

80

ASM

DEM

ASM

DEM

60

40

20

0

0.001

0.01

0.1

1

10

0.001

0.01

0.1

1

10

Load Current (A)

V_OUT1Switching Frequency vs. Load Current

V_OUT2Switching Frequency vs. Load Current

260

280

V_IN= 20V, R_TON= 100kΩ,

ENLDO = VIN, V_ENTRIP1= 1.5V,

V_ENTRIP2= 5V

V_IN= 8V, R_TON= 100kΩ,

ENLDO = VIN, V_ENTRIP1= 5V,

V_ENTRIP2= 1.5V

260

240

220

200

180

160

140

120

100

80

240

220

200

180

160

140

120

100

80

ASM

DEM

ASM

DEM

60

40

20

0

0.001

0.01

0.1

1

10

0.001

0.01

0.1

1

10

Load Current (A)

V_OUT2Switching Frequency vs. Load Current

300

V_IN= 12V, R_TON= 100kΩ,

ENLDO = VIN, V_ENTRIP1= 5V,

V_ENTRIP2= 1.5V

V_IN= 20V, R_TON= 100kΩ,

ENLDO = VIN, V_ENTRIP1= 5V,

V_ENTRIP2= 1.5V

280

260

240

220

200

180

160

140

120

100

80

280

260

240

220

200

180

160

140

120

100

80

ASM

DEM

ASM

DEM

60

40

20

0

0.001

0.01

0.1

1

10

0.001

0.01

0.1

1

10

Load Current (A)

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DS8239A/B/C-06 October 2012

RT8239A/B/C

V_OUT2Output Voltage vs. Load Current

V_OUT1Output Voltage vs. Load Current

5.034

5.031

5.028

5.025

5.022

5.019

5.016

5.013

5.010

3.420

3.414

3.408

3.402

3.396

3.390

3.384

3.378

3.372

ASM

DEM

ASM

DEM

V_IN= 12V, R_TON= 100kΩ, ENLDO = VIN,

V_ENTRIP1= 1.5V, V_ENTRIP2= 5V

V_IN= 12V, R_TON= 100kΩ, ENLDO = VIN,

V_ENTRIP1= 5V, V_ENTRIP2= 1.5V

0.001

0.01

0.1

1

10

0.001

0.01

0.1

1

10

Load Current (A)

LDO5 Output Voltage vs. Output Current

LDO3 Output Voltage vs. Output Current

5.072

5.068

5.064

5.060

5.056

5.052

5.048

3.354

3.352

3.350

3.348

3.346

3.344

3.342

3.340

3.338

3.336

3.334

V_IN= 12V, V_ENTRIP1= V_ENTRIP2= 5V, ENLDO = VIN

0

10 20 30 40 50 60 70 80 90 100

Output Current (mA)

0

10 20 30 40 50 60 70 80 90 100

Output Current (mA)

No Load Battery Current vs. Input Voltage

Standby Input Current vs. Input Voltage

100

10

1

240

238

236

234

232

230

228

226

ASM

DEM

R_TON= 100kΩ, V_ENTRIP1= V_ENTRIP2=1.5V,

EVLDO = VIN

V_ENTRIP1= V_ENTRIP2= 5V, ENLDO = VIN, No Load

0.1

6 7 8 9 10 11 12 13 14 1516 17 18 19 20 21 22 23 24 25

Input Voltage (V)

6

8

10 12 14 16 18 20 22 24 26

Input Voltage (V)

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RT8239A/B/C

Power On from ENLDO

Shutdown Input Current vs. Input Voltage

22

21

20

19

18

17

16

15

14

13

12

11

10

LDO5

(2V/Div)

LDO3

(2V/Div)

CP

(10V/Div)

ENLDO

(10V/Div)

V_IN= 12V, V_ENTRIP1= V_ENTRIP2= 1.5V

V_ENTRIP1= V_ENTRIP2= 5V, ENLDO = GND, No Load

ENLDO = VIN, R_TON= 100kΩ, No Load

6

8

10 12 14 16 18 20 22 24 26

Input Voltage (V)

Time (2ms/Div)

Power Off from ENM

Power On from ENM

V_IN= 12V, V_ENM= 5V, R_TON= 100kΩ,

V_ENTRIP1= V_ENTRIP2= 1.5V,

ENLDO = VIN, No Load

RT8239A

V_OUT1

(5V/Div)

V_OUT2

V_OUT1

(2V/Div)

V_OUT2

(5V/Div)

(2V/Div)

PGOOD

(5V/Div)

PGOOD

(5V/Div)

ENM

(5V/Div)

V_IN= 12V, V_ENM= 5V, R_TON= 100kΩ

V_ENTRIP1= V_ENTRIP2= 1.5V, ENLDO = VIN, No Load

Time (1ms/Div)

Time (10ms/Div)

Power On from ENTRIP1

Power Off from ENTRIP1

RT8239B/C

V_OUT1

(2V/Div)

PGOOD

(5V/Div)

PGOOD

(5V/Div)

ENTRIP1

(5V/Div)

ENTRIP1

(5V/Div)

V_IN= 12V, V_ENTRIP1= V_ENTRIP2= 1.5V,

ENLDO = VIN, R_TON= 100kΩ, No Load

V_IN= 12V, V_ENTRIP1= V_ENTRIP2= 1.5V,

ENLDO = VIN, R_TON= 100kΩ, No Load

V_IN= 12V, V_ENTRIP1= V_ENTRIP2= 1.5V,

Time (1ms/Div)

Time (4ms/Div)

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DS8239A/B/C-06 October 2012

RT8239A/B/C

Power On from ENTRIP2

Power Off from ENTRIP2

RT8239B/C

V_OUT2

(1V/Div)

PGOOD

(10V/Div)

PGOOD

(5V/Div)

ENTRIP2

(5V/Div)

ENTRIP2

(5V/Div)

V_IN= 12V, V_ENTRIP1= V_ENTRIP2= 1.5V,

ENLDO = VIN, R_TON= 100kΩ, No Load

Time (1ms/Div)

Time (20ms/Div)

V_OUT1DEM-MODE Load Transient Response

V_OUT2DEM-MODE Load Transient Response

V_{OUT2_AC}

(50mV/Div)

V_{OUT1_AC}

(50mV/Div)

UGATE2

(20V/Div)

UGATE1

(20V/Div)

LGATE1

(5V/Div)

LGATE2

(5V/Div)

Inductor

Current

(5A/Div)

Inductor

Current

(5A/Div)

V_IN= 12V, R_TON= 100kΩ,

ENLDO = VIN, I_OUT2=1A to 8A

V_IN= 12V, R_TON= 100kΩ,

ENLDO = VIN, I_OUT1=1A to 8A

Time (20μs/Div)

OVP

UVP

V_OUT1

(2V/Div)

PGOOD

(5V/Div)

UGATE1

(50V/Div)

LGATE1

(10V/Div)

PGOOD

(5V/Div)

V_OUT2

(2V/Div)

V_IN= 12V, R_TON= 100kΩ, ENLDO = VIN, No Load

V_IN= 12V, R_TON= 100kΩ, ENLDO = VIN

Time (100μs/Div)

Time (10ms/Div)

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RT8239A/B/C

Application Information

The RT8239A/B/C is a dual, Mach Response^TMDRV^TM

mode synchronous buck controller targeted for notebook

system power supply solutions. RICHTEK's Mach

Response^TMtechnology provides fast response to load

steps. The topology circumvents the poor load transient

timing problems of fixed frequency current mode PWMs

while avoiding the problems caused by widely varying

switching frequency in conventional constant on-time and

constant off-time PWM schemes. A special adaptive on-

time control trades off the performance and efficiency over

wide input voltage range. The RT8239A/B/C includes 5V

(LDO5) and 3.3V (LDO3) linear regulators. The LDO5 linear

regulator steps down the battery voltage to supply both

internal circuitry and gate drivers. The synchronous switch

gate drivers are directly powered by LDO5. When V_OUT1

rises above 4.66V, an automatic circuit disconnects the

linear regulator and allows the device to be powered by

V_OUT1via the BYP1 pin.

measured by V_INand proportional to the output voltage.

There are two benefits of a constant switching frequency.

First, the frequency can be selected to avoid noise

sensitive regions such as the 455kHz IF band. Second,

the inductor ripple current operating point remains

relatively constant, resulting in easy design methodology

and predictable output voltage ripple. The frequency for

3V SMPS is set higher than the frequency for 5V SMPS.

This is done to prevent audio frequency “beating” between

the two sides, which switch asynchronously for each side.

The TON pin is connected to GND through the external

resistor, R_TON, to set the switching frequency.

The RT8239A/B/C adaptively changes the operation

frequency according to the input voltage. Higher input

voltage usually comes from an external adapter, so the

RT8239A/B/C operates with higher frequency to have

better performance. Lower input voltage usually comes

from a battery, so the RT8239A/B/C operates with lower

switching frequency for lower switching losses. For a

specific input voltage range, the switching cycle period is

given by :

PWM Operation

The Mach Response^TMDRV^TMmode controller relies on

the output filter capacitor's Effective Series Resistance

(ESR) to act as a current sense resistor, so that the output

ripple voltage provides the PWM ramp signal. Referring to

the RT8239A/B/C's Function Block Diagram, the

synchronous high side MOSFET will be turned on at the

beginning of each cycle. After the internal one-shot timer

expires, the MOSFET will be turned off. The pulse width

of this one-shot is determined by the converter's input

voltage and the output voltage to keep the frequency fairly

constant over the entire input voltage range. Another one-

shot sets a minimum off-time (400ns typ). The on-time

one-shot will be triggered if the error comparator is high,

the low side switch current is below the current limit

threshold, and the minimum off-time one-shot has timed

out.

For 5.5V < V_IN< 6.5V :

t_S1= 61.28p x R_TON

t_S2= 44.43p x R_TON

For 6.5V < V_IN< 12V :

t_S1= 51.85p x R_TON

t_S2= 44.43p x R_TON

For 12V < V_IN< 25V :

t_S1= 45.75p x R_TON

t_S2= 39.2p x R_TON

The on-time guaranteed in the Electrical Characteristics

table is influenced by switching delays in the external

high side power MOSFET. Two external factors that

influence switching frequency accuracy are resistive drops

in the two conduction loops (including inductor and PC

board resistance) and the dead time effect. These effects

are the largest contributors to the change of frequency

with changing load current. The dead time effect increases

the effective on-time by reducing the switching frequency

PWM Frequency and On-time Control

For each specific input voltage range, the Mach

Response^TMcontrol architecture runs with pseudo constant

frequency by feed forwarding the input and output voltage

into the on-time one-shot timer. The high side switch on-

time is inversely proportional to the input voltage as

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DS8239A/B/C-06 October 2012

RT8239A/B/C

as one or both dead times. It occurs only in PWM mode

when the inductor current reverses at light or negative

load currents. With reversed inductor current, the

inductor's EMF causes PHASEx to go high earlier than

normal, hence extending the on-time by a period equal to

the low to high dead time. For loads above the critical

conduction point, the actual switching frequency is :

load current is further decreased, it takes longer and longer

time to discharge the output capacitor to the level that

requires the next “ON” cycle. The on-time is kept the

same as that in the heavy load condition. In reverse, when

the output current increases from light load to heavy load,

the switching frequency increases to the preset value as

the inductor current reaches the continuous conduction.

The transition load point to the light load operation is shown

in Figure 3. and can be calculated as follows :

f = (V_OUT+ V_DROP1) / (t_ONx (V_IN+ V_DROP1− V_DROP2))

where V_DROP1is the sum of the parasitic voltage drops in

the inductor discharge path, including synchronous

rectifier, inductor, and PC board resistances; V_DROP2is

the sum of the resistances in the charging path; and t_ON

is the on-time calculated by the RT8239A/B/C.

I

L

Slope = (V -V

)/L

IN OUT

I

t

PEAK

I

/2

LOAD = PEAK

Operation Mode Selection

The RT8239A/B supports two operation modes : Diode

Emulation Mode and Ultrasonic Mode. The RT8239C only

supports Ultrasonic Mode. The operation mode can be

set via the ENM pin for RT8239A or SECFB pin for

RT8239B.

0

t

ON

Figure 3. Boundary condition of CCM/DEM

(V_IN− V_OUT

)

I_LOAD(SKIP)

≈

×t_ON

2L

Table 1. Operation Mode Setting

where t_ONis the on-time.

Part Number

RT8239A RT8239B RT8239C

The switching waveforms may appear noisy and

asynchronous when light loading causes diode emulation

operation. This is normal and results in high efficiency.

Trade offs in PFM noise vs. light load efficiency is made

by varying the inductor value.Generally, low inductor values

produce a broader efficiency vs. load curve, while higher

values result in higher full load efficiency (assuming that

the coil resistance remains fixed) and less output voltage

ripple. Penalties for using higher inductor values include

larger physical size and degraded load transient response

(especially at low input voltage levels).

Pin Name

ENM

SECFB

Pin-13

Voltage Range

Mode State

4.5V to 5V

2.3V to 3.6V

1.2V to 1.8V

Below 0.8V

ASM

DEM

ASM

DEM

ASM

UVP

ASM

UVP

ASM

Shutdown

Diode Emulation Mode

In Diode Emulation Mode, the RT8239A/B automatically

reduces switching frequency at light load conditions to

maintain high efficiency. This reduction of frequency is

achieved smoothly. As the output current decreases from

heavy-load condition, the inductor current is also reduced,

and eventually comes to the point that its current valley

touches zero, which is the boundary between continuous

conduction and discontinuous conduction modes. By

emulating the behavior of diodes, the low side MOSFET

allows only partial negative current to flow when the

inductor free wheeling current becomes negative. As the

Ultrasonic Mode

The RT8239A/B/C activates a unique type of Diode

Emulation Mode with a minimum switching frequency of

25kHz, called Ultrasonic Mode. This mode eliminates

audio-frequency modulation that would otherwise be

present when a lightly loaded controller automatically

skips pulses. In Ultrasonic Mode, the low side switch gate

driver signal is “OR”ed with an internal oscillator

(>25kHz). Once the internal oscillator is triggered, the

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17

RT8239A/B/C

ultrasonic controller pulls LGATEx high and turns on the

low side MOSFET to induce a negative inductor current.

After the output voltage falls below the reference voltage,

the controller turns off the low side MOSFET (LGATEx

pulled low) and triggers a constant on-time (UGATExdriven

high). When the on-time has expired, the controller re-

enables the low side MOSFET until the controller detects

that the inductor current dropped below the zero crossing

threshold.

GND sets the current limit threshold. The resistor, R_ILIM,

is connected to a current source from ENTRIPxwhich is

10μA(typ.) at room temperature. The current source has

a 4700ppm/°C temperature slope to compensate the

temperature dependency of the R_DS(ON). When the voltage

drop across the sense resistor or low side MOSFET

equals 1/10 the voltage across the R_ILIMresistor, positive

current limit will be activated. The high side MOSFET will

not be turned on until the voltage drop across the MOSFET

falls below 1/10 the voltage across the R_ILIMresistor.

Linear Regulators (LDOx)

Choose a current limit resistor according to the following

equation :

The RT8239A/B/C includes 5V (LDO5) and 3.3V (LDO3)

linear regulators. The regulators can supply up to 100mA

for external loads. Bypass LDOx with a minimum 4.7μF

ceramic capacitor. When V_OUT1is higher than the switch

over threshold (4.66V), an internal 1.5Ω P-MOSFET switch

connects BYP1 to the LDO5 pin while simultaneously

disconnects the internal linear regulator.

V_ILIM= (R_ILIMx 10μA) / 10 = I_ILIMx R_DS(ON)

R_ILIM= (I_ILIMx R_DS(ON)) x 10 / 10μA

Carefully observe the PC board layout guidelines to ensure

that noise andDC errors do not corrupt the current sense

signal at PHASEx and GND. Mount or place the IC close

to the low side MOSFET.

Current Limit Setting (ENTRIPx)

The RT8239A/B/C has cycle-by-cycle current limit control.

The current limit circuit employs a unique “valley” current

sensing algorithm. If the magnitude of the current sense

signal at PHASEx is above the current limit threshold,

the PWM is not allowed to initiate a new cycle (Figure 4).

The actual peak current is greater than the current limit

threshold by an amount equal to the inductor ripple current.

Therefore, the exact current limit characteristic and

maximum load capability are a function of the sense

resistance, inductor value, and battery and output voltage.

Charge Pump (SECFB)

The external 14V charge pump is driven by LGATEx. When

LGATEx is low, C1 will be charged by V_OUT1through D1.

C1 voltage is equal to V_OUT1minus the diode drop. When

LGATEx becomes high, C1 transfers the charge to C2

through D2 and charges C2 voltage to V_LGATEXplus C1

voltage. As LGATEx transitions low on the next cycle, C3

is charged to C2 voltage minus a diode drop throughD3.

Finally, C3 charges C4 throughD4 when LGATEx switches

high. Thus, the total charge pump voltage, V_CP, is :

I

L

V_CP= V_OUT1+ 2 x V_LGATEx− 4 x V_D

I

PEAK

LOAD

where V_LGATExis the peak voltage of the LGATEx driver

which is equal to LDO5 and V_Dis the forward voltage

dropped across the Schottky diode.

I

t

LIMIT

The SECFB pin in the RT8239B/C is used to monitor the

charge pump via a resistive voltage divider to generate

approximately 14V DC voltage and the clock driver uses

V_OUT1as its power supply. In the event where SECFB

drops below its feedback threshold, an ultrasonic pulse

will occur to refresh the charge pump driven by LGATEx.

If there's an overload on the charge pump in which SECFB

can not reach more than its feedback threshold, the

Figure 4. “Valley” Current Limit

The RT8239A/B/C uses the on resistance of the

synchronous rectifier as the current sense element and

supports temperature compensated MOSFET R_DS(ON)

sensing. The R_ILIMresistor between the ENTRIPx pin and

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DS8239A/B/C-06 October 2012

RT8239A/B/C

V

controller will enter Ultrasonic Mode. Special care should

be taken to ensure that enough normal ripple voltage is

present on each cycle to prevent charge pump shutdown.

IN

UGATEx

BOOTx

R

BOOT

The robustness of the charge pump can be increased by

reducing the charge pump decoupling capacitor and placing

a small ceramic capacitor, C_F(47pF to 220pF), in parallel

with the upper leg of the SECFB resistor feedback network,

R_CP1, as shown below in Figure 5.

PHASEx

Figure 6. Increasing the UGATEx Rise Time

Soft-Start

SECFB

R

CP2

LGATE1

VOUT1

The RT8239A/B/C provides an internal soft-start function

to prevent large inrush current and output voltage overshoot

when the converter starts up. The soft-start (SS)

automatically begins once the chip is enabled.During soft-

start, the internal current limit circuit gradually ramps up

the inductor current from zero. The maximum current limit

value is set externally as described in previous section.

The soft-start time is determined by the current limit level

and output capacitor value. The current limit threshold ramp

up time is typically 2ms from zero to 200mV after

ENTRIPx is enabled. A unique PWM duty limit control

that prevents output over voltage during soft-start period

is designed specifically for FBx floating.

C1

C3

C

F

R

CP1

Charge Pump

D1

D2

D3

C2

D4

C4

Figure 5. Charge pump circuit connected to SECFB

MOSFET Gate Driver (UGATEx, LGATEx)

The high side driver is designed to drive high current, low

R_DS(ON)N-MOSFET(s). When configured as a floating driver,

5V bias voltage is delivered from the LDO5 supply. The

average drive current is also calculated by the gate charge

at V_GS= 5V times switching frequency. The instantaneous

drive current is supplied by the flying capacitor between

BOOTx and PHASEx pins. A dead time to prevent shoot

through is internally generated from high side MOSFET

off to low side MOSFET on and low side MOSFET off to

high side MOSFET on.

UVLO Protection

The RT8239A/B/C has LDO5 under voltage lock out

protection (UVLO). When the LDO5 voltage is lower than

4.05V (typ.) and the LDO3 voltage is lower than 2.2V (typ.),

both switch power supplies are shut off. This is a non-

latch protection.

The low side driver is designed to drive high current low

R_DS(ON)N-MOSFET(s). The internal pull down transistor

that drives LGATEx low is robust, with a 1.5Ω typical on-

resistance. A 5V bias voltage is delivered from the LDO5

supply. The instantaneous drive current is supplied by an

input capacitor connected between LDO5 andGND.

Power Good Output (PGOOD)

PGOOD is an open-drain type output and requires a pull

up resistor. PGOOD is actively held low in soft-start,

standby, and shutdown. It is released when both output

voltages are above 90% of the nominal regulation point

for RT8239A. For RT8239B/C, besides requiring both

output voltages to be above 90% of nominal regulation

point, the SECFB threshold must also be above 50% of

nominal regulation point in order for PGOODto be released.

The PGOOD signal goes low if either output turns off or is

10% below its nominal regulation point.

For high current applications, some combinations of high

and low side MOSFETs may cause excessive gate drain

coupling, which leads to efficiency killing, EMI producing,

shoot through currents. This is often remedied by adding

a resistor in series with BOOTx, which increases the turn

on time of the high side MOSFET without degrading the

turn-off time. See Figure 6.

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19

RT8239A/B/C

Output Over Voltage Protection (OVP)

overloading LDOx can cause large power dissipation on

automatic switches, which may still result in thermal

shutdown.

The output voltage can be continuously monitored for over

voltage. If the output voltage exceeds 12% of its set voltage

threshold, the over voltage protection is triggered and the

LGATEx low side gate drivers are forced high. This

activates the low side MOSFET switch, which rapidly

discharges the output capacitor and pulls the input voltage

downward.

Discharge Mode (Soft Discharge)

When ENTRIPx is low and a transition to standby or

shutdown mode occurs, or the output under voltage fault

latch is set, the output discharge mode will be triggered.

During discharge mode, an internal switch creates a path

for discharging the output capacitors' residual charge to

GND.

The RT8239A/B/C is latched once OVP is triggered and

can only be released by either toggling ENLDO, ENTRIPx

or cycling VIN. There is a 5μs delay built into the over

voltage protection circuit to prevent false transition.

Shutdown Mode

SMPS1, SMPS2, LDO3 and LDO5 all have independent

enabling control. Drive ENLDO, ENTRIP1 and ENTRIP2

below the precise input falling edge trip level to place the

RT8239A/B/C in its low power shutdown state. The

RT8239A/B/C consumes only 20μA of input current while

in shutdown. When shutdown mode is activated, the

reference turns off. The accurate 0.95V falling edge

threshold on ENLDO can be used to detect a specific

analog voltage level and to shutdown the device. Once in

shutdown, the 1.6V rising edge threshold activates,

providing sufficient hysteresis for most applications.

Note that latching LGATEx high will cause the output

voltage to dip slightly negative due to previously stored

energy in the LC tank circuit. For loads that cannot tolerate

a negative voltage, place a power Schottky diode across

the output to act as a reverse polarity clamp.

If the over voltage condition is caused by a short in high

side switch, turning the low side MOSFET on 100% will

create an electrical short between the battery and GND,

hence blowing the fuse and disconnecting the battery from

the output.

Output Under Voltage Protection (UVP)

Power Up Sequencing and On/Off Controls

(ENTRIPx, ENM)

The output voltage can be continuously monitored for under

voltage. If the output is less than 58% of its set voltage

threshold, the under voltage protection will be triggered

and then both UGATEx and LGATEx gate drivers will be

forced low. The UVP is ignored for at least 5ms (typ.)

after a start up or a rising edge on ENTRIPx. Toggle

ENTRIPx or cycle VIN to reset the UVP fault latch and

restart the controller.

ENTRIP1 and ENTRIP2 control SMPS power up

sequencing. When the RT8239A/B/C is applied in the

single channel mode, ENTRIPx disables the respective

output when ENTRIPx voltage rises above 4.5V.

Furthermore, when the RT8239A is applied in the dual

channel mode, the outputs are enabled when ENM voltage

rises above 2.3V.

Thermal Protection

The RT8239A/B/C features thermal shutdown to prevent

damage from excessive heat dissipation. Thermal

shutdown occurs when the die temperature exceeds

150°C. All internal circuitry is inactive during thermal

shutdown. The RT8239A/B/C triggers thermal shutdown

if LDOx is not supplied from V_OUTx, while input voltage on

VIN and drawing current from LDOx are too high.

Nevertheless, even if LDOx is supplied from V_OUTx

,

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DS8239A/B/C-06 October 2012

RT8239A/B/C

Table1. Operation Mode Truth Table

Mode

Condition

Comment

Transitions to discharge mode after VIN POR and

after REF becomes valid. LDO5 and LDO3 remain

active.

Power Up

LDOx < UVLO threshold

ENLDO = high, V_OUT1or V_OUT2are

enabled

Run

Normal Operation.

LGATEx is forced high. LDO3 and LDO5 are active.

Either output > 112% of the nominal level. Exit by VIN POR or by toggling ENLDO, ENTRIPx,

and ENM.

Over Voltage

Protection

Both UGATEx and LGATEx are forced low and

Either output < 58% of the nominal level

enter discharge mode. LDO3 and LDO5 are active.

after 3ms time-out expires and output is

Exit by VIN POR or by toggling ENLDO, ENTRIPx,

enabled

Under Voltage

Protection

and ENM.

During discharge mode, there is one path to

Either output is still high in standby mode

discharge the output capacitors’ residual charge to

or shutdown mode

Discharge

GND via an internal switch.

ENTRIPx or ENM < startup threshold,

LDO3 and LDO5 are active.

ENLDO = high.

Standby

Shutdown

ENLDO = low

All circuitry are off.

Thermal

Shutdown

All circuitry are off. Exit by VIN POR or by toggling

ENLDO, ENTRIPx, and ENM.

T_J> 150°C

Table 2. Power up Sequencing (RT8239A)

ENTRIP1

ENTRIP2

(V)

ENLDO (V)

ENM (V)

Low

LDO5

Off

LDO3

Off

SMPS1

Off

SMPS2

Off

(V)

Low

X

“>1.6V”

=> High

Low

X

On

Off

“>1.6V”

=> High

“>2.3V”

=> High

Off

On

Off

On

Off

On

Off

On

Off

On

Off

“>1.6V”

=> High

“>2.3V”

=> High

“>1.6V”

=> High

“>2.3V”

=> High

“>1.6V”

=> High

“>2.3V”

=> High

©

is a registered trademark of Richtek Technology Corporation.

DS8239A/B/C-06 October 2012

www.richtek.com

21

RT8239A/B/C

Output Voltage Setting (FBx)

Output Capacitor Selection

Connect a resistive voltage divider at the FBx pin between

V_OUTxand GND to adjust the output voltage between 2V

and 5.5V (Figure 7). Choose R2 to be approximately 10kΩ,

and solve for R1 using the equation :

The capacitor value and ESR determine the amount of

output voltage ripple and load transient response. Thus,

the capacitor value must be greater than the largest value

calculated from below equations.

(ΔI_LOAD)²×L×(t_ON+ t_OFF(MIN)

)

⎛

R1 ⎞

⎛

⎞

V

= V

× 1+

V_SAG

=

OUT

FBx

⎜

⎝

⎟⎟

R2

⎠

⎡

⎤

)

⎝

⎠

2×C_OUT× V ×t_ON− V_OUTx(t_ON+ t_OFF(MIN)

IN

⎣

⎦

where V_FBxis 2V (typ.).

(ΔI_LOAD)²×L

2×C_OUT× V_OUTx

V_SOAR

=

V

IN

⎛

⎞

⎟

⎠

1

V_P−P= LIR×I_LOAD(MAX)× ESR +

⎜

UGATEx

8×C_OUT×f

⎝

VOUTx

PHASEx

LGATEx

where V_SAGand V_SOARare the allowable amount of

undershoot and overshoot voltage during load transient,

V_p-pis the output ripple voltage, and t_OFF(MIN)is the

minimum off-time.

R1

R2

PGND

FBx

GND

Thermal Considerations

For continuous operation, do not exceed absolute

maximum junction temperature. The maximum power

dissipation depends on the thermal resistance of the IC

package, PCB layout, rate of surrounding airflow, and

difference between junction and ambient temperature. The

maximum power dissipation can be calculated by the

following formula :

Figure 7. Setting V_OUTxwith a resistive voltage divider

Output Inductor Selection

The switching frequency (on-time) and operating point (%

ripple or LIR) determine the inductor value as shown

below :

t

×(V − V

)

ON

IN

OUTx

L =

P_D(MAX)= (T_J(MAX)− T_A) / θ_JA

LIR×I

LOAD(MAX)

where T_J(MAX)is the maximum junction temperature, T_Ais

the ambient temperature, and θ_JAis the junction to ambient

thermal resistance.

where LIR is the ratio of the peak-to-peak ripple current to

the average inductor current.

Find a low-loss inductor having the lowest possible DC

resistance that fits in the allotted dimensions. Ferrite cores

are often the best choice, although powdered iron is

inexpensive and can work well at 200kHz. The core must

be large enough not to saturate at the peak inductor

For recommended operating condition specifications, the

maximum junction temperature is 125°C. The junction to

ambient thermal resistance, θ_JA, is layout dependent. For

WQFN-20L 3x3 packages, the thermal resistance, θ_JA, is

30°C/W on a standard JEDEC 51-7 four-layer thermal test

board. The maximum power dissipation at T_A= 25°C can

be calculated by the following formula :

current, I_PEAK

:

I_PEAK= I_LOAD(MAX)+ [ (LIR / 2) x I_LOAD(MAX)

]

The calculation above shall serve as a general reference.

To further improve transient response, the output

inductance can be further reduced. Of course, besides

the inductor, the output capacitor should also be

considered when improving transient response.

P_D(MAX)= (125°C − 25°C) / (30°C/W) = 3.33W for

WQFN-20L 3x3 package

The maximum power dissipation depends on the operating

ambient temperature for fixed T_J(MAX)and thermal

©

is a registered trademark of Richtek Technology Corporation.

www.richtek.com

22

DS8239A/B/C-06 October 2012

RT8239A/B/C

resistance, θ_JA. The derating curve in Figure 8 allows the

designer to see the effect of rising ambient temperature

on the maximum power dissipation.

` Place ground terminal of VIN capacitor(s), V_OUTx

capacitor(s), and source of low side MOSFETs as close

to each other as possible. The PCB trace of PHASEx

node, which connects to source of high side MOSFET,

drain of low side MOSFET and high voltage side of the

inductor, should be as short and wide as possible.

3.6

Four-Layer PCB

3.0

2.4

1.8

1.2

0.6

0.0

0

25

50

75

100

125

Ambient Temperature (°C)

Figure 8. Derating Curve of Maximum PowerDissipation

Layout Considerations

Layout is very important in high frequency switching

converter design. Improper PCB layout can radiate

excessive noise and contribute to the converter’s

instability. Certain points must be considered before

starting a layout with the RT8239A/B/C.

` Place the filter capacitor close to the IC, within 12mm

(0.5 inch) if possible.

` Keep current limit setting network as close as possible

to the IC. Routing of the network should avoid coupling

to high-voltage switching node.

` Connections from the drivers to the respective gate of

the high side or the low side MOSFET should be as

short as possible to reduce stray inductance. Use

0.65mm (25 mils) or wider trace.

` All sensitive analog traces and components such as

FBx, ENTRIPx, PGOOD, and TON should be placed

away from high voltage switching nodes such as

PHASEx, LGATEx, UGATEx, or BOOTx nodes to avoid

coupling. Use internal layer(s) as ground plane(s) and

shield the feedback trace from power traces and

components.

©

is a registered trademark of Richtek Technology Corporation.

DS8239A/B/C-06 October 2012

www.richtek.com

23

RT8239A/B/C

Outline Dimension

1

2

1

2

DETAILA

Pin #1 ID and Tie Bar Mark Options

Note : The configuration of the Pin #1 identifier is optional,

but must be located within the zone indicated.

Dimensions In Millimeters

Dimensions In Inches

Symbol

Min

Max

Min

Max

A

A1

A3

b

0.700

0.000

0.175

0.150

2.900

1.650

2.900

1.650

0.800

0.050

0.250

3.100

1.750

3.100

1.750

0.028

0.000

0.007

0.006

0.114

0.065

0.114

0.065

0.031

0.002

0.010

0.122

0.069

0.122

0.069

D

D2

E

E2

e

0.400

0.016

L

0.350

0.450

0.014

0.018

W-Type 20L QFN 3x3 Package

Richtek Technology Corporation

5F, No. 20, Taiyuen Street, Chupei City

Hsinchu, Taiwan, R.O.C.

Tel: (8863)5526789

Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should

obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot

assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be

accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third

parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.

www.richtek.com

24

DS8239A/B/C-06 October 2012


型号：	RT8239BGQW
厂家：	RICHTEK TECHNOLOGY CORPORATION
描述：	High Efficiency, Main Power Supply Controller for Notebook Computers
文件：	总24页 (文件大小：385K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

RT8239BGQW [RICHTEK]

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