RT8250GSP [RICHTEK]

IC REG BUCK ADJ 3A SYNC 8SOP;
RT8250GSP
型号: RT8250GSP
厂家: RICHTEK TECHNOLOGY CORPORATION    RICHTEK TECHNOLOGY CORPORATION
描述:

IC REG BUCK ADJ 3A SYNC 8SOP

文件: 总12页 (文件大小:206K)
中文:  中文翻译
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RT8250  
3A, 23V, 340kHz Synchronous Step-Down Converter  
General Description  
Features  
4.5V to 23V Input Voltage Range  
The RT8250 is a high-efficiency synchronous step-down  
DC/DC converter that can deliver up to 3Aoutput current  
from 4.5V to 23V input supply. The RT8250's current mode  
architecture and external compensation allow the transient  
response to be optimized over a wide range of loads and  
output capacitors. Cycle-by-cycle current limit provides  
protection against shorted outputs and soft-start eliminates  
input current surge during start-up. The RT8250 also  
provides output under voltage protection and thermal  
shutdown protection. The low current (<3μA) shutdown  
mode provides output disconnection, enabling easy power  
management in battery-powered systems.  
1.5% High Accuracy Feedback Voltage  
3A Output Current  
Integrated N-MOSFET Switches  
Current Mode Control  
Fixed Frequency Operation : 340kHz  
Output Adjustable from 0.925V to 20V  
Up to 95% Efficiency  
Programmable Soft-Start  
Stable with Low-ESR Ceramic Output Capacitors  
Cycle-by-Cycle Over Current Protection  
Input Under Voltage Lockout  
Output Under Voltage Protection  
Thermal Shutdown Protection  
Thermally Enhanced SOP-8 (Exposed Pad) Package  
RoHS Compliant and Halogen Free  
Ordering Information  
RT8250  
Package Type  
SP : SOP-8 (Exposed Pad-Option 1)  
Applications  
Industrial and Commercial Low Power Systems  
Lead Plating System  
G : Green (Halogen Free and Pb Free)  
Note :  
Computer Peripherals  
Richtek products are :  
LCDMonitors and TVs  
` RoHS compliant and compatible with the current require-  
ments of IPC/JEDEC J-STD-020.  
` Suitable for use in SnPb or Pb-free soldering processes.  
Green Electronics/Appliances  
Point of Load Regulation of High-Performance DSPs,  
FPGAs and ASICs.  
Pin Configurations  
Marking Information  
(TOP VIEW)  
RT8250GSP : Product Number  
RT8250  
BOOT  
VIN  
8
7
6
5
SS  
YMDNN : Date Code  
GSPYMDNN  
2
3
4
EN  
GND  
SW  
COMP  
FB  
9
GND  
SOP-8 (Exposed Pad)  
DS8250-05 March 2011  
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1
RT8250  
Typical Application Circuit  
1
3
2
V
IN  
BOOT  
RT8250  
VIN  
C
4.75V to 23V  
C
IN  
BOOT  
L1  
R
100k  
EN  
10µFx2  
10µH  
10nF  
V
OUT  
SW  
3.3V/3A  
7
8
EN  
SS  
R1  
26.1k  
C
OUT  
5
6
FB  
22µFx2  
C
SS  
0.1µF  
4,  
C
C
R
C
R2  
3.9nF  
Exposed Pad(9)  
6.8k  
10k  
GND  
COMP  
C
P
NC  
Table 1. Recommended Component Selection  
V
OUT  
(V)  
R1 (kΩ)  
R2 (kΩ)  
R (kΩ)  
C
C (nF)  
C
L (μH)  
C
(μF)  
OUT  
15  
153  
97.6  
76.8  
45.3  
26.1  
16.9  
9.53  
3
10  
10  
10  
10  
10  
10  
10  
10  
30  
20  
15  
13  
6.8  
6.2  
4.3  
3
3.9  
3.9  
3.9  
3.9  
3.9  
3.9  
3.9  
3.9  
33  
22  
22 x 2  
22 x 2  
22 x 2  
22 x 2  
22 x 2  
22 x 2  
22 x 2  
22 x 2  
10  
8
22  
5
15  
3.3  
2.5  
1.8  
1.2  
10  
6.8  
4.7  
3.6  
Functional Pin Description  
Pin No.  
Pin Name  
Pin Function  
Bootstrap for High Side Gate Driver. Connect a 10nF or greater ceramic capacitor  
from the BOOT pin to SW pin.  
1
BOOT  
Voltage Supply Input. The input voltage range is from 4.5V to 23V. A suitable large  
capacitor must be bypassed with this pin.  
2
VIN  
3
SW  
Switching Node. Connect the output LC filter between the SW pin and output load.  
Ground. The exposed pad must be soldered to a large PCB and connected to  
GND for maximum power dissipation.  
4,  
GND  
9 (Exposed Pad)  
Output Voltage Feedback Input. The feedback reference voltage is 0.925V  
typically.  
5
6
FB  
Compensation Node. This pin is used for compensating the regulation control  
loop. A series RC network is required to be connected from COMP to GND. If it is  
needed, an additional capacitor should be connected from COMP to GND.  
Enable Input. A logic high enables the converter, a logic low forces the converter  
into shutdown mode reducing the supply current to less than 3μA. For automatic  
startup, connect this pin to VIN with a 100kΩ pull up resistor.  
COMP  
7
8
EN  
SS  
Soft-Start Control Input. The soft-start period can be set by connecting a capacitor  
from the SS to GND. A 0.1μF capacitor sets the soft-start period to 13ms typically.  
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2
DS8250-05 March 2011  
RT8250  
Function Block Diagram  
VIN  
Current Sense  
Amplifier  
Internal  
Regulator  
Oscillator  
340kHz/110kHz  
Slope Comp  
VA  
+
-
Shutdown  
Comparator  
V
VA  
CC  
Foldback  
Control  
+
-
1.2V  
BOOT  
100mΩ  
85mΩ  
S
R
Q
Q
5k  
-
EN  
SS  
SW  
0.5V  
+
+
+
-
2.5V  
-
3V  
Lockout  
Comparator  
UV  
Comparator  
GND  
Current  
V
CC  
Comparator  
7µA  
0.925V  
+
+
-
EA  
COMP  
FB  
Absolute Maximum Ratings (Note 1)  
Supply Voltage, VIN ------------------------------------------------------------------------------------------ 0.3V to 24V  
Switching Voltage, SW ------------------------------------------------------------------------------------- 0.3V to (VIN + 0.3V)  
<20ns ---------------------------------------------------------------------------------------------------------- 0.3V to (VIN + 3V)  
BOOT Voltage ------------------------------------------------------------------------------------------------- (VSW 0.3V) to (VSW + 6V)  
The Other Pins ------------------------------------------------------------------------------------------------ 0.3V to 6V  
PowerDissipation, PD @ TA = 25°C  
SOP-8 (Exposed Pad) -------------------------------------------------------------------------------------- 1.333W  
Package Thermal Resistance (Note 2)  
SOP-8 (Exposed Pad), θJA --------------------------------------------------------------------------------- 75°C/W  
SOP-8 (Exposed Pad), θJC -------------------------------------------------------------------------------- 15°C/W  
Junction Temperature ---------------------------------------------------------------------------------------- 150°C  
Lead Temperature (Soldering, 10 sec.)------------------------------------------------------------------ 260°C  
Storage Temperature Range ------------------------------------------------------------------------------- 65°C to 150°C  
ESD Susceptibility (Note 3)  
HBM (Human Body Mode) --------------------------------------------------------------------------------- 2kV  
MM (Machine Mode) ----------------------------------------------------------------------------------------- 200V  
Recommended Operating Conditions (Note 4)  
Supply Voltage, VIN ------------------------------------------------------------------------------------------ 4.5V to 23V  
Enable Voltage, VEN ----------------------------------------------------------------------------------------- 0V to 5.5V  
Junction Temperature Range------------------------------------------------------------------------------- 40°C to 125°C  
Ambient Temperature Range------------------------------------------------------------------------------- 40°C to 85°C  
DS8250-05 March 2011  
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3
RT8250  
Electrical Characteristics  
(VIN = 12V, TA = 25°C unless otherwise specified)  
Parameter  
Symbol  
Test Conditions  
VEN = 0V  
Min  
--  
Typ  
0.3  
Max  
3
Unit  
μA  
Shutdown Supply Current  
Supply Current  
VEN = 3 V, VFB = 1V  
4.75V VIN 23V  
ΔIC = ±10μA  
--  
0.7  
1.2  
mA  
V
Feedback Voltage  
VFB  
0.911 0.925 0.939  
Error Amplifier Transconductance  
High-Side Switch On-Resistance  
Low-Side Switch On-Resistance  
High-Side Switch Leakage Current  
GEA  
--  
--  
--  
--  
1250  
100  
85  
--  
--  
μA/V  
mΩ  
mΩ  
μA  
RDS(ON)1  
RDS(ON)2  
--  
VEN = 0V, VSW = 0V  
0
10  
Min. Duty Cycle  
VBOOT – VSW = 4.8V  
Upper Switch Current Limit  
--  
--  
--  
5.5  
1.4  
5.2  
--  
--  
--  
A
A
Lower Switch Current Limit  
From Drain to Source  
COMP to Current Sense  
Transconductance  
GCS  
A/V  
Oscillation Frequency  
fOSC1  
300  
--  
340  
110  
90  
380  
--  
kHz  
kHz  
%
Short Circuit Oscillation Frequency fOSC2  
VFB = 0V  
Maximum Duty Cycle  
Minimum On Time  
DMAX  
tON  
VFB = 0.8V  
--  
--  
--  
200  
--  
--  
ns  
Logic-High  
Logic-Low  
VIH  
2.7  
--  
--  
EN Threshold  
Voltage  
V
VIL  
--  
0.4  
Input Under Voltage Lockout  
Threshold  
Input Under Voltage Lockout  
Threshold Hysterisis  
VIN Rising  
3.8  
--  
4.2  
4.4  
--  
V
200  
mV  
Soft-Start Current  
Soft-Start Period  
Thermal Shutdown  
VSS = 0V  
--  
--  
--  
7
--  
--  
--  
μA  
ms  
°C  
CSS = 0.1μF  
13  
TSD  
150  
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for  
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the  
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended  
periods may remain possibility to affect device reliability.  
Note 2. θJA is measured in the natural convection at TA = 25°C on a high effective thermal conductivity four-layer test board of  
JEDEC 51-7 thermal measurement standard. The case position of θJC is on the exposed pad of the package.  
Note 3. Devices are ESD sensitive. Handling precaution is recommended.  
Note 4. The device is not guaranteed to function outside its operating conditions.  
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4
DS8250-05 March 2011  
RT8250  
Typical Operating Characteristics  
Efficiency vs. Output Current  
Output Voltage vs. Output Current  
3.33  
3.32  
3.31  
3.30  
3.29  
3.28  
3.27  
3.26  
3.25  
3.24  
3.23  
100  
90  
VIN = 23V  
80  
VIN = 12V  
70  
VIN = 4.75V  
VIN = 4.75V  
60  
50  
40  
30  
20  
VIN = 12V  
VIN = 23V  
10  
VOUT = 3.3V  
VOUT = 3.3V  
0
0
0.5  
1
1.5  
2
2.5  
3
0
0.5  
1
1.5  
2
2.5  
3
Output Current (A)  
Output Current (A)  
Reference Voltage vs. Input Voltage  
Reference Voltage vs. Temperature  
0.932  
0.930  
0.928  
0.926  
0.924  
0.922  
0.920  
0.940  
0.935  
0.930  
0.925  
0.920  
0.915  
0.910  
VIN = 6V, VOUT = 3.3V  
VOUT = 3.3V, IOUT = 0A  
4
6
8
10 12 14 16 18 20 22 24  
Input Voltage (V)  
-50  
-25  
0
25  
50  
75  
100  
125  
(°C)  
Temperature  
Frequency. vs. Input Voltage  
Frequency vs. Temperature  
350  
345  
340  
335  
330  
325  
320  
315  
310  
305  
300  
350  
345  
340  
335  
330  
325  
320  
315  
310  
305  
300  
VIN = 12V, VOUT = 3.3V, IOUT = 0A  
25 50 75 100 125  
VOUT = 3.3V, IOUT = 0A  
10 12 14 16 18 20 22 24  
4
6
8
-50  
-25  
0
Input Voltage (V)  
Temperature (°C)  
DS8250-05 March 2011  
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5
RT8250  
Current Limit vs. Duty Cycle  
Current Limit vs. Temperature  
7.0  
6.5  
6.0  
5.5  
5.0  
4.5  
4.0  
3.5  
3.0  
7.0  
6.5  
6.0  
5.5  
5.0  
4.5  
4.0  
3.5  
3.0  
VOUT = 3.3V  
VIN = 12V, VOUT = 3.3V  
0
10 20 30 40 50 60 70 80 90 100  
Duty Cycle (%)  
-50  
-25  
0
25  
50  
75  
100  
125  
Temperature (°C)  
Power On from EN  
Power Off from EN  
VEN  
(5V/Div)  
VEN  
(5V/Div)  
VOUT  
(2V/Div)  
VOUT  
(2V/Div)  
IOUT  
(2A/Div)  
IOUT  
(2A/Div)  
VIN = 12V, VOUT = 3.3V, IOUT = 3A  
Time (5ms/Div)  
VIN = 12V, VOUT = 3.3V, IOUT = 3A  
Time (1ms/Div)  
Power On from VIN  
Switching  
VOUT  
(10mV/Div)  
VIN  
(5V/Div)  
VSW  
(10V/Div)  
VOUT  
(2V/Div)  
IL  
IL  
(2A/Div)  
(2A/Div)  
VIN = 12V, VOUT = 3.3V, IOUT = 3A  
Time (5ms/Div)  
VIN = 12V, VOUT = 3.3V, IOUT = 3A  
Time (1μs/Div)  
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6
DS8250-05 March 2011  
RT8250  
Load Transient Response  
Load Transient Response  
VOUT  
(200mV/Div)  
VOUT  
(200mV/Div)  
IOUT  
IOUT  
(2A/Div)  
(2A/Div)  
VIN = 12V, VOUT = 3.3V, IOUT = 0A to 3A  
VIN = 12V, VOUT = 3.3V, IOUT = 0A to 1.5A  
Time (100μs/Div)  
Time (100μs/Div)  
DS8250-05 March 2011  
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7
RT8250  
Application Information  
can be programed by the external capacitor between SS  
pin andGND. The chip provides a 7μAcharge current for  
the external capacitor. If a 0.1μF capacitor is used to set  
the soft-start and its period will be 13ms(typ.).  
The RT8250 is a synchronous high voltage buck converter  
that can support the input voltage range from 4.5V to 23V  
and the output current can be up to 3A.  
Output Voltage Setting  
Inductor Selection  
The resistive divider allows the FB pin to sense the output  
voltage as shown in Figure 1.  
The inductor value and operating frequency determine the  
ripple current according to a specific input and output  
voltage. The ripple current ΔIL increases with higher VIN  
and decreases with higher inductance.  
V
OUT  
R1  
FB  
RT8250  
GND  
R2  
V
f ×L  
VOUT  
V
IN  
OUT ⎤ ⎡  
× 1−  
⎥ ⎢  
ΔIL =  
⎦ ⎣  
Having a lower ripple current reduces not only the ESR  
losses in the output capacitors but also the output voltage  
ripple. High frequency with small ripple current can achieve  
highest efficiency operation. However, it requires a large  
inductor to achieve this goal.  
Figure 1. Output Voltage Setting  
The output voltage is set by an external resistive divider  
according to the following equation :  
R1  
R2  
VOUT = VFB 1+  
For the ripple current selection, the value of ΔIL =  
0.2375(IMAX) will be a reasonable starting point. The largest  
ripple current occurs at the highest VIN. To guarantee that  
the ripple current stays below the specified maximum,  
the inductor value should be chosen according to the  
following equation :  
Where VFB is the feedback reference voltage (0.925V typ.).  
External Bootstrap Diode  
Connect a 10nF low ESR ceramic capacitor between the  
BOOT pin and SW pin. This capacitor provides the gate  
driver voltage for the high side MOSFET.  
⎤ ⎡  
× 1−  
V
f × ΔI  
V
OUT  
V
IN(MAX)  
OUT  
L =  
⎥ ⎢  
It is recommended to add an external bootstrap diode  
between an external 5V and the BOOT pin for efficiency  
improvement when input voltage is lower than 5.5V or duty  
ratio is higher than 65%. The bootstrap diode can be a  
low cost one such as 1N4148 or BAT54.  
L(MAX)  
⎦ ⎣  
Inductor Core Selection  
The inductor type must be selected once the value for L  
is known. Generally speaking, high efficiency converters  
can not afford the core loss found in low cost powdered  
iron cores. So, the more expensive ferrite or  
mollypermalloy cores will be a better choice.  
The external 5V can be a 5V fixed input from system or a  
5V output of the RT8250. Note that the external boot  
voltage must be lower than 5.5V.  
5V  
The selected inductance rather than the core size for a  
fixed inductor value is the key for actual core loss. As the  
inductance increases, core losses decrease. Unfortunately,  
increase of the inductance requires more turns of wire  
and therefore the copper losses will increase.  
BOOT  
RT8250  
SW  
10nF  
Figure 2. External Bootstrap Diode  
Ferrite designs are preferred at high switching frequency  
due to the characteristics of very low core losses. So,  
design goals can focus on the reduction of copper loss  
and the saturation prevention.  
Soft-Start  
The RT8250 contains an external soft-start clamp that  
gradually raises the output voltage. The soft-start timming  
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8
DS8250-05 March 2011  
RT8250  
Ferrite core material saturates hard, which means that  
inductance collapses abruptly when the peak design  
current is exceeded. The previous situation results in an  
abrupt increase in inductor ripple current and consequent  
output voltage ripple.  
The output ripple will be highest at the maximum input  
voltage since ΔIL increases with input voltage. Multiple  
capacitors placed in parallel may be needed to meet the  
ESR and RMS current handling requirement.Dry tantalum,  
special polymer, aluminum electrolytic and ceramic  
capacitors are all available in surface mount packages.  
Special polymer capacitors offer very low ESR value.  
However, it provides lower capacitance density than other  
types. Although Tantalum capacitors have the highest  
capacitance density, it is important to only use types that  
pass the surge test for use in switching power supplies.  
Aluminum electrolytic capacitors have significantly higher  
ESR. However, it can be used in cost-sensitive applications  
for ripple current rating and long term reliability  
considerations. Ceramic capacitors have excellent low  
ESR characteristics but can have a high voltage coefficient  
and audible piezoelectric effects. The high Q of ceramic  
capacitors with trace inductance can also lead to significant  
ringing.  
Do not allow the core to saturate!  
Different core materials and shapes will change the size/  
current and price/current relationship of an inductor.  
Toroid or shielded pot cores in ferrite or permalloy materials  
are small and do not radiate energy. However, they are  
usually more expensive than the similar powdered iron  
inductors. The rule for inductor choice mainly depends  
on the price vs. size requirement and any radiated field/  
EMI requirements.  
CIN and COUT Selection  
The input capacitance, CIN, is needed to filter the  
trapezoidal current at the source of the high side MOSFET.  
To prevent large ripple current, a low ESR input capacitor  
sized for the maximum RMS current should be used. The  
RMS current is given by :  
Higher values, lower cost ceramic capacitors are now  
becoming available in smaller case sizes. Their high ripple  
current, high voltage rating and low ESR make them ideal  
for switching regulator applications. However, care must  
be taken when these capacitors are used at input and  
output. When a ceramic capacitor is used at the input  
and the power is supplied by a wall adapter through long  
wires, a load step at the output can induce ringing at the  
input, VIN. At best, this ringing can couple to the output  
and be mistaken as loop instability. At worst, a sudden  
inrush of current through the long wires can potentially  
cause a voltage spike at VIN large enough to damage the  
part.  
V
V
V
IN  
V
OUT  
OUT  
I
= I  
1  
RMS  
OUT(MAX)  
IN  
This formula has a maximum at VIN = 2VOUT, where  
IRMS = IOUT/2. This simple worst-case condition is  
commonly used for design because even significant  
deviations do not offer much relief.  
Choose a capacitor rated at a higher temperature than  
required. Several capacitors may also be paralleled to  
meet size or height requirements in the design.  
For the input capacitor, a 10μF x 2 low ESR ceramic  
capacitor is recommended. For the recommended  
capacitor, please refer to table 3 for more detail.  
Checking Transient Response  
The regulator loop response can be checked by looking  
at the load transient response. Switching regulators take  
several cycles to respond to a step in load current. When  
a load step occurs, VOUT immediately shifts by an amount  
equal to ΔILOAD (ESR) also begins to charge or discharge  
COUT generating a feedback error signal for the regulator  
to return VOUT to its steady-state value.During this recovery  
time, VOUT can be monitored for overshoot or ringing that  
would indicate a stability problem.  
The selection of COUT is determined by the required ESR  
to minimize voltage ripple.  
Moreover, the amount of bulk capacitance is also a key  
for COUT selection to ensure that the control loop is stable.  
Loop stability can be checked by viewing the load transient  
response as described in a later section.  
The output ripple, ΔVOUT , is determined by :  
1
ΔVOUT ≤ ΔIL ESR +  
8fCOUT  
DS8250-05 March 2011  
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9
RT8250  
Thermal Considerations  
Layout Consideration  
For continuous operation, do not exceed the maximum  
operation junction temperature 125°C. The maximum  
power dissipation depends on the thermal resistance of  
IC package, PCB layout, the rate of surroundings airflow  
and temperature difference between junction to ambient.  
The maximum power dissipation can be calculated by  
following formula :  
Follow the PCB layout guidelines for optimal performance  
of the RT8250.  
` Keep the traces of the main current paths as short and  
wide as possible.  
` Put the input capacitor as close as possible to the device  
pins (VINandGND).  
` SW node is with high frequency voltage swing and  
should be kept at small area. Keep sensitive  
components away from the SW node to prevent stray  
capacitive noise pick-up.  
PD(MAX) = ( TJ(MAX) TA ) / θJA  
Where TJ(MAX) is the maximum operation junction  
temperature, TA is the ambient temperature and the θJA is  
the junction to ambient thermal resistance.  
` Place the feedback components to the FB pin and  
For recommended operating conditions specification of  
RT8250, the maximum junction temperature is 125°C. The  
junction to ambient thermal resistance θJA is layout  
dependent. For PSOP-8 package, the thermal resistance  
COMP pin as close as possible.  
` TheGNDpin and Exposed Pad should be connected to  
a strong ground plane for heat sinking and noise  
protection.  
θ
JA is 75°C/W on the standard JEDEC 51-7 four-layers  
Input capacitor must be placed  
as close to the IC as possible.  
thermal test board. The maximum power dissipation at TA  
= 25°C can be calculated by following formula :  
SW  
GND  
V
IN  
C
S
The feedback  
PD(MAX) = (125°C 25°C) / (75°C/W) = 1.333W for  
PSOP-8 package  
components must be  
connected as close to  
the device as possible.  
C
IN  
BOOT  
VIN  
8
SS  
C
C
The maximum power dissipation depends on operating  
ambient temperature for fixed TJ(MAX) and thermal  
resistance θJA. For RT8250 package, the Figure 3 of  
derating curve allows the designer to see the effect of  
rising ambient temperature on the maximum power  
dissipation allowed.  
2
3
4
7
6
5
EN  
GND  
L1  
V
SW  
COMP  
FB  
OUT  
R
C
C
P
C
GND  
OUT  
R1  
V
OUT  
R2  
SW should be connected to inductor by  
wide and short trace. Keep sensitive  
components away from this trace.  
GND  
1.6  
Four-Layer PCB  
Figure 4. PCB Layout Guide  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
0
25  
50  
75  
100  
125  
(°C)  
Ambient Temperature  
Figure 3.Derating Curve for RT8250 Package  
www.richtek.com  
10  
DS8250-05 March 2011  
RT8250  
Table 2. Suggested Inductors for Typical Application Circuit  
Component Supplier  
TDK  
Series  
Dimensions (mm)  
10 x 9.7 x 4.5  
8x8x4  
VLF10045  
NR8040  
TAIYO YUDEN  
Table 3. Suggested Capacitors for CIN and COUT  
Component Supplier  
MURATA  
TDK  
Part No.  
Capacitance (μF)  
Case Size  
1206  
GRM31CR61E106K  
C3225X5R1E106K  
TMK316BJ106ML  
GRM31CR60J476M  
C3225X5R0J476M  
EMK325BJ476MM  
GRM32ER71C226M  
C3225X5R1C226M  
10  
10  
10  
47  
47  
47  
22  
22  
1206  
TAIYO YUDEN  
MURATA  
TDK  
1206  
1206  
1210  
1210  
TAIYO YUDEN  
MURATA  
TDK  
1210  
1210  
DS8250-05 March 2011  
www.richtek.com  
11  
RT8250  
Outline Dimension  
H
A
Y
M
EXPOSED THERMAL PAD  
(Bottom of Package)  
J
B
X
F
C
I
D
Dimensions In Millimeters Dimensions In Inches  
Symbol  
Min  
Max  
5.004  
4.000  
1.753  
0.510  
1.346  
0.254  
0.152  
6.200  
1.270  
2.300  
2.300  
2.500  
3.500  
Min  
Max  
A
B
C
D
F
H
I
4.801  
3.810  
1.346  
0.330  
1.194  
0.170  
0.000  
5.791  
0.406  
2.000  
2.000  
2.100  
3.000  
0.189  
0.150  
0.053  
0.013  
0.047  
0.007  
0.000  
0.228  
0.016  
0.079  
0.079  
0.083  
0.118  
0.197  
0.157  
0.069  
0.020  
0.053  
0.010  
0.006  
0.244  
0.050  
0.091  
0.091  
0.098  
0.138  
J
M
X
Option 1  
Y
X
Y
Option 2  
8-Lead SOP (Exposed Pad) Plastic Package  
Richtek Technology Corporation  
Headquarter  
Richtek Technology Corporation  
Taipei Office (Marketing)  
5F, No. 20, Taiyuen Street, Chupei City  
Hsinchu, Taiwan, R.O.C.  
5F, No. 95, Minchiuan Road, Hsintien City  
Taipei County, Taiwan, R.O.C.  
Tel: (8863)5526789 Fax: (8863)5526611  
Tel: (8862)86672399 Fax: (8862)86672377  
Email: marketing@richtek.com  
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit  
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be  
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.  
www.richtek.com  
12  
DS8250-05 March 2011  

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