R5107G241C-TR [RICOH]
Power Supply Management Circuit, Fixed, 1 Channel, CMOS, PDSO8, 2.90 X 4 MM, 0.65 MM PITCH, SSOP-8;
| 型号： | R5107G241C-TR |
| 厂家： | 
RICOH ELECTRONICS DEVICES DIVISION |
| 描述： | Power Supply Management Circuit, Fixed, 1 Channel, CMOS, PDSO8, 2.90 X 4 MM, 0.65 MM PITCH, SSOP-8 光电二极管 |
| 文件： | 总15页 (文件大小：392K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Microprocessor Supervisory Circuit
NO. EA-170-080604
R5107G SERIES
OUTLINE
The R5107G Series are CMOS-based µ con supervisory circuit, or high accuracy and ultra low supply current
voltage detector with built-in delay and watchdog timer. When the VDD voltage is down across the threshold, or
the watchdog timer does not detect the system clock from the µ con, the reset output is generated. The voltage
detector circuit is used for the system reset, etc. The detector threshold is fixed internally, and the tolerance is
±1.0%. The released delay time (Power-on Reset Delay) circuit is built-in, and output delay time is adjustable
with an external capacitor. When the VDD supply voltage becomes higher than the released voltage, the reset
state will be maintained during the delay time. The time out period of the watchdog timer can be also set with an
external capacitor. The output type of the reset is selectable, Nch open-drain, or CMOS. The function to stop
supervising clock by the watchdog timer (INH function) and manual reset function are built in this IC. The
package is small SSOP-8G.
FEATURES
• Built-in a watchdog timer's time out period accuracy
±30%
• Timeout period for watchdog and generating a reset signal can be set by an external capacitor
• Detector Threshold Voltage ····························· 0.1V stepwise setting in the range from 1.5V to 5.5V
• Supply current·················································· Typ. 11µA
• Operating Voltage ············································ 0.9V to 6.0V
• High Accuracy Output Voltage of Detector Threshold ············································· ±±.0%
• Power-on Reset Delay Time accuracy············· ±20%
• Power-on reset delay time of the voltage detector can be set with an external capacitor.
• Small Package················································· SSOP-8G (0.65mm pitch)
APPLICATION
• Supervisory circuit for equipment with using microprocessors.
1
BLOCK DIAGRAMS
R5107Gxx1A
MR
VDD
CD
+
-
+
-
GND
SCK
CLOCK
DETECTOR
WATCHDOG
TIMER
TW
RESETB
INH
R5107Gxx1C
MR
VDD
CD
+
+
-
-
GND
SCK
CLOCK
WATCHDOG
TIMER
DETECTOR
TW
RESETB
INH
2
SELECTION GUIDE
The selection can be made with designating the part number as shown below:
R5107Gxx1x-TR ←part Number
↑↑ ↑ ↑
ab
c
d
Code
Descriptions
Designation of Package Type;
G: SSOP8G (2.9mmx4.0mm)
a
Designation of Detector Threshold Voltage (-VDET)
b
0.1V stepwise setting is possible in the range from 1.5V to 5.5V
Designation of the output type of RESETB
c
A: Nch Open-drain
C: CMOS Output
d
Designation of Taping Type
PIN CONFIGURATION
VDD
8
7
1
2
3
RESETB
MR
R5107GxxxA
R5107GxxxC
TW
CD
6 INH
SCK
GND 4
5
SSOP8G (0.65mm pitch)
PIN DESCRIPTION
Pin No
Symbol
Pin Description
Output Pin for Reset signal of Watchdog timer and Voltage
Detector. (Output “L” at detecting Detector Threshold and
Watchdog Timer Reset.)
1
RESETB
2
3
4
5
6
MR
CD
Manual Reset Pin (Active at "L")
External Capacitor Pin for Setting Delay Time of Voltage Detector
Ground Pin
GND
SCK
INH
Clock Input Pin from Microprocessor
Inhibit Pin ("L": Inhibit the watchdog timer)
External Capacitor Pin for Setting Reset and Watchdog Timeout
7
8
TW
VDD
Periods
Power supply Pin
3
ABSOLUTE MAXIMUM RATINGS
Topt=25°C, VSS=0V
Symbol
VIN
Item
Rating
-0.3∼7.0
-0.3∼VIN+0.3
-0.3∼VIN+0.3
-0.3∼7.0
-0.3∼7.0
-0.3∼7.0
-0.3∼7.0
20
Unit
V
V
Supply Voltage
Output Voltage
VCD
Voltage of CD Pin
VTW
Voltage of TW Pin
Voltage of RESETB Pin
Voltage of SCK Pin
Voltage of INH Pin
Voltage of MR Pin
Current of RESETB Pin
V
VRESETB
VSCK
VINH
V
V
Input Voltage
V
VMR
V
IRESETB
PD
Output Current
mA
mW
°C
°C
Power Dissipation
300
Topt
Tstg
Operating Temperature Range
Storage Temperature Range
-40∼+105
-55∼+125
ELECTRICAL CHARACTERISTICS
R5107GxxxA/C Unless otherwise specified, VIN=6.0V, CTW=0.1uF, CD=0.1uF, Rpull-up=100kΩ(R5107GxxxA)
The number of Bold font applied to the temperature range from -40°C to 105°C
(Topt=25°C)
Symbol
Item
Conditions
Min.
0.9
Typ.
Max.
6.0
Unit
VIN
Operating Voltage
V
VIN=(-VDET)+0.5V
Clock Pulse Input
Iss
Supply Current
11
15
µA
Voltage Detector
x0.990
x1.010
-VDET
Detector Threshold
SENSE pin Threshold
V
x0.972
x1.015
ppm/
°C
∆-VDET/
∆Topt
Detector Threshold
Temperature Coefficient
Detector Threshold
Hysteresis
-40°C≤Topt≤105°C
±100
(-VDET) (-VDET) (-VDET)x
VHYS
V
x0.03
340
x0.05
370
0.07
467
tpLH
Output Delay Time
ms
mA
CD=0.1µF
Output Current (RESETB
IDOUTN
Nch, VDD=1.2V, VDS=0.1V
0.38
0.65
0.80
0.90
Output pin)
Output Current (RESETB
Output pin)
Nch, VDD=6.0V,
IDOUTP
mA
VDS=0.5V(R5108GxxxC)
VMRH
VMRL
MRW
RMR
MR Input "H"
1.0
0.00
2
6.0
0.35
V
V
MR Input "L"
MR Input Pulse Width
MR Pull-up Resistance
(*Note1)
us
kΩ
60
110
164
Watchdog Timer
CTW=0.1uF
TWD
TWR
Watchdog Timeout period
Reset Hold Time of WDT
230
29
310
34
450
48
ms
ms
CTW=0.1uF
4
Symbol
VSCKH
VSCKL
VINHH
Item
SCK Input "H"
Conditions
Min.
VINx0.8
0.0
Typ.
Max.
6.0
Unit
V
SCK Input "L"
VINx0.2
6.0
V
INH Input "H"
1.0
V
VINHL
INH Input "L"
0.00
60
0.35
164
V
RINH
INH pull-up Resistance
110
kΩ
VSCKL=VINx0.2,
VSCKH=VINx0.8
TSCKW
SCK Input Pulse Width
500
ns
*Bold Type value is guaranteed by design.
*Note1: MR input pulse width specification guarantee the minimum input pulse width of MR pin for output "L"
from RESETB pin. If the "L" pulse width of MR is short, tpLH may be short. Refer to the timing diagram for
details.
TYPICAL APPLICATIONS
Power supply
DD
V
R
V
DD
RESET
RESETB
P
INH
I/Oµ
R5107GxxxA SCK
Series
MR
D
SW
SW
C
GND
TW
CD
TW
C
C
Power supply
DD
V
V
DD
RESET
RESETB
P
INH
I/Oµ
R5107GxxxCSCK
Series
MR
D
SW
SW
C
GND
TW
CD
TW
C
C
5
TEST CIRCUIT
R(R5107GxxxA)
RESETB
A
VDD
R5107GxxxA/C
INH
MR
SCK
TW
Clock Input
Series
D
TW
C
C
GND
CD
C
Supply Current Test Circuit
6
TIMING DIAGRAM (R5107GxxxA/R5107GxxxC)
VDD
(Nch open-drain, RESETB pin is pulled up to VDD.)
+VDET
-VDET
ＩNＨ
MR
tpHL
CD
tpLH
tpLH
VTCD
TWDI
TWD
TWD
VrefH
TW
VrefL
TWR
TWR
SCK
TMR
tpLH
(1)
(2)
(4)
(3)
(5)
(6)
7
OPERATION
M When the VDD pin voltage becomes more than the released voltage (+VDET), after the released delay time
(or the power on reset time tpLH), the output of RESETB becomes “H” level.
N When the SCK pulse is input, the watchdog timer is cleared, and TW pin mode changes from discharge
mode to charge mode. When the TW pin voltage becomes higher than VREFH, the mode will change into
discharge, and next watchdog time count starts.
O Unless the SCK pulse is input, WDT will not be cleared, and during the charging period of TW pin,
RESETB="L".
P When the VDD pin becomes lower than the detector threshold voltage, RESETB outputs "L".
Q If "L" signal is input to the MR pin, the RESETB outputs "L", regardless the SCK clock state and VIN voltage.
R When the signal to the MR pin is set from "L" to "H", the watchdog starts supervising the system clock.
Power on Reset operation with MR pin Input
tpLH1 < tpLH
(
)
MR
0V
Complete
Discharge
TCD
+V
-V
C
D
TCD
0V
Incomplete Discharge
RESETB
0V
tpLH
tpLH1
Power on Reset Operation against the input glitch
)
(tpLH1 < tpLH
+V
DET
-V DET
VDD
0V
Complete Discharge
TCD
+V
TCD
-V
0V
C
D
Incomplete Discharge
RESETB
0V
tpLH
tpLH1
8
∗ Watchdog Timeout period/Reset hold time
The watchdog timeout period and reset hold time can be set with an external capacitor to TW pin.
The next equations describe the relation between the watchdog timeout period and the external capacitor
value, or the reset holding time and the external capacitor value.
tWD(s) = 3.1*106× C (F)
tWR(s)=tWD/9
The watchdog timer (WDT) timeout period is determined with the discharge time of the external capacitor.
During the watchdog timeout period, if the clock pulse from the system is detected, WDT is cleared and the
capacitor is charged. When the charge of the capacitor completes, another watchdog timeout period starts
again. During the watchdog timeout period, if the clock pulse from the system is not detected, during the
next reset hold time RESETB pin outputs "L".
After starting the watchdog timeout period, (just after from the discharge of the external capacitor) even if the clock pulse
is input during the time period "TWDI", the clock pulse is ignored.
TWDI[s]=TWD/10
Released Delay Time (Power-on Reset delay time)
The released delay time can be set with an external capacitor connected to the CD pin. The next equation describes the
relation between the capacitance value and the released delay time (tpLH).
tpLH(s)=3.7×106× C(F)
Note that the temperature dependence graph in the typical characteristics does not contain the temperature characteristics
of the external capacitor.
When the VDD voltage becomes equal or lower than -VDET, discharge of the capacitor connected to CD pin starts. In case
that the discharge is not enough, if the VDD voltage returns equal or more than (+VDET), the delay time tpLH will be
shorter than expected.
Minimum Operating Voltage (VINL)
We specified the minimum operating voltage as the minimum input voltage in which the condition of RESETB pin being
0.1V or lower than 0.1V. (Herein, pull-up resistance is set as 100kΩ in the case of the Nch open-drain output type.
Inhibit (INH) Function
If INH pin is set at "L", the watchdog timer stops monitoring the clock, and the RESETB output will be dominant by the
voltage detector's operation. Therefore, if the equal or more than the detector threshold level is input, RESETB outputs "H"
regardless the clock pulse. INH pin is pulled up with a resistor (TYP. 110kΩ) internally.
Manual Reset Function
By setting MR pin as "L", the output of RESETB can be forced to set "L". After pull-down the MR pin to "L", the delay
time (DMR) to the output "L" from RESETB is 1us as maximum. MR pin is pulled-up via the built-in resister. (Typ.
110kΩ ). If MR pin voltage> VIN voltage, a current flows into MR pin. However, the current value is limit by the pull-up
resister, therefore there is not bad impact on the operation. When the "L" signal is input to MR pin, the discharge of CD pin
capacitor (CCD) starts. If the term of "L" for MR pin is short, CCD will not be discharged enough. As a result, the delay
time after setting "H" for MR pin will be shorter than expected. Because of this, confirm the operation under the same
conditions as users' applications. For example, in case of CCD is set at 0.1uF, and the condition to maintain the delay time
value after MR pin's returning to "H", is described as the minimum "L" term of MR pin, or 150us.
RESETB Output
RESETB pin's output type is selectable either the Nch open-drain output or CMOS output. If the Nch
open-drain type output is selected, the RESETB pin is pulled up with an external resistor to an appropriate
voltage source.
9
Clock Pulse Input
Built-in watchdog timer is cleared with the SCK clock pulse within the watchdog timeout period.
APPLICATION NOTES
If a resistor is connected to the VDD pin, the operation might be unstable with the supply current of IC itself.
VDD
VIN
VDD
VIN
VDD
R1
R1
R1
IN
R2
R2
R5108
CMOS
Output
R5108
R5108
RESETB
RESETB
RESETB
Connection examples affected by the conduction current
TYPICAL CHARACTERISTICS
1) Supply Current vs. Input Voltage
R510xN151A/C, R510xG151A/C
R510xN301A/C, R510xG301A/A
20
18
16
14
12
20
18
16
14
12
10
8
105℃
10
8
105℃
25℃
-50℃
25℃
6
6
-50℃
4
4
2
2
0
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
SUPPLY VOLTAGE [V]
SUPPLY VOLTAGE [V]
2) Detector Threshold vs. Temperature
10
R5ꢀ0xNꢀ5ꢀA/C, R5ꢀ0xGꢀ5ꢀA/C
R5ꢀ0xN27ꢀA/C, R5ꢀ0xG27ꢀA/C
ꢀ.530
ꢀ.520
ꢀ.5ꢀ0
ꢀ.500
ꢀ.490
ꢀ.480
ꢀ.470
2.740
2.730
2.720
2.7ꢀ0
2.700
2.690
2.680
2.670
2.660
-50
-25
0
25
50
75
ꢀ00
ꢀ25
-50 -25
0
25
50
75
ꢀ00 ꢀ25
TEMPERATURE [ꢁ]
TEMPERATURE [ꢁ]
R5ꢀ0xN42ꢀA/C R5ꢀ0xG42ꢀA/C
4.280
4.260
4.240
4.220
4.200
4.ꢀ80
4.ꢀ60
4.ꢀ40
4.ꢀ20
-50 -25
0
25
50
75
ꢀ00 ꢀ25
TEMPERATURE [ꢁ]
3) Detector Threshold Hysteresis vs. Temperature
R5ꢀ0xNꢀ5ꢀA/C R5ꢀ0xGꢀ5ꢀA/C
R5ꢀ0xN27ꢀA/C R5ꢀ0xG27ꢀA/C
7.0
7.0
6.0
5.0
4.0
3.0
6.0
5.0
4.0
3.0
-50
-25
0
25
50
75
ꢀ00
ꢀ25
-50
-25
0
25
50
75
ꢀ00
ꢀ25
TEMPERATURE [ꢁ]
TEMPERATURE [ꢁ]
11
R5ꢀ0xN42ꢀA/C R5ꢀ0xG42ꢀA/C
7.000
6.000
5.000
4.000
3.000
-50
-25
0
25
50
75
ꢀ00
ꢀ25
TEMPERATURE [ꢁ]
12
4) Nch Driver Output Current vs. VDS Topt=25°C
R5ꢀ0xN, R5ꢀ0xG
20
VDD=6.0V
VDD=5.0V
VDD=4.0V
ꢀ8
ꢀ6
ꢀ4
ꢀ2
ꢀ0
8
VDD=3.0V
VDD=2.0V
VDD=1.5V
6
4
VDD=1.0V
2
0
0.0
0.2
0.4
0.6
0.8
ꢀ.0
ꢀ.2
ꢀ.4
VDS [V]
5) Nch Driver Output Current vs. VDD
R5ꢀ0xN, R5ꢀ0xG
R5ꢀ0xN, R5ꢀ0xG
20
20
ꢀ8
ꢀ6
ꢀ4
ꢀ2
ꢀ0
8
ꢀ8
ꢀ6
ꢀ4
Vds=0.5V
Vds=0.3V
Topt=-40ꢁ
25ꢁ
Topt=-40ꢁ
ꢀ2
ꢀ0
8
25ꢁ
105ꢁ
6
ꢀ05ꢁ
6
4
4
2
2
0
0
ꢀ
2
3
4
5
6
0
0
ꢀ
2
3
4
5
6
SUPPLY VOLTAGE VDD [V]
SUPPLY VOLTAGE VDD [V]
6) Pch Driver Output Current vs. VDD
R5ꢀ0xN, R5ꢀ0xG
2.0
R5ꢀ0xN, R5ꢀ0xG
2.0
ꢀ.8
ꢀ.6
ꢀ.4
ꢀ.2
ꢀ.0
ꢀ.8
ꢀ.6
ꢀ.4
ꢀ.2
ꢀ.0
0.8
0.6
0.4
0.2
0.0
VDS=0.3V
VDS=0.5V
-40ꢁ
25ꢁ
-40ꢁ
0.8
0.6
0.4
0.2
0.0
25ꢁ
ꢀ05ꢁ
ꢀ05ꢁ
0
ꢀ
2
3
4
5
6
0
ꢀ
2
3
4
5
6
SUPPLY VOLTAGE [V]
SUPPLY VOLTAGE [V]
13
R5ꢀ0xN, R5ꢀ0xG
2.0
ꢀ.8
ꢀ.6
ꢀ.4
ꢀ.2
ꢀ.0
0.8
0.6
0.4
0.2
0.0
VDS=ꢀ.0V
-40ꢁ
25ꢁ
ꢀ05ꢁ
0
ꢀ
2
3
4
SUPPLY VOLTAGE [V]
5
6
7) Released Delay Time vs. Input Voltage
8) Released Delay Time vs. Temperature
R5ꢀ0xN, R5ꢀ0xG
R5ꢀ0xN, R5ꢀ0xG
500
500
VDD=6V
VDD=6V
480
480
460
440
420
400
380
360
340
320
300
460
440
420
400
380
360
340
320
300
-50 -25
0
25
50
75 ꢀ00 ꢀ25 ꢀ50
-50 -25
0
25
50
75 ꢀ00 ꢀ25 ꢀ50
TEMPERATURE [ꢁ]
TEMPERATURE [ꢁ]
9) Detector Output Delay Time vs. Temperature
10) WDT Reset Timer vs. Temperature
R5ꢀ0xN, R5ꢀ0xG
R5ꢀ0xN, R5ꢀ0xG
ꢀ00
52
50
48
46
44
42
40
38
36
34
32
90
ꢀus
80
70
(-VDET)+ꢀ
60
INPUT
(-VDET)-ꢀ
50
40
30
20
ꢀ0
0
-50
-25
0
25
50
75
ꢀ00
ꢀ25
-50
-25
0
25
50
75
ꢀ00
ꢀ25
TEMPERATURE [ꢁ]
TEMPERATURE [ꢁ]
14
11) WDT Timeout Period vs. Temperature
12) WDT Reset Timer vs. Input Voltage
R5ꢀ0xN, R5ꢀ0xG
R5ꢀ0xN, R5ꢀ0xG
480
460
440
420
400
380
360
340
320
300
280
52
50
48
46
44
42
40
38
36
34
32
-50
-25
0
25
50
75
ꢀ00
ꢀ25
ꢀ
2
3
4
5
6
TEMPERATURE [ꢁ]
SUPPLY VOLTAGE [V]
13) WDT Timeout Period vs. Input Voltage
R5ꢀ0xN, R5ꢀ0xG
480
460
440
420
400
380
360
340
320
300
280
ꢀ
2
3
4
5
6
SUPPLY VOLTAGE [V]
15
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