ADN2848ACPZ-32 [ROCHESTER]

SPECIALTY INTERFACE CIRCUIT, QCC32, 5 X 5 MM, MO-220-VHHD-2, LFCSP-32;


型号：	ADN2848ACPZ-32
厂家：	Rochester Electronics
描述：	SPECIALTY INTERFACE CIRCUIT, QCC32, 5 X 5 MM, MO-220-VHHD-2, LFCSP-32
文件：	总13页 (文件大小：1173K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

3.3 V Dual-Loop 50 Mbps to 1.25 Gbps

Laser Diode Driver

Data Sheet

ADN2848

FEATURES

GENERAL DESCRIPTION

50 Mbps to 1.25 Gbps operation

Single 3.3 V operation

Bias current range: 2 to 100 mA

Modulation current range: 5 to 80 mA

Monitor photo diode current: 50 μA to 1200 μA

50 mA supply current at 3.3 V

The ADN2848 uses a unique control algorithm to control both

the average power and the extinction ratio of the laser diode

(LD) after initial factory setup. External component count and

PCB area are low because both power and extinction ratio

control are fully integrated. Programmable alarms are provided

for laser fail (end of life) and laser degrade (impending fail).

Closed-loop control of power and extinction ratio

Full current parameter monitoring

Laser fail and laser degrade alarms

Automatic laser shutdown (ALS)

Optional clocked data

Supports FEC rates

32-lead, 5 mm × 5 mm LFCSP_VQ package

APPLICATIONS

SONET OC-1/3/12/24

SDH STM-0/1/4

Fibre Channel

Gigabit Ethernet

FUNCTIONAL BLOCK DIAGRAM

IMODN

IMODP

MPD

IMPD

DATAP

DATAN

CLKP

MOD

CLKN

CONTROL

PSET

BIAS

ASET

GND

ERSET

ADN2848

ERCAP

PAVCAP

LBWSET

GND

Figure 1.

Rev. B

Document Feedback

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rightsof third parties that may result fromits use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks andregisteredtrademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Technical Support

www.analog.com

ADN2848

Data Sheet

TABLE OF CONTENTS

Features .............................................................................................. 1

Alarms.............................................................................................7

Monitor Currents ..........................................................................8

Data and Clock Inputs..................................................................8

CCBIAS...........................................................................................8

I_BIAS...................................................................................................8

Automatic Laser Shutdown..........................................................8

Alarm Interfaces............................................................................8

Power Consumption .....................................................................9

Laser Diode Interfacing................................................................9

Optical Supervisor.........................................................................9

Outline Dimensions....................................................................... 12

Ordering Guide .......................................................................... 12

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Absolute Maximum Ratings............................................................ 5

ESD Caution.................................................................................. 5

Pin Configuration and Function Descriptions............................. 6

Theory of Operation ........................................................................ 7

Control........................................................................................... 7

Loop Bandwidth Selection .......................................................... 7

REVISION HISTORY

2/13—Rev. A to Rev. B

Added EPAD Notation..................................................................... 6

Changes to Endnote ......................................................................... 8

Updated Outline Dimensions....................................................... 12

Changes to Ordering Guide .......................................................... 12

8/06—Rev. 0 to Rev. A

Updated Format..................................................................Universal

Changes to Figure 1.......................................................................... 1

Changes to Specifications ................................................................ 3

Changes to Figure 8........................................................................ 10

Changes to Figure 9 to Figure11................................................... 11

Updated Outline Dimensions....................................................... 12

Changes to Ordering Guide .......................................................... 12

1/03—Revision 0: Initial Version

Rev. B | Page 2 of 12

Data Sheet

ADN2848

SPECIFICATIONS

V_CC= 3.0 V to 3.6 V. All specifications T_MINto T_MAX, unless otherwise noted.¹Typical values are specified at 25°C.

Table 1.

Parameter

Min

Typ

Max

Unit

Conditions/Comments

LASER BIAS Current (I_BIAS, ALS)

Output Current I_BIAS

Compliance Voltage

I_BIAS

1.2

100

V_CC

0.1

μs

I_BIAS

When ALS asserted

I_BIAS< 10% of nominal

ALS Response Time

CCBIAS Compliance Voltage

MODULATION CURRENT (IMODP, IMODN)

Output Current I_MOD

Compliance Voltage

I_MOD

1.2

V_CC

1.5

V_CC

0.1

170

1.5

When ALS asserted

Rise Time²

Fall Time²

Random Jitter²

RMS

I_MOD= 40 mA

Pulse Width Distortion²

MONITOR PD (MPD)

Current

1200

1.65

μA

Average current

Compliance Voltage

POWER SET INPUT (PSET)

Capacitance

Monitor Photodiode Current into RPSET Resistor

Voltage

1200

1.3

μA

1.1

1.2

EXTINCTION RATIO SET INPUT (ERSET)

Allowable Resistance Range

Voltage

1.2

1.1

1.3

kΩ

ALARM SET (ASET)

Allowable Resistance Range

Voltage

1.2

1.1

1.3

kΩ

1.2

Hysteresis

CONTROL LOOP

Time Constant

Low loop bandwidth selection

LBWSET = GND

LBWSET = V_CC

0.22

2.25

sec

DATA INPUTS (DATAP, DATAN, CLKP, CLKN)³

V p-p (Single-Ended, Peak-to-Peak)

Input Impedance (Single-Ended)

100

500

Data and clock inputs are

ac-coupled

See Figure 2

t_SETUP

100

t_HOLD

See Figure 2

LOGIC INPUTS (ALS, LBWSET, CLKSEL)

V_IH

V_IL

2.4

0.8

ALARM OUTPUTS (FAIL, DEGRADE)

V_OH

V_OL

Internal 30 kΩ pull-up

IBMON, IMMON, IMPDMON

IMMON Division Ratio

IMPDMON

100

A/A

Compliance Voltage

V_CC− 1.2

Rev. B | Page 3 of 12

ADN2848

Data Sheet

Parameter

Min

Typ

Max

Unit

Conditions/Comments

SUPPLY

I_CC

3.3

I_BIAS= I_MOD= 0

V_CC

3.0

3.6

¹Temperature range is −40°C to +85°C.

²Measured into a 25 Ω load using a 0-1 pattern at 622 Mbps.

³When the voltage on DATAP is greater than the voltage on DATAN, the modulation current flows in the IMODP pin.

⁴Guaranteed by design and characterization. Not production tested.

⁵I_CCMINfor power calculation on Page 9 is the typical I_CCgiven.

⁶All V_CCpins should be shorted together.

SETUP

t_S

HOLD

t_H

DATAP/DATAN

CLKP

Figure 2. Setup and Hold Time

Rev. B | Page 4 of 12

Data Sheet

ADN2848

ABSOLUTE MAXIMUM RATINGS

Table 2.

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

Parameter

Rating

V_CCto GND

4.2 V

Digital Inputs

(ALS, LBWSET, CLKSEL)

IMODN, IMODP

−0.3 V to V_CC+ 0.3 V

V_CC+ 1.2 V

Operating Temperature Range

Industrial

−40°C to +85°C

−65°C to +150°C

150°C

Storage Temperature Range

Junction Temperature (T_JMax)

32-Lead LFCSP_VQ Package

Power Dissipation¹

θ_JAThermal Impedance²

(T_JMax – T_A)/θ_JAW

32°C/W

Lead Temperature (Soldering for 10 sec) 300°C

¹Power consumption formulas are provided on Page 9.

²θ_JAis defined when device is soldered in a 4-layer board.

ESD CAUTION

Rev. B | Page 5 of 12

ADN2848

Data Sheet

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

LBWSET 1

ASET 2

ERSET 3

PSET 4

IMPD 5

IMPDMON 6

GND4 7

24 IBMON

23 IMMON

22 GND3

PIN 1

INDICATOR

ADN2848

21 V

TOP VIEW

20 ALS

19 FAIL

18 DEGRADE

17 CLKSEL

(Not to Scale)

4 8

NOTES

1. THE EXPOSED PAD ON THE BOTTOM OF THE PACKAGE

MUST BE CONNECTED TO THE DEVICE GND.

Figure 3. Pin Configuration

Table 3. Pin Function Descriptions

Pin No.

Mnemonic

LBWSET

ASET

Description

Loop Bandwidth Select.

Alarm Threshold Set Pin.

ERSET

PSET

Extinction Ratio Set Pin.

Average Optical Power Set Pin.

IMPD

Monitor Photodiode Input.

IMPDMON

GND4

V_CC4

Mirrored Current from Monitor Photodiode—Current Source.

Supply Ground.

Supply Voltage.

ERCAP

PAVCAP

V_CC1

DATAN

DATAP

GND1

CLKP

Extinction Ratio Loop Capacitor.

Average Power Loop Capacitor.

Supply Voltage.

Data Negative Differential Terminal.

Data Positive Differential Terminal.

Supply Ground.

Data Clock Positive Differential Terminal. This pin is used if CLKSEL = V_CC.

Data Clock Negative Differential Terminal. This pin is used if CLKSEL = V_CC.

Clock Select (Active = V_CC). This pin is used if data is clocked into chip.

DEGRADE Alarm Output.

FAIL Alarm Output.

Automatic Laser Shutdown.

Supply Voltage.

Supply Ground.

Modulation Current Mirror Output—Current Source.

Bias Current Mirror Output—Current Source.

Supply Voltage.

Modulation Current Negative Output. Connect this pin via a matching resistor to V_CC.

Supply Ground.

Modulation Current Positive Output. Connect this pin to the laser diode.

Supply Ground.

Laser Diode Bias Current—Current Sink.

29, 30

CLKN

CLKSEL

DEGRADE

FAIL

ALS

V_CC3

GND3

IMMON

IBMON

V_CC2

IMODN

GND2

IMODP

GND2

I_BIAS

CCBIAS

Connected to Vcc When DC-Coupled to Laser Diode; Connected to I_BIASWhen AC-Coupled to Laser

Diode—Current Sink.

EPAD

Exposed Pad. The exposed pad on the bottom of the package must be connected to the device GND.

Rev. B | Page 6 of 12

Data Sheet

ADN2848

THEORY OF OPERATION

A laser diode (LD) has current-in to light-out transfer functions, as

shown in Figure 4. Two key characteristics of this transfer function

are the threshold current, I_TH, and slope in the linear region beyond

the threshold current, referred to as slope efficiency, or LI.

where:

_AVis the average MPD current.

_CWis the dc optical power specified on the laser data sheet.

_{MPD_CW}is the MPD current at that specified P_CW

ER =

P1 + P0

_AVis the average power required.

ER is the desired extinction ratio (ER = P1/P0).

ΔP

ΔI

LI =

ΔI

Note that I_ERSETand I_PSETchange from device to device; however,

the control loops determine the actual values. It is not required

to know the exact values for LI or MPD optical coupling.

CURRENT

LOOP BANDWIDTH SELECTION

Figure 4. Laser Transfer Function

For continuous operation, the user hardwires the LBWSET pin

high and uses 1 μF capacitors to set the actual loop bandwidth.

These capacitors are placed between the PAVCAP and ERCAP pins

and ground. It is important that these capacitors are low leakage

multilayer ceramics with an insulation resistance greater than

100 GΩ or a time constant of 1000 seconds, whichever is less.

CONTROL

A monitor photodiode, MPD, is required to control the LD. The

MPD current is fed into the ADN2848 to control the power and

extinction ratio, continuously adjusting the bias current and

modulation current in response to the laser’s changing

threshold current and light-to-current slope efficiency.

Setting LBSET low and using 47 nF capacitors results in a

shorter loop time constant (a 10× reduction over using 1 μF

capacitors and keeping LBWSET high).

The ADN2848 uses automatic power control, APC, to maintain

a constant average power over time and temperature.

Table 4.

Operation

Mode

The ADN2848 uses closed-loop extinction ratio control to

allow optimum setting of extinction ratio for every device.

Thus, SONET/SDH interface standards can be met over device

variation, temperature, and laser aging. Closed-loop

modulation control eliminates the need to either overmodulate

the LD or include external components for temperature

compensation. This reduces research and development time

and second sourcing issues caused by characterizing LDs.

Recommended Recommended

LBWSET PAVCAP

ERCAP

Continuous

50 Mbps to

1.25 Gbps

Optimized for

1.25 Gbps

High

1 μF

Low

47 nF

ALARMS

Average power and extinction ratio are set using the PSET and

ERSET pins, respectively. Potentiometers are connected

between these pins and ground. The potentiometer R_PSETis used

to change the average power. The potentiometer R_ERSETis used

to adjust the extinction ratio. Both PSET and ERSET are kept

1.2 V above GND.

The ADN2848 is designed to allow interface compliance to

ITU-T-G958 (11/94), section 10.3.1.1.2 (transmitter fail) and

section 10.3.1.1.3 (transmitter degrade). The ADN2848 has two

active high alarms, DEGRADE and FAIL. A resistor between

ground and the ASET pin is used to set the current at which

these alarms are raised. The current through the ASET resistor

is a ratio of 100:1 to the FAIL alarm threshold. The DEGRADE

alarm is raised at 90% of this level.

For an initial setup, R_PSETand R_ERSETpotentiometers can be

calculated using the following formulas:

1.2 V

R_PSET

(Ω)

I_AV

1.2 V

R_ERSET

Ω

( )

I_{MPD _ CW}

ER − 1

× P_AV

ER + 1

Rev. B | Page 7 of 12

ADN2848

Data Sheet

Example:

ADN2848

DATAP

DATAN

I_FAIL= 50 mA so I_DEGRADE= 45 mA

TO FLIP-FLOPS

50 mA

100

I_FAIL

100

I_ASET

= 500 μA

50Ω 50Ω

REG

1.2 V

1.2

R_ASET* =

= 2.4 kΩ

I_ASET500 μA

R = 2.5kΩ, DATA

R = 3kΩ, CLK

*The smallest valid value for R_ASETis 1.2 kΩ, because this corresponds to the

maximum I_BIASof 100 mA.

400µA TYP

The laser degrade alarm, DEGRADE, is provided to give a

warning of imminent laser failure if the laser diode degrades

further or if environmental conditions such as increasing

temperature continue to stress the LD.

Figure 5. AC Coupling of Data Inputs

For input signals that exceed 500 mV p-p single-ended, it is

necessary to insert an attenuation circuit as shown in Figure 6.

The laser fail alarm, FAIL, is activated when the transmitter can

no longer be guaranteed to be SONET/SDH compliant. This

occurs when one of the following conditions arise:

ADN2848

DATAP/CLKP

DATAN/CLKN

•

The ASET threshold is reached.

The ALS pin is set high. This shuts off the modulation

and bias currents to the LD, resulting in the MPD

current dropping to zero. This gives closed-loop

feedback to the system that ALS has been enabled.

NOTE THAT R = 100Ω = THE DIFFERENTIAL

INPUT IMPEDANCE OF THE ADN2848.

Figure 6. Attenuation Circuit

CCBIAS

DEGRADE is raised only when the bias current exceeds 90% of

ASET current.

When the laser is used in ac-coupled mode, the CCBIAS pin

and the I_BIASpin are tied together (see Figure 9). In dc-coupled

mode, CCBIAS is tied to V_CC

MONITOR CURRENTS

IBMON, IMMON, and IMPDMON are current controlled

current sources from V_CC. They mirror the bias, modulation,

and MPD current for increased monitoring functionality. An

external resistor to GND gives a voltage proportional to the

current monitored.

I_BIAS

To achieve optimum optical eye quality, a pull-up resistor R_Z, as

shown in Figure 8 and Figure 9, is required. The recommended

R_Zvalue is approximately 200 Ω ~ 500 Ω.

AUTOMATIC LASER SHUTDOWN

If the monitoring function IMPDMON is not required, the

IMPD pin must be grounded and the monitor photodiode

output must be connected directly to the PSET pin.

The ADN2848 ALS allows compliance to ITU-T-G958 (11/94),

section 9.7. When ALS is logic high, both the bias and the

modulation currents are turned off. Correct operation of ALS is

confirmed by the FAIL alarm being raised when ALS is

asserted. Note that this is the only time that DEGRADE is low

while FAIL is high.

DATA AND CLOCK INPUTS

Data and clock inputs are ac-coupled (10 nF capacitors

recommended) and terminated via a 100 Ω internal resistor

between DATAP and DATAN and also between the CLKP and

CLKN pins. There is a high impedance circuit to set the

common-mode voltage, which is designed to allow for

maximum input voltage headroom over temperature. It is

necessary that ac coupling be used to eliminate the need for

matching between common-mode voltages.

ALARM INTERFACES

The FAIL and DEGRADE outputs have an internal 30 kΩ pull-

up resistor that is used to pull the digital high value to V_CC

However, the alarm output can be overdriven with an external

resistor, allowing alarm interfacing to non-V_CClevels. Non-V_CC

alarm output levels must be below the V_CCused for the

ADN2848.

Rev. B | Page 8 of 12

Data Sheet

ADN2848

Caution must be used when choosing component values for

POWER CONSUMPTION

ac coupling to ensure that the time constants (L/R and RC, see

Figure 9) are sufficiently long for the data rate and the expected

number of CIDs (consecutive identical digits). Failure to do this

could lead to pattern dependent jitter and vertical eye closure.

For designs with low series resistance, or where external

components become impractical, the ADN2848 supports direct

connection to the laser diode (see Figure 8). In this case, care

must be taken to ensure that the voltage drop across the laser

diode does not violate the minimum compliance voltage on the

IMODP pin.

The ADN2848 die temperature must be kept below 125°C. The

LFCSP_VQ package has an exposed paddle. The exposed

paddle should be connected in such a manner that it is at the

same potential as the ADN2848 ground pins. The θ_JAfor the

package is shown under the Absolute Maximum Ratings. Power

consumption can be calculated using

I_CC= I_CCMIN+ 0.3 I_MOD

P = V_CC× I_CC+ (I_BIAS× V_{BIAS_PIN}) + I_MOD(V_{MODP_PIN}+ V_{MODN_PIN})/2

T_DIE= T_AMBIENT+ θ_JA× P

OPTICAL SUPERVISOR

The PSET and ERSET potentiometers can be replaced with a

dual digital potentiometer, the ADN2850 (see Figure 7). The

ADN2850 provides an accurate digital control for the average

optical power and extinction ratio and ensures excellent

stability over temperature.

Thus, the maximum combination of I_BIAS+ I_MODmust be

calculated

where:

_CCMIN= 50 mA, the typical value of I_CCprovided on Page 3 with

_BIAS= I_MOD= 0.

T_DIE= die temperature.

IMPD

_AMBIENT= ambient temperature.

ADN2848

ADN2850

SDI

_{BIAS_PIN}= voltage at I_BIASpin.

IMODP

SDO

BIAS

DAC1

DAC2

PSET

_{MODP_PIN}= average voltage at IMODP pin.

_{MODN_PIN}= average voltage at IMODN pin.

ERSET

CLK

LASER DIODE INTERFACING

Many laser diodes designed for 1.25 Gbps operation are

packaged with an internal resistor to bring the effective

impedance up to 25 Ω in order to minimize transmission line

effects. In high current applications, the voltage drop across this

resistor, combined with the laser diode forward voltage, makes

direct connection between the laser and the driver impractical

in a 3 V system. AC coupling the driver to the laser diode

removes this headroom constraint.

DATAP

DATAN

IDTONE

Figure 7. Application Using the ADN2850 Dual 10-Bit Digital Potentiometer

with Extremely Low Temperature Coefficient as an Optical Supervisor

Rev. B | Page 9 of 12

ADN2848

Data Sheet

ALS

1kΩ

FAIL

DEGRADE

1.5kΩ

15kΩ

10nF

CLKN

CLKP

CLKN

CLKP

IMODN

GND2

10nF

GND1

MPD

IMODP

GND2

DATAP

DATAN

DATAP

DATAN

ADN2848

10nF

GND2

1µF

PAVCAP

ERCAP

BIAS

10µH

CCBIAS

1µF

EACH V

SHOULD HAVE BYPASS CAPACITORS AS CLOSE

AS POSSIBLE TO THE ACTUAL SUPPLY PINS ON THE

ADN2848 AND THE LASER DIODE USED.

CONSERVATIVE DECOUPLING WOULD INCLUDE 100pF

CAPACITORS IN PARALLEL WITH 10nF CAPACITORS.

1.5kΩ

LD = LASER DIODE

MPD = MONITOR PHOTODIODE

10nF

GND

10nF

10µF

NOTES

DESIGNATES COMPONENTS THAT NEED TO BE OPTIMIZED FOR THE TYPE OF LASER USED.

FOR DIGITAL PROGRAMMING. THE ADN2850 OR THE ADN2860 OPTICAL SUPERVISOR CAN BE USED.

Figure 8. DC-Coupled 50 Mbps to 1.25 Gbps Test Circuit, Data Not Clocked

Rev. B | Page 10 of 12

Data Sheet

ADN2848

FAIL

ALS

1kΩ

DEGRADE

1.5kΩ

15kΩ

10nF

CLKN

CLKP

CLKN

CLKP

IMODN

GND2

10nF

GND1

MPD

IMODP

GND2

DATAP

DATAN

DATAP

DATAN

ADN2848

10nF

GND2

1µF

PAVCAP

ERCAP

BIAS

10µH

CCBIAS

1µF

EACH V

SHOULD HAVE BYPASS CAPACITORS AS CLOSE

AS POSSIBLE TO THE ACTUAL SUPPLY PINS ON THE

ADN2848 AND THE LASER DIODE USED.

CONSERVATIVE DECOUPLING WOULD INCLUDE 100pF

CAPACITORS IN PARALLEL WITH 10nF CAPACITORS.

1.5kΩ

LD = LASER DIODE

MPD = MONITOR PHOTODIODE

10nF

GND

10nF

10µF

NOTES

DESIGNATES COMPONENTS THAT NEED TO BE OPTIMIZED FOR THE TYPE OF LASER USED.

FOR DIGITAL PROGRAMMING. THE ADN2850 OR THE ADN2860 OPTICAL SUPERVISOR CAN BE USED.

Figure 9. AC-Coupled 50 Mbps to 1.25 Gbps Test Circuit, Data Not Clocked

Figure 10. A 1.244 Mbps Optical Eye. Temperature at 25°C.

Average Power = 0 dBm, Extinction Ratio = 10 dB, PRBS 31 Pattern,

1 Gb Ethernet Mask. Eye Obtained Using a DFB Laser.

Figure 11. A 1.244 Mbps Optical Eye. Temperature at 85°C.

Average Power = 0 dBm, Extinction Ratio = 10 dBm, PRBS 31 Pattern,

1 Gb Ethernet Mask. Eye Obtained Using a DFB Laser.

Rev. B | Page 11 of 12

ADN2848

Data Sheet

OUTLINE DIMENSIONS

5.10

5.00 SQ

4.90

0.30

0.25

0.18

PIN 1

INDICATOR

PIN 1

INDICATOR

0.50

BSC

3.25

3.10 SQ

2.95

EXPOSED

PAD

0.50

0.40

0.30

0.25 MIN

TOP VIEW

BOTTOM VIEW

FOR PROPER CONNECTION OF

THE EXPOSED PAD, REFER TO

THE PIN CONFIGURATION AND

FUNCTION DESCRIPTIONS

0.80

0.75

0.70

0.05 MAX

0.02 NOM

SECTION OF THIS DATA SHEET.

COPLANARITY

0.08

0.20 REF

SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MO-220-WHHD.

Figure 12. 32-Lead Lead Frame Chip Scale Package [LFCSP_WQ]

5 mm × 5 mm Body, Very Very Thin Quad

(CP-32-7)

Dimensions shown in millimeters

ORDERING GUIDE

Model¹

ADN2848ACPZ-32

ADN2848ACPZ-32-RL

ADN2848ACPZ-32-RL7

Temperature Range

–40°C to +85°C

Package Description

32-Lead LFCSP_WQ

Package Option

CP-32-7

–40°C to +85°C

¹Z = RoHS Compliant Part.

registered trademarks are the property of their respective owners.

D02746-0-2/13(B)

Rev. B | Page 12 of 12

ADN2848ACPZ-32 [ROCHESTER]

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