CD74FCT244SM96G4 [ROCHESTER]

Bus Driver, FCT Series, 2-Func, 4-Bit, True Output, BICMOS, PDSO20, GREEN, PLASTIC, SSOP-20;
CD74FCT244SM96G4
型号: CD74FCT244SM96G4
厂家: Rochester Electronics    Rochester Electronics
描述:

Bus Driver, FCT Series, 2-Func, 4-Bit, True Output, BICMOS, PDSO20, GREEN, PLASTIC, SSOP-20

驱动 信息通信管理 光电二极管 逻辑集成电路
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CD74FCT244, CD74FCT244AT  
BiCMOS OCTAL BUFFERS/LINE DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS722B – JULY 2000 – REVISED AUGUST 2003  
CD74FCT244 . . . E, M, OR SM PACKAGE  
CD74FCT244AT . . . E OR M PACKAGE  
(TOP VIEW)  
BiCMOS Technology With Low Quiescent  
Power  
Buffered Inputs  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
1OE  
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
GND  
V
CC  
Noninverted Outputs  
2OE  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
2A2  
1Y4  
2A1  
Input/Output Isolation From V  
CC  
Controlled Output Edge Rates  
64-mA Output Sink Current  
Output Voltage Swing Limited to 3.7 V  
SCR Latch-Up-Resistant BiCMOS Process  
and Circuit Design  
description/ordering information  
The CD74FCT244 and CD74FCT244AT are octal  
buffer/line drivers with 3-state outputs using a  
small-geometryBiCMOStechnology. The output stages are a combination of bipolar and CMOS transistors that  
limit the output high level to two diode drops below V . This resultant lowering of output swing (0 V to 3.7 V)  
CC  
reduces the power-bus ringing [a source of electromagnetic interference (EMI)] and minimizes V bounce and  
CC  
ground bounce and their effects during simultaneous output switching. The output configuration also enhances  
switching speed and is capable of sinking 64 mA.  
These devices are organized as two 4-bit buffers/line drivers with separate active-low output-enable (OE)  
inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs  
are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP – E  
SOIC – M  
Tube  
CD74FCT244E  
CD74FCT244E  
Tube  
CD74FCT244M  
74FCT244M  
Tape and reel  
CD74FCT244M96  
CD74FCT244SM96  
CD74FCT244ATE  
CD74FCT244ATM  
CD74FCT244ATM96  
0°C to 70°C  
SSOP – SM Tape and reel  
FCT244SM  
PDIP – E  
Tube  
CD74FCT244ATE  
Tube  
SOIC – M  
74FCT244ATM  
Tape and reel  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
FUNCTION TABLE  
(each buffer/driver)  
INPUTS  
OUTPUT  
Y
OE  
A
H
L
L
L
H
L
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CD74FCT244, CD74FCT244AT  
BiCMOS OCTAL BUFFERS/LINE DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS722B – JULY 2000 – REVISED AUGUST 2003  
logic diagram (positive logic)  
1
19  
11  
1OE  
2OE  
2A1  
2
4
6
8
18  
16  
14  
12  
9
7
5
3
1A1  
1A2  
1A3  
1A4  
1Y1  
1Y2  
1Y3  
1Y4  
2Y1  
2Y2  
2Y3  
2Y4  
13  
15  
17  
2A2  
2A3  
2A4  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
DC supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6 V  
CC  
I
DC input clamp current, I (V < –0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA  
IK  
DC output clamp current, I  
(V < –0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA  
OK  
O
DC output sink current per output pin, I  
DC output source current per output pin, I  
Continuous current through V , I  
Continuous current through GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 528 mA  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 mA  
OL  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30 mA  
OH  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140 mA  
CC CC  
Package thermal impedance, θ (see Note 1): E package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W  
JA  
M package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W  
SM package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C  
Storage temperature range, T  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The package thermal impedance is calculated in accordance with JESD 51-7.  
recommended operating conditions (see Note 2)  
MIN  
4.75  
2
MAX  
UNIT  
V
V
V
V
V
V
Supply voltage  
5.25  
CC  
IH  
IL  
High-level input voltage  
Low-level input voltage  
Input voltage  
V
0.8  
V
0
0
V
V
V
I
CC  
Output voltage  
V
O
CC  
I
I
High-level output current  
Low-level output current  
Input transition rise or fall rate (slew rate)  
Operating free-air temperature  
–15  
64  
mA  
mA  
ns/V  
°C  
OH  
OL  
t/v  
10  
T
0
70  
A
NOTE 2: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CD74FCT244, CD74FCT244AT  
BiCMOS OCTAL BUFFERS/LINE DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS722B – JULY 2000 – REVISED AUGUST 2003  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
T
= 25°C  
A
PARAMETER  
TEST CONDITIONS  
V
CC  
MIN  
MAX  
UNIT  
MIN  
MAX  
V
V
V
I = –18 mA  
4.75 V  
4.75 V  
4.75 V  
5.25 V  
5.25 V  
5.25 V  
5.25 V  
5.25 V  
–1.2  
–1.2  
V
V
IK  
I
I
= –15 mA  
= 64 mA  
2.4  
2.4  
OH  
OL  
OH  
OL  
I
0.55  
0.1  
0.55  
1
V
I
I
I
I
V = V  
I
or GND  
A
I
CC  
V
O
= V or GND  
CC  
0.5  
10  
A
OZ  
OS  
CC  
V = V  
or GND,  
or GND,  
V = 0  
O
–60  
–60  
mA  
A
I
CC  
CC  
V = V  
I
I
O
= 0  
8
1.6  
10  
80  
1.6  
10  
One input at 3.4 V,  
V = V or GND  
Other inputs at V  
or GND  
mA  
pF  
pF  
I  
CC  
CC  
C
C
i
I
CC  
= V or GND  
CC  
V
15  
15  
o
O
Not more than one output should be tested at a time, and the duration of the test should not exceed 100 ms.  
This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or V  
.
CC  
switching characteristics over recommended operating free-air temperature range,  
= 5 V 0.25 V (unless otherwise noted) (see Figure 1)  
V
CC  
CD74FCT244  
CD74FCT244AT  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
T
A
= 25°C  
T
A
= 25°C  
UNIT  
MIN  
MAX  
MIN  
MAX  
TYP  
4.5  
6
TYP  
3.8  
4.8  
4.5  
t
t
t
A
1.5  
1.5  
1.5  
6.5  
8
1.5  
1.5  
1.5  
5.3  
6.5  
5.8  
ns  
ns  
ns  
Y
Y
Y
pd  
en  
dis  
OE  
OE  
5
7
noise characteristics, V  
= 5 V, C = 50 pF, T = 25°C  
CC  
L
A
PARAMETER  
MIN  
TYP  
1
MAX  
UNIT  
V
V
V
V
Quiet output, maximum dynamic V  
V
V
V
V
OL(P)  
OH(V)  
IH(D)  
IL(D)  
OL  
Quiet output, minimum dynamic V  
High-level dynamic input voltage  
Low-level dynamic input voltage  
0.5  
OH  
2
0.8  
operating characteristics, V  
= 5 V, T = 25°C  
A
CC  
PARAMETER  
TEST CONDITIONS  
No load, f = 1 MHz  
TYP  
UNIT  
C
Power dissipation capacitance  
35  
pF  
pd  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CD74FCT244, CD74FCT244AT  
BiCMOS OCTAL BUFFERS/LINE DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS722B – JULY 2000 – REVISED AUGUST 2003  
PARAMETER MEASUREMENT INFORMATION  
7 V  
Open  
GND  
S1  
500 Ω  
TEST  
/t  
S1  
From Output  
Under Test  
Test  
Point  
From Output  
Under Test  
t
Open  
7 V  
PLH PHL  
t
/t  
PLZ PZL  
C
= 50 pF  
C
= 50 pF  
L
L
500 Ω  
500 Ω  
t
/t  
Open  
7 V  
(see Note A)  
PHZ PZH  
(see Note A)  
Open Drain  
LOAD CIRCUIT FOR  
LOAD CIRCUIT FOR  
TOTEM-POLE OUTPUTS  
3-STATE AND OPEN-DRAIN OUTPUTS  
3 V  
90%  
90%  
1.5 V  
10%  
1.5 V  
10%  
0 V  
t
t
r
f
VOLTAGE WAVEFORM  
INPUT RISE AND FALL TIMES  
3 V  
1.5 V  
Timing Input  
Data Input  
0 V  
t
w
t
h
t
3 V  
0 V  
su  
3 V  
0 V  
1.5 V  
1.5 V  
Input  
1.5 V  
1.5 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
3 V  
0 V  
3 V  
Output  
Control  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
Input  
0 V  
V
t
t
t
t
t
t
PLZ  
PLH  
PHL  
PZL  
PZH  
3.5 V  
Output  
Waveform 1  
(see Note B)  
OH  
In-Phase  
Output  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
V
V
+ 0.3 V  
OL  
V
OL  
V
OL  
t
t
PHL  
PLH  
PHZ  
V
V
V
OH  
OH  
Output  
Waveform 2  
(see Note B)  
– 0.3 V  
Out-of-Phase  
Output  
OH  
1.5 V  
1.5 V  
0 V  
OL  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
INVERTING AND NONINVERTING OUTPUTS  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
NOTES: A. includes probe and jig capacitance.  
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, Z = 50 , t and t = 2.5 ns.  
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.  
E.  
F.  
G.  
t
t
t
and t  
and t  
and t  
are the same as t  
are the same as t  
are the same as t  
.
dis  
en  
.
pd  
PLZ  
PZL  
PHL  
PHZ  
PZH  
PLH  
.
Figure 1. Load Circuit and Voltage Waveforms  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
18-Sep-2008  
PACKAGING INFORMATION  
Orderable Device  
CD74FCT244ATE  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
PDIP  
N
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
CD74FCT244ATEE4  
CD74FCT244ATM  
CD74FCT244ATM96  
CD74FCT244ATM96E4  
CD74FCT244ATM96G4  
CD74FCT244ATME4  
CD74FCT244ATMG4  
CD74FCT244E  
PDIP  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
PDIP  
PDIP  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SSOP  
SSOP  
SSOP  
N
20  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
DW  
DW  
DW  
DW  
DW  
DW  
N
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
20  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
CD74FCT244EE4  
N
20  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
CD74FCT244M  
DW  
DW  
DW  
DW  
DW  
DW  
DB  
DB  
DB  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
CD74FCT244M96  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
CD74FCT244M96E4  
CD74FCT244M96G4  
CD74FCT244ME4  
CD74FCT244MG4  
CD74FCT244SM96  
CD74FCT244SM96E4  
CD74FCT244SM96G4  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
18-Sep-2008  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
11-Mar-2008  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0 (mm)  
B0 (mm)  
K0 (mm)  
P1  
W
Pin1  
Diameter Width  
(mm) W1 (mm)  
(mm) (mm) Quadrant  
CD74FCT244ATM96  
CD74FCT244M96  
CD74FCT244SM96  
SOIC  
SOIC  
SSOP  
DW  
DW  
DB  
20  
20  
20  
2000  
2000  
2000  
330.0  
330.0  
330.0  
24.4  
24.4  
16.4  
10.8  
10.8  
8.2  
13.0  
13.0  
7.5  
2.7  
2.7  
2.5  
12.0  
12.0  
12.0  
24.0  
24.0  
16.0  
Q1  
Q1  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
11-Mar-2008  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
CD74FCT244ATM96  
CD74FCT244M96  
CD74FCT244SM96  
SOIC  
SOIC  
SSOP  
DW  
DW  
DB  
20  
20  
20  
2000  
2000  
2000  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
41.0  
41.0  
33.0  
Pack Materials-Page 2  
MECHANICAL DATA  
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001  
DB (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
28 PINS SHOWN  
0,38  
0,22  
0,65  
28  
M
0,15  
15  
0,25  
0,09  
5,60  
5,00  
8,20  
7,40  
Gage Plane  
1
14  
0,25  
A
0°ā8°  
0,95  
0,55  
Seating Plane  
0,10  
2,00 MAX  
0,05 MIN  
PINS **  
14  
16  
20  
24  
28  
30  
38  
DIM  
6,50  
5,90  
6,50  
5,90  
7,50  
8,50  
7,90  
10,50  
9,90  
10,50 12,90  
A MAX  
A MIN  
6,90  
9,90  
12,30  
4040065 /E 12/01  
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D. Falls within JEDEC MO-150  
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