FAGD16575A32BA [ROCHESTER]

ATM/SONET/SDH SUPPORT CIRCUIT, PQFP32, 5 X 5 MM, 1.40 MM HEIGHT, HEAT SINK, PLASTIC, TQFP-32;


型号：	FAGD16575A32BA
厂家：	Rochester Electronics
描述：	ATM/SONET/SDH SUPPORT CIRCUIT, PQFP32, 5 X 5 MM, 1.40 MM HEIGHT, HEAT SINK, PLASTIC, TQFP-32 ATM 异步传输模式电信电信集成电路
文件：	总7页 (文件大小：790K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

2.5 Gbit/s

Laser Driver

GD16575A

an Intel company

Preliminary

General Description

Features

The GD16575A is a high performance

low power 2.5 Gbit/s Laser Driver.

A Mark-Space monitor is available on the

pins MARKP and MARKN.

Complies with ITU-T STM-16 and

SONET OC-48 standards.

The GD16575A is designed to meet and

exceed ITU-T STM-16 or SONET OC-48

fiberoptic communication systems re-

quirements.

The GD16575A is implemented in a Sili-

con Bipolar process and requires a single

+5 V supply or a single -5.2 V supply.

Intended for driving a 50 W load,

e.g. a laser diode with 50 W input

impedance.

The circuit is available in a thermally

enhanced 32-pin TQFP plastic package.

Large modulation current adjustment

range from 5 mA to 60 mA.

The GD16575A is designed to sink a

Modulation Current into the IOUT pin and

a Pre-Bias Current into the IPRE pin. The

Modulation Current is adjustable up to

60 mA by means of the pin VMOD. The

Pre-Bias Current may be adjusted up to

50 mA by means of the VPRE pin.

Output voltage over / undershoot less

than ±2 % respectively ±5 %.

Rise / fall times less than 110/100 ps.

Laser diode pre-bias adjustable up to

50 mA.

Mark-Space monitor.

Internal 50 W termination of data

inputs.

VADJEF VMOD VADJBUF

VPRE

Operates up to 3.5 Gbit/s.

Modulation

Current

Control

Pre-Bias

Current

Control

Power dissipation: 0.38 W.

Excluding Modulation Current and

Pre-bias Current.

IPRE

Silicon Bipolar process.

VDD

VDDCONT

DINT

32 pin thermally enhanced TQFP

plastic package.

Input

Buffer

Output

Driver

DIN

IOUT

DINQ

IOUTN

VEE

VEEP

VEEB

Applications

DINQT

Mark/Space

Monitor

Tele Communication:

–

SDH STM-16

SONET OC-48

MARKP

MARKN

Datacom up to 3.125 Gbit/s.

Electro Absorption laser driver.

Direct Modulation laser driver.

Data Sheet Rev.: 8

Functional Details

GD16575A is a 2.5 Gbit/s laser driver. It

is capable of driving high power laser di-

odes, typically having input impedance of

50 W, at a maximum modulation current

of 60 mA and a maximum pre-bias cur-

rent of 50 mA.

The output voltage swing across the ex-

ternal load may be varied accordingly.

The modulation current control on pin

VMOD is implemented as a current mir-

ror and therefore sinks a current propor-

tional to the modulation current. The

current sink into the VMOD pin is ap-

proximately 3/80 of the modulation

current.

current range, when driving a 50 W load.

Similarly the voltage undershoot is less

than 5 %.

A mark-space monitor is provided

through the pins MARKP and MARKN.

These may be connected as shown in

the application diagram below, with a ca-

pacitor across the two outputs and a

comparator (or Op-amp) to determine the

mark density.

The differential data inputs (DINT and

DINQT) are internally terminated to the

DINT and DINQT respectively with 50 W

resistors. This allows loop-through termi-

nation on both inputs and ensures opti-

mum jitter performance. The input

Two additional pins (VADJBUF and

VADJEF) are available in order to opti-

mise the performance of the output sig-

nal quality, specifically with respect to

overshoot and undershoot. Typically best

performance is obtained if these pins are

connected to VMOD.

sensitivity when driven with a single

ended signal is better than 150 mV.

AC Coupled Output

When DC coupled the output swing will

be limited by IOUT output voltage speci-

fied to -2 V. For maximum output voltage

swing the output should be AC coupled

as shown on Figure 2 or VDD should be

raised.

The output pin (IOUT) is an open collec-

tor output designed for driving external

loads with 50 W characteristic imped-

ance. Because of the nature of an open

collector the output therefore may be re-

garded as a current switch, with infinite

output impedance. The characteristic im-

pedance through the package is approxi-

mately 50 W. Optimum performance of

GD16575A therefore is achieved if the

output is terminated into a 50 W imped-

ance.

The pre-bias current is controlled by the

pin VPRE and can be controlled from

0 mA to 50 mA. The pre-bias current

control on pin VPRE is implemented as a

current mirror and therefore sinks a cur-

rent proportional to the pre-bias current.

The current sink into the VPRE pin is

approximately 3/500 of the pre-bias

current.

VDD

L1 and L3 = Siemens Chip

Inductors (B82432A1224K).

L2 and L4 = Siemens ferrite

cores B64290-A36-X33 with

8 turns of 0.22mm Cu-Wire.

220uH

100nF

An important parameter for laser drivers

is voltage overshoot on the output pin

(IOUT), because it determines the extinc-

tion ratio. GD16575A has been designed

with special emphasis on achieving a

very small voltage overshoot. For

IOUT

The output modulation current is con-

trolled by the pin VMOD and can be con-

trolled in the range from 0 mA to 60 mA,

however DC-coupling of the output is

only possible in the range from 5 mA to

40 mA. Operated with an AC-coupling,

the output modulation current can be

controlled in the range 5 mA to 60 mA.

IOUTN

50W

VDD

GD16575A the voltage overshoot is less

than 2 % across the full modulation

Figure 2. AC Coupled Output

Control Voltage from

Modulation Current

Control System

Control Voltage from

Pre-Bias Current

Control System

Laser Diode Equivalent

50 W Input Impedance

VMOD / 20

VPRE / 16

VDD

Modulation

Current

Control

Pre-Bias

Current

Control

IPRE / 19

VDD

100n

DINT / 26

DIN / 27

Input

Buffer

Output

Driver

Differential or

Single-ended

Data Signal

IOUT / 13, 14

DINQ / 30

VDD

IOUTN / 11, 12

DINQT / 31

100n

Mark/Space

Monitor

VDD

MARKP / 7

MARKN / 6

100n

VEEP / 18

Ref.

Negative

Supply

Figure 1. Application Diagram

Data Sheet Rev.: 8

GD16575A

Page 2 of 6

Pin List

Mnemonic:

Pin No.:

Pin Type:

Description:

DIN, DINQ

27, 30

AC IN

Data inputs. Internally terminated in 50 W to DINT and DINQT

respectively.

DINT, DINQT

IOUT, IOUTN

26, 31

14, 11

ANL IN

Termination voltages for DIN and DINQ.

OPEN

COLLECTOR

Laser Driver Output (2.5 Gbit/s). IOUT and IOUTN sink a modula-

tion current, which is controlled by the pin VMOD. The current into

IOUT is low when data is high on DIN.

IPRE

OPEN

COLLECTOR

Pre-bias current output. IPRE sinks a current, which is controlled

by the pin VPRE.

VMOD

ANL IN

Modulation current control input. The control system is made as a

current mirror. VMOD sinks a current proportional to the modula-

tion current. This current is approximately 3/80 times “The modu-

lation current”.

VPRE

ANL IN

Pre-bias current control input. The control system is made as a

current mirror. VPRE sinks a current proportional to the pre-bias

current. This current is approximately 3/500 times “The pre-bias

current”.

MARKP

MARKN

ANL OUT

ANL IN

PWR

Mark-space monitor outputs. High impedance CML outputs. The

output voltage of the MARKP pin is the same polarity as the volt-

age on the DIN input.

VADJBUF

VADJEF

Pins used to optimise the performance of the output in terms of

overshoot and undershoot. Typically optimum performance will be

achieved when shorted to VMOD.

VDD

2, 4, 9, 10, 12, 13,

15, 24, 28, 29

Ground pins for laser driver part.

VDDCONT

VEE

PWR

Ground pin for modulation current control system.

Negative supply pins for laser driver part.

Negative supply pin for output driver.

Negative supply pin for pre-bias circuitry.

Connect to VDD.

1, 5, 8, 23, 25, 32

VEEP

VEEB

Heat sink

Package back

Package Pinout

VEE

VDD

VEE

VDD

VDDCONT

VADJBUF

VADJEF

VMOD

IPRE

VDD

VEE

MARKN

MARKP

VEEP

VEE

VEEB

Figure 3. Package 32 TQFP, Top View

Data Sheet Rev.: 8

GD16575A

Page 3 of 6

Maximum Ratings

These are the limits beyond which the component may be damaged.

All voltages in table are referred to VDD.

All currents in table are defined positive out of the pin.

Symbol:

V_EE

Characteristic:

Conditions:

MIN.:

-6

TYP.:

MAX.:

UNIT:

Power Supply

V_O

Applied Voltage (All Outputs)

Applied Voltage (All Inputs)

Input Current (AC IN)

Input Current (VMOD)

V_EE-0.5

-1

V_I

0.5

I_IAC IN

I_IVMOD

I_IVPRE

T_O

°C

-4

Input Current (VPRE, VADJBUF and VADJEF) Note 1

-1

Operating Temperature

Storage Temperature

Base

-55

+125

+150

T_S

-65

°C

Note 1: Voltage and/or current should be externally limited to specified range.

DC Characteristics

T_CASE= -40 °C to 85 °C.

All voltages in table are referred to VDD.

All currents in table are defined positive out of the pin.

Symbol:

V_EE

Characteristic:

Conditions:

MIN.:

TYP.:

- 5.2

MAX.:

UNIT:

Power Supply

- 5.5

-4.7

I_EE

Negative Supply Current

Power Dissipation

I_OUT= 0 A

P_DISS

V_EE= - 5.0 V,

I_OUT= 0 A,

I_PRE= 0 A

0.38

0.5

_ppAN IN

Peak- peak Voltage when Input is Driven Single V_VTH=- 1.3V

ended.

150

800

V VMOD

I VMOD

Voltage Range for VMOD

Sink Current into pin VMOD

V_EE

- 6

V_DD

_INNN

Input Voltage Range for VPRE, VADJBUF, and

VADJEF

V_EE

V_DD

_SINKNN

Sink Current into pin VPRE, VADJBUF, and

VADJEF

- 1

_LOMARK

_OMARK

_OIPRE

I IPRE

_OIOUT

_Mod,HIIOUT

_Mod,LOIOUT

Low Output Voltage for Mark-Space Monitor

Output Impedance for Mark-Space Monitor

IPRE Output Voltage

- 2.0

4.0

-2.0

-50

-2.0

-60

-3

IPRE Current

IOUT Output Voltage

Note 1

IOUT High Modulation Current

IOUT Low Modulation Current

Note 1

Note 1, 2

Note 1: R_LOAD= 50 W AC coupled to VDD connected to pin IOUT. Sink current is controlled by the VMOD pin, and may be

adjusted in the range as specified. Notice that high modulation current means that the output voltage level is low.

Note 2: This is a leakage current. Maximum leakage current is present at maximum modulation current.

The leakage current decreases for smaller modulation currents.

Data Sheet Rev.: 8

GD16575A

Page 4 of 6

AC Characteristics

T_CASE= -40 °C to 85 °C.

Symbol:

Characteristic:

Conditions:

MIN.:

TYP.:

MAX.:

UNIT:

Mbit/s

f_MAXOUT

Data Output Frequency

Added Output Jitter

Output Rise Time

2500

_ppOUT

Note 1

110

100

_RISEOUT

_FALLOUT

Output Fall Time

t_OVEROUT

Voltage Output Overshoot

Voltage Output Undershoot

t_UNDEROUT

Note 1: R_LOAD= 50 W to V_DDconnected to pin IOUT. I_LD= 40 mA. Rise/Fall times at 20 – 80 % of HI/LO voltage levels.

Package Outline

Figure 4. Package 32L TQFP (5 x 5 x 1.4 mm)

Data Sheet Rev.: 8

GD16575A

Page 5 of 6

Device Marking

GD16575A

<As. Lot #> <YYWW>

Figure 5. Device Marking, 32 pin Package - Top View

Ordering Information

To order, please specify as shown below:

Product Name:

Intel Order Number:

Package Type:

Temperature Range:

GD16575A-32BA

FAGD16575A32BA

MM#: 836127

32L TQFP EDQUAD

-40..85 °C

GD16575A, Data Sheet Rev.: 8 - Date: 24 July 2001

an Intel company

Mileparken 22, DK-2740 Skovlunde

Denmark

Phone : +45 7010 1062

Distributor:

The information herein is assumed to be

reliable. GIGA assumes no responsibility

for the use of this information, and all such

information shall be at the users own risk.

Prices and specifications are subject to

change without notice. No patent rights or

licenses to any of the circuits described

herein are implied or granted to any third

party. GIGA does not authorise or warrant

any GIGA Product for use in life support

devices and/or systems.

Fax : +45 7010 1063

E-mail : sales@giga.dk

Web site : http://www.intel.com/ixa

An Intel company

Please check our Internet web site

for latest version of this data sheet.

FAGD16575A32BA [ROCHESTER]

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