J110RLRAG [ROCHESTER]
N-CHANNEL, Si, SMALL SIGNAL, JFET, TO-92, LEAD FREE, CASE 29, TO-226, 3 PIN;
| 型号： | J110RLRAG |
| 厂家： | 
Rochester Electronics |
| 描述： | N-CHANNEL, Si, SMALL SIGNAL, JFET, TO-92, LEAD FREE, CASE 29, TO-226, 3 PIN 开关 晶体管 |
| 文件： | 总5页 (文件大小：735K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
J110
JFET − General Purpose
N−Channel − Depletion
N−Channel Junction Field Effect Transistors, depletion mode
(Type A) designed for general purpose audio amplifiers, analog
switches and choppers.
http://onsemi.com
Features
1 DRAIN
• N−Channel for Higher Gain
• Drain and Source Interchangeable
• High AC Input Impedance
• High DC Input Resistance
3
GATE
• Low R
< 18 W
DS(on)
2 SOURCE
• Fast Switching t
+ t = 8.0 ns (Typ)
r
d(on)
• Low Noise en = 6.0 nV/√Hz @ 10 Hz (Typ)
• Pb−Free Packages are Available*
MARKING
DIAGRAM
MAXIMUM RATINGS
Rating
Gate−Source Voltage
Drain−Gate Voltage
Gate Current
Symbol
Value
−25
−25
10
Unit
Vdc
J110
AYWW G
G
CASE 29
TO−92 (TO−226)
STYLE 5
VG
V
S
Vdc
DG
1
2
I
mAdc
G
3
Total Device Dissipation
P
D
@ T = 25°C
310
2.82
mW
mW/°C
A
J110 = Device Code
Derate above 25°C
Operating Junction Temp Range
Storage Temperature Range
A
= Assembly Location
T
135
°C
°C
J
Y
= Year
WW
G
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
T
stg
−65 to +150
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
ORDERING INFORMATION
†
Device
Package
Shipping
J110
TO−92
1000 Units / Box
1000 Units / Box
J110G
TO−92
(Pb−Free)
J110RLRA
TO−92
2000 / Tape & Reel
2000 / Tape & Reel
J110RLRAG
TO−92
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Preferred devices are recommended choices for future use
and best overall value.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
November, 2005 − Rev. 6
J110/D
J110
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Characteristic
Symbol
Min
Max
Unit
STATIC CHARACTERISTICS
Gate−Source Breakdown Voltage
Gate Reverse Current
(I = −1.0 mAdc)
V
−25
−
Vdc
G
(BR)GSS
(V = −15 Vdc, V = 0)
I
GSS
−
−
−3.0
−200
nAdc
GS
DS
(V = −15 Vdc, V = 0, T = 100°C)
GS
DS
A
Gate−Source Cutoff Voltage
(V = 5.0 Vdc, I = 1.0 mAdc)
V
GS(off)
−0.5
−
−4.0
18
Vdc
W
DS
D
Drain Source On−Resistance
(V v 0.1 V, V = 0 V)
R
DS(on)
DS
GS
Zero−Gate−Voltage Drain Current (Note 1)
DYNAMIC CHARACTERISTICS
(V = 15 Vdc)
I
10
−
mAdc
DS
DSS
Drain−Gate and Source−Gate On−Capacitance
(V = V = 0, f = 1.0 MHz)
C
−
85
pF
dg(on)
+
DS
GS
C
sg(on)
C
dg(off)
C
sg(off)
Drain−Gate Off−Capacitance
(V = −10 Vdc, f = 1.0 MHz)
−
−
15
15
pF
pF
GS
Source−Gate Off−Capacitance
(V = −10 Vdc, f = 1.0 MHz)
GS
1. Pulse Width = 300 ms, Duty Cycle = 3.0%.
100
80
100
80
60
60
40
V
= 0 V
DS
5 V
40
V
= 0 V
DS
10 V
20
0
20
0
5 V
10 V
−4
, GATE−SOURCE VOLTAGE (VOLTS)
0
−4
−8
−12
−16
−20
0
−8
−12
−16
−20
V
, GATE−SOURCE VOLTAGE (VOLTS)
GS
V
GS
Figure 1. Common Source Input Capacitance
versus Gate−Source Voltage
Figure 2. Common Source Reverse Feedback
Capacitance versus Gate−Source Voltage
100
90
16
V
= 0 V
GS
80
−0.25 V
12
8
70
60
R
DS(on)
R
DS(on)
: V ≤ 0.1 V
DS
GS
: V = 0 V
−0.5 V
50
40
−0.75 V
30
20
V
V
: V = 5 V
DS
: I = 1.0 mA
D
GS(off)
GS(off)
4
0
−1 V
−1.25 V
10
0
0
−1
−2
−3
−4
−5
−6
−7
−8
0
2
4
6
8
10
12 14 16 18 20
V
, GATE−SOURCE CUTOFF VOLTAGE (VOLTS)
GS(off)
V , DRAIN−SOURCE VOLTAGE (VOLTS)
DS
Figure 3. On−Resistance versus Gate−Source
Cutoff Voltage
Figure 4. Output Characteristic
GS(off) = −2.0 V
V
http://onsemi.com
2
J110
200
180
160
300
270
240
V
= 0 V
V
= 0 V
GS
GS
−0.5 V
−0.5 V
−1 V
140
120
210
180
−1 V
−1.5 V
−2 V
100
80
150
120
−1.5 V
60
40
90
60
−2.5 V
−3 V
−2 V
20
0
30
0
−2.5 V
0
2
4
6
8
10
12 14 16 18 20
0
2
4
6
8
10
, DRAIN−SOURCE VOLTAGE (VOLTS)
DS
12 14 16 18 20
V
, DRAIN−SOURCE VOLTAGE (VOLTS)
DS
V
Figure 5. Output Characteristic
Figure 6. Output Characteristic
GS(off) = −4.0 V
VGS(off) = −3.0 V
V
400
360
320
V
= 0 V
−0.5 V
−1 V
GS
280
240
−1.5 V
−2 V
200
160
−2.5 V
120
80
−3 V
−3.5 V
40
0
0
2
4
6
8
10
12 14 16 18 20
V
, DRAIN−SOURCE VOLTAGE (VOLTS)
DS
Figure 7. Output Characteristic
GS(off) = −5.0 V
V
http://onsemi.com
3
J110
PACKAGE DIMENSIONS
TO−92 (TO−226)
CASE 29−11
ISSUE AL
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
A
B
2. CONTROLLING DIMENSION: INCH.
3. CONTOUR OF PACKAGE BEYOND DIMENSION R
IS UNCONTROLLED.
R
4. LEAD DIMENSION IS UNCONTROLLED IN P AND
BEYOND DIMENSION K MINIMUM.
P
L
SEATING
PLANE
INCHES
DIM MIN MAX
MILLIMETERS
K
MIN
4.45
4.32
3.18
0.407
1.15
2.42
0.39
MAX
5.20
5.33
4.19
0.533
1.39
2.66
0.50
−−−
A
B
C
D
G
H
J
0.175
0.170
0.125
0.016
0.045
0.095
0.015
0.500
0.250
0.080
0.205
0.210
0.165
0.021
0.055
0.105
0.020
D
X X
G
J
H
V
K
L
−−− 12.70
−−−
6.35
2.04
−−−
−−−
C
N
P
R
V
0.105
2.66
2.54
−−−
−−− 0.100
SECTION X−X
0.115
0.135
−−−
−−−
2.93
3.43
1
N
−−−
N
STYLE 5:
PIN 1. DRAIN
2. SOURCE
3. GATE
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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J110/D
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