LM4839MT_技术文档

April 2002

LM4839

Stereo 2W Audio Power Amplifiers

with DC Volume Control, Bass Boost, and Input Mux

General Description

Key Specifications

n P_Oat 1% THD+N

The LM4839 is a monolithic integrated circuit that provides

DC volume control, and stereo bridged audio power amplifi-

ers capable of producing 2W into 4Ω (Note 1) with less than

1.0% THD+N, or 2.2W into 3Ω (Note 2) with less than 1.0%

THD+N.

n

into 3Ω (LQ & MTE)

into 4Ω (LQ & MTE)

into 8Ω (LM4839) (MT, MTE, & LQ)

2.2W(typ)

2.0W(typ)

1.1W(typ)

n Single-ended mode - THD+N at 85mW into

Boomer^®audio integrated circuits were designed specifically

to provide high quality audio while requiring a minimum

amount of external components. The LM4839 incorporates a

DC volume control, stereo bridged audio power amplifiers,

selectable gain or bass boost, and an input mux making it

optimally suited for multimedia monitors, portable radios,

desktop, and portable computer applications.

32Ω

1.0%(typ)

0.2µA(typ)

n Shutdown current

Features

n DC Volume Control Interface

n Input mux

n System Beep Detect

The LM4839 features an externally controlled, low-power

consumption shutdown mode, and both a power amplifier

and headphone mute for maximum system flexibility and

performance.

n Stereo switchable bridged/single-ended power amplifiers

n Selectable internal/external gain and bass boost

n “Click and pop” suppression circuitry

Note 1: When properly mounted to the circuit board, the LM4839LQ and

LM4839MTE will deliver 2W into 4Ω. The LM4839MT will deliver 1.1W into

8Ω. See the Application Information section for LM4839LQ and LM4839MTE

usage information.

n Thermal shutdown protection circuitry

Applications

n Portable and Desktop Computers

n Multimedia Monitors

Note 2: An LM4839LQ and LM4839MTE that have been properly mounted

to the circuit board and forced-air cooled will deliver 2.2W into 3Ω.

n Portable Radios, PDAs, and Portable TVs

Connection Diagrams

LLP Package

DS200134-83

Top View

Order Number LM4839LQ

See NS Package Number LQA028AA for Exposed-DAP LLP

Boomer^®is a registered trademark of NationalSemiconductor Corporation.

DS200134

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Connection Diagrams (Continued)

TSSOP Package

DS200134-2

Top View

Order Number LM4839MT

See NS Package Number MTC28 for TSSOP

Order Number LM4839MTE

See NS Package Number MXA28A for Exposed-DAP TSSOP

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2

Absolute Maximum Ratings (Note 10)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

θ_JA(typ)—LQA028AA

θ_JC(typ)—MTC28

θ_JA(typ)—MTC28

θ_JC(typ)—MXA28A

42˚C/W

20˚C/W

80˚C/W

2˚C/W

Supply Voltage

6.0V

-65˚C to +150˚C

−0.3V to V_DD+0.3V

Internally limited

2500V

θ_JA(typ)—MXA28A (exposed

DAP) (Note 4)

41˚C/W

Storage Temperature

Input Voltage

θ_JA(typ)—MXA28A (exposed

DAP) (Note 3)

54˚C/W

59˚C/W

93˚C/W

Power Dissipation

θ_JA(typ)—MXA28A (exposed

DAP) (Note 5)

ESD Susceptibility (Note 12)

ESD Susceptibility (Note 13)

Junction Temperature

250V

θ_JA(typ)—MXA28A (exposed

DAP) (Note 6)

150˚C

Soldering Information

Vapor Phase (60 sec.)

215˚C

220˚C

Operating Ratings

Infrared (15 sec.)

Temperature Range

T_MIN≤ T_A≤T_MAX

See AN-450 “Surface Mounting and their Effects on

Product Reliability” for other methods of soldering

surface mount devices.

−40˚C ≤TA ≤ 85˚C

2.7V≤ V_DD≤ 5.5V

Supply Voltage

θ_JC(typ)—LQA028AA

3˚C/W

Electrical Characteristics for Entire IC

(Notes 7, 10)

The following specifications apply for V_DD= 5V and T_A= 25˚C unless otherwise noted.

LM4839

Units

(Limits)

Symbol

Parameter

Supply Voltage

Conditions

Typical

Limit

(Note 15)

(Note 14)

V_DD

2.7

5.5

V (min)

V (max)

mA (max)

µA (max)

V (min)

I_DD

I_SD

V_IH

V_IL

Quiescent Power Supply Current

Shutdown Current

V_IN= 0V, I_O= 0A

V_shutdown= V_DD

15

30

0.7

2.0

VIN High on all Logic Inputs

VIN Low on all Logic Inputs

0.8 x VDD

0.2 x VDD

V (max)

Electrical Characteristics for Volume Attenuators

(Notes 7, 10)

The following specifications apply for V_DD= 5V and T_A= 25˚C unless otherwise noted.

LM4839

Units

(Limits)

Symbol

Parameter

Attenuator Range

Conditions

Typical

Limit

(Note 15)

(Note 14)

±

C_RANGE

Gain with V_DCVol= 5.0V, No Load

0.75

dB (max)

dB (min)

Attenuator Range

Attenuation with V_DCVol= 0V (BM &

SE)

-75

A_M

Mute Attenuation

V_mute= 5V, Bridged Mode (BM)

-78

dB (min)

V_mute= 5V, Single-Ended Mode (SE)

3

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Electrical Characteristics for Single-Ended Mode Operation

(Notes 7, 10)

The following specifications apply for V_DD= 5V and T_A= 25˚C unless otherwise noted.

LM4839

Typical

Units

Symbol

P_O

Parameter

Output Power

Conditions

Limit

(Note 15)

(Limits)

(Note 14)

THD+N = 1.0%; f = 1kHz;

85

mW

%

R_L= 32Ω

THD+N = 10%; f = 1 kHz; R_L

=

95

0.065

58

32Ω

THD+N

PSRR

SNR

Total Harmonic Distortion+Noise

Power Supply Rejection Ratio

Signal to Noise Ratio

V_OUT= 1V_RMS, f=1kHz, R_L= 10kΩ,

A_VD= 1

C_B= 1.0 µF, f =120 Hz,

V_RIPPLE= 200 mVrms

dB

P_OUT=75 mW, R = 32Ω, A-Wtd

102

65

dB

L

Filter

X_talk

Channel Separation

f=1kHz, C_B= 1.0 µF

dB

Electrical Characteristics for Bridged Mode Operation

(Notes 7, 10)

The following specifications apply for V_DD= 5V and T_A= 25˚C unless otherwise noted.

LM4839

Units

(Limits)

Symbol

V_OS

Parameter

Conditions

V_IN= 0V, No Load

Typical

Limit

(Note 14)

(Note 15)

±

Output Offset Voltage

Output Power

50

mV (max)

W

P_O

THD + N = 1.0%; f=1kHz; R_L= 3Ω

(Note 8)

2.2

2

THD + N = 1.0%; f=1kHz; R_L= 4Ω

W

(Note 9)(Note 15)

THD = 1.5% (max);f = 1 kHz;

1.1

1.0

W (min)

R_L= 8Ω

THD+N = 10%;f = 1 kHz; R_L= 8Ω

1.5

0.3

W

%

< <

20 kHz,

THD+N

Total Harmonic Distortion+Noise

P_O= 1W, 20 Hz

f

R_L= 8Ω, A_VD= 2

P_O= 340 mW, R_L= 32Ω

1.0

74

%

PSRR

SNR

X_talk

Power Supply Rejection Ratio

Signal to Noise Ratio

C_B= 1.0 µF, f = 120 Hz,

dB

V_RIPPLE= 200 mVrms; R_L= 8Ω

V_DD= 5V, P_OUT= 1.1W, R_L= 8Ω,

A-Wtd Filter

93

70

dB

Channel Separation

f=1kHz, C_B= 1.0 µF

2

Note 3: The θ given is for an MXA28A package whose exposed-DAP is soldered to an exposed 2in piece of 1 ounce printed circuit board copper.

JA

2

Note 4: The θ given is for an MXA28A package whose exposed-DAP is soldered to a 2in piece of 1 ounce printed circuit board copper on a bottom side layer

JA

through 21 8mil vias.

2

Note 5: The θ given is for an MXA28A package whose exposed-DAP is soldered to an exposed 1in piece of 1 ounce printed circuit board copper.

JA

Note 6: The θ given is for an MXA28A package whose exposed-DAP is not soldered to any copper.

JA

Note 7: All voltages are measured with respect to the ground pins, unless otherwise specified. All specifications are tested using the typical application as shown

in Figure 2.

Note 8: When driving 3Ω loads from a 5V supply the LM4839MTE exposed DAP must be soldered to the circuit board and forced-air cooled.

Note 9: When driving 4Ω loads from a 5V supply the LM4839MTE exposed DAP must be soldered to the circuit board.

Note 10: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which

guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit

is given, however, the typical value is a good indication of device performance.

Note 11: The maximum power dissipation must be derated at elevated temperatures and is dictated by T

, θ , and the ambient temperature T . The maximum

JA A

JMAX

allowable power dissipation is P

= (T

− T )/θ . For the LM4839MT, T

= 150˚C, and the typical junction-to-ambient thermal resistance, when board

JMAX

DMAX

JMAX

A

JA

mounted, is 80˚C/W assuming the MTC28 package.

Note 12: Human body model, 100 pF discharged through a 1.5 kΩ resistor.

Note 13: Machine Model, 220 pF–240 pF discharged through all pins.

Note 14: Typicals are measured at 25˚C and represent the parametric norm.

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4

Electrical Characteristics for Bridged Mode Operation (Continued)

Note 15: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis. Limits are guaranteed to National’s AOQL (Average Outgoing

Quality Level).

5

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Typical Application

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Truth Table for Logic Inputs (Note 16)

Mute

Mux Control

HP Sense

Inputs Selected

Left In 1, Right In 1

Left In 2, Right In 2

-

Bridged Output

Vol. Adjustable

Muted

Single-Ended Output

0

1

0

1

X

0

1

0

1

X

-

Vol. Adjustable

-

Vol. Adjustable

Muted

Vol. Adjustable

Muted

Note 16: If system beep is detected on the Beep in pin (pin 11) and beep is fed to inputs, the system beep will be passed through the bridged amplifier regardless

of the logic of the Mute, HP sense, or DC Volume Control pins.

Typical Performance Characteristics

MTE Specific Characteristics

LM4839MTE

THD+N vs Output Power

LM4839MTE

THD+N vs Frequency

LM4839MTE

THD+N vs Output Power

DS200134-70

DS200134-71

DS200134-72

LM4839MTE

THD+N vs Frequency

LM4839MTE

Power Dissipation vs Output Power

LM4839MTE (Note 17)

Power Derating Curve

DS200134-65

DS200134-64

DS200134-73

Note 17: These curves show the thermal dissipation ability of the LM4839MTE at different ambient temperatures given these conditions:

2

500LFPM + 2in : The part is soldered to a 2in , 1 oz. copper plane with 500 linear feet per minute of forced-air flow across it.

2

2in on bottom: The part is soldered to a 2in , 1oz. copper plane that is on the bottom side of the PC board through 21 8 mil vias.

2

2in : The part is soldered to a 2in , 1oz. copper plane.

2

1in : The part is soldered to a 1in , 1oz. copper plane.

Not Attached: The part is not soldered down and is not forced-air cooled.

7

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Non-MTE Specific Characteristics

THD+N vs Frequency

THD+N vs Output Power

DS200134-57

DS200134-15

DS200134-18

DS200134-21

DS200134-58

DS200134-16

DS200134-19

DS200134-22

DS200134-14

THD+N vs Frequency

DS200134-17

DS200134-20

DS200134-24

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Non-MTE Specific Characteristics (Continued)

THD+N vs Output Power

DS200134-25

DS200134-27

DS200134-26

THD+N vs Output Power

DS200134-30

DS200134-29

DS200134-28

THD+N vs Output Power

DS200134-31

DS200134-32

DS200134-33

THD+N vs Output Voltage

Docking Station Pins

THD+N vs Output Voltage

Docking Station Pins

DS200134-34

DS200134-59

DS200134-60

9

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Non-MTE Specific Characteristics (Continued)

Output Power vs

Load Resistance

Output Power vs

Load Resistance

Output Power vs

Load Resistance

DS200134-62

DS200134-6

DS200134-7

Power Supply

Rejection Ratio

Output Power vs

Load Resistance

Dropout Voltage

DS200134-35

DS200134-53

DS200134-8

Noise Floor

Volume Control

Characteristics

DS200134-41

DS200134-42

DS200134-36

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Non-MTE Specific Characteristics (Continued)

Power Dissipation vs

Output Power

Power Dissipation vs

Output Power

External Gain/Bass Boost

Characteristics

DS200134-51

DS200134-52

DS200134-61

Power Derating Curve

Crosstalk

DS200134-49

DS200134-50

DS200134-63

Output Power

vs Supply voltage

Output Power

vs Supply Voltage

Supply Current

vs Supply Voltage

DS200134-54

DS200134-56

DS200134-9

11

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Typical Performance Characteristics

Output Power vs

Load Resistance

Output Power vs

Load Resistance

Output Power vs

Load Resistance

DS200134-62

DS200134-6

DS200134-7

Power Supply

Rejection Ratio

Output Power vs

Load Resistance

Dropout Voltage

DS200134-35

DS200134-53

DS200134-8

Noise Floor

Volume Control

Characteristics

DS200134-41

DS200134-42

DS200134-36

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Typical Performance Characteristics (Continued)

Power Dissipation vs

Output Power

Power Dissipation vs

Output Power

External Gain/

Bass Boost

Characteristics

DS200134-51

DS200134-52

DS200134-61

Power Derating Curve

Crosstalk

DS200134-49

DS200134-50

DS200134-63

Output Power

vs Supply voltage

Output Power

vs Supply Voltage

Supply Current

vs Supply Voltage

DS200134-54

DS200134-56

DS200134-9

13

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highest load dissipation and widest output voltage swing,

PCB traces that connect the output pins to a load must be as

wide as possible.

Application Information

EXPOSED-DAP MOUNTING CONSIDERATIONS

Poor power supply regulation adversely affects maximum

output power. A poorly regulated supply’s output voltage

decreases with increasing load current. Reduced supply

voltage causes decreased headroom, output signal clipping,

and reduced output power. Even with tightly regulated sup-

plies, trace resistance creates the same effects as poor

supply regulation. Therefore, making the power supply

traces as wide as possible helps maintain full output voltage

swing.

The LM4839’s exposed-DAP (die attach paddle) packages

(MTE, LQ) provide a low thermal resistance between the die

and the PCB to which the part is mounted and soldered. This

allows rapid heat transfer from the die to the surrounding

PCB copper traces, ground plane and, finally, surrounding

air. The result is a low voltage audio power amplifier that

produces 2.1W at ≤ 1% THD with a 4Ω load. This high power

is achieved through careful consideration of necessary ther-

mal design. Failing to optimize thermal design may compro-

mise the LM4839’s high power performance and activate

unwanted, though necessary, thermal shutdown protection.

BRIDGE CONFIGURATION EXPLANATION

As shown in Figure 1, the LM4839 output stage consists of

two pairs of operational amplifiers, forming a two-channel

(channel A and channel B) stereo amplifier. (Though the

following discusses channel A, it applies equally to channel

B.)

The MTE and LQ packages must have their exposed DAPs

soldered to a grounded copper pad on the PCB. The DAP’s

PCB copper pad is connected to a large plane of continuous

unbroken copper. This plane forms a thermal mass and heat

sink and radiation area. Place the heat sink area on either

outside plane in the case of a two-sided PCB, or on an inner

layer of a board with more than two layers. Connect the DAP

copper pad to the inner layer or backside copper heat sink

area with 32(4x8) (MTE) or 6(3x2) (LQ) vias. The via diam-

eter should be 0.012in–0.013in with a 1.27mm pitch. Ensure

efficient thermal conductivity by plating-through and solder-

filling the vias.

Figure 1 shows that the first amplifier’s negative (-) output

serves as the second amplifier’s input. This results in both

amplifiers producing signals identical in magnitude, but 180˚

out of phase. Taking advantage of this phase difference, a

load is placed between −OUTA and +OUTA and driven dif-

ferentially (commonly referred to as “bridge mode”). This

results in a differential gain of

Best thermal performance is achieved with the largest prac-

tical copper heat sink area. If the heatsink and amplifier

share the same PCB layer, a nominal 2.5in²(min) area is

necessary for 5V operation with a 4Ω load. Heatsink areas

not placed on the same PCB layer as the LM4839 should be

5in²(min) for the same supply voltage and load resistance.

The last two area recommendations apply for 25˚C ambient

temperature. Increase the area to compensate for ambient

temperatures above 25˚C. In systems using cooling fans, the

LM4839MTE can take advantage of forced air cooling. With

an air flow rate of 450 linear-feet per minute and a 2.5in²

exposed copper or 5.0in²inner layer copper plane heatsink,

the LM4839MTE can continuously drive a 3Ω load to full

power. The LM4839LQ achieves the same output power

level without forced air cooling. In all circumstances and

conditions, the junction temperature must be held below

150˚C to prevent activating the LM4839’s thermal shutdown

protection. The LM4839’s power de-rating curve in the Typi-

cal Performance Characteristics shows the maximum

power dissipation versus temperature. Example PCB layouts

for the exposed-DAP TSSOP and LQ packages are shown in

the Demonstration Board Layout section. Further detailed

and specific information concerning PCB layout, fabrication,

and mounting an LQ (LLP) package is available in National

Semiconductor’s AN1187.

*

A_VD= 2 (R_f/R )

(1)

i

Bridge mode amplifiers are different from single-ended am-

plifiers that drive loads connected between a single amplifi-

er’s output and ground. For a given supply voltage, bridge

mode has a distinct advantage over the single-ended con-

figuration: its differential output doubles the voltage

swing across the load. This produces four times the output

power when compared to a single-ended amplifier under the

same conditions. This increase in attainable output power

assumes that the amplifier is not current limited or that the

output signal is not clipped. To ensure minimum output sig-

nal clipping when choosing an amplifier’s closed-loop gain,

refer to the Audio Power Amplifier Design section.

Another advantage of the differential bridge output is no net

DC voltage across the load. This is accomplished by biasing

channel A’s and channel B’s outputs at half-supply. This

eliminates the coupling capacitor that single supply, single-

ended amplifiers require. Eliminating an output coupling ca-

pacitor in a single-ended configuration forces a single-supply

amplifier’s half-supply bias voltage across the load. This

increases internal IC power dissipation and may perma-

nently damage loads such as speakers.

POWER DISSIPATION

PCB LAYOUT AND SUPPLY REGULATION

Power dissipation is a major concern when designing a

successful single-ended or bridged amplifier. Equation (2)

states the maximum power dissipation point for a single-

ended amplifier operating at a given supply voltage and

driving a specified output load.

CONSIDERATIONS FOR DRIVING 3Ω AND 4Ω LOADS

Power dissipated by a load is a function of the voltage swing

across the load and the load’s impedance. As load imped-

ance decreases, load dissipation becomes increasingly de-

pendent on the interconnect (PCB trace and wire) resistance

between the amplifier output pins and the load’s connec-

tions. Residual trace resistance causes a voltage drop,

which results in power dissipated in the trace and not in the

load as desired. For example, 0.1Ω trace resistance reduces

the output power dissipated by a 4Ω load from 2.1W to 2.0W.

This problem of decreased load dissipation is exacerbated

as load impedance decreases. Therefore, to maintain the

P_DMAX= (V_DD)²/(2π²R_L) Single-Ended

(2)

However, a direct consequence of the increased power de-

livered to the load by a bridge amplifier is higher internal

power dissipation for the same conditions.

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14

heat sink, the θ_JAis the sum of θ_JC, θ_CS, and θ_SA. (θ_JCis the

junction-to-case thermal impedance, θ_CSis the case-to-sink

thermal impedance, and θ_SAis the sink-to-ambient thermal

impedance.) Refer to the Typical Performance Character-

istics curves for power dissipation information at lower out-

put power levels.

Application Information (Continued)

The LM4839 has two operational amplifiers per channel. The

maximum internal power dissipation per channel operating in

the bridge mode is four times that of a single-ended ampli-

fier. From Equation (3), assuming a 5V power supply and a

4Ω load, the maximum single channel power dissipation is

1.27W or 2.54W for stereo operation.

POWER SUPPLY BYPASSING

As with any power amplifier, proper supply bypassing is

critical for low noise performance and high power supply

rejection. Applications that employ a 5V regulator typically

use a 10 µF in parallel with a 0.1 µF filter capacitor to

stabilize the regulator’s output, reduce noise on the supply

line, and improve the supply’s transient response. However,

their presence does not eliminate the need for a local 1.0 µF

tantalum bypass capacitance connected between the

LM4839’s supply pins and ground. Do not substitute a ce-

ramic capacitor for the tantalum. Doing so may cause oscil-

lation. Keep the length of leads and traces that connect

capacitors between the LM4839’s power supply pin and

ground as short as possible. Connecting a 1µF capacitor,

C_B, between the BYPASS pin and ground improves the

internal bias voltage’s stability and improves the amplifier’s

PSRR. The PSRR improvements increase as the bypass pin

capacitor value increases. Too large a capacitor, however,

increases turn-on time and can compromise the amplifier’s

click and pop performance. The selection of bypass capaci-

tor values, especially C_B, depends on desired PSRR require-

ments, click and pop performance (as explained in the sec-

tion, Proper Selection of External Components), system

cost, and size constraints.

P_DMAX= 4 (V_DD)²/(2π²R_L) Bridge Mode

(3)

*

The LM4839’s power dissipation is twice that given by Equa-

tion (2) or Equation (3) when operating in the single-ended

mode or bridge mode, respectively. Twice the maximum

power dissipation point given by Equation (3) must not ex-

ceed the power dissipation given by Equation (4):

P

_DMAX' = (T_JMAX− T_A)/θ_JA

(4)

The LM4839’s T_JMAX= 150˚C. In the LQ package soldered

to a DAP pad that expands to a copper area of 5in²on a

PCB, the LM4839’s θ_JAis 20˚C/W. In the MTE package

soldered to a DAP pad that expands to a copper area of 2in²

on a PCB, the LM4839’s θ_JAis 41˚C/W. For the LM4839MT

package, θ_JA= 80˚C/W. At any given ambient temperature

T_A, use Equation (4) to find the maximum internal power

dissipation supported by the IC packaging. Rearranging

Equation (4) and substituting P_DMAXfor P_DMAX' results in

Equation (5). This equation gives the maximum ambient

temperature that still allows maximum stereo power dissipa-

tion without violating the LM4839’s maximum junction tem-

perature.

PROPER SELECTION OF EXTERNAL COMPONENTS

Optimizing the LM4839’s performance requires properly se-

lecting external components. Though the LM4839 operates

well when using external components with wide tolerances,

best performance is achieved by optimizing component val-

ues.

T_A= T_JMAX– 2*P_DMAXθ_JA

(5)

For a typical application with a 5V power supply and an 4Ω

load, the maximum ambient temperature that allows maxi-

mum stereo power dissipation without exceeding the maxi-

mum junction temperature is approximately 99˚C for the LQ

package and 45˚C for the MTE package.

The LM4839 is unity-gain stable, giving a designer maximum

design flexibility. The gain should be set to no more than a

given application requires. This allows the amplifier to

achieve minimum THD+N and maximum signal-to-noise ra-

tio. These parameters are compromised as the closed-loop

gain increases. However, low gain circuits demand input

signals with greater voltage swings to achieve maximum

output power. Fortunately, many signal sources such as

audio CODECs have outputs of 1V_RMS(2.83V_P-P). Please

refer to the Audio Power Amplifier Design section for more

information on selecting the proper gain.

T_JMAX= P_DMAXθ_JA+ T_A

(6)

Equation (6) gives the maximum junction temperature

_JMAX. If the result violates the LM4839’s T_JMAX150˚C, re-

duce the maximum junction temperature by reducing the

power supply voltage or increasing the load resistance. Fur-

ther allowance should be made for increased ambient tem-

peratures.

T

Input Capacitor Value Selection

Amplifying the lowest audio frequencies requires a high

value input coupling capacitor (0.33µF in Figure 1). A high

value capacitor can be expensive and may compromise

space efficiency in portable designs. In many cases, how-

ever, the speakers used in portable systems, whether inter-

nal or external, have little ability to reproduce signals below

150Hz. Applications using speakers with this limited fre-

quency response reap little improvement by using a large

input capacitor.

The above examples assume that a device is a surface

mount part operating around the maximum power dissipation

point. Since internal power dissipation is a function of output

power, higher ambient temperatures are allowed as output

power or duty cycle decreases.

If the result of Equation (2) is greater than that of Equation

(3), then decrease the supply voltage, increase the load

impedance, or reduce the ambient temperature. If these

measures are insufficient, a heat sink can be added to

reduce θ_JA. The heat sink can be created using additional

copper area around the package, with connections to the

ground pin(s), supply pin and amplifier output pins. External,

solder attached SMT heatsinks such as the Thermalloy

7106D can also improve power dissipation. When adding a

Besides effecting system cost and size, the input coupling

capacitor has an affect on the LM4835’s click and pop per-

formance. When the supply voltage is first applied, a tran-

sient (pop) is created as the charge on the input capacitor

changes from zero to a quiescent state. The magnitude of

the pop is directly proportional to the input capacitor’s size.

15

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V_DD/2, coupling capacitors should be connected in series

with the load. Typical values for the coupling capacitors are

0.33µF to 1.0µF. If polarized coupling capacitors are used,

connect their ’+’ terminals to the respective output pin.

Application Information (Continued)

Higher value capacitors need more time to reach a quiescent

DC voltage (usually V_DD/2) when charged with a fixed cur-

rent. The amplifier’s output charges the input capacitor

through the feedback resistor, R_f. Thus, pops can be mini-

mized by selecting an input capacitor value that is no higher

than necessary to meet the desired −3dB frequency.

Since the DOCK outputs precede the internal volume con-

trol, the signal amplitude will be equal to the input signal’s

magnitude and cannot be adjusted. However, the input am-

plifier’s closed-loop gain can be adjusted using external

resistors. These 20K resistors are shown in Figure 1 (RIN,

RF ) and they set each input amplifier’s gain to -1. Use

Equation 8 to determine the input and feedback resistor

values for a desired gain.

As shown in Figure 1, the input resistors (RIN = 20K) and the

input capacitosr (CIN = 0.33µF) produce a −6dB high pass

filter cutoff frequency that is found using Equation (7).

- A_v= R_F/ R_i

(8)

(7)

Adjusting the input amplifier’s gain sets the minimum gain for

that channel. Although the single ended outputs of the

Bridge Output Amplifiers can be used to drive line level

outputs, it is recommended that the R & L Dock Outputs

simpler signal path be used for better performance.

As an example when using a speaker with a low frequency

limit of 150Hz, the input coupling capacitor using Equation

(7), is 0.063µF. The 0.33µF input coupling capacitor shown

in Figure 1 allows the LM4839 to drive high efficiency, full

range speaker whose response extends below 30Hz.

STEREO-INPUT MULTIPLEXER (STEREO MUX)

OPTIMIZING CLICK AND POP REDUCTION

PERFORMANCE

The LM4839 has two stereo inputs. The MUX CONTROL pin

controls which stereo input is active. Applying 0V to the MUX

CONTROL pin selects stereo input 1. Applying V_DDto the

MUX CONTROL pin selects stereo input 2.

The LM4839 contains circuitry that minimizes turn-on and

shutdown transients or “clicks and pops”. For this discus-

sion, turn-on refers to either applying the power supply volt-

age or when the shutdown mode is deactivated. While the

power supply is ramping to its final value, the LM4839’s

internal amplifiers are configured as unity gain buffers. An

internal current source changes the voltage of the BYPASS

pin in a controlled, linear manner. Ideally, the input and

outputs track the voltage applied to the BYPASS pin. The

gain of the internal amplifiers remains unity until the voltage

on the bypass pin reaches 1/2 V_DD. As soon as the voltage

on the bypass pin is stable, the device becomes fully opera-

tional. Although the BYPASS pin current cannot be modified,

changing the size of C_Balters the device’s turn-on time and

the magnitude of “clicks and pops”. Increasing the value of

C_Breduces the magnitude of turn-on pops. However, this

presents a tradeoff: as the size of C_Bincreases, the turn-on

time increases. There is a linear relationship between the

size of C_Band the turn-on time. Here are some typical

turn-on times for various values of C_B:

BEEP DETECT FUNCTION

Computers and notebooks produce a system ’beep’ signal

that drives a small speaker. The speaker’s auditory output

signifies that the system requires user attention or input. To

accommodate this system alert signal, the LM4839’s beep

input pin is a mono input that accepts the beep signal.

Internal level detection circuitry at this input monitors the

beep signal’s magnitude. When a signal level greater than

V

_DD/2 is detected on the BEEP IN pin, the bridge output

amplifiers are enabled. The beep signal is amplified and

applied to the load connected to the output amplifiers. A valid

beep signal will be applied to the load even when MUTE is

active. Use the input resistors connected between the BEEP

IN pin and the stereo input pins to accommodate different

beep signal amplitudes. These resistors are shown as

200kΩ devices in Figure 1. Use higher value resistors to

reduce the gain applied to the beep signal. The resistors

must be used to pass the beep signal to the stereo inputs.

The BEEP IN pin is used only to detect the beep signal’s

magnitude: it does not pass the signal to the output amplifi-

ers. The LM4839’s shutdown mode must be deactivated

before a system alert signal is applied to the BEEP IN pin.

C_B

0.01µF

T_ON

2ms

0.1µF

0.22µF

0.47µF

1.0µF

20ms

44ms

MICRO-POWER SHUTDOWN

94ms

The voltage applied to the SHUTDOWN pin controls the

LM4839’s shutdown function. Activate micro-power shut-

down by applying V_DDto the SHUTDOWN pin. When active,

the LM4839’s micro-power shutdown feature turns off the

amplifier’s bias circuitry, reducing the supply current. The

logic threshold is typically V_DD/2. The low 0.7 µA typical

shutdown current is achieved by applying a voltage that is as

near as V_DDas possible, to the SHUTDOWN pin. A voltage

that is less than V_DDmay increase the shutdown current.

Logic Level Truth Table shows the logic signal levels that

activate and deactivate micro-power shutdown and head-

phone amplifier operation.

200ms

DOCKING STATION

Applications such as notebook computers can take advan-

tage of a docking station to connect to external devices such

as monitors or audio/visual equipment that sends or receives

line level signals. The LM4839 has two outputs, Right Dock

and Left Dock which connect to outputs of the internal input

amplifiers that drive the volume control inputs. These input

>

amplifiers can drive loads of 1kΩ (such as powered speak-

There are a few ways to control the micro-power shutdown.

These include using a single-pole, single-throw switch, a

ers) with a rail-to-rail signal. Since the output signal present

on the RIGHT DOCK and LEFT DOCK pins is biased to

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16

tee that the SHUTDOWN pin will not float. This prevents

unwanted state changes. In a system with a microprocessor

or a microcontroller, use a digital output to apply the control

voltage to the SHUTDOWN pin. Driving the SHUTDOWN pin

with active circuitry eliminates the need for a pull up resistor.

Application Information (Continued)

microprocessor, or a microcontroller. When using a switch,

connect an external 10kΩ pull-up resistor between the

SHUTDOWN pin and V_DD. Connect the switch between the

SHUTDOWN pin and ground. Select normal amplifier opera-

tion by closing the switch. Opening the switch connects the

SHUTDOWN pin to V_DDthrough the pull-up resistor, activat-

ing micro-power shutdown. The switch and resistor guaran-

TABLE 1. Logic Level Truth Table for SHUTDOWN, HP-IN, and MUX Operation

SHUTDOWN HP-IN PIN MUX CHANNEL OPERATIONAL MODE

SELECT PIN

Logic Low

Logic High

Logic Low

Logic High

X

(MUX INPUT CHANNEL #)

Bridged Amplifiers (1)

Logic Low

Logic High

Logic Low

Logic High

X

Bridged Amplifiers (2)

Single-Ended Amplifiers (1)

Single-Ended Amplifiers (2)

Micro-Power Shutdown

carry the ground return. A headphone jack with one control

pin contact is sufficient to drive the HP-IN pin when connect-

ing headphones.

MUTE FUNCTION

The LM4839 mutes the amplifier and DOCK outputs when

_DDis applied to pin 5, the MUTE pin. Even while muted, the

LM4839 will amplify a system alert (beep) signal whose

magnitude satisfies the BEEP DETECT circuitry. Applying

0V to the MUTE pin returns the LM4839 to normal, unmated

operation. Prevent unanticipated mute behavior by connect-

ing the MUTE pin to V_DDor ground. Do not let the mute pin

float.

A microprocessor or a switch can replace the headphone

jack contact pin. When a microprocessor or switch applies a

voltage greater than 4V to the HP-IN pin, a bridge-connected

speaker is muted and the single ended output amplifiers A1

and A2 will drive a pair of headphones.

V

HP SENSE FUNCTION ( Head Phone In )

Applying a voltage between 4V and V_DDto the LM4839’s

HP-IN headphone control pin turns off the amps that drive

the left out ’+’ and right out ’+’ pins. ( Pins 15 and 20 on the

MT/MTE & 12 and 25 on the LQ ). This action mutes a

bridged-connected load. Quiescent current consumption is

reduced when the IC is in this single-ended mode.

Figure 2 shows the implementation of the LM4839’s head-

phone control function. With no headphones connected to

the headphone jack, the R1-R2 voltage divider sets the

voltage applied to the HP Sense pin at approximately 50mV.

This 50mV puts the LM4839 into bridged mode operation.

The output coupling capacitor blocks the amplifier’s half

supply DC voltage, protecting the headphones.

The HP-IN threshold is set at 4V. While the LM4839 operates

in bridged mode, the DC potential across the load is essen-

tially 0V. Therefore, even in an ideal situation, the output

swing cannot cause a false single-ended trigger. Connecting

headphones to the headphone jack disconnects the head-

phone jack contact pin from R2 and allows R1 to pull the HP

Sense pin up to V_DDthrough R4. This enables the head-

phone function, turns off both of the ’+’ output amplifiers and

mutes the bridged speaker. The amplifier then drives the

headphones, whose impedance is in parallel with resistors

R2 and R3. These resistors have negligible effect on the

LM4839’s output drive capability since the typical impedance

of headphones is 32Ω.

DS200134-4

FIGURE 2. Headphone Sensing Circuit (MT/MTE

Pinout)

BASS BOOST FUNCTION

The Bass Boost Function can be toggled by changing the

logic at the Bass Boost Select pin. A logic low will switch the

power amplifiers to bass boost mode. In bass boost mode,

the low frequency gain of the ampflifier is set by the external

CBS capacitor in Figure 1. Where as a logic high sets the

amplifiers to unity gain.

In some cases, a designer may want to improve the low

frequency response of the bridged amplifier or incorporate a

bass boost feature. This bass boost can be useful in systems

where speakers are housed in small enclosures. If the de-

signer wishes to dsiable the bass boost feature, pin 19 (

Figure 2 also shows the suggested headphone jack electri-

cal connections. The jack is designed to mate with a three-

wire plug. The plug’s tip and ring should each carry one of

the two stereo output signals, whereas the sleeve should

MT/MTE packages ) can be tied to V_DD

.

17

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Application Information (Continued)

When the bass boost is enabled, the output amplifiers will be

internally set at a gain of 2 at low frequencies (gain of 4 in

bridged mode). As shown in Figure 1, CBS sets the cutoff

frequency for the bass boost. At low frequencies, the capaci-

tor will be virtually an open circuit. At high frequencies, the

capacitor will be virtually a short circuit. As a result of this, the

gain of the bridge amplifier is increased as low frequencies.

A first order pole is formed with a corner frequency at:

f_c= 1/(2π10kΩCBS)

(9)

With CBS = 0.1uF, a first order pole is formed with a corner

frequency of 160Hz.

DC VOLUME CONTROL

The LM4839 has an internal stereo volume control whose

setting is a function of the DC voltage applied to the DC VOL

CONTROL pin.

The LM4839 volume control consists of 31 steps that are

individually selected by a variable DC voltage level on the

volume control pin. The range of the steps, controlled by the

DC voltage, are from 0dB - 78dB. Each gain step corre-

sponds to a specific input voltage range, as shown in table 2.

To minimize the effect of noise on the volume control pin,

which can affect the selected gain level, hysteresis has been

implemented. The amount of hysteresis corresponds to half

of the step width, as shown in Volume Control Characteriza-

tion Graph (DS200133-40).

For highest accuracy, the voltage shown in the ’recom-

mended voltage’ column of the table is used to select a

desired gain. This recommended voltage is exactly halfway

between the two nearest transitions to the next highest or

next lowest gain levels.

The gain levels are 1dB/step from 0dB to -6dB, 2dB/step

from -6dB to -36dB, 3dB/step from -36dB to -47dB, 4dB/step

from -47db to -51dB, 5dB/step from -51dB to -66dB, and

12dB to the last step at -78dB.

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18

Volume Control Table ( Table 2 )

Gain (dB)

Voltage Range (% of Vdd)

Voltage Range (Vdd = 5)

Low Recommended

Voltage Range (Vdd = 3)

Low Recommended

Low

High

Recommended

High

5.000

3.938

3.813

3.688

3.563

3.438

3.313

3.188

3.063

2.938

2.813

2.688

2.563

2.438

2.313

2.188

2.063

1.938

1.813

1.688

1.563

1.438

1.313

1.188

1.063

0.937

0.812

0.687

0.562

0.437

0.312

High

3.000

2.363

2.288

2.213

2.138

2.063

1.988

1.913

1.838

1.763

1.688

1.613

1.538

1.463

1.388

1.313

1.238

1.163

1.088

1.013

0.937

0.862

0.787

0.712

0.637

0.562

0.487

0.412

0.337

0.262

0.187

0

77.5%

75.0%

72.5%

70.0%

67.5%

65.0%

62.5%

60.0%

57.5%

55.0%

52.5%

50.0%

47.5%

45.0%

42.5%

40.0%

37.5%

35.0%

32.5%

30.0%

27.5%

25.0%

22.5%

20.0%

17.5%

15.0%

12.5%

10.0%

7.5%

100.00%

78.5%

100.000%

76.875%

74.375%

71.875%

69.375%

66.875%

64.375%

61.875%

59.375%

56.875%

54.375%

51.875%

49.375%

46.875%

44.375%

41.875%

39.375%

36.875%

34.375%

31.875%

29.375%

26.875%

24.375%

21.875%

19.375%

16.875%

14.375%

11.875%

9.375%

3.875

3.750

3.625

3.500

3.375

3.250

3.125

3.000

2.875

2.750

2.625

2.500

2.375

2.250

2.125

2.000

1.875

1.750

1.625

1.500

1.375

1.250

1.125

1.000

0.875

0.750

0.625

0.500

0.375

0.250

0.000

5.000

3.844

3.719

3.594

3.469

3.344

3.219

3.094

2.969

2.844

2.719

2.594

2.469

2.344

2.219

2.094

1.969

1.844

1.719

1.594

1.469

1.344

1.219

1.094

0.969

0.844

0.719

0.594

0.469

0.344

0.000

2.325

2.250

2.175

2.100

2.025

1.950

1.875

1.800

1.725

1.650

1.575

1.500

1.425

1.350

1.275

1.200

1.125

1.050

0.975

0.900

0.825

0.750

0.675

0.600

0.525

0.450

0.375

0.300

0.225

0.150

0.000

3.000

2.306

2.231

2.156

2.081

2.006

1.931

1.856

1.781

1.706

1.631

1.556

1.481

1.406

1.331

1.256

1.181

1.106

1.031

0.956

0.881

0.806

0.731

0.656

0.581

0.506

0.431

0.356

0.281

0.206

0.000

-1

-2

76.25%

73.75%

71.25%

68.75%

66.25%

63.75%

61.25%

58.75%

56.25%

53.75%

51.25%

48.75%

46.25%

43.75%

41.25%

38.75%

36.25%

33.75%

31.25%

28.75%

26.25%

23.75%

21.25%

18.75%

16.25%

13.75%

11.25%

8.75%

-3

-4

-5

-6

-8

-10

-12

-14

-16

-18

-20

-22

-24

-26

-28

-30

-32

-34

-36

-39

-42

-45

-47

-51

-56

-61

-66

-78

5.0%

6.875%

0.0%

6.25%

0.000%

19

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The last step in this design example is setting the amplifier’s

AUDIO POWER AMPLIFIER

DESIGN

±

−3dB frequency bandwidth. To achieve the desired 0.25dB

pass band magnitude variation limit, the low frequency re-

sponse must extend to at least one-fifth the lower bandwidth

limit and the high frequency response must extend to at least

five times the upper bandwidth limit. The gain variation for

Audio Amplifier Design: Driving 1W into an 8Ω Load

The following are the desired operational parameters:

±

both response limits is 0.17dB, well within the 0.25dB

desired limit. The results are an

Power Output:

Load Impedance:

Input Level:

1 W_RMS

8Ω

1 V_RMS

20 kΩ

f_L= 100Hz/5 = 20Hz

(13)

Input Impedance:

Bandwidth:

and an

±

100 Hz−20 kHz 0.25 dB

f_H= 20kHz x 5 = 100kHz

(14)

The design begins by specifying the minimum supply voltage

necessary to obtain the specified output power. One way to

find the minimum supply voltage is to use the Output Power

vs Supply Voltage curve in the Typical Performance Char-

acteristics section. Another way, using Equation (11), is to

calculate the peak output voltage necessary to achieve the

desired output power for a given load impedance. To ac-

count for the amplifier’s dropout voltage, two additional volt-

ages, based on the Dropout Voltage vs Supply Voltage in the

Typical Performance Characteristics curves, must be

added to the result obtained by Equation (11). The result is

Equation (12).

As mentioned in the Selecting Proper External Compo-

nents section, R_i(Right & Left) and C_i(Right & Left) create

a highpass filter that sets the amplifier’s lower bandpass

frequency limit. Find the coupling capacitor’s value using

Equation (17).

C_i≥ 1/(2πR _if_L)

(15)

The result is

*

1/(2π 20kΩ 20Hz) = 0.397µF

(16)

(10)

Use a 0.39µF capacitor, the closest standard value.

V_DD≥ (V_OUTPEAK+ (V_OD

+ V_OD_BOT))

(11)

TOP

The product of the desired high frequency cutoff (100kHz in

this example) and the differential gain A_VD, determines the

The Output Power vs Supply Voltage graph for an 8Ω load

indicates a minimum supply voltage of 4.6V. This is easily

met by the commonly used 5V supply voltage. The additional

voltage creates the benefit of headroom, allowing the

LM4839 to produce peak output power in excess of 1W

without clipping or other audible distortion. The choice of

supply voltage must also not create a situation that violates

of maximum power dissipation as explained above in the

Power Dissipation section.

upper passband response limit. With A_VD= 3 and f_H

=

100kHz, the closed-loop gain bandwidth product (GBWP) is

300kHz. This is less than the LM4839’s 3.5MHz GBWP. With

this margin, the amplifier can be used in designs that require

more differential gain while avoiding performance,restricting

bandwidth limitations.

RECOMMENDED PRINTED

CIRCUIT BOARD LAYOUT

Figures 4 through 8 show the recommended four-layer PC

board layout that is optimized for the 8-pin LQ-packaged

LM4839 and associated external components. This circuit is

designed for use with an external 5V supply and 4Ω speak-

ers.

After satisfying the LM4839’s power dissipation require-

ments, the minimum differential gain needed to achieve 1W

dissipation in an 8Ω load is found using Equation (13).

(12)

This circuit board is easy to use. Apply 5V and ground to the

board’s V_DDand GND pads, respectively. Connect 4Ω

speakers between the board’s −OUTA and +OUTA and

OUTB and +OUTB pads.

Thus, a minimum overall gain of 2.83 allows the LM4839’s to

reach full output swing and maintain low noise and THD+N

performance.

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20