MC10H117M [ROCHESTER]
10H SERIES, DUAL 5-INPUT OR-AND/OR-AND-INVERT GATE, PDSO16, EIAJ, SO-16;型号: | MC10H117M |
厂家: | Rochester Electronics |
描述: | 10H SERIES, DUAL 5-INPUT OR-AND/OR-AND-INVERT GATE, PDSO16, EIAJ, SO-16 输入元件 光电二极管 逻辑集成电路 |
文件: | 总7页 (文件大小:808K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MC10H117
Dual 2−Wide 2−3−Input
OR−AND/OR−AND Gate
Description
The MC10H117 dual 2−wide 2−3−input OR−AND/
OR−AND−Invertgate is a general purpose logic element designed for
use in data control, such as digital multiplexing or data distribution.
Pin 9 is common to both gates. This MECL 10H™ part is a
functional/pinout duplication of the standard MECL 10Kꢀ family
part, with 100% improvement in propagation delay, and no increase in
power−supply current.
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MARKING DIAGRAMS*
16
MC10H117L
AWLYYWW
Features
• Propagation Delay, 1.0 ns Typical
• Power Dissipation 100 mW/Gate Typical (same as MECL 10K)
• Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
1
CDIP−16
L SUFFIX
CASE 620A
• Voltage Compensated
• MECL 10K Compatible
16
1
• Pb−Free Packages are Available*
MC10H117P
AWLYYWWG
16
1
PDIP−16
P SUFFIX
CASE 648
10H117
ALYWG
SOEIAJ−16
CASE 966
1 20
10H117G
AWLYYWW
20
1
PLLC−20
FN SUFFIX
CASE 775
A
= Assembly Location
= Year
WL, L = Wafer Lot
YY, Y
WW, W = Work Week
G
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
February, 2006 − Rev. 7
MC10H117/D
MC10H117
4
5
V
A
V
B
B
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CC1
CC2
OUT
OUT
3
2
6
7
OUT
A
OUT
9
A1
B1
B1
B2
B2
IN
IN
IN
IN
IN
IN
IN
IN
A1
10
11
14
15
A2
A2
V
12
13
A2 B2
IN, IN
EE
V
V
V
= PIN 1
= PIN 16
CC1
CC2
Pin assignment is for Dual−in−Line Package.
= PIN 8
EE
Figure 1. Logic Diagram
Figure 2. Pin Assignment
Table 1. MAXIMUM RATINGS
Symbol
Characteristic
Rating
Unit
Vdc
Vdc
mA
V
Power Supply (V = 0)
−8.0 to 0
EE
CC
V
Input Voltage (V = 0)
0 to V
50
I
CC
EE
I
Output Current
Continuous
Surge
out
100
T
A
Operating Temperature Range
0 to +75
°C
T
stg
Storage Temperature Range Plastic
Ceramic
−55 to +150
−55 to +165
°C
°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
Table 2. ELECTRICAL CHARACTERISTICS (V = −5.2 V 5%) (Note 1)
EE
0°
25°
75°
Symbol
Characteristic
Power Supply Current
Input Current High
Pins 4, 5, 12, 13
Min
Max
Min
Max
Min
Max
Unit
mA
mA
I
29
26
29
E
I
inH
465
545
710
275
320
415
275
320
415
Pins 6, 7, 10, 11
Pin 9
I
Input Current Low
0.5
0.5
0.3
mA
inL
V
High Output Voltage
Low Output Voltage
High Input Voltage
Low Input Voltage
−1.02
−1.95
−1.17
−1.95
−0.84
−1.63
−0.84
−1.48
−0.98
−1.95
−1.13
−1.95
−0.81
−1.63
−0.81
−1.48
−0.92
−1.95
−1.07
−1.95
−0.735
−1.60
Vdc
Vdc
Vdc
Vdc
OH
V
OL
V
−0.735
−1.45
IH
V
IL
1. Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is
maintained. Outputs are terminated through a 50 W resistor to −2.0 V.
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2
MC10H117
Table 3. AC CHARACTERISTICS
0°
25°
75°
Symbol
Characteristic
Min
0.45
0.5
Max
1.35
1.5
Min
0.45
0.5
Max
1.35
1.6
Min
0.5
0.5
0.5
Max
1.5
1.7
1.7
Unit
ns
t
Propagation Delay
Rise Time
pd
t
t
ns
r
Fall Time
0.5
1.5
0.5
1.6
ns
f
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
ORDERING INFORMATION
†
Device
Package
Shipping
MC10H117FN
PLLC−20
46 Units / Rail
PLLC−20
(Pb−Free)
MC10H117FNG
46 Units / Rail
MC10H117FNR2
PLLC−20
500 / Tape & Reel
PLLC−20
(Pb−Free)
MC10H117FNR2G
MC10H117L
500 / Tape & Reel
25 Unit / Rail
50 Unit / Rail
50 Unit / Rail
CDIP−16
MC10H117M
SOEIAJ−16
MC10H117MG
SOEIAJ−16
(Pb−Free)
MC10H117MEL
SOEIAJ−16
2000 / Tape & Reel
2000 / Tape & Reel
MC10H117MELG
SOEIAJ−16
(Pb−Free)
MC10H117P
PDIP−16
25 Unit / Rail
25 Unit / Rail
MC10H117PG
PDIP−16
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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3
MC10H117
PACKAGE DIMENSIONS
20 LEAD PLLC
CASE 775−02
ISSUE E
M
S
S
N
0.007 (0.180)
T L−M
B
Y BRK
−N−
S
S
N
0.007 (0.180) M T L−M
U
D
D
−L−
−M−
Z
W
20
1
S
S
S
N
0.010 (0.250)
T L−M
G1
X
V
VIEW D−D
M
M
S
S
S
S
A
R
0.007 (0.180)
0.007 (0.180)
T L−M
N
N
Z
T L−M
M
S
S
N
0.007 (0.180)
T L−M
H
C
K1
E
K
0.004 (0.100)
G
−T− SEATING
PLANE
J
M
S
S
N
0.007 (0.180)
T L−M
F
VIEW S
G1
VIEW S
S
S
S
0.010 (0.250)
T L−M
N
NOTES:
INCHES
MILLIMETERS
1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M,
1982.
DIM
A
B
C
E
MIN
MAX
0.395
0.395
0.180
0.110
0.019
MIN
9.78
9.78
4.20
2.29
0.33
MAX
10.03
10.03
4.57
2.79
0.48
0.385
0.385
0.165
0.090
0.013
2. DIMENSIONS IN INCHES.
3. DATUMS −L−, −M−, AND −N− DETERMINED WHERE TOP
OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD
PARTING LINE.
4. DIMENSION G1, TRUE POSITION TO BE MEASURED AT
DATUM −T−, SEATING PLANE.
F
G
H
J
K
R
U
V
W
X
Y
0.050 BSC
1.27 BSC
5. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH.
ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE.
6. DIMENSIONS IN THE PACKAGE TOP MAY BE SMALLER
THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300).
DIMENSIONS R AND U ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE
BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY
MISMATCH BETWEEN THE TOP AND BOTTOM OF THE
PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION
TO BE GREATER THAN 0.037 (0.940). THE DAMBAR
INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO
BE SMALLER THAN 0.025 (0.635).
0.026
0.020
0.025
0.350
0.350
0.042
0.042
0.042
0.032
−−−
−−−
0.356
0.356
0.048
0.048
0.056
0.66
0.51
0.64
8.89
8.89
1.07
1.07
1.07
−−−
2
0.81
−−−
−−−
9.04
9.04
1.21
1.21
1.42
0.50
10
−−− 0.020
Z
2
10
0.330
−−−
_
_
_
_
G1 0.310
K1 0.040
7.88
1.02
8.38
−−−
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4
MC10H117
PACKAGE DIMENSIONS
SOEIAJ−16
CASE 966−01
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
L
16
9
E
Q
1
H
E
E
M
_
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
1
8
L
DETAIL P
Z
D
VIEW P
e
MILLIMETERS
INCHES
MIN MAX
−−− 0.081
A
DIM MIN
MAX
2.05
0.20
0.50
0.20
10.50
5.45
c
A
−−−
0.05
0.35
0.10
9.90
5.10
A
1
0.002
0.008
0.020
0.011
0.413
0.215
b
c
0.014
0.007
0.390
0.201
D
E
A
1
b
e
1.27 BSC
0.050 BSC
0.10 (0.004)
M
H
0.13 (0.005)
7.40
0.50
1.10
8.20
0.85
1.50
0.291
0.020
0.043
0.323
0.033
0.059
E
L
L
E
0
10
10
0.035
M
Q
0
0.028
_
_
_
_
0.70
−−−
0.90
0.78
1
Z
−−− 0.031
CDIP−16
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620A−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
B
B
A
A
M
16
9
8
5
THIS DRAWING REPLACES OBSOLETE
CASE OUTLINE 620−10.
L
INCHES
DIM MIN MAX
MILLIMETERS
1
MIN
19.05
6.10
−−−
MAX
19.93
7.49
5.08
0.50
A
B
C
D
E
F
0.750
0.240
0.785
0.295
16X J
−−− 0.200
0.015 0.020
0.050 BSC
0.39
M
0.25 (0.010)
T B
1.27 BSC
E
0.055
0.065
1.40
1.65
G
H
K
L
0.100 BSC
2.54 BSC
F
0.008
0.125
0.015
0.170
0.21
3.18
0.38
4.31
0.300 BSC
7.62 BSC
M
N
0
0.020
15
_
0.040
0
_
0.51
15
_
1.01
_
C
K
N
SEATING
PLANE
T
G
16X D
M
0.25 (0.010)
T A
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5
MC10H117
PACKAGE DIMENSIONS
PDIP−16
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648−08
ISSUE R
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
−A−
16
1
9
8
B
S
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
INCHES
DIM MIN MAX
MILLIMETERS
MIN
18.80
6.35
3.69
0.39
1.02
MAX
19.55
6.85
4.44
0.53
1.77
F
A
B
C
D
F
0.740
0.250
0.145
0.015
0.040
0.770
0.270
0.175
0.021
0.70
C
L
SEATING
PLANE
−T−
G
H
J
0.100 BSC
0.050 BSC
2.54 BSC
1.27 BSC
K
M
0.008
0.015
0.130
0.305
10
0.21
0.38
3.30
7.74
10
H
J
K
L
0.110
0.295
0
2.80
7.50
0
G
D 16 PL
M
S
_
_
_
_
0.020
0.040
0.51
1.01
M
M
0.25 (0.010)
T A
MECL 10H and MECL 10K are trademarks of Motorola, Inc.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
For additional information, please contact your
local Sales Representative.
MC10H117/D
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