MC642DR2_技术文档

MC642

PWM Fan Speed Controller

with Fault Detection

The MC642 is a pulse width modulation (PWM) fan speed

controller for use with DC motors. It provides temperature

proportional speed control. A thermistor connected to the V_INinput

furnishes the required control voltage of 1.25 V to 2.65 V for 0% to

100% PWM duty cycle. Minimum fan speed is set by a simple resistor

divider on the V_MINinput. An integrated Start–Up Timer ensures

reliable motor start–up at turn–on, coming out of Shutdown Mode, or

following a transient fault. A stalled, open, or unconnected fan causes

the MC642 to trigger its start–up timer once. If the fault persists, the

FAULT output goes low, and the device is latched in Shutdown Mode.

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MARKING

DIAGRAMS

8

SO–8

D SUFFIX

CASE 751

MC642D

ALYW

8

Features

1

• Shutdown Mode for Power Saving

• Supports Low Cost NTC/PTC Thermistors

• Temperature Proportional Speed for Acoustic Control/

Longer Fan Life

8

PDIP–8

P SUFFIX

CASE 626

MC642P

AWL

YYWW

• Fan Voltage Independent of MC642 Supply Voltage

• Fault Detection Circuits Protect Against Fan Failure and

Aid System Testing

8

1

• Operating Temperature Range: 0°C to +85°C

A

= Assembly Location

WL, L = Wafer Lot

YY, Y = Year

Typical Applications

• Power Supplies

WW, W = Work Week

• Personal Computers

• UPS’s, Power Amplifiers, etc.

PIN CONFIGURATION

V

DD

V

8

7

6

5

1

2

3

4

IN

DD

C

MC642D

MC642P

F

OUT

V

FAULT

MIN

+12 V

GND

SENSE

D1

D2

+5 V

8

MC642

Reset

FAN

Q1

ORDERING INFORMATION

From

Temp

Sensor

V

DD

Device

Package

Shipping

1

0

V

FAULT

in

MC642DR2

MC642P

SO–8

2500 Tape/Reel

50 Units/Rail

1

6

7

5

Fault

Detected

MC642

PDIP–8

R

BASE

V

min

out

3

2

C

SENSE

GND

F

+

C

SENSE

R

(Optional)

SENSE

4

Figure 1. Typical Application Diagram

Semiconductor Components Industries, LLC, 2001

1

Publication Order Number:

March, 2001 – Rev. 2

MC642/D

MC642

V

DD

+

-

V

IN

V

OTF

-

+

OTF

SHDN

-

+

OUT

Control

Logic

C

F

3 X T

PWM

Timer

Clock

Generator

FAULT

Start–Up

Timer

V

MIN

+

-

V

SHDN

Missing

Pulse

Detector

MC642

GND

+

-

SENSE

10 kW

70 mV (typ.)

Figure 2. Functional Block Diagram

PIN DESCRIPTION

Pin No. Symbol

Description

The thermistor network (or other temperature sensor) connects to this input. A voltage range of 1.25 V to 2.65 V

1

V

IN

(typical) on this pin drives an active duty cycle of 0% to 100% on the V pin.

OUT

2

3

C

Positive terminal for the PWM ramp generator timing capacitor. The recommended C is 1 µF for 30 Hz PWM operation.

F

V

MIN

An external resistor divider connected to this input sets the minimum fan speed by fixing the minimum PWM duty

cycle (1.25 V to 2.65 V = 0% to 100%, typical). The MC642 enters Shutdown mode when 0 ≤ V

≤ V

.

MIN

SHDN

During Shutdown, the FAULT output is inactive, and supply current falls to 25 µA (typical). The MC642 exits

Shutdown mode when V

≥ V

. See Applications section for more details.

MIN

REL

4

5

GND

Ground Terminal

SENSE

Pulses are detected at this pin as fan rotation chops the current through a sense resistor. The absence of pulses

indicates a fault.

6

FAULT

Fault (open collector) output. This line goes low to indicate a fault condition. When FAULT goes low due to a fan

fault, the device is latched in Shutdown Mode until deliberately cleared or until power is cycled. FAULT may be

connected to V

if a hard shutdown is desired. FAULT will also be asserted when the PWM reaches 100% duty

MIN

cycle, however the device will not latch itself off unless FAULT is tied to V

externally.

MIN

7

8

V

PWM signal output. This active high complimentary output connects to the base of an external NPN motor drive

transistor. This output has asymmetrical drive. – See Electrical Characteristics section.

OUT

V

Power Supply Input. May be independent of fan power supply. See Electrical Characteristics section.

DD

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2

MC642

ABSOLUTE MAXIMUM RATINGS*

Parameter

Value

Unit

Package Power Dissipation (T ≤ 70°C)

mW

A

Plastic DIP

Small Outline (SOIC)

730

470

Derating Factors

8.0

6.0

mW/°C

V

Supply Voltage

Input Voltage, Any Pin

(GND – 0.3) to (V + 0.3)

V

CC

Operating Temperature Range

Maximum Chip Temperature

Storage Temperature Range

Lead Temperature (Soldering, 10 Seconds)

0 to +85

150

°C

–65 to +150

+300

°C

* Maximum Ratings are those values beyond which damage to the device may occur.

ELECTRICAL CHARACTERISTICS (T

Characteristic

< T < T

, V = 3.0 V to 5.5 V, unless otherwise noted.)

MIN

A

MAX DD

Symbol

Min

Typ

Max

Unit

Supply Voltage

V

3.0

–

5.5

V

DD

Supply Current, Operating

I

mA

–

0.5

1.0

Pins 3, 5, 7 Open, C = 1 µF, V = V

F

IN

(CMAX)

Supply Current, Shutdown Mode

I

µA

DD(SHDN)

–

25

–

Pins 1, 5, 6, 7 Open, C = 1 µF, V = 0.35 V (Note 1.)

F

IN

I

IN

–1.0

1.0

V

, V

Input Leakage (Note 1.)

IN

MIN

Output

OUT

t

R

–

50

µsec

Rise Time (I = 5.0 mA) (Note 1.)

OH

t

F

Fall Time (I = 1.0 mA) (Note 1.)

OH

Pulse Width (On V

) to Clear Fault Mode

t

(SHDN)

MIN

30

1.0

5.0

–

V

, V

Specifications

SHDN

HYST

Sink Current at V

Output

I

mA

OUT

OL

V

OL

= 10% of V

DD

Source Current at V

Output

I

OH

OUT

V

OH

= 80% of V

DD

V

IN

, V , Inputs

MIN

Input Voltage at V or V

for 100% PWM Duty Cycle

V , V

C(MAX) OTF

2.5

1.3

–

2.65

1.4

–

2.8

1.5

V

IN

C(MIN)

MIN

V

– V

V

C(SPAN)

C(MAX)

Voltage Applied to V

to Guarantee Shutdown Mode

to Release Shutdown Mode

V

SHDN

V

x 0.13

MIN

DD

V

REL

MIN

V

DD

x 0.19

–

V

DD

= 5 V

Pulse–Width Modulator

PWM Frequency (C = 1.0 µF)

F

26

50

30

70

34

90

Hz

F

Sense Input

SENSE Input Threshold Voltage with Respect to GND

V

mV

TH(SENSE)

Fault Output

Output Low Voltage (I = 2.5 mA)

VOL

tMP

–

0.3

–

V

OH

Missing Pulse Detector Timeout

Startup Time

32/F

3/F

Sec

tSTARTUP

tDIAG

–

Diagnostic Timer Period

–

1. Guaranteed by design, not tested.

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3

MC642

DETAILED OPERATING DESCRIPTION

PWM

CAUTION: Shutdown mode is unconditional. i.e., the

The PWM (Pulse Width Modulation) circuit consists of

fan will not activate regardless of the voltage on V_IN. (Note:

The fan should not be shut down until all heat–producing

activity in the system is at a negligible level.)

a ramp generator and threshold detector. The frequency of

the PWM is determined by the value of the capacitor

connected to the C_Finput. A frequency of 30 Hz is

recommended (C_F= 1 µF). The PWM is also the timebase

for the startup and fault timer (see below). The PWM

voltage control range is 1.25 V to 2.65 V (typical) for 0%

to 100% output duty cycle.

SENSE Input

The SENSE input, pin 5, is connected to a low–value

current sensing resistor in the ground return leg of the fan

circuit. During normal fan operation commutation occurs as

each pole of the fan is energized. This commutation causes

brief interruptions in the fan current, which is seen as pulses

across the sense resistor. When the device is not in Shutdown

Mode and pulses are not appearing at the SENSE input, a

fault condition exists.

V_OUTOutput

The V_OUTpin is designed to drive a low–cost transistor or

MOSFET as the low side power switching element in the

system. Various examples of driver circuits are shown in the

following pages. This output has asymmetric

complementary drive and is optimized for driving NPN

transistors or N–channel MOSFET’s. Since the system

relies on PWM rather than linear power control, the

dissipation in the power switch is kept to a minimum.

Generally, very small devices (TO–92 or SOT package) will

suffice. (See Output Drive Transistor Selection paragraph in

Applications Information section.)

The short, rapid changes in fan current (high dI/dt) cause

corresponding dV/dt pulses across the sense resistor, R_SENSE

.

The waveform on R_SENSEis differentiated and converted to

a logic–level pulse–train by C_SENSEand the internal signal

processing circuitry (See Figure 3). The presence and

frequency of this pulse–train is a direct indication of fan

operation. See the Applications Information section for

more details.

Start–Up Timer

FAULT Output

To ensure reliable fan startup, the StartUp Timer turns the

V_OUToutput on for 32 cycles of the PWM whenever the fan

is started from the off–state. This occurs at power–up and

when coming out of shutdown mode. If the PWM frequency

is 30Hz (C_F= 1 µF), the resulting start–up time will be about

one second. If a Fault is detected (see below), the Diagnostic

Timer is triggered once, followed by the Startup–Up Timer.

If the fault persists, the device is shut down. See FAULT

Output below.

The MC642 detects faults in two ways:

(1) Pulses appearing at SENSE due to the PWM turning on

are blanked and the remaining pulses are filtered by a

missing pulse detector. If consecutive pulses are not detected

for 32 PWM cycles (1 Sec if C_F= 1 µF), the Diagnostic

Timer is activated and V_OUTis driven continuously for three

PWM cycles (100 msec if C_F= 1 µF). If a pulse is not

detected within this window, the Startup–Timer is triggered.

This should clear a transient fault condition. If the Missing

Pulse Detector times out again, the PWM is stopped and

FAULT goes low. When FAULT is activated due to this

condition, the device is latched in Shutdown mode and will

remain off indefinitely. (Diodes D₁, D₂and resistor R5 (See

Figure 3) are provided to ensure that fan restarting is the

result of a fan fault, and not an over–temperature fault. A

CMOS logic OR gate may be substituted for these

components if available).

When FAULT is activated due to this condition, the device

is latched in Shutdown mode and will remain off

indefinitely. Important: At this point, action must be

taken to restart the fan by momentarily pulling V_MIN

below V_SHDN, or by cycling system power. In either case

the fan cannot be permitted to remain disabled due to a

fault condition, as severe system damage could result. If

the fan cannot be restarted, the system should be shut

down. The MC642 may be configured to continuously

attempt fan restarts if so desired.

Shutdown Control (Optional)

When V_MIN(pin 3) is pulled below V_SHDN, the MC642 will

go into Shutdown mode. This can be accomplished by

driving V_MINwith an open drain logic signal or using an

external transistor as shown in Figure 3. All functions are

suspended until the voltage on V_MINbecomes higher than

V_REL(0.85 V @ V_DD= 5.0 V). Pulling V_MINbelow V_SHDNwill

always result in complete device shutdown and reset. The

FAULT output is unconditionally inactive in Shutdown

mode.

A small amount of hysteresis, typically one percent of V_DD

(50 mV at V_DD= 5.0 V), is designed into the V_SHDN/V_REL

threshold. The levels specified for V_SHDNand V_RELin the

Electrical Characteristics section include this hysteresis

plus adequate margin to account for normal variations in the

absolute value of the threshold and hysteresis.

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4

MC642

V

DD

R5

10 k

+12 V

0.1 mF

D1

D2

+5 V

8

MC642

Reset

FAN

Q1

V

DD

+5 V

1

0

From

V

FAULT

in

1

3

2

6

7

5

Temp

Sensor

R

R3

MC642

BASE

Fault Detected

V

min

out

0.01

C

B

R1

From

C

SENSE

GND

R4

F

System

Shutdown

Controller

+

C

SENSE

(Optional)

C

R

F

SENSE

1 mF

4

* The parallel combination of R3 and R4 must be > 10 k.

Figure 3. Typical Fan Control Application

Continuous restart mode is enabled by connecting the

FAULT output to V_MINthrough a 0.1 µF capacitor as shown

in Figure 3. When so connected, the MC642 automatically

attempts to restart the fan whenever a fault condition occurs.

When the fault output is driven low, the V_MINinput is

momentarily pulled below V_SHDN, initiating a reset and

clearing the fault condition. Normal fan startup is then

attempted as previously described. The FAULT output may

be connected to external logic (or the interrupt input of a

microcontroller) to shut down the MC642 if multiple fault

pulses are detected at approximately one second intervals.

(2) FAULT is also asserted when the PWM control voltage

applied to V_INbecomes greater than that needed to drive

100% duty cycle (see Electrical Characteristics). This

indicates that the fan is at maximum drive and the potential

exists for system overheating. Either heat dissipation in the

system has gone beyond the cooling system’s design limits

or some other fault exists such as fan bearing failure or an

airflow obstruction. This output may be treated as a System

Overheat warning and used to trigger system shutdown.

However in this case, the fan will continue to run even when

FAULT is asserted. If a shutdown is desired, FAULT may be

connected to V_MINoutside the device. This will latch the

MC642 in Shutdown Mode when any fault occurs.

SYSTEM BEHAVIOR

The flowcharts describing the MC642’s behavioral

algorithm are shown in Figure 5. They can be summarized

as follows:

Power–Up

1. Assuming the device is not being held in Shutdown

mode (V_MIN> V_REL):

2. Turn V_OUToutput on for 32 cycles of the PWM

clock. This ensures that the fan will start from a

dead stop.

3. During this Start–up time, if a fan pulse is detected

then branch to Normal Operation; if none are

received.

4. Activate the 32–cycle Start–up Timer one more

time and look for fan pulses; if a fan pulse is

detected, proceed to Normal Operation; if none are

received....

5. Proceed to Fan Fault

6. End

After this period elapses, the MC642 begins normal

operation.

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5

MC642

+5 V*

1 mF

+12 V

R1

NTC

C

B

0.01

R2

FAN

Q1

C

B

8

V

DD

Thermal

Shutdown

V

FAULT

in

1

3

2

6

7

5

R

R3

MC642

BASE

V

out

min

0.01

C

B

Shutdown

C

SENSE

GND

R4

F

+

C

SENSE

(Optional)

C

R

F

SENSE

1 mF

4

NOTE: *See Cautions Regarding Latch–Up Considerations in the Applications Section.

Figure 4. Typical Fan Control Application Using NTC Thermistor

Normal Operation

7. Activate the 3–cycle Diagnostic Timer and look for

pulses; if a fan pulse is detected, branch back to the

start of the loop; if none are received...

8. Activate the 32–cycle Startup Timer and look for

pulses; if a fan pulse is detected, branch back to the

start of the loop; if none are received...

Normal Operation is an endless loop which may only be

exited by entering Shutdown mode or Fan Fault. The loop

can be thought of as executing at the frequency of the

oscillator and PWM.

1. Reset the Missing Pulse Detector

2. Is MC642 in Shutdown? If so...

9. Quit Normal Operation and go to Fan Fault.

10. End

a. V_OUTduty–cycle goes to zero.

b. FAULT is disabled.

Fan Fault

c. Exit the loop and wait for V_MIN> V_RELto resume

operation (indistinguishable from Power–Up).

Fan Fault is essentially an infinite loop wherein the

MC642 is latched in Shutdown Mode. This mode can only

3. If an over–temperature fault occurs (V_IN> V_OTF

then activate FAULT; release FAULT when V_IN

)

<

be released by a Reset, i.e., V_MINbeing brought below V_SDHN

then above V_REL, or by power–cycling.

1. While in this state, FAULT is latched on (low), and

the V_OUToutput is disabled.

,

V_OTF

.

4. Drive V_OUTto a duty–cycle proportional to greater

of V_INand V_MINon a cycle by cycle basis.

5. If a fan pulse is detected, branch back to the start of

the loop.

2. A Reset sequence applied to the V_MINpin will exit

the loop to Power Up.

3. End

6. If the missing pulse detector times out ...

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6

MC642

Normal

Operation

Power–Up

Clear

Missing Pulse

Detector

Power–On

Reset

FAULT = 1

YES

SHDN

Shutdown

V

< V

IN

V

= 0

OUT

YES

Shutdown

V

< V

SHDN?

IN

V

= 0

OUT

NO

V

> V

REL?

IN

NO

V

> V

REL

IN

Initiate Start–

Up Timer

(1 Sec)

YES

Power–Up

YES

Initiate Start–

Up Timer

(1 Sec)

NO

Fan Pulse

Detected?

V

> V

OTF?

IN

FAULT = 0

NO

YES

Fan Pulse

Detected?

V

OUT

Proportional

To Greater

of V or V

Normal

Operation

NO

IN

MIN

Fan Fault

YES

NO

Fan Pulse

Detected?

M.P.D.

Expired?

Fan Fault

NO

YES

Initiate

Diagnostic Timer

(100 mSec)

FAULT = Low,

Disabled

V

OUT

YES

NO

Initiate Start–

Up Timer

(1 Sec)

NO

Fan Pulse

Detected?

NO

Cycling

Power?

V

< V

IN

SHDN?

YES

Fan Pulse

Detected?

YES

NO

V

> V

REL?

IN

Fan Fault

YES

Power–Up

Figure 5. MC642 Behavioral Algorithm Flowchart

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7

MC642

APPLICATIONS INFORMATION

Designing with the MC642 involves the following:

5. If Shutdown capability is desired, the drive

requirements of the external signal or circuit must

be considered.

1. The temp sensor network must be configured to

deliver 1.25 V to 2.65 V on V_INfor 0% to 100% of

the temperature range to be regulated.

2. The minimum fan speed (V_MIN) must be set.

3. The output drive transistor and associated circuitry

must be selected.

4. The Sense Network, R_SENSEand C_SENSE, must be

designed for maximum efficiency while delivering

adequate signal amplitude.

Temperature Sensor Design

The temperature signal connected to V_INmust output a

voltage in the range of 1.25 V to 2.65 V (typical) for 0% to

100% of the temperature range of interest. The circuit of

Figure 6 is a convenient way to provide this signal.

V

DD

V

DD

I

DIV

T1

R1

R2

R1

I

IN

V

MIN

I

V

in

DIV

R2

GND

Figure 6. Temperature Sensing Circuit

Figure 7. V_MINCircuit

V

DD

V

DD

FAN

R

BASE

Q1

V

OH

= 80% V

V

OUT

DD

+

–

V

R(BASE)

+

–

V

BE(SAT)

SENSE

+

C

SENSE

V

R

SENSE

R(SENSE)

SENSE

m

(0.1 F Typ.)

–

GND

Figure 8. Circuit for Determining R_BASE

Figure 9. SENSE Network

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8

MC642

5.0V

Figure 6 illustrates a simple temperature dependent

voltage divider circuit. T1 is a conventional NTC thermistor,

and R1 and R2 are standard resistors. The supply voltage,

I_DIV= 1e^–4A =

, therefore

R1 + R2

(eq. 4)

5.0V

1e^–4

V

_DD, is divided between R2 and the parallel combination of

R1 + R2 =

= 50,000W = 50kW

A

T1 and R1. (For convenience, the parallel combination of T1

and R1 will be referred to as R_TEMP.) The resistance of the

thermistor at various temperatures is obtained from the

manufacturer’s specifications. Thermistors are often

referred to in terms of their resistance at 25°C. A thermistor

with a 25°C resistance on the order of 100 kW will result in

reasonable values for R1, R2, and I_DIV. In order to determine

R1 and R2, we must specify the fan duty–cycle, i.e. V_IN, at

any two temperatures. Equipped with these two points on the

system’s operating curve and the thermistor data, we can

write the defining equations:

We can further specify R1 and R2 by the condition that the

divider voltage is equal to our desired V_MIN. This yields the

following equation:

R2

R1)R2

V

+ V

DD

(eq. 5)

MIN

Solving for the relationship between R1 and R2 results in

the following equation:

V

* V

V

DD

MIN

R1 + R2

(eq. 6)

In the case of this example, R1 = (1.762) R2. Substituting

this relationship back into Equation 4 yields the resistor

values:

V

R2

(t1))R2

DD

+ V(t1)

R

TEMP

(eq. 1)

R2 = 18.1 kW, and

R1 = 31.9 kW

V

R2

(t2))R2

DD

+ V(t2)

R

TEMP

In this case, the standard values of 32 kW and 18 kW are

very close to the calculated values and would be more than

adequate.

Where t1 and t2 are the chosen temperatures and R_TEMPis

the parallel combination of the thermistor and R1. These two

equations permit solving for the two unknown variables, R1

and R2. Note that resistor R1 is not absolutely necessary, but

it helps to linearize the response of the network.

One boundary condition which may impact the selection

of the minimum fan speed is the irregular activation of the

Diagnostic Timer due to the MC642 “missing” fan

commutation pulses at low speeds. Typically, this only

occurs at very low duty–cycles (25% or less). It is a natural

consequence of low PWM duty–cycles. Recall that the

SENSE function detects commutation of the fan as

disturbances in the current through R_SENSE. These can only

occur when the fan is energized, i.e., V_OUTis “on”. At very

low duty–cycles, the V_OUToutput is “off” most of the time.

The fan may be rotating normally, but the commutation

events are occurring during the PWM’s off–time.

The phase relationship between the fan’s commutation

and the PWM edges tends to “walk around” as the system

operates. At certain points, the MC642 may fail to capture

a pulse within the 32–cycle Missing Pulse Detector window.

When this happens, the 3–cycle Diagnostic Timer will be

activated, the V_OUToutput will be active continuously for

three cycles and, if the fan is operating normally, a pulse will

be detected. If all is well, the system will return to normal

operation. There is no harm in this behavior, but it may be

audible to the user as the fan will accelerate briefly when the

Diagnostic Timer fires. For this reason, it is recommended

that V_MINbe set no lower than 1.8 V.

Minimum Fan Speed

A voltage divider on V_MINsets the minimum PWM duty

cycle and, thus, the minimum fan speed. As with the V_IN

input, 1.25 V to 2.65 V corresponds to 0% to 100% duty

cycle. Assuming that fan speed is linearly related to

duty–cycle, the minimum speed voltage is given by the

equation:

Minimum Speed

V

+

(1.4V) ) 1.25 V + 1.81 V

(eq. 2)

MIN

Full Speed

For example, if 2500 RPM equates to 100% fan speed, and

a minimum speed of 1000 RPM is desired, then the V_MIN

voltage is:

1000

2500

V

+

(1.4V) ) 1.25 V + 1.81 V

MIN

(eq. 3)

The V_MINvoltage may be set using a simple resistor

divider as shown in Figure 7. Per the Electrical

Characteristics, the leakage current at the V_MINpin is no

more than 1 µA. It would be very conservative to design for

a divider current, I_DIV, of 100 µA. If V_DD= 5.0 V then...

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9

MC642

SENSE Network (R_SENSEand C_SENSE

)

Table 1. R_SENSEvs. Fan Current

Nominal Fan Current (mA) R_SENSE(W)

The network comprised of R_SENSEand C_SENSEallow the

MC642 to detect commutation of the fan motor. This

network can be thought of as a differentiator and threshold

detector. The function of R_SENSEis to convert the fan current

into a voltage. C_SENSEserves to AC–couple this voltage

signal and provide a ground–referenced input to the SENSE

pin. Designing a proper SENSE Network is simply a matter

of scaling R_SENSEto provide the necessary amount of gain,

i.e., the current–to–voltage conversion ratio. A 0.1 µF

ceramic capacitor is recommended for C_SENSE. Smaller

values require larger sense resistors, and higher value

capacitors are bulkier and more expensive. Using a 0.1 µF

results in reasonable values for R_SENSE. Figure 9 illustrates a

typical SENSE Network. Figure 10 shows the waveforms

observed using a typical SENSE Network.

50

9.1

4.7

3.0

2.4

2.0

1.8

1.5

1.3

1.2

1.0

100

150

200

250

300

350

400

450

500

Table 1 lists the recommended values of R_SENSEaccording

to the nominal operating current of the fan. Note that the

current draw specified by the fan manufacturer may not be the

fan’s nominal operating current, but may be a worst–case

rating for near–stall conditions. The values in the table refer

to actual average operating current. If the fan current falls

between two of the values listed, use the higher resistor value.

The end result of employing Table 1 is that the signal

developed across the sense resistor is approximately 450 mV

in amplitude.

Figure 10. SENSE Waveforms

V

DD

V

DD

V

DD

FAN

R

BASE

R

BASE

Q1

V

OUT

Q1

V

OUT

V

OUT

Q2

R

SENSE

R

SENSE

GND

a) Single Bipolar Transistor

GND

b) Darlington Transistor Pair

GND

c) N–Channel MOSFET

Figure 11. Output Drive Transistor Circuit Topologies

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10

MC642

Output Drive Transistor Selection

A base–current limiting resistor is required with bipolar

transistors. This is shown in Figure 8. The correct value for

this resistor can be determined as follows: (see Figure 8).

The MC642 is designed to drive an external transistor for

modulating power to the fan. This is shown as “Q1” in

Figures 4, 8, 9, 11, 12, and 13. The V_OUTpin has a minimum

source current of 5 mA and a minimum sink current of 1mA

at V_DD= 5.0 V. Bipolar transistors or MOSFET’s may be

used as the power switching element as shown below. When

high current gain is needed to drive larger fans, two

transistors may be used in a Darlington configuration. These

circuit topologies are shown in Figure 11: (a) shows a single

NPN transistor used as the switching element; (b) Illustrates

the Darlington pair; and (c) shows an N–channel MOSFET.

One major advantage of the MC642’s PWM control

scheme versus linear speed control is that the dissipation in

the pass element is kept very low. Generally, low–cost

devices in very small packages such as TO–92 or SOT, can

be used effectively. For fans with nominal operating currents

of no more than 200 mA, a single transistor usually suffices.

Above 200 mA, the Darlington or MOSFET solution is

recommended. For the fan sensing function to work

correctly it is imperative that the pass transistor be fully

saturated when “on”. The minimum gain (h_FE) of the

transistor in question must be adequate to fully saturate the

transistor when passing the full fan current while being

driven within the 5 mA I_OHof the V_OUToutput.

Table 2 gives examples of some commonly available

transistors. This table is a guide only. There are many

transistor types which might work as well as those listed.

The only critical issues when choosing a device to use as Q1

are: (1) the breakdown voltage, V_CE(BR), must be large

enough to stand off the highest voltage applied to the fan

(NOTE: this may be when the fan is off!); (2) the gain (h_FE)

must be high enough for the device to remain fully saturated

while conducting the maximum expected fan current and

being driven with no more than 5 mA of base/gate drive at

maximum temperature; (3) rated fan current draw must be

within the transistor’s current handling capability; and

(4) power dissipation must be kept within the limits of the

chosen device.

V

+ V

)V

) V

OH

SENSE

BE(SAT)

SENSE

I

RBASE

(eq. 7)

V

+ I

FAN

R

RSENSE

V

+ V

+ I

RBASE

BASE

ńh

BASE

I

BASE

FAN FE

V_OHis specified as 80% of V_DDin the Electrical

Characteristics table; V_BE(SAT)is given in the transistor

datasheet. It is now possible to solve for R_BASE

.

V

* V

BE(SAT) RSENSE

OH

(eq. 8)

R

+

BASE

I

RBASE

Some applications require the fan to be powered from the

negative 12 V supply to keep motor noise out of the positive

voltage power supplies. As shown in Figure 12, Zener diode

D2 offsets the –12 V power supply voltage holding transistor

Q1 OFF when V_OUTis LOW. When V_OUTis HIGH, the

voltage at the anode of D2 increases by V_OH, causing Q1 to

turn ON. Operation is otherwise the same as the case of fan

operation +12 V.

Latch–up Considerations

As with any CMOS IC, the potential exists for latch–up if

signals are applied to the device which are outside the power

supply range. This is of particular concern during power–up

if the external circuitry, such as the sensor network, V_MIN

divider, shutdown circuit, or fan, are powered by a supply

different from that of the MC642. Care should be taken to

ensure that the MC642’s V_DDsupply powers–up first. If

possible, the networks attached to V_INand V_MINshould

connect to the V_DDsupply at the same physical location as

the IC itself. Even if the IC and any external networks are

powered by the same supply, physical separation of the

connecting points can result in enough parasitic capacitance

and/or inductance in the power supply connections to delay

one power supply “routing” versus another.

Power Supply Routing and Bypassing

Noise present on the V_INand V_MINinputs may cause

erroneous operation of the FAULT output. As a result, these

inputs should be bypassed with a 0.01 µF capacitor mounted

as close to the package as possible. This is particularly true

of V_IN, which usually is driven from a high impedance

source (such as a thermistor). In addition, the V_DDinput

should be bypassed with a 1 µF capacitor. Grounds should

be kept as short as possible. To keep fan noise off the MC642

ground pin, individual ground returns for the MC642 and the

low side of the fan current sense resistor should be used.

Table 2. Transistors for Q1

Device

V_BE(SAT)MIN h_FEV_BR(CEO)I_C

R_BASE

(W)

MPS2222

MPS2222A

2N4400

1.3

1.2

100

50

30

40

25

40

150

500

800

820

780

0.95

1.2

2N4401

100

50

MPS6601

MPS6602

1.2

50

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11

MC642

5 V

V

DD

FAN

R2

2.2 k

MC642

Q1

V

out

D2

12 V

Zener

R4

10 k

R3

2.2 W

GND

–12 V

Figure 12. Powering Fan From –12V Supply

Design Example (Figure 13)

Step 2. Set minimum fan speed

Step 1. Circulate R1 and R2 based on using an NTC

having a resistance of 4.6 kW at T_MINand 1.1 kW

V_MIN= 1.8 V

at T_MAX

.

Limit the divider current to 100 µA from

which R5 = 33 k and R6 = 18 kW

R1 = 75 kW

R2 = 1 kW

Step 3. Design the output circuit

Maximum fan motor current = 250 mA. Q1

beta is chosen at 100 from which R7 = 1.5 kW

+5 V

NTC

10 kW

@ 25°C

+12 V

FAN

R1

1 mF

+

C

B

0.01 mF

R2

C

B

8

4

V

CC

GND

+5 V

R5

System

Q1

V

FAULT

in

Fault

1

3

2

6

7

5

R7

1.5 k

MC642

33 k

V

min

V

out

0.01

C

R8

10 k

B

Fan

Q2

C

SENSE

R6

F

Shutdown

+

C

SENSE

0.1 mF

R

2.2 W

SENSE

(Optional)

C1

1 mF

Figure 13. Design Example

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12

MC642

MC642 as a Microcontroller Peripheral

(Figure 14)

translates the 3–bit code from the processor’s outputs into a

1.6 V DC control signal. (A monolithic DAC or digital pot

may be used instead of the circuit shown.)

In a system containing a microcontroller or other host

intelligence, the MC642 can be effectively managed as a

CPU peripheral. Routine fan control functions can be

performed by the MC642 without processor intervention.

The micro–controller receives temperature data from one or

more points throughout the system. It calculates a fan

operating speed based on an algorithm specifically designed

for the application at hand. The processor controls fan speed

using complementary port bits I/01 through I/03. Resistors

R1 through R6 (5% tolerance) form a crude 3–bit DAC that

With V

set to 1.8 V, the MC642 has a minimum

MIN

operating speed of approximately 40% of full rated speed

when the processor’s output code is 000. Output codes 001

to 111 operate the fan from roughly 40% to 100% of full

speed. An open drain output from the processor can be used

to reset the MC642 following detection of a fault condition.

The FAULT output can be connected to the processor’s

interrupt input, or to an I/O pin for polled operation.

+5 V

+12 V

Open

Drain

Output

(RESET) (Optional)

I/O

0

1

2

3

+5 V

R1

+

110 k

(MSB)

FAN

V

DD

in

+

8

7

1

C

B

C

B

1 mF

R2

240 k

–

R9

1.5 k

0.01 mF

MC642

CMOS

Outputs

2N2222A

C

V

out

F

R3

360 k

+5 V

2

+

R7

33 k

1 mF

R10

10 k

(LSB)

+5 V

R4

18 k

V

min

FAULT

3

6

5

C

+5 V

B

CMOS

Microcontroller

0.01 mF

R8

18 k

R5

1.5 k

R6

1 k

GND

SENSE

4

0.1 mF

R11

2.2 W

GND

INT

Figure 14. Design Example

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13

MC642

PACKAGE DIMENSIONS

PDIP–8

P SUFFIX

CASE 626–05

ISSUE L

NOTES:

1. DIMENSION L TO CENTER OF LEAD WHEN

FORMED PARALLEL.

2. PACKAGE CONTOUR OPTIONAL (ROUND OR

SQUARE CORNERS).

8

5

3. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

–B–

MILLIMETERS

INCHES

MIN

0.370

1

4

DIM MIN

MAX

0.400

0.260

0.175

0.020

0.070

A

B

C

D

F

9.40

6.10

3.94

0.38

1.02

10.16

6.60 0.240

4.45 0.155

0.51 0.015

1.78 0.040

F

–A–

NOTE 2

L

G

H

J

2.54 BSC

0.100 BSC

0.76

0.20

2.92

1.27 0.030

0.30 0.008

0.050

0.012

0.135

K

L

3.43

0.115

C

7.62 BSC

0.300 BSC

M

N

---

0.76

10

---

1.01 0.030

10

0.040

_

J

–T–

SEATING

PLANE

N

M

D

K

G

H

M

0.13 (0.005)

T A

B

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14

MC642

PACKAGE DIMENSIONS

SO–8

D SUFFIX

CASE 751–07

ISSUE W

–X–

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

A

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A AND B DO NOT INCLUDE MOLD

PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER

SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE DAMBAR

PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN

EXCESS OF THE D DIMENSION AT MAXIMUM

MATERIAL CONDITION.

8

5

4

S

M

B

0.25 (0.010)

Y

1

K

–Y–

G

MILLIMETERS

INCHES

DIM MIN

MAX

5.00

4.00

1.75

0.51

MIN

MAX

0.197

0.157

0.069

0.020

A

B

C

D

G

H

J

4.80

3.80

1.35

0.33

0.189

0.150

0.053

0.013

C

N X 45

_

SEATING

PLANE

–Z–

1.27 BSC

0.050 BSC

0.10 (0.004)

0.10

0.19

0.40

0

0.25

1.27

8

0.004

0.010

0.050

8

0.007

0.016

0

M

J

H

D

K

M

N

S

_

0.25

5.80

0.50

6.20

0.010

0.228

0.020

0.244

M

S

X

0.25 (0.010)

Z

Y

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15

MC642

ON Semiconductor and

are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes

without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular

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including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or

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SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications

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For additional information, please contact your local

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MC642/D

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型号：	MC642DR2
厂家：	Rochester Electronics
描述：	BRUSH DC MOTOR CONTROLLER, PDSO8, SO-8 电动机控制光电二极管
文件：	总17页 (文件大小：812K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MC642DR2 [ROCHESTER]

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