MM74C04M [ROCHESTER]

CMOS SERIES, HEX 1-INPUT INVERT GATE, PDSO14, 0.150 INCH, MS-012, SOIC-14;
MM74C04M
型号: MM74C04M
厂家: Rochester Electronics    Rochester Electronics
描述:

CMOS SERIES, HEX 1-INPUT INVERT GATE, PDSO14, 0.150 INCH, MS-012, SOIC-14

栅 输入元件 光电二极管 逻辑集成电路 触发器
文件: 总7页 (文件大小:764K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
October 1987  
Revised May 2002  
MM74C00 MM74C02 MM74C04  
Quad 2-Input NAND Gate •  
Quad 2-Input NOR Gate •  
Hex Inverter  
General Description  
Features  
Wide supply voltage range: 3V to 15V  
The MM74C00, MM74C02, and MM74C04 logic gates  
employ complementary MOS (CMOS) to achieve wide  
power supply operating range, low power consumption,  
high noise immunity and symmetric controlled rise and fall  
times. With features such as this the 74C logic family is  
close to ideal for use in digital systems. Function and pin  
out compatibility with series 74 devices minimizes design  
time for those designers already familiar with the standard  
74 logic family.  
Guaranteed noise margin: 1V  
High noise immunity: 0.45 VCC (typ.)  
Low power consumption: 10 nW/package (typ.)  
Low power: TTL compatibility:  
Fan out of 2 driving 74L  
All inputs are protected from damage due to static dis-  
charge by diode clamps to VCC and GND.  
Ordering Code:  
Order Number Package Number  
Package Description  
MM74C00M  
MM74C00N  
MM74C02N  
MM74C04M  
MM74C04N  
M14A  
N14A  
N14A  
M14A  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Connection Diagrams  
MM74C00  
MM74C02  
Top View  
Top View  
MM74C04  
Top View  
© 2002 Fairchild Semiconductor Corporation  
DS005877  
www.fairchildsemi.com  
Absolute Maximum Ratings(Note 1)  
Voltage at Any Pin  
0.3V to VCC + 0.3V  
Operating Temperature Range  
Storage Temperature Range  
Operating VCC Range  
Maximum VCC Voltage  
Power Dissipation (PD)  
Dual-In-Line  
55°C to +125°C  
65°C to +150°C  
3.0V to 15V  
18V  
Note 1: Absolute Maximum Ratingsare those values beyond which the  
safety of the device cannot be guaranteed. Except for Operating Tempera-  
ture Rangethey are not meant to imply that the devices should be oper-  
ated at these limits. The table of Electrical Characteristicsprovides  
conditions for actual device operation.  
700 mW  
500 mW  
Small Outline  
Lead Temperature  
(Soldering, 10 seconds)  
300°C  
DC Electrical Characteristics  
Min/Max limits apply across the guaranteed temperature range unless otherwise noted  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
CMOS TO CMOS  
VIN(1)  
Logical 1Input Voltage  
Logical 0Input Voltage  
Logical 1Output Voltage  
Logical 0Output Voltage  
V
V
V
V
V
V
V
V
V
V
V
CC = 5.0V  
CC = 10V  
CC = 5.0V  
CC = 10V  
3.5  
8.0  
V
V
V
V
VIN(0)  
1.5  
2.0  
VOUT(1)  
CC = 5.0V, IO = −10 µA  
CC = 10V, IO = −10 µA  
CC = 5.0V, IO = 10 µA  
CC = 10V, IO = 10 µA  
CC = 15V, VIN = 15V  
CC = 15V, VIN = 0V  
CC = 15V  
4.5  
9.0  
VOUT(0)  
0.5  
1.0  
1.0  
IIN(1)  
IIN(0)  
ICC  
Logical 1Input Current  
Logical 0Input Current  
Supply Current  
0.005  
0.005  
0.01  
µA  
µA  
µA  
1.0  
15  
LOW POWER TO CMOS  
VIN(1)  
Logical 1Input Voltage  
74C, VCC = 4.75V  
V
CC 1.5  
V
V
V
V
VIN(0)  
Logical 0Input Voltage  
Logical 1Output Voltage  
Logical 0Output Voltage  
74C, VCC = 4.75V  
0.8  
0.4  
VOUT(1)  
VOUT(0)  
74C, VCC = 4.75V, IO = −10 µA  
74C, VCC = 4.75V, IO = 10 µA  
4.4  
CMOS TO LOW POWER  
VIN(1)  
Logical 1Input Voltage  
74C, VCC = 4.75V  
4.0  
2.4  
V
V
V
V
VIN(0)  
Logical 0Input Voltage  
Logical 1Output Voltage  
Logical 0Output Voltage  
74C, VCC = 4.75V  
1.0  
0.4  
VOUT(1)  
VOUT(0)  
74C, VCC = 4.75V, IO = −360 µA  
74C, VCC = 4.75V, IO = 360 µA  
OUTPUT DRIVE (see Family Characteristics Data Sheet) TA = 25°C (short circuit current)  
ISOURCE  
ISOURCE  
ISINK  
Output Source Current  
Output Source Current  
Output Sink Current  
Output Sink Current  
V
V
V
V
CC = 5.0V, VIN(0) = 0V, VOUT = 0V  
CC = 10V, VIN(0) = 0V, VOUT = 0V  
CC = 5.0V, VIN(1) = 5.0V, VOUT = VCC  
CC = 10V, VIN(1) = 10V, VOUT = VCC  
1.75  
8.0  
1.75  
8.0  
mA  
mA  
mA  
mA  
ISINK  
AC Electrical Characteristics (Note 2)  
T
A = 25°C, CL = 50 pF, unless otherwise specified  
Symbol Parameter  
MM74C00, MM74C02, MM74C04  
Conditions  
Min  
Typ  
Max  
Units  
tpd0, tpd1  
Propagation Delay Time to  
V
CC = 5.0V  
CC = 10V  
50  
30  
6.0  
12  
90  
60  
ns  
Logical 1or 0”  
V
CIN  
Input Capacitance  
(Note 3)  
Per Gate or Inverter (Note 4)  
pF  
pF  
CPD  
Power Dissipation Capacitance  
Note 2: AC Parameters are guaranteed by DC correlated testing.  
Note 3: Capacitance is guaranteed by periodic testing.  
Note 4: CPD determines the no load AC power consumption of any CMOS device.  
For complete explanation see Family Characteristics Application NoteAN-90.  
www.fairchildsemi.com  
2
Typical Performance Characteristics  
Gate Transfer  
Characteristics  
Propagation Delay vs.  
Ambient Temperature  
MM74C00, MM74C02, MM74C04  
Propagation Delay vs.  
Ambient Temperature  
MM74C00, MM74C02, MM74C04  
Guaranteed Noise Margin  
Over Temperature vs.  
VCC  
Propagation Delay Time vs.  
Load Capacitance  
MM74C00, MM74C02, MM74C04  
Power Dissipation vs.  
Frequency  
MM74C00, MM74C02, MM74C04  
3
www.fairchildsemi.com  
Switching Time Waveforms and AC Test Circuit  
CMOS to CMOS  
Delays measured with input tr, tf 20 ns.  
www.fairchildsemi.com  
4
Physical Dimensions inches (millimeters) unless otherwise noted  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
Package Number M14A  
5
www.fairchildsemi.com  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Package Number N14A  
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and  
Fairchild reserves the right at any time without notice to change said circuitry and specifications.  
LIFE SUPPORT POLICY  
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD  
SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the  
body, or (b) support or sustain life, and (c) whose failure  
to perform when properly used in accordance with  
instructions for use provided in the labeling, can be rea-  
sonably expected to result in a significant injury to the  
user.  
2. A critical component in any component of a life support  
device or system whose failure to perform can be rea-  
sonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
www.fairchildsemi.com  
www.fairchildsemi.com  
6

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