MM74HCT574WMX [ROCHESTER]
Bus Driver, HCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, 0.300 INCH, MS-013, SOIC-20;
| 型号： | MM74HCT574WMX |
| 厂家： | 
Rochester Electronics |
| 描述： | Bus Driver, HCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, 0.300 INCH, MS-013, SOIC-20 驱动 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总10页 (文件大小：794K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
February 1990
Revised May 2005
MM74HCT573 • MM74HCT574
Octal D-Type Latch • 3-STATE Octal D-Type Flip-Flop
General Description
Features
■ TTL input characteristic compatible
The
MM74HCT573
octal
D-type
latches
and
MM74HCT574 octal D-type flip-flop advanced silicon-gate
CMOS technology, which provides the inherent benefits of
low power consumption and wide power supply range, but
are LS-TTL input and output characteristic and pin-out
compatible. The 3-STATE outputs are capable of driving 15
LS-TTL loads. All inputs are protected from damage due to
static discharge by internal diodes to VCC and ground.
■ Typical propagation delay: 18 ns
■ Low input current: 1 A maximum
■ Low quiescent current: 80 A maximum
■ Compatible with bus-oriented systems
■ Output drive capability: 15 LS-TTL loads
When the MM74HCT573 Latch Enable input is HIGH, the
Q outputs will follow the D inputs. When the Latch Enable
goes LOW, data at the D inputs will be retained at the out-
puts until Latch Enable returns HIGH again. When a high
logic level is applied to the Output Control input, all outputs
go to a high impedance state, regardless of what signals
are present at the other inputs and the state of the storage
elements.
The MM74HCT574 are positive edge triggered flip-flops.
Data at the D inputs, meeting the setup and hold time
requirements, are transferred to the Q outputs on positive
going transitions of the Clock (CK) input. When a high logic
level is applied to the Output Control (OC) input, all outputs
go to a high impedance state, regardless of what signals
are present at the other inputs and the state of the storage
elements.
The MM74HCT devices are intended to interface between
TTL and NMOS components and standard CMOS devices.
These parts are also plug in replacements for LS-TTL
devices and can be used to reduce power consumption in
existing designs.
Ordering Codes:
Order Number
MM74HCT573WM
MM74HCT573SJ
MM74HCT573MTC
MM74HCT573N
MM74HCT574WM
MM74HCT574SJ
MM74HCT574MTC
MM74HCT574N
Package Number
M20B
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
M20D
MTC20
N20A
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
M20B
M20D
MTC20
N20A
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
© 2005 Fairchild Semiconductor Corporation
DS010627
www.fairchildsemi.com
Connection Diagrams
Truth Tables
MM74HCT573
Output
Control
LE
Data
Output
L
L
H
H
L
H
L
H
L
L
X
X
Q0
Z
H
X
H
L
HIGH Level
LOW Level
Q
Level of output before steady-state input conditions were established.
0
Z
High Impedance State
Top View
MM74HCT573
MM74HCT574
Output
Control
LE
Data
Output
L
L
H
L
H
L
L
L
X
X
Q0
Z
H
X
H
L
HIGH Level
LOW Level
Q
Level of output before steady-state input conditions were established.
0
X
Don’t Care
Z
High Impedance State
Transition from LOW-to-HIGH
Top View
MM74HCT574
www.fairchildsemi.com
2
Absolute Maximum Ratings(Note 1)
(Note 2)
Recommended Operating
Conditions
Supply Voltage (VCC
DC Input Voltage (VIN
DC Output Voltage (VOUT
Clamp Diode Current (IIK, IOK
DC Output Current, per pin (IOUT
DC VCC or GND Current, per pin (ICC
)
0.5 to 7.0V
1.5 to VCC 1.5V
0.5 to VCC 0.5V
20 mA
Min
Max Units
)
Supply Voltage (VCC
DC Input or Output Voltage
(VIN, VOUT
)
4.5
5.5
V
)
)
)
0
VCC
85
V
)
35 mA
Operating Temperature Range (TA)
Input Rise or Fall Times
tr, tf
40
C
)
70 mA
Storage Temperature Range (TSTG
Power Dissipation (PD)
(Note 3)
)
65 C to 150 C
500
ns
Note 1: Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
600 mW
500 mW
Note 2: Unless otherwise specified all voltages are referenced to ground.
S. O. Package only
Note 3: Power Dissipation temperature derating — plastic “N” package:
Lead Temperature (TL)
(Soldering 10 seconds)
12 mW/ C from 65 C to 85 C.
260 C
DC Electrical Characteristics
V
5V 10% (unless otherwise specified)
CC
T
25 C
T
40 to 85 C
T
A
55 to 125 C
A
A
Symbol
Parameter
Conditions
Units
Typ
Guaranteed Limits
V
V
V
Minimum HIGH Level
Input Voltage
2.0
2.0
2.0
0.8
V
IH
Maximum LOW Level
Input Voltage
0.8
0.8
V
IL
Minimum HIGH Level
Output Voltage
V
V
V
V
or V
OH
IN
IH IL
|I
|I
|I
|
|
|
20
A
V
V
0.1
V
0.1
3.84
V
CC
0.1
OUT
OUT
OUT
CC
CC
CC
V
6.0 mA, V
7.2 mA, V
4.5V
5.5V
4.2
5.7
3.98
4.98
3.7
CC
4.84
4.7
CC
V
Maximum LOW Level
Voltage
V
or V
IH IL
OL
IN
|I
|I
|I
|
|
|
20
A
0
0.1
0.26
0.26
0.1
0.1
0.33
0.33
1.0
0.1
0.4
0.4
OUT
OUT
OUT
V
6.0 mA, V
4.5V
5.5V
0.2
0.2
CC
CC
7.2 mA, V
I
I
Maximum Input
Current
V
V
V
or GND,
CC
1.0
A
A
IN
IN
or V
IH
IL
Maximum 3-STATE
Output Leakage
Current
V
or GND
0.5
5.0
10
OZ
OUT
CC
Enable
V
or V
IH IL
I
Maximum Quiescent
Supply Current
V
V
or GND
8.0
1.5
80
160
2.0
A
CC
IN
CC
I
0 A
OUT
V
2.4V or 0.5V (Note 4)
1.8
mA
IN
Note 4: Measured per pin. All others tied to V or ground.
CC
3
www.fairchildsemi.com
AC Electrical Characteristics MM74HCT573
V
5.0V, tr tf 6 ns, TA 25 C (unless otherwise specified)
CC
Symbol
Parameter
Conditions
45 pF
Typ
Guaranteed Limit
Units
t
Maximum Propagation Delay
Data to Output
C
C
17
27
ns
PHL
L
L
t
PLH
t
Maximum Propagation Delay
Latch Enable to Output
45 pF
16
21
14
27
30
23
ns
ns
ns
PHL
t
PLH
t
Maximum Enable Propagation Delay
Control to Output
C
R
C
R
45 pF
1 k
PZH
L
L
L
L
t
PZL
t
Maximum Disable Propagation Delay
Control to Output
5 pF
1 k
PHZ
t
PLZ
t
Minimum Clock Pulse Width
Minimum Setup Time Data to Clock
Minimum Hold Time Clock to Data
15
5
ns
ns
ns
W
t
S
t
12
H
AC Electrical Characteristics MM74HCT573
V
5.0V 10%, tr tf 6 ns (unless otherwise specified)
CC
T
25
T
40 to 85 C
T
A
55 to 125 C
A
A
Symbol
Parameter
Conditions
Units
Typ
Guaranteed Limits
t
Maximum Propagation
C
C
50 pF
18
17
22
15
6
30
30
30
30
12
38
45
53
45
45
18
ns
PHL
L
t
t
t
t
t
t
t
t
t
t
t
t
Delay Data to Output
PLH
PHL
PLH
PZH
PZL
PHZ
PLZ
THL
TLH
W
Maximum Propagation Delay
Latch Enable to Output
50 pF
44
38
38
15
ns
ns
ns
ns
L
Maximum Enable Propagation
Delay Control to Output
Maximum Disable Propagation
Delay Control to Output
Maximum Output
C
R
C
R
C
50 pF
1 k
L
L
L
L
L
50 pF
1 k
50 pF
Rise and Fall Time
Minimum Clock Pulse Width
Minimum Setup Time Data to Clock
Minimum Hold Time Clock to Data
Maximum Input Capacitance
Maximum Output Capacitance
Power Dissipation Capacitance
(Note 5)
15
5
20
6
24
8
ns
ns
ns
pF
pF
pF
3
4
S
12
10
20
5
15
10
20
18
10
20
H
C
C
C
IN
OUT
PD
OC
V
CC
OC GND
52
Note 5: C determines the no load dynamic power consumption, P
C
V
2 f
I
V
, and the no load dynamic current consumption,
PD
D
PD CC
CC CC
I
C
V
f
I
.
S
PD CC
CC
www.fairchildsemi.com
4
AC Electrical Characteristics MM74HCT574
V
5.0V, tr tf 6 ns, TA 25 C
CC
Symbol
Parameter
Maximum Clock Frequency
Maximum Propagation Delay
to Output
Conditions
Typ
60
Guaranteed Limit
Units
MHz
ns
f
33
27
MAX
t
C
45 pF
17
PHL
L
t
PLH
t
Maximum Enable Propagation Delay
Control to Output
C
R
C
R
45 pF
1 k
19
14
28
25
ns
ns
PZH
L
L
L
L
t
PZL
t
Maximum Disable Propagation Delay
Control to Output
45 pF
1 k
PHZ
t
PLZ
t
Minimum Clock Pulse Width
Minimum Setup Time Data to Clock
Minimum Hold Time Clock to Data
15
12
5
ns
ns
ns
W
t
S
t
H
AC Electrical Characteristics MM74HCT574
V
5.0V 10%, tr tf 6 ns (unless otherwise specified)
CC
T
25 C
T
40 to 85 C
T
A
55 to 125 C
A
A
Symbol
Parameter
Conditions
Units
Typ
18
22
15
6
Guaranteed Limits
f
t
t
t
t
t
t
t
t
t
t
t
Maximum Clock Frequency
Maximum Propagation Delay
Clock to Output
33
28
38
23
45
MHz
ns
MAX
C
50 pF
30
30
30
12
PHL
PLH
PZH
PZL
PHZ
PLZ
THL
TLH
W
L
Maximum Enable Propagation
Delay Control to Output
Maximum Disable Propagation
Delay Control to Output
Maximum Output
C
R
C
R
C
50 pF
1 k
38
38
15
45
45
18
ns
ns
ns
L
L
L
L
L
50 pF
1 k
50 pF
Rise and Fall Time
Minimum Clock Pulse Width
Minimum Setup Time Data to Clock
Minimum Hold Time Clock to Data
Maximum Input Capacitance
Maximum Output Capacitance
Power Dissipation Capacitance
(Note 6)
15
12
5
20
15
6
24
18
8
ns
ns
ns
pF
pF
pF
6
1
S
H
C
C
C
10
20
10
20
10
20
IN
OUT
PD
OC
V
5
CC
OC GND
58
2
Note 6: C determines the no load power consumption, P
C
V
f
I
V
, and the no load dynamic current consumption, I
C
V
f
I
.
PD
D
PD CC
CC CC
S
PD CC
CC
5
www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
www.fairchildsemi.com
6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
7
www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
www.fairchildsemi.com
8
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
9
www.fairchildsemi.com
相关型号：
MM74HCT574WMX_NL
Bus Driver, HCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, 0.300 INCH, MS-013, SOIC-20
FAIRCHILD
MM74HCT574WM_NL
Bus Driver, HCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, 0.300 INCH, LEAD FREE, MS-013, SOIC-20
FAIRCHILD
©2020 ICPDF网 联系我们和版权申明