SN74LS157ML2 [ROCHESTER]

Multiplexer;
SN74LS157ML2
型号: SN74LS157ML2
厂家: Rochester Electronics    Rochester Electronics
描述:

Multiplexer

光电二极管 逻辑集成电路
文件: 总8页 (文件大小:73K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN74LS157  
Quad 2-Input Multiplexer  
The LSTTL/MSI SN74LS157 is a high speed Quad 2-Input  
Multiplexer. Four bits of data from two sources can be selected using  
the common Select and Enable inputs. The four buffered outputs  
present the selected data in the true (non-inverted) form. The LS157  
can also be used to generate any four of the 16 different functions of  
two variables. The LS157 is fabricated with the Schottky barrier diode  
process for high speed and is completely compatible with all  
ON Semiconductor TTL families.  
http://onsemi.com  
LOW  
POWER  
SCHOTTKY  
Schottky Process for High Speed  
Multifunction Capability  
Non-Inverting Outputs  
Input Clamp Diodes Limit High Speed Termination Effects  
Special Circuitry Ensures Glitch Free Multiplexing  
ESD > 3500 Volts  
16  
1
PLASTIC  
N SUFFIX  
CASE 648  
GUARANTEED OPERATING RANGES  
Symbol  
Parameter  
Supply Voltage  
Min  
4.75  
0
Typ  
5.0  
25  
Max  
5.25  
70  
Unit  
V
V
CC  
T
A
Operating Ambient  
Temperature Range  
°C  
16  
I
Output Current – High  
Output Current – Low  
–0.4  
8.0  
mA  
mA  
OH  
1
I
OL  
SOIC  
D SUFFIX  
CASE 751B  
16  
1
SOEIAJ  
M SUFFIX  
CASE 966  
ORDERING INFORMATION  
Device  
Package  
16 Pin DIP  
SOIC–16  
Shipping  
SN74LS157N  
SN74LS157D  
SN74LS157DR2  
SN74LS157M  
SN74LS157MEL  
2000 Units/Box  
38 Units/Rail  
2500/Tape & Reel  
See Note 1  
SOIC–16  
SOEIAJ–16  
SOEIAJ–16  
See Note 1  
1. For ordering information on the EIAJ version of  
the SOIC package, please contact your local  
ON Semiconductor representative.  
Semiconductor Components Industries, LLC, 2002  
1
Publication Order Number:  
February, 2002 – Rev. 8  
SN74LS157/D  
SN74LS157  
V
CC  
E
I
0c  
I
1c  
Z
c
I
0d  
I
1d  
Zd  
16  
15  
14  
13  
12  
11  
10  
9
NOTE: The Flatpak version has the same  
pinouts (Connection Diagram) as  
the Dual In-Line Package.  
1
2
3
4
5
6
8
7
S
I
0a  
I
1a  
Z
a
I
0b  
I
1b  
Z
b
GND  
LOADING (Note a)  
HIGH  
LOW  
PIN NAMES  
S
E
Common Select Input  
1.0 U.L.  
1.0 U.L.  
0.5 U.L.  
0.5 U.L.  
10 U.L.  
0.5 U.L.  
0.5 U.L.  
0.25 U.L.  
0.25 U.L.  
5 U.L.  
Enable (Active LOW) Input  
Data Inputs from Source 0  
Data Inputs from Source 1  
Multiplexer Outputs  
I
0a  
I
1a  
– I  
– I  
0d  
1d  
Z – Z  
a
d
NOTES: a) 1 TTL Unit Load (U.L.) = 40 mA HIGH/1.6 mA LOW.  
Figure 1. Connection Diagram DIP (TOP VIEW)  
15 2 3  
5 6 14 13 11 10  
E I  
I
I
I
I
I
I
I
0a 1a 0b 1b 0c 1c 0d 1d  
1
S
Z
a
Z
b
Z
c
Z
d
4
7
12  
9
V
CC  
= PIN 16  
GND = PIN 8  
Figure 2. Logic Symbol  
http://onsemi.com  
2
SN74LS157  
11  
2
3
5
6
14  
13  
10 15  
1
V
= PIN 16  
CC  
GND = PIN 8  
= PIN NUMBERS  
4
7
12  
9
Figure 3. Logic Diagram  
FUNCTIONAL DESCRIPTION  
A common use of the LS157 is the moving of data from  
two groups of registers to four common output busses. The  
particular register from which the data comes is determined  
by the state of the Select Input. A less obvious use is as a  
function generator. The LS157 can generate any four of  
the 16 different functions of two variables with one variable  
common. This is useful for implementing highly irregular  
logic.  
The LS157 is a Quad 2-Input Multiplexer fabricated with  
the Schottky barrier diode process for high speed. It selects  
four bits of data from two sources under the control of a  
common Select Input (S). The Enable Input (E) is active  
LOW. When E is HIGH, all of the outputs (Z) are forced  
LOW regardless of all other inputs.  
The LS157 is the logic implementation of a 4-pole,  
2-position switch where the position of the switch is  
determined by the logic levels supplied to the Select Input.  
The logic equations for the outputs are:  
Za = E (I1a S + I0a S)  
Zc = E (I1c S + I0c S)  
Zb = E (I1b S + I0b S)  
Zd = E (I1d S + I0d S)  
TRUTH TABLE  
SELECT  
INPUT  
ENABLE  
INPUTS  
OUTPUT  
E
S
I
0
I
1
Z
H
L
L
L
L
X
H
H
L
X
X
X
L
X
L
H
X
X
L
L
H
L
L
H
H
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Don’t Care  
http://onsemi.com  
3
SN74LS157  
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)  
Limits  
Min  
Typ  
Max  
Symbol  
Parameter  
Input HIGH Voltage  
Unit  
Test Conditions  
Guaranteed Input HIGH Voltage for  
All Inputs  
V
2.0  
V
IH  
0.8  
Guaranteed Input LOW Voltage for  
All Inputs  
V
V
V
Input LOW Voltage  
V
V
V
IL  
Input Clamp Diode Voltage  
Output HIGH Voltage  
–0.65  
3.5  
–1.5  
V
V
= MIN, I = –18 mA  
IN  
IK  
CC  
= MIN, I = MAX, V = V  
IH  
CC  
OH  
IN  
2.7  
OH  
or V per Truth Table  
IL  
V
V
= V MIN,  
CC  
0.25  
0.35  
0.4  
0.5  
V
V
I
= 4.0 mA  
= 8.0 mA  
CC  
OL  
OL  
V
OL  
Output LOW Voltage  
= V or V  
IH  
IN  
IL  
I
per Truth Table  
Input HIGH Current  
I , I  
E, S  
20  
40  
µA  
mA  
mA  
V
CC  
V
CC  
V
CC  
= MAX, V = 2.7 V  
IN  
0
1
I
IH  
I , I  
0.1  
0.2  
0
1
= MAX, V = 7.0 V  
IN  
E, S  
Input LOW Current  
I , I  
–0.4  
–0.8  
I
IL  
= MAX, V = 0.4 V  
0
1
IN  
E, S  
I
I
Short Circuit Current (Note 2)  
Power Supply Current  
–20  
–100  
16  
mA  
mA  
V
V
= MAX  
= MAX  
OS  
CC  
CC  
CC  
2. Not more than one output should be shorted at a time, nor for more than 1 second.  
AC CHARACTERISTICS (T = 25°C)  
A
Limits  
Min  
Typ  
Max  
Symbol  
Parameter  
Propagation Delay  
Unit  
Test Conditions  
t
t
9.0  
9.0  
14  
14  
PLH  
ns  
Figure 2  
Data to Output  
PHL  
t
t
Propagation Delay  
Enable to Output  
13  
14  
20  
21  
V
= 5.0 V  
PLH  
PHL  
CC  
ns  
ns  
Figure 1  
Figure 2  
C = 15 pF  
L
t
t
Propagation Delay  
Select to Output  
15  
18  
23  
27  
PLH  
PHL  
AC WAVEFORMS  
V
IN  
1.3 V  
1.3 V  
V
IN  
1.3 V  
t
1.3 V  
t
t
PLH  
t
PHL  
PHL  
PLH  
V
OUT  
V
OUT  
1.3 V  
1.3 V  
1.3 V  
1.3 V  
Figure 1.  
Figure 2.  
http://onsemi.com  
4
SN74LS157  
PACKAGE DIMENSIONS  
N SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
ISSUE R  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
–A–  
2. CONTROLLING DIMENSION: INCH.  
3. DIMENSION L TO CENTER OF LEADS WHEN  
FORMED PARALLEL.  
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.  
5. ROUNDED CORNERS OPTIONAL.  
16  
1
9
8
B
S
INCHES  
DIM MIN MAX  
MILLIMETERS  
MIN  
18.80  
6.35  
3.69  
0.39  
1.02  
MAX  
19.55  
6.85  
4.44  
0.53  
1.77  
F
A
B
C
D
F
0.740  
0.250  
0.145  
0.015  
0.040  
0.770  
0.270  
0.175  
0.021  
0.70  
C
L
SEATING  
PLANE  
–T–  
G
H
J
0.100 BSC  
0.050 BSC  
2.54 BSC  
1.27 BSC  
K
M
0.008  
0.015  
0.130  
0.305  
10  
0.21  
0.38  
3.30  
7.74  
10  
H
J
K
L
0.110  
0.295  
0
2.80  
7.50  
0
G
D 16 PL  
M
S
_
_
_
_
0.020  
0.040  
0.51  
1.01  
M
M
0.25 (0.010)  
T A  
http://onsemi.com  
5
SN74LS157  
PACKAGE DIMENSIONS  
D SUFFIX  
PLASTIC SOIC PACKAGE  
CASE 751B–05  
ISSUE J  
–A–  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSIONS A AND B DO NOT INCLUDE  
MOLD PROTRUSION.  
16  
9
8
–B–  
P 8 PL  
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)  
PER SIDE.  
M
S
B
0.25 (0.010)  
1
5. DIMENSION D DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR  
PROTRUSION SHALL BE 0.127 (0.005) TOTAL  
IN EXCESS OF THE D DIMENSION AT  
MAXIMUM MATERIAL CONDITION.  
G
MILLIMETERS  
INCHES  
MIN  
0.386  
DIM MIN  
MAX  
MAX  
0.393  
0.157  
0.068  
0.019  
0.049  
F
A
B
C
D
F
9.80  
3.80  
1.35  
0.35  
0.40  
10.00  
R X 45  
K
_
4.00 0.150  
1.75 0.054  
0.49 0.014  
1.25 0.016  
C
G
J
1.27 BSC  
0.050 BSC  
–T–  
SEATING  
PLANE  
0.19  
0.10  
0
0.25 0.008  
0.25 0.004  
0.009  
0.009  
7
J
M
K
M
P
R
D
16 PL  
7
0
_
_
_
_
5.80  
0.25  
6.20 0.229  
0.50 0.010  
0.244  
0.019  
M
S
S
0.25 (0.010)  
T
B
A
http://onsemi.com  
6
SN74LS157  
PACKAGE DIMENSIONS  
M SUFFIX  
SOEIAJ PACKAGE  
CASE 966–01  
ISSUE O  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD  
FLASH OR PROTRUSIONS AND ARE MEASURED  
AT THE PARTING LINE. MOLD FLASH OR  
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)  
PER SIDE.  
16  
9
L
E
Q
1
H
E
M
_
4. TERMINAL NUMBERS ARE SHOWN FOR  
REFERENCE ONLY.  
E
5. THE LEAD WIDTH DIMENSION (b) DOES NOT  
INCLUDE DAMBAR PROTRUSION. ALLOWABLE  
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)  
TOTAL IN EXCESS OF THE LEAD WIDTH  
DIMENSION AT MAXIMUM MATERIAL CONDITION.  
DAMBAR CANNOT BE LOCATED ON THE LOWER  
RADIUS OR THE FOOT. MINIMUM SPACE  
BETWEEN PROTRUSIONS AND ADJACENT LEAD  
TO BE 0.46 ( 0.018).  
1
8
L
DETAIL P  
Z
D
VIEW P  
e
MILLIMETERS  
INCHES  
MIN  
---  
A
DIM MIN  
MAX  
MAX  
0.081  
0.008  
0.020  
0.011  
0.413  
0.215  
c
A
---  
0.05  
0.35  
0.18  
9.90  
5.10  
2.05  
A
1
0.20 0.002  
0.50 0.014  
0.27 0.007  
b
c
D
E
10.50  
5.45 0.201  
0.390  
A
1
b
0.13 (0.005)  
e
1.27 BSC  
0.050 BSC  
0.10 (0.004)  
M
H
7.40  
0.50  
1.10  
8.20 0.291  
0.85 0.020  
1.50 0.043  
0.323  
0.033  
0.059  
E
L
L
E
0
10  
0.90 0.028  
10  
_
0.035  
0.031  
M
Q
0
_
_
_
0.70  
---  
1
Z
0.78  
---  
http://onsemi.com  
7
SN74LS157  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes  
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular  
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,  
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be  
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.  
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or  
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold  
SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable  
attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim  
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.  
PUBLICATION ORDERING INFORMATION  
Literature Fulfillment:  
JAPAN: ON Semiconductor, Japan Customer Focus Center  
4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031  
Phone: 81–3–5740–2700  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada  
Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada  
Email: ONlit@hibbertco.com  
Email: r14525@onsemi.com  
ON Semiconductor Website: http://onsemi.com  
For additional information, please contact your local  
Sales Representative.  
N. American Technical Support: 800–282–9855 Toll Free USA/Canada  
SN74LS157/D  

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