SP6222EK-L-3-0 [ROCHESTER]
3V FIXED POSITIVE REGULATOR, PDSO5, LEAD FREE, SOT-23, 5 PIN;
| 型号： | SP6222EK-L-3-0 |
| 厂家： | 
Rochester Electronics |
| 描述： | 3V FIXED POSITIVE REGULATOR, PDSO5, LEAD FREE, SOT-23, 5 PIN 光电二极管 输出元件 调节器 |
| 文件： | 总25页 (文件大小：2621K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SP6222/SP6223
50mA and 150mA CMOS Linear Regulators
VOUT
ADJ/BYP
FEATURES
5
4
ꢀ Very low Dropout Voltage: 200mV typ (150mA load)
ꢀ High Output Setpoint Accuracy of 1% (typ)
ꢀ Very low Input Voltages Down to 1.6V
ꢀ Power-saving Shutdown Mode of 150nA (typ)
ꢀ Fast Turn-on (90μs) and Turn-off (90μs)
ꢀ Extremely low Quiescent Current of 14μA (typ)
ꢀ Very Tight Line regulation, 0.2%/V
SP6223
5 Pin SC70
ꢀ Load Regulation 0.125 mV/mA
1
2
3
ꢀ Thermal Shutdown Protection
VIN
GND
EN
ꢀ Low Noise Output, 100μVRMS With 10nF Bypass
ꢀ Fixed or Adjustable Output Versions Available
ꢀ Available in RoHS Compliant, Lead Free Packages:
SC70 and SOT23
APPLICATIONS
■ Cellular Telephones
■ SMPS Post-Regulator
■ DC-to-DC Modules
■ Medical Devices
■ Data Cable
■ Laptop, Notebooks and Palmtop Computers
■ Battery-Powered Equipment
■ Consumer/ Personal Electronics
■ Pagers
DESCRIPTION
The SP6222 and SP6223 are CMOS LDOs designed to meet a broad range of applications that require accuracy,
speed and ease of use. These LDOs offer extremely low quiescent current which only increases slightly under load,
thus providing advantages in ground current performance over bipolar LDOs. The LDOs handle an extremely wide
load range and guarantee stability with a 1μF ceramic output capacitor. They have excellent low frequency PSRR,
not found in other CMOS LDOs and thus offer exceptional Line Regulation. High frequency PSRR is 55dB (typical)
at 1kHz. Load Regulation is excellent and temperature stability is comparable to bipolar LDOs. An enable feature
is provided on all versions. The SP6222/6223 is available in fixed and adjustable output voltage versions in
industry standard SC70 and SOT23 packages.
TYPICAL APPLICATION CIRCUIT
3.0V
VIN
VOUT
BYP
2.5V
1uF
GND
EN
ENABLE
1uF
10nF
Oct17-06 Rev AC
SP6222/6223 50/150mA CMOS Linear Regulators
© 2006 Sipex Corporation
1
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of the device at these ratings or any other above those indicated
in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions
for extended periods of time may affect reliability.
Supply Input Voltage (V ) ............................. -2V to 6V
Output Voltage (VOUT) ..I.N...................... -0.6V to V +1V
Enable Input Voltage (VEN) ............................ -2VItNo 7V
Power Dissipation (PD).......... Internally Limited, Note 1
Storage Temperature...........................-65°C to +150°C
Junction Temperature (TJ)....................-40°C to +125°C
Lead Temperature (soldering 5s).........................300°C
ELECTRICAL CHARACTERISTICS
Unless otherwise specified: V = VOUT + 0.3V to 4.5V, C
= 1μF ceramic, CIN = 1μF ceramic, IOUT =100μA, TA = 25°C.
Bold values apply over the fulINl operating temperature raOnUgTe (-40°C to 125°C).
PARAMETER
MIN
1.6
TYP
MAX
4.5
UNITS
CONDITIONS
Operating Input Voltage Range
Note 2
IOUT = 50mA (SP6222)
IOUT = 150mA (SP6223)
V
Output Voltage Accuracy
%
V
1
3
Fixed Output Voltage (3.0V version)
Fixed Output Voltage (2.5V version)
2.91
3.0
3.09
V
2.425
0.873
2.500 2.575
Reference Voltage
Line Regulation
0.9
0.927
V
Adjustable version only
0.05
0.2
%/V
ΔV
OUT (VIN below 4.5V)
IOUT = 0.1mA to 50mA (SP6222)
IOUT = 0.1mA to 150mA (SP6223)
Load Regulation
0.125 0.225 mV/mA
Thermal Regulation
0.005
%/ ºC IOUT = 50mA (SP6222)
60
100
300
IOUT = 50mA (SP6222)
IOUT = 150mA (SP6223)
Dropout Voltage (DOV), Note 3
Ground Pin Current
mV
μA
200
14
25
IOUT = 0.1mA
Note 1. The maximum allowable power dissipation at any T (ambient temperature) is PD (MAX) = (TJ (MAX)– T ) /
θJA. Exceeding the maximum allowable power dissiApation will result in excessive die temperature,Aand
the regulator will go into thermal shutdown. The θJA of the SP6222/23 (SC-70-5) is 330°C/W mounted
on a PC board with minimum copper area (see “Thermal Considerations” section for further details).
Note 2. Minimum VIN must meet 2 conditions: VIN >1.6V and VIN > {VOUT + DOV}
Note 3. Dropout Voltage DOV is defined as the input to output differential at which the output voltage drops
2% below its nominal value measured at 1V differential. The DOV specification is not applicable to
output voltages less than 2.7V.
Oct17-06 Rev AC
SP6222/6223 50/150mA CMOS Linear Regulators
© 2006 Sipex Corporation
2
ELECTRICAL CHARACTERISTICS
Unless otherwise specified: VIN = VOUT + 0.3V to 4.5V, C
= 1μF ceramic, CIN = 1μF ceramic, IOUT =100μA, TA = 25°C.
Bold values apply over the full operating temperature raOnUgTe (-40°C to 125°C).
PARAMETER
MIN
TYP
MAX
Units
CONDITIONS
V
V
EN < 0.4V (shutdown),
SUPPLY = 1.6V
0.150
Shutdown Supply Current @ 25ºC
1
μA
Thermal Shutdown Die Temperature
Thermal Shutdown Hysteresis
Power Supply Rejection Ratio
125
150
15
175
ºC
ºC
Regulator turns off
Regulator turns on again @ 150ºC
f ≤ 1kHz
-55
800
550
150
100
90
dB
IOUT = 0.1mA, C
=3.0V
=3.0V
BYP = 0nF, VOUT
I
I
OUT = 50mA, C
BYP = 0nF, VOUT
μVRMS
Output Noise Voltage
OUT = 0.1mA, CBYP
OUT=3.0V
= 10nF, V
IOUT = 50mA, C
=3.0V
BYP = 10nF, VOUT
Wake-up time (TON) from Shutdown
200
140
0.4
μs
μs
V
VIN
≥ 1.6V, IOUT = 30mA
Turn-off time (T
90
IOUT = 0.1mA, VIN ≥ 1.6V
Regulator shutdown
Regulator enabled
OFF) into Shutdown
Enable input logic low voltage
Enable input logic high voltage
1.6
V
PIN DESCRIPTION
Pin Number
Pin
Description
Name
5 pin
5 pin
SC-70
SOT23
Power supply input. Connect a 1uF decoupling capacitor next
to this pin.
V
IN
1
1
GND
EN
2
3
2
3
Ground Pin.
Enable/Shutdown (Logic high = enable, logic low = shutdown)
4
4
Reference bypass input for ultra-quite operation. Connecting
10nF capacitor from this pin to ground reduces output noise
BYP
ADJ
VOUT
(Fixed)
(Fixed)
4
4
Adjustable regulator feedback input. Connect to a resistive
(Adjustable)
(Adjustable) voltage-divider network.
Output voltage of the linear regulator. Connect a 1uF or larger
capacitor from this pin to ground.
5
5
Oct17-06 Rev AC
SP6222/6223 50/150mA CMOS Linear Regulators
© 2006 Sipex Corporation
3
APPLICATION INFORMATION
General Overview
Input / Output Capacitor
The SP6222 and SP6223 are CMOS
LDOsdesignedtomeetabroadrange
oflowvoltageapplicationsthatrequire
accuracy and ease of use. The
SP6222 offers a 50mA output current
while the SP6223 offers an output
current of 150mA. The SP6222 is
availableina2.5Vor3.0Vfixedoutput
along with an adjustable output
version. The SP6223 is offered in an
adjustable output only. These LDOs
have a minimum input voltage of only
1.6V and a maximum input voltage of
4.5V. The output voltage can be
programmed to as low as 0.9V and
have a maximum dropout voltage
rating of 100mV for the SP6222 and
300mV for the SP6223. Both devices
are equipped with an enable (EN)
inputforverylowcurrent(10nAtypical)
shutdown mode.
The SP6222/6223 is designed to
operate using very small ceramic
capacitors. The minimum input and
output capacitor value for stable
operation is 1.0μF. The output
capacitor value may be increased
without limit to improve transient
response. Place these capacitors
as close as possible to the device.
Bypass (BYP) Capacitor
The fixed output versions offer a
BYP pin to decouple the bandgap
reference. Connecting an external
10nF capacitor from BYP to GND
can reduce output noise. If output
noise is not a concern the BYP pin
may be left open. When a bypass
capacitor is used the turn on time is
slower. See the following turn on
time plots for various BYP capacitor
values. The adjustable output
versiondoesnotofferthisBYPinput.
Enable / Shutdown Operation
Adjustable Regulator
The SP6222/6223 is turned on by
providing 1.6V or greater to the EN
pin.Toplacethedeviceintoshutdown
pull the EN pin below 0.4V. If this
feature is not required connect EN to
input supply to always enable the
device whenever power is applied.
The output of the device can be
programmedtoaspecificvoltageby
using two external resistors
connected to the ADJ pin (see
Typical Application Circuit for
Adjustableoutput).Theresistorsset
Oct17-06 Rev AC
SP6222/6223 50/150mA CMOS Linear Regulators
© 2006 Sipex Corporation
4
APPLICATION INFORMATION
The actual power dissipation of the
regulator circuit can be determined
by using the simplified equation:
the output voltage based on the
following equation:
VOUT = VREF *(R1/R2 + 1)
PD = (VIN – VOUT) * IOUT
Resistor values are not critical
because the ADJ (adjust) pin has a
high impedance, but for best
performance use resistor values of
470KΩ or less.
To prevent the device from entering
thermal shutdown, maximum power
dissipation cannot be exceeded.
Layout Considerations
Thermal Considerations
The primary path of heat conduction
out of the package is via the package
leads.Therefore,carefulconsideration
must be taken into account for
optimizing layout.
The SP6222/6223 is designed to
provide 50mA -150mA of continuous
current in a tiny package. Maximum
power dissipation can be calculated
based on the output current and the
voltage drop across the part. To
determine the maximum power
dissipation of the package, use the
1. Attaching the part to a large
copper footprint will enable
better heat transfer from the
device,especiallywherethere
areinternalgroundandpower
planes.
junction-to-ambient
thermal
resistance of the device and the
following equation:
2. Place the input and output
capacitors close to the device
foroptimaltransientresponse
and device behavior.
PD(MAX) = (TJ(max) – TA) / θJA
TJ(max) is the maximum junction
temperature of the die and is 125oC.
TA is the ambient temperature. θJA is
the junction-to-ambient thermal
resistance of the package. The SOT-
23packagehasaθJAofapproximately
191oC/W and the SC70 package has
a θJA of approximately 330oC/W.
3. Connectallgroundconnections
directlytothegroundplane. In
casethereisnogroundplane,
connect to a common ground
point before connecting to
board ground.
Oct17-06 Rev AC
SP6222/6223 50/150mA CMOS Linear Regulators
© 2006 Sipex Corporation
5
APPLICATION INFORMATION
SP6223 1.2Vout
Cin = Cout = 1.0uF Cer
Iout = 100uA to 150mA
Vout
LoadTransientResponse,100μAto150mA,
Vin = 1.6V
Iout @ 100mA/div
SP6223 1.2Vout
Cin = Cout = 1.0uF Cer
Iout = 100uA to 150mA
Vout
LoadTransientResponse,100μAto150mA,
Vin = 3.3V
Iout @ 100mA/div
SP6223 1.2Vout fixed
Cin = Cout = 1.0uF Cer
Iout = 100uA to 100mA
Vout
LoadTransientResponse,100μAto100mA,
Vin = 1.6V
Iout @ 100mA/div
SP6223 1.2Vout fixed
Cin = Cout = 1.0uF Cer
Iout = 100uA to 100mA
Vout
LoadTransientResponse,100μAto100mA,
Vin = 3.3V
Iout @ 100mA/div
Oct17-06 Rev AC
SP6222/6223 50/150mA CMOS Linear Regulators
© 2006 Sipex Corporation
6
APPLICATION INFORMATION
SP6223 1.2Vout fie
Cin = Cout = 1.0uF Cer
Iout = 100uA to 50mA
Vout
Load Transient Response, 100μA to 50mA,
Vin = 1.6V
Iout @ 100mA/div
SP6223 1.2Vout
Cin = Cout = 1.0uF Cer
Iout = 100uA to 50mA
Vout
Load Transient Response, 100μA to 50mA,
Vin = 3.3V
Iout @ 100mA/div
Enable
SP6222 2.5V fixed
Vin = 3.0V, Iout = 10mA
Cbyp = open
Turn on time, Vin = 3.0V, Iout = 10mA, CBYP
= Open
Vout
Enable
SP6222 2.5V fixed
Vin = 3.0V, Iout = 50mA
Cbyp = open
Turn on time, Vin = 3.0V, Iout = 50mA, CBYP
= Open
Vout
Oct17-06 Rev AC
SP6222/6223 50/150mA CMOS Linear Regulators
© 2006 Sipex Corporation
7
APPLICATION INFORMATION
Enable
Turn on time, Vin = 3.0V, Iout = 10mA,
CBYP = 1nF
SP6222 2.5V fixed
Vin = 3.0V, Iout = 10mA
Cbyp = 1nF
Vout
Enable
SP6222 2.5V fixed
Vin = 3.0V, Iout = 50mA
Cbyp = 1nF
Turn on time, Vin = 3.0V, Iout = 50mA,
CBYP = 1nF
Vout
Turn on time, Vin = 3.0V, Iout = 10mA,
CBYP = 10nF
Enable
SP6222 2.5V fixed
Vin = 3.0V, Iout = 10mA
Cbyp = 10nF
Vout
Turn on time, Vin = 3.0V, Iout = 50mA,
CBYP = 10nF
Enable
SP6222 2.5V fixed
Vin = 3.0V, Iout = 50mA
Cbyp = 10nF
Vout
Oct17-06 Rev AC
SP6222/6223 50/150mA CMOS Linear Regulators
© 2006 Sipex Corporation
8
APPLICATION INFORMATION
Enable
SP6222 2.5V fixed
Vin = 3.0V, Iout = 10mA
Cbyp = 100nF
Turn on time, Vin = 3.0V, Iout =
10mA, CBYP = 100nF
Vout
SP6222 2.5V fixed
Vin = 3.0V, Iout = 50mA
Cbyp = 100nF
Enable
Turn on time, Vin = 3.0V, Iout =
50mA, CBYP = 100nF
Vout
6222 3.0V output noise
900
800
700
600
500
400
300
200
100
0
SP6222 3.0V Output Noise vs.
CBYP
100uA
10mA
50mA
1
10
100
1000 10000 10000
0
Bypass Cap (pF)
Oct17-06 Rev AC
SP6222/6223 50/150mA CMOS Linear Regulators
© 2006 Sipex Corporation
9
APPLICATION INFORMATION
SP6222 3.0Vout PSRR 100uA, 4.5 Vin Cbyp-10nF
20
10
0
-10
-20
-30
-40
-50
-60
-70
-80
10
100
1000
10000
100000
1000000 10000000
Frequency (Hz)
SP6222 3.0Vout PSRR 10mA, 4.5Vin, Cbyp-10nF
20
10
0
-10
-20
-30
-40
-50
-60
-70
-80
10
100
1000
10000
100000
1000000 10000000
Frequency (Hz)
Oct17-06 Rev AC
SP6222/6223 50/150mA CMOS Linear Regulators
© 2006 Sipex Corporation
10
APPLICATION INFORMATION
SP6222 3.0Vout PSRR 50mA, 4.5Vin Cbyp-10nF
20
10
0
-10
-20
-30
-40
-50
-60
-70
-80
10
100
1000
10000
100000
1000000 10000000
Frequency (Hz)
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Oct17-06 Rev AC
SP6222/6223 50/150mA CMOS Linear Regulators
© 2006 Sipex Corporation
11
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Appendix and Web Link Information
For further assistance:
Email:
Sipexsupport@sipex.com
WWW Support page:
Sipex Application Notes:
Product Change Notices:
http://www.sipex.com/content.aspx?p=support
http://www.sipex.com/applicationNotes.aspx
http://www.sipex.com/content.aspx?p=pcn
Sipex Corporation
Solved by
Headquarters and
Sales Office
233 South Hillview Drive
Milpitas, CA95035
tel: (408) 934-7500
faX: (408) 935-7600
TM
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of
any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
The following sections contain information which is more
changeable in nature and is therefore generated as appendices.
1) Package Outline Drawings
2) Ordering Information
If Available:
3) Frequently Asked Questions
4) Evaluation Board Manuals
5) Reliability Reports
6) Product Characterization Reports
7) Application Notes for this product
8) Design Solutions for this product
Datasheet Appendix & Web Link Information
© 2007 Sipex Corporation
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VeryꢀlowꢀDropoutꢀVoltage:ꢀ60mVꢀtypicalꢀ(50mAꢀload)ꢀꢀ
HighꢀOutputꢀSetpointꢀAccuracyꢀofꢀ2%ꢀꢀ
VeryꢀlowꢀInputꢀVoltagesꢀDownꢀtoꢀ1.6Vꢀꢀ
PowerꢁsavingꢀShutdownꢀModeꢀofꢀ150nAꢀ(typ)ꢀꢀ
FastꢀTurnꢁonꢀ(90ꢂs)ꢀandꢀTurnꢁoffꢀ(90ꢂs)ꢀꢀ
ExtremelyꢀlowꢀQuiescentꢀCurrentꢀofꢀ14ꢂAꢀ(typ)ꢀꢀ
VeryꢀTightꢀLineꢀregulation,ꢀ0.2%/Vꢀꢀ
LoadꢀRegulationꢀ0.125ꢀmV/mAꢀꢀ
ThermalꢀShutdownꢀProtectionꢀꢀ
LowꢀNoiseꢀOutput,ꢀ100ꢂVRMSꢀWithꢀ10nFꢀBypassꢀꢀ
FixedꢀorꢀAdjustableꢀOutputꢀVersionsꢀAvailableꢀꢀ
AvailableꢀinꢀRoHSꢀCompliant,ꢀLeadꢀFreeꢀPackages:ꢀ
SC70ꢀandꢀSOT23ꢀ
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LowꢀDropoutꢀRegulatorꢀLDOꢀ
SP6222
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6/20/2007
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SP6222/23: FAQ
TM
Part Number: SP6222 and SP6223
Date: June 26, 2006
50mA and 150mA CMOS Linear Regulators
The SP6222 and SP6223 are CMOS LDOs designed to meet a broad range of applications that require accuracy
and ease of use. These LDOs offer extremely low quiescent current, providing advantages in performance over
comparable bipolar LDOs. The SP6222 and SP6223 LDOs support an extremely wide load range with excellent
high and low frequency PSRR (55dB typical), exceptional line regulation and temperature stability over the operating
temperature range (-40°C to +ꢀ25°C). An enable feature on all versions reduces quiescent to ꢀ0nA in shutdown
mode to conserve battery life.
Value Proposition
•
•
•
•
•
•
Very Low VIN down to ꢀ.6V
Low IQ in ꢀ4uA typical and 25uA max at room temp
Excellent PSRR @ 55dB gives excellent line regulation
Small footprint in 5-pin SC70 and SOT23 package
Available in ADJ version supports VOUT from as low as 0.9V
Offered in lead-free RoHS
Competitive Analysis
Micrel
MIC5265-2.5 / MIC5265-
3.0
Mitsumi
Sipex
MM1572F / MM1573A
SP6222 / SP6223
VIN range
VOUT
2.7V to 5.5V
VOUT+0.5V to 12V
2.5V & 3.0V
2%
1.6V to 4.5V
2.5V, 3.0V, & Adj.
2%
2.5V & 3.0V
3%
VOUT Accuracy
75mV(typ) @ 50mA,
500mV(max) @ 150mA
100mV(max) @ 50mA,
300mV(max) @150mA
Dropout Voltage
200mV @ 50mA
Line Regulation
IOUT
0.20%
150mA
600µV/mA
150µA
0.20%
150mA
600µV/mA
85µA
0.20%
SP6222=50mA,
SP6223=150mA
225µv/mA
Load Regulation
Ground Pin Current
Shutdown Current
25µA
1µA
2µA
15µA
30µVRMS
,
VOUT Noise
57µVRMS, w/CBYP=0.1µF
-40°C to +85°C
100µVRMS, w/CBYP=10nF
-40°C to +125°C
w/CBYP=0.01µF
Operating Temp.
Range
-35°C to +85°C
SIPEX FAQ
ꢀ
Copyright © 2006 Sipex Corporation
Question:
How do we find out if a Voltage Option will become available soon? What is the process for getting a Voltage Option
generated?
Answer:
Please contact Sipex Customer support at CustomerSupport@sipex.com The opportunity will be evaluated by
the Marketing Department at Sipex and they will get in touch with you. An alternative path is through your local
distributor or sales representative. Our contact page on the Sipex website is http://www.sipex.com/contact.aspx
SIPEX FAQ
2
Copyright © 2006 Sipex Corporation
Solved by
Low Dropout Family: FAQ
TM
Sipex Family: Low Dropout Regulators
Date: Aug22, 2006
Question:
Are the connection details of a fixed version LDO the same as the adjustable version? I went through the datasheet
provided -- it has connection details of only the adjustable version. Do I have to connect resistor R1 AND R2 even
in the fixed version?
Answer:
An LDO with fixed output such as the SPX1587 does not require external voltage divider resistors for they are
internal. Only the Adjustable versions need a divider for setting output voltage. This info is generally within the
Datasheet. The external resistor voltage divider is only used for programming the output voltage of an adjustable
part. For the fixed output part, simply connect the ADJ/GND input (pin 1) to GND for typical configuration. Below
diagram is from the SPX1585 data sheet showing how a basic fixed regulator is configured. Pin 1 is GND, Pin 2 is
Vout and Pin 3 is Vin. Please keep in mind that the package tab is usually connected to Vout and should be isolated
if the tab is connected to your GND plane. Some designers will enlarge the Vout plane to allow for the tab connection
resulting in no need to isolate tab.
Question:
Is there a simple way to figure out heat loss for an LDO?
Answer:
Yes. Try our Excel-based heat calculation spreadsheet ANP2 available online at http://www.sipex.com/files/
ApplicationNotes/ThermalCalculator.xls
For further study, this spreadsheet is mentioned in the following helpful application note: “ANP2: Thermal
Considerations for Linear Regulators” http://www.sipex.com/files/ApplicationNotes/LDOThermal.pdf
SIPEX FAQ
ꢀ
Copyright © 2006 Sipex Corporation
Reliability and Qualification Report
SP6222, SP6223
CMOS Linear Regulators
Prepared by: G. West
Quality Assurance Manager
Date: 06/26/06
Reviewed by: Fred Claussen
VP Quality & Reliability
Date: 06/26/06
SP6222, SP6223 Reliability Report
Page 1 of 5
Table Of Contents
Title Page
1
2
2
2
3
3
3
4
4
4
5
Table Of Contents
Device Description
Pin Out
Manufacturing Information
Reliability Test Summary
Life Test Data
FIT Data Calculations
MTBF Data Calculations
ESD Testing
Latch-up Testing
Device Description
The SP6222 and SP6223 are CMOS LDOs designed to meet a broad range of applications that require
accuracy, speed and ease of use. These LDOs offer extremely low quiescent current which only increases
slightly under load, thus providing advantages in ground current performance over bipolar LDOs. The
LDOs handle an extremely wide load range and guarantee stability with a 1µF ceramic output capacitor.
They have excellent low frequency PSRR, not found in other CMOS LDOs and thus offer exceptional Line
Regulation. High frequency PSRR is 55dB (typical) at 1kHz. Load Regulation is excellent and temperature
stability is comparable to bipolar LDOs. An enable feature is provided on all versions. The SP6222/6223 is
available in fixed and adjustable output voltage versions in industry standard SC70 and SOT23 packages.
Pin Out
Manufacturing Information:
Products:
Description:
Process:
SP6222, SP6223
CMOS Linear Regulators
PBC4 CMOS
SP6222, SP6223 Reliability Report
Page 2 of 5
SP6222, SP6223 Family Reliability Qualification Test Summary
Device
Lot #
Stress Level
Burn-In Temp
Sample Size
No. Fail
SP6623
SP6623
SP6623
3786A001
4347A001
2375A001
1000 Hrs
1000 Hrs
1000 Hrs
77
77
58
0
0
0
125 °C
125 °C
125 °C
Life Test
Life testing is conducted to determine if there are any fundamental reliability related
failure mechanism(s) present in the device.
These failure mechanisms can be divided roughly into four groups:
1. Process or die related failures, such as oxide-related defects, metalization-related
defects and diffusion-related defects.
2. Assembly-related defects such as chip mount wire bond or package-related
failures.
3. Design related defects.
4. Miscellaneous, undetermined or application-induced failures.
Life Test Results
As part of the Sipex design qualification program, the Engineering group had subjected
211 SP6223 parts for a 1000 hour Reliability life test at 125° C
168 hour Life test
211 parts were subjected to the life test profile and completed 168 hours without
any part failures.
500 hour Life test
The 211 parts were re-introduced to the second phase of the test, where the parts
successfully completed the 500-hour life test without any failures.
1000 hour Life test
211 parts completed the full1000 hour life/HTOL test successfully, without
showing any significant shift in the process parameters.
SP6222, SP6223 Reliability Report
Page 3 of 5
FIT Rate Calculations
The FIT (failures in time) rate is the predicted number of failures per billion device-
hours. This predicted value is based upon the:
1. Life Test conditions (time and temperature, device quantity and number of failures)
are summarized under HTOL test table.
2. Activation Energy (Ea) of the potential failure modes.
The weighted Activation Energy, E , of observed failure mechanisms of Sipex products
a
has been determined to be 0.8 eV.
Based on the above criteria, the FIT rates at 25°, 55° and 70°C operation at both 60% and
90% confidence levels for the SP331 family products have been calculated and are listed
below.
FIT Failure Rates for SP6222, SP6223 Products
Confidence Level
+25°C
6.3
+55°C
64.9
+70°C
180.7
60%
90%
16.6
169.9
473.2
1 FIT = 1 Failure per Billion Device-Hours
MTBF for SP6222, SP6223 Products
Confidence Level
+25°C
1.58E+08
6.03E+07
+55°C
1.54E+07
5.89E+06
+70°C
5.53E+06
2.11E+06
60%
90%
ESD Testing
Human Body Model (HBM) ESD testing was performed per method 3015.7 of MIL-
STD-883E using a Keytek Zapmaster 7/4 discharging a 100pF capacitor through a 1.5
Kohm resistor. Three units from lot # 2375A001 were subjected to three discharges of
both positive and negative polarity. All units passed after discharges of +/- 4KV.
SP6222, SP6223 Reliability Report
Page 4 of 5
Lath-up Testing
Latch-up testing was performed on 5 units per EIAJ-ED-17. +/-100mA pulse currents
were applied with the unit at 125C ambient temperature. No failures were detected
SP6222, SP6223 Reliability Report
Page 5 of 5
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