TPS793285YZQR [ROCHESTER]
2.85V FIXED POSITIVE LDO REGULATOR, 0.2V DROPOUT, PBGA5, GREEN, DSBGA-5;
| 型号： | TPS793285YZQR |
| 厂家： | 
Rochester Electronics |
| 描述： | 2.85V FIXED POSITIVE LDO REGULATOR, 0.2V DROPOUT, PBGA5, GREEN, DSBGA-5 信息通信管理 输出元件 调节器 |
| 文件： | 总21页 (文件大小：1618K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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5
TPS793xx
www.ti.com
SLVS348K–JULY 2001–REVISED OCTOBER 2007
ULTRALOW-NOISE, HIGH PSRR, FAST RF 200mA LOW-DROPOUT LINEAR
REGULATORS IN NanoStar™ WAFER CHIP SCALE AND SOT23
1
FEATURES
DESCRIPTION
234
•
200mA RF Low-Dropout Regulator
With Enable
The TPS793xx family of low-dropout (LDO)
low-power linear voltage regulators features high
power-supply rejection ratio (PSRR), ultralow-noise,
fast start-up, and excellent line and load transient
responses in NanoStar wafer chip scale and SOT23
packages. NanoStar packaging gives an ultrasmall
footprint as well as an ultralow profile and package
weight, making it ideal for portable applications such
as handsets and PDAs. Each device in the family is
stable, with a small 2.2μF ceramic capacitor on the
output. The TPS793xx family uses an advanced,
proprietary BiCMOS fabrication process to yield
extremely low dropout voltages (for example, 112mV
at 200mA, TPS79330). Each device achieves fast
start-up times (approximately 50μs with a 0.001μF
bypass capacitor) while consuming very low
quiescent current (170μA typical). Moreover, when
the device is placed in standby mode, the supply
current is reduced to less than 1μA. The TPS79328
exhibits approximately 32μVRMS of output voltage
noise at 2.8V output with a 0.1μF bypass capacitor.
Applications with analog components that are
noise-sensitive, such as portable RF electronics,
benefit from the high PSRR and low-noise features
as well as the fast response time.
•
Available in Fixed Voltage Versions from 1.8V
to 4.75V and Adjustable (1.22V to 5.5V)
•
•
•
•
•
•
High PSRR (70dB at 10kHz)
Ultralow-Noise (32μVRMS, TPS79328)
Fast Start-Up Time (50μs)
Stable With a 2.2μF Ceramic Capacitor
Excellent Load/Line Transient Response
Very Low Dropout Voltage (112mV at 200mA,
TPS79330)
•
5- and 6-Pin SOT23 (DBV) and NanoStar Wafer
Chip Scale (YEQ, YZQ) Packages
APPLICATIONS
•
•
•
•
•
RF: VCOs, Receivers, ADCs
Audio
Cellular and Cordless Telephones
Bluetooth®, Wireless LAN
Handheld Organizers, PDAs
DBV PACKAGE
(TOP VIEW)
TPS79328
TPS79328
OUT
NR
IN
1
2
5
RIPPLE REJECTION
vs
OUTPUT SPECTRAL NOISE DENSITY
vs
GND
FREQUENCY
FREQUENCY
0.30
3
4
100
90
EN
V
= 3.8 V
= 2.2 µF
= 0.1 µF
IN
I
= 200 mA
OUT
Fixed Option
C
C
OUT
0.25
0.20
80
NR
DBV PACKAGE
(TOP VIEW)
70
IN
GND
EN
OUT
FB
1
2
6
5
60
0.15
50
40
30
I
= 1 mA
OUT
I
= 10 mA
OUT
3
4
NR
0.10
0.05
I
= 200 mA
Adjustable Option
YEQ, YZQ
OUT
20
10
0
V
C
C
= 3.8 V
= 10 µF
= 0.01 µF
IN
PACKAGE
(TOP VIEW)
OUT
NR
0
IN
OUT
100
1 k
10 k
100 k
10
100
1 k
10 k 100 k 1 M 10 M
C3 C1
B2
A3 A1
Frequency (Hz)
Frequency (Hz)
NR
GND
EN
Figure 1.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
3
4
NanoStar is a trademark of Texas Instruments.
Bluetooth is a registered trademark of Bluetooth SIG, Inc.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2001–2007, Texas Instruments Incorporated
TPS793xx
www.ti.com
SLVS348K–JULY 2001–REVISED OCTOBER 2007
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION(1)
(2)
PRODUCT
VOUT
TPS793xxyyyz
XX is nominal output voltage (for example, 28 = 2.8V, 285 = 2.85V, 01 = Adjustable).
YYY is package designator.
Z is package quantity.
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) Output voltages from 1.2V to 4.8V in 50mV increments are available; minimum order quantities may apply. Contact factory for details
and availability.
ABSOLUTE MAXIMUM RATINGS
Over operating temperature range (unless otherwise noted)(1)
UNIT
VIN range
–0.3V to 6V
–0.3V to 6V
VEN range
VOUT range
–0.3V to 6V
Peak output current
Internally limited
2kV
ESD rating, HBM
ESD rating, CDM
500V
Continuous total power dissipation
Junction temperature range, DBV package
Junction temperature range, YEQ package
Storage temperature range, Tstg
See Dissipation Ratings Table
–40°C to +150°C
–40°C to +125°C
–65°C to +150°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATINGS TABLE
T
A ≤ +25°C
POWER
RATING
TA = +70°C
POWER
RATING
TA = +85°C
POWER
RATING
DERATING FACTOR
BOARD
Low-K(1)
High-K(2)
Low-K(1)
High-K(2)
PACKAGE
DBV
RθJC
RθJA
ABOVE TA = +25°C
65°C/W
65°C/W
27°C/W
27°C/W
255°C/W
180°C/W
255°C/W
190°C/W
3.9mW/°C
5.6mW/°C
3.9mW/°C
5.3mW/°C
390mW
560mW
390mW
530mW
215mW
310mW
215mW
296mW
155mW
225mW
155mW
216mW
DBV
YEQ
YEQ
(1) The JEDEC low-K (1s) board design used to derive this data was a 3-inch x 3-inch, two layer board with 2 ounce copper traces on top
of the board.
(2) The JEDEC high-K (2s2p) board design used to derive this data was a 3-inch x 3-inch, multilayer board with 1 ounce internal power and
ground planes and 2 ounce copper traces on top and bottom of the board.
2
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TPS793xx
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SLVS348K–JULY 2001–REVISED OCTOBER 2007
ELECTRICAL CHARACTERISTICS
Over recommended operating temperature range TJ = –40°C to +125°C, VEN = VIN, VIN = VOUT(nom) + 1V(1), IOUT = 1mA,
COUT = 10μF, CNR = 0.01μF (unless otherwise noted). Typical values are at +25°C.
PARAMETER
VIN Input voltage(1)
TEST CONDITIONS
MIN
2.7
TYP
MAX
5.5
UNIT
V
IOUT Continuous output current
VFB Internal reference (TPS79301)
Output voltage range (TPS79301)
0
200
mA
V
1.201
VFB
1.225
1.250
5.5 – VDO
1.836
2.55
V
TPS79318
0μA < IOUT < 200mA,
2.8V < VIN < 5.5V
3.5V < VIN < 5.5V
3.8V < VIN < 5.5V
3.85V < VIN < 5.5V
4V < VIN < 5.5V
1.764
2.45
2.744
2.793
2.94
3.234
4.655
1.8
2.5
2.8
2.85
3
V
TPS79325
TPS79328
TPS793285
TPS79330
TPS79333
TPS793475
0μA < IOUT < 200mA,
0μA < IOUT < 200mA,
0μA < IOUT < 200mA,
0μA < IOUT < 200mA,
0μA ≤ IOUT < 200mA,
0μA < IOUT < 200mA,
VOUT + 1V < VIN ≤ 5.5V
0μA < IOUT < 200mA,
IOUT = 200mA
V
2.856
2.907
3.06
V
Output voltage
V
V
4.3V < VIN < 5.5V
5.25V < VIN < 5.5V
3.3
4.75
0.05
5
3.366
4.845
0.12
V
V
(1)
Line regulation (ΔVOUT%/ΔVIN
)
%/V
mV
Load regulation (ΔVOUT%/ΔIOUT
)
TJ = +25°C
TPS79328
TPS793285
TPS79330
TPS79333
TPS793475
120
120
112
102
77
200
200
200
180
125
600
220
1
IOUT = 200mA
Dropout voltage(2)
(VIN = VOUT(nom) – 0.1V)
IOUT = 200mA
mV
IOUT = 200mA
IOUT = 200mA
Output current limit
GND pin current
Shutdown current(3)
FB pin current
VOUT = 0V
285
mA
μA
μA
μA
0μA < IOUT < 200mA
170
VEN = 0V, 2.7V < VIN < 5.5V
VFB = 1.8V
0.07
1
f = 100Hz, TJ = +25°C,
f = 100Hz, TJ = +25°C,
f = 10kHz, TJ = +25°C,
IOUT = 10mA
70
68
70
43
55
36
33
32
50
70
100
IOUT = 200mA
IOUT = 200mA
Power-supply ripple rejection
TPS79328
dB
f = 100kHz, TJ = +25°C, IOUT = 200mA
CNR = 0.001μF
CNR = 0.0047μF
CNR = 0.01μF
CNR = 0.1μF
BW = 200Hz to 100kHz,
IOUT = 200mA
Output noise voltage (TPS79328)
Time, start-up (TPS79328)
μVRMS
CNR = 0.001μF
CNR = 0.0047μF
CNR = 0.01μF
RL = 14Ω, COUT = 1μF
μs
High level enable input voltage
Low level enable input voltage
EN pin current
2.7V < VIN < 5.5V
2.7V < VIN < 5.5V
VEN = 0V
1.7
0
VIN
0.7
1
V
V
–1
μA
V
UVLO threshold
VCC rising
2.25
2.65
UVLO hysteresis
100
mV
(1) Minimum VIN is 2.7V or VOUT + VDO, whichever is greater.
(2) Dropout is not measured for the TPS79318 and TPS79325 since minimum VIN = 2.7V.
(3) For adjustable versions, this parameter applies only after VIN is applied; then VEN transitions high to low.
Copyright © 2001–2007, Texas Instruments Incorporated
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SLVS348K–JULY 2001–REVISED OCTOBER 2007
FUNCTIONAL BLOCK DIAGRAMS
ADJUSTABLE VERSION
IN
OUT
59 k
UVLO
2.45V
Current
Sense
R1
R2
ILIM
SHUTDOWN
GND
EN
_
+
FB
UVLO
Thermal
External to
the Device
Shutdown
QuickStart
Bandgap
Reference
1.22V
250 kΩ
V
ref
IN
NR
FIXED VERSION
IN
OUT
UVLO
2.45V
Current
Sense
GND
EN
SHUTDOWN
+
ILIM
R1
R2
_
UVLO
Thermal
Shutdown
R2 = 40 kΩ
QuickStart
Bandgap
Reference
1.22V
250 kΩ
V
ref
NR
IN
Table 1. Terminal Functions
TERMINAL
SOT23 SOT23
WCSP
FIXED
NAME
ADJ
FIXED
DESCRIPTION
Connecting an external capacitor to this pin bypasses noise generated by the internal bandgap.
This improves power-supply rejection and reduces output noise.
NR
4
4
B2
A3
Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into
shutdown mode. EN can be connected to IN if not used.
EN
3
3
FB
GND
IN
5
2
1
6
N/A
2
N/A
A1
This terminal is the feedback input voltage for the adjustable device.
Regulator ground
1
C3
C1
Input to the device.
Output of the regulator.
OUT
5
4
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TPS793xx
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SLVS348K–JULY 2001–REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS (SOT23 PACKAGE)
TPS79328
OUTPUT VOLTAGE
vs
TPS79328
OUTPUT VOLTAGE
vs
TPS79328
GROUND CURRENT
vs
OUTPUT CURRENT
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
2.805
2.804
2.803
2.802
2.801
2.800
2.799
250
200
2.805
2.800
2.795
2.790
2.785
V
= 3.8 V
= 10 µF
OUT
= 25°C
IN
V
C
= 3.8 V
IN
C
T
= 10 µF
I
= 1 mA
OUT
OUT
J
I
= 1 mA
OUT
I
= 200 mA
OUT
150
100
50
0
I
= 200 mA
OUT
2.798
2.797
2.780
2.775
V
C
= 3.8 V
= 10 µF
IN
2.796
2.795
OUT
−40 −25 −10 5 20 35 50 65 80 95 110 125
(°C)
0
50
100
(mA)
150
200
−40 −25−10 5 20 35 50 65 80 95 110 125
I
T
J
(°C)
T
J
OUT
Figure 2.
Figure 3.
Figure 4.
TPS79328 OUTPUT SPECTRAL
TPS79328 OUTPUT SPECTRAL
TPS79328 OUTPUT SPECTRAL
NOISE DENSITY
vs
NOISE DENSITY
vs
NOISE DENSITY
vs
FREQUENCY
FREQUENCY
FREQUENCY
0.30
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0.30
V
= 3.8 V
IN
V
= 3.8 V
V
= 3.8 V
IN
IN
I
= 200 mA
OUT
C
C
= 2.2 µF
C = 10 µF
OUT
C = 0.1 µF
NR
OUT
= 0.1 µF
0.25
0.20
0.25
0.20
0.15
0.10
0.05
0
C
= 10 µF
OUT
= 0.001 µF
NR
C
NR
C
= 0.0047 µF
NR
C
I
= 1 mA
OUT
= 0.01 µF
NR
0.15
I
= 1 mA
OUT
C
NR
= 0.1 µF
0.10
0.05
I
= 200 mA
OUT
I
= 200 mA
OUT
0
100
1 k
10 k
100 k
100
1 k
10 k
100 k
100
1 k
10 k
100 k
Frequency (Hz)
Frequency (Hz)
Frequency (Hz)
Figure 5.
Figure 6.
Figure 7.
ROOT MEAN SQUARE OUTPUT
TPS79328
DROPOUT VOLTAGE
vs
NOISE
vs
OUTPUT IMPEDANCE
vs
CNR
FREQUENCY
JUNCTION TEMPERATURE
2.5
180
160
140
120
100
80
60
50
40
30
20
10
V
= 3.8 V
= 10 µF
= 25° C
IN
V
C
= 2.7 V
IN
V
= 2.8 V
OUT
C
T
OUT
= 10 µF
I
= 200 mA
OUT
OUT
J
C
OUT
= 10 µF
2.0
1.5
I
= 200 mA
OUT
I
= 1 mA
OUT
1.0
0.5
I
= 100 mA
OUT
60
40
I
= 10 mA
OUT
20
BW = 100 Hz to 100 kHz
0.01
0
0
10
0
−40 −25−10 5 20 35 50 65 80 95 110 125
100
1 k
10 k 100 k 1 M
10 M
0.001
0.1
Frequency (Hz)
T
J
(°C)
C
NR
(µF)
Figure 8.
Figure 9.
Figure 10.
Copyright © 2001–2007, Texas Instruments Incorporated
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TYPICAL CHARACTERISTICS (SOT23 PACKAGE) (continued)
TPS79328
RIPPLE REJECTION
vs
TPS79328
RIPPLE REJECTION
vs
TPS79328
RIPPLE REJECTION
vs
FREQUENCY
FREQUENCY
FREQUENCY
100
90
100
90
80
70
60
50
40
30
100
90
80
70
60
50
40
V
C
C
= 3.8 V
V
C
C
= 3.8 V
IN
= 2.2 µF
OUT
= 0.1 µF
NR
IN
= 2.2 µF
OUT
I
= 200 mA
OUT
= 0.01 µF
NR
80
I
= 200 mA
I
= 200 mA
OUT
OUT
70
60
50
40
30
I
= 10 mA
I
= 10 mA
OUT
OUT
I
= 10 mA
OUT
30
20
20
20
10
0
V
= 3.8 V
= 10 µF
= 0.01 µF
IN
C
C
OUT
10
0
10
0
NR
10
100
1 k
10 k 100 k 1 M 10 M
10
100
1 k
10 k 100 k 1 M 10 M
10
100
1 k
10 k 100 k 1 M 10 M
Frequency (Hz)
Frequency (Hz)
Frequency (Hz)
Figure 11.
Figure 12.
Figure 13.
TPS79328 OUTPUT VOLTAGE,
ENABLE VOLTAGE
vs
TPS79328
LINE TRANSIENT RESPONSE
TPS79328
LOAD TRANSIENT RESPONSE
TIME (START-UP)
V
C
= 3.8 V
IN
4.8
4
20
= 10 µF
OUT
V
V
= 3.8 V
2
0
IN
0
= 2.8 V
OUT
3.8
I
= 200 mA
−20
OUT
C
T
= 2.2 µF
= 25°C
I
C
C
= 200 mA
OUT
OUT
−40
300
= 2.2 µF
J
OUT
C
NR
= 0.001 µF
= 0.01 µF
dv
dt
0µ.4sV
NR
+
di
dt
0.02A
µs
20
0
3
2
1
0
+
200
100
C
= 0.0047 µF
= 0.01 µF
NR
1mA
-20
C
NR
0
0
50 100 150200 250 300 350 400 450 500
0
20 40 60 80 100 120 140 160 180 200
0
10 20 30 40 50 60 70 80 90 100
Time (µs)
Time (µs)
Time (µs)
Figure 14.
Figure 15.
Figure 16.
TPS79301
DROPOUT VOLTAGE
vs
DROPOUT VOLTAGE
vs
OUTPUT CURRENT
POWER-UP / POWER-DOWN
INPUT VOLTAGE
200
150
250
200
150
100
V
R
= 3 V
= 15 Ω
OUT
L
T
= 125°C
= 25°C
J
T
= 125°C
J
T
J
T
J
= 25°C
100
V
IN
V
OUT
T
= −55°C
50
0
J
T
= −40°C
J
50
0
I
= 200 mA
OUT
0
20 40 60 80 100 120 140 160 180 200
(mA)
5.0
2.5
3.0
3.5
4.0
4.5
1s/div
I
V
(V)
OUT
IN
Figure 17.
Figure 18.
Figure 19.
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SLVS348K–JULY 2001–REVISED OCTOBER 2007
TYPICAL CHARACTERISTICS (SOT23 PACKAGE) (continued)
TYPICAL REGIONS OF STABILITY
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESISTANCE
EQUIVALENT SERIES RESISTANCE
(ESR)
vs
OUTPUT CURRENT
(ESR)
vs
OUTPUT CURRENT
100
10
100
10
C
= 2.2 µF
OUT
C
= 10 µF
= 5.5 V
= −40°C to 125°C
OUT
V
= 5.5 V, V
≥ 1.5 V
IN
OUT
V
IN
T
J
= −40°C to 125°C
T
J
Region of Instability
Region of Instability
1
1
0.1
0.1
Region of Stability
Region of Stability
0.01
0.01
0.20
0
0.02
0.04
0.06
(A)
0.08
0.20
0
0.02
0.04
0.06
(A)
0.08
I
I
OUT
OUT
Figure 20.
Figure 21.
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APPLICATION INFORMATION
The TPS793xx family of low-dropout (LDO) regulators has been optimized for use in noise-sensitive
battery-operated equipment. The device features extremely low dropout voltages, high PSRR, ultralow output
noise, low quiescent current (170μA typically), and enable-input to reduce supply currents to less than 1μA when
the regulator is turned off.
A typical application circuit is shown in Figure 22.
VIN
VOUT
VIN
VOUT
IN
OUT
NR
TPS793xx
EN
GND
µ
µ
2.2 F
0.1 F
µ
0.01 F
Figure 22. Typical Application Circuit
External Capacitor Requirements
A 0.1μF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the
TPS793xx, is required for stability and improves transient response, noise rejection, and ripple rejection. A
higher-value input capacitor may be necessary if large, fast-rise-time load transients are anticipated or the device
is located several inches from the power source.
Like most low-dropout regulators, the TPS793xx requires an output capacitor connected between OUT and GND
to stabilize the internal control loop. The minimum recommended capacitance is 2.2μF. Any 2.2μF or larger
ceramic capacitor is suitable, provided the capacitance does not vary significantly over temperature. If load
current is not expected to exceed 100mA, a 1.0μF ceramic capacitor can be used.
The internal voltage reference is a key source of noise in an LDO regulator. The TPS793xx has an NR pin which
is connected to the voltage reference through a 250kΩ internal resistor. The 250kΩ internal resistor, in
conjunction with an external bypass capacitor connected to the NR pin, creates a low-pass filter to reduce the
voltage reference noise and, therefore, the noise at the regulator output. In order for the regulator to operate
properly, the current flow out of the NR pin must be at a minimum, because any leakage current creates an IR
drop across the internal resistor, thus creating an output error. Therefore, the bypass capacitor must have
minimal leakage current. The bypass capacitor should be no more than 0.1μF to ensure that it is fully charged
during the quickstart time provided by the internal switch shown in the Functional Block Diagrams.
As an example, the TPS79328 exhibits only 32μVRMS of output voltage noise using a 0.1μF ceramic bypass
capacitor and a 2.2μF ceramic output capacitor. Note that the output starts up slower as the bypass capacitance
increases due to the RC time constant at the NR pin that is created by the internal 250kΩ resistor and external
capacitor.
Board Layout Recommendation to Improve PSRR and Noise Performance
To improve ac measurements like PSRR, output noise, and transient response, it is recommended that the board
be designed with separate ground planes for VIN and VOUT, with each ground plane connected only at the GND
pin of the device. In addition, the ground connection for the bypass capacitor should connect directly to the GND
pin of the device.
8
Submit Documentation Feedback
Copyright © 2001–2007, Texas Instruments Incorporated
TPS793xx
www.ti.com
SLVS348K–JULY 2001–REVISED OCTOBER 2007
Power Dissipation and Junction Temperature
Specified regulator operation is assured to a junction temperature of +125°C; the maximum junction temperature
should be restricted to +125°C under normal operating conditions. This restriction limits the power dissipation the
regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or
equal to PD(max)
.
The maximum power dissipation limit is determined using Equation 1:
TJ max *TA
PD max
+
(
)
RQJA
(1)
Where:
•
•
•
TJmax is the maximum allowable junction temperature.
RθJA is the thermal resistance junction-to-ambient for the package (see the Dissipation Ratings Table).
TA is the ambient temperature.
The regulator dissipation is calculated using Equation 2:
ǒ
Ǔ
PD + VIN*VOUT IOUT
(2)
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the thermal
protection circuit.
Programming the TPS79301 Adjustable LDO Regulator
The output voltage of the TPS79301 adjustable regulator is programmed using an external resistor divider as
shown in Figure 23. The output voltage is calculated using Equation 3:
R1
R2
ǒ Ǔ
VOUT + VREF 1 )
(3)
Where:
•
VREF = 1.2246V typ (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 50μA divider current. Lower value resistors can be used
for improved noise performance, but the solution consumes more power. Higher resistor values should be
avoided as leakage current into/out of FB across R1/R2 creates an offset voltage that artificially
increases/decreases the feedback voltage and thus erroneously decreases/increases VOUT. The recommended
design procedure is to choose R2 = 30.1kΩ to set the divider current at 50μA, C1 = 15pF for stability, and then
calculate R1 using Equation 4:
VOUT
ǒ Ǔ
R1 +
* 1 R2
VREF
(4)
In order to improve the stability of the adjustable version, it is suggested that a small compensation capacitor be
placed between OUT and FB. For voltages less than 1.8V, the value of this capacitor should be 100pF. For
voltages greater than 1.8V, the approximate value of this capacitor can be calculated as shown in Equation 5:
*7
(3 x 10 ) x (R1 ) R2)
C1
+
(R1 x R2)
(5)
The suggested value of this capacitor for several resistor ratios is shown in the table below. If this capacitor is
not used (such as in a unity-gain configuration) or if an output voltage less than 1.8V is chosen, then the
minimum recommended output capacitor is 4.7μF instead of 2.2μF.
Copyright © 2001–2007, Texas Instruments Incorporated
Submit Documentation Feedback
9
TPS793xx
www.ti.com
SLVS348K–JULY 2001–REVISED OCTOBER 2007
OUTPUT VOLTAGE
PROGRAMMING GUIDE
VIN
VOUT
IN
OUT
FB
TPS79301
OUTPUT
R1
R2
C1
1mF
R1
R2
C1
EN
NR
VOLTAGE
2.2mF
GND
1.22V
2.5V
3.3V
3.6V
short
open
0pF
0.01mF
31.6kW
51kW
59kW
30.1kW
30.1kW
30.1kW
22pF
15pF
15pF
Figure 23. TPS79301 Adjustable LDO Regulator Programming
Regulator Protection
The TPS793xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input
voltage drops below the output voltage (for example, during power-down). Current is conducted from the output
to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting
might be appropriate.
The TPS793xx features internal current limiting and thermal protection. During normal operation, the TPS793xx
limits output current to approximately 400mA. When current limiting engages, the output voltage scales back
linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure,
care should be taken not to exceed the power dissipation ratings of the package or the absolute maximum
voltage ratings of the device. If the temperature of the device exceeds approximately +165°C, thermal-protection
circuitry shuts it down. Once the device has cooled down to below approximately +140°C, regulator operation
resumes.
10
Submit Documentation Feedback
Copyright © 2001–2007, Texas Instruments Incorporated
TPS793xx
www.ti.com
SLVS348K–JULY 2001–REVISED OCTOBER 2007
TPS793xxYEQ, YZQ NanoStar™ Wafer Chip Scale Information
0,79
0,84
1,30
1,34
0.625 Max
NOTES:A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. NanoStar package configuration.
NanoStar is a trademark of Texas Instruments.
Figure 24. NanoStar™ Wafer Chip Scale Package
Copyright © 2001–2007, Texas Instruments Incorporated
Submit Documentation Feedback
11
PACKAGE OPTION ADDENDUM
www.ti.com
24-Jan-2013
PACKAGING INFORMATION
Orderable Device
TPS79301DBVR
TPS79301DBVRG4
TPS79318DBVR
TPS79318DBVRG4
TPS79318DBVT
Status Package Type Package Pins Package Qty
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
Top-Side Markings
Samples
Drawing
(1)
(2)
(3)
(4)
ACTIVE
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DBV
6
6
5
5
5
5
3000
3000
3000
3000
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
PGVI
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
DBV
DBV
DBV
DBV
DBV
Green (RoHS
& no Sb/Br)
PGVI
PHHI
PHHI
PHHI
PHHI
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
TPS79318DBVTG4
250
Green (RoHS
& no Sb/Br)
TPS79318YEQR
TPS79318YEQT
TPS79318YZQR
OBSOLETE
OBSOLETE
ACTIVE
DSBGA
DSBGA
DSBGA
YEQ
YEQ
YZQ
5
5
5
TBD
TBD
Call TI
Call TI
Call TI
Call TI
-40 to 85
-40 to 85
-40 to 85
3000
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
E3
TPS79318YZQT
TPS79325DBVR
TPS79325DBVRG4
ACTIVE
ACTIVE
ACTIVE
DSBGA
SOT-23
SOT-23
YZQ
DBV
DBV
5
5
5
Green (RoHS
& no Sb/Br)
SNAGCU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
-40 to 85
E3
3000
3000
Green (RoHS
& no Sb/Br)
PGWI
PGWI
Green (RoHS
& no Sb/Br)
TPS79325YEQR
TPS79325YZQR
OBSOLETE
ACTIVE
DSBGA
DSBGA
YEQ
YZQ
5
5
TBD
Call TI
Call TI
-40 to 85
-40 to 85
3000
3000
3000
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
E4
TPS793285DBVR
TPS793285DBVRG4
TPS793285DBVT
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOT-23
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
DBV
5
5
5
5
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
-40 to 85
-40 to 85
PHII
PHII
PHII
PHII
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
TPS793285DBVTG4
250
Green (RoHS
& no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
24-Jan-2013
Orderable Device
Status Package Type Package Pins Package Qty
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
Top-Side Markings
Samples
Drawing
(1)
(2)
(3)
(4)
TPS793285YZQR
TPS793285YZQT
TPS79328DBVR
TPS79328DBVRG4
ACTIVE
ACTIVE
ACTIVE
ACTIVE
DSBGA
DSBGA
SOT-23
SOT-23
YZQ
YZQ
DBV
DBV
5
5
5
5
3000
250
Green (RoHS
& no Sb/Br)
SNAGCU
SNAGCU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
E5
E5
Green (RoHS
& no Sb/Br)
-40 to 85
3000
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
-40 to 85
PGXI
PGXI
Green (RoHS
& no Sb/Br)
-40 to 85
TPS79328YEQR
TPS79328YZQR
OBSOLETE
ACTIVE
DSBGA
DSBGA
YEQ
YZQ
5
5
TBD
Call TI
Call TI
-40 to 85
-40 to 85
3000
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
E2
TPS79328YZQT
TPS79330DBVR
TPS79330DBVRG4
TPS79330YZQR
TPS79330YZQT
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
DSBGA
SOT-23
SOT-23
DSBGA
DSBGA
SOT-23
SOT-23
SOT-23
SOT-23
YZQ
DBV
DBV
YZQ
YZQ
DBV
DBV
DBV
DBV
5
5
5
5
5
5
5
5
5
Green (RoHS
& no Sb/Br)
SNAGCU
CU NIPDAU
CU NIPDAU
SNAGCU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
E2
3000
3000
3000
250
Green (RoHS
& no Sb/Br)
PGYI
PGYI
E6
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
SNAGCU
E6
TPS79333DBVR
TPS79333DBVRG4
TPS793475DBVR
TPS793475DBVRG4
3000
3000
3000
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
PHUI
PHUI
PHJI
PHJI
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
24-Jan-2013
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) Only one of markings shown within the brackets will appear on the physical device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS79301, TPS79318, TPS79325, TPS79328, TPS793285, TPS79330, TPS79333, TPS793475 :
Automotive: TPS79301-Q1, TPS79318-Q1, TPS79325-Q1, TPS79328-Q1, TPS793285-Q1, TPS79330-Q1, TPS79333-Q1, TPS793475-Q1
•
Enhanced Product: TPS79301-EP, TPS79318-EP, TPS79325-EP, TPS79333-EP, TPS793475-EP
•
NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
Enhanced Product - Supports Defense, Aerospace and Medical Applications
•
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS79301DBVR
TPS79301DBVR
TPS79318DBVR
TPS79318DBVT
TPS79318YZQR
TPS79318YZQT
TPS79325DBVR
TPS79325YZQR
TPS793285DBVR
TPS793285DBVT
TPS793285YZQR
TPS793285YZQT
TPS79328DBVR
TPS79328YZQR
TPS79328YZQT
TPS79330DBVR
TPS79330YZQR
TPS79330YZQT
SOT-23
SOT-23
SOT-23
SOT-23
DSBGA
DSBGA
SOT-23
DSBGA
SOT-23
SOT-23
DSBGA
DSBGA
SOT-23
DSBGA
DSBGA
SOT-23
DSBGA
DSBGA
DBV
DBV
DBV
DBV
YZQ
YZQ
DBV
YZQ
DBV
DBV
YZQ
YZQ
DBV
YZQ
YZQ
DBV
YZQ
YZQ
6
6
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
3000
3000
3000
250
178.0
179.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
9.0
8.4
9.0
9.0
8.4
8.4
9.0
8.4
9.0
9.0
8.4
8.4
9.0
8.4
8.4
9.0
8.4
8.4
3.23
3.2
3.17
3.2
1.37
1.4
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
Q1
Q1
Q3
Q1
Q3
Q3
Q1
Q1
Q3
Q1
Q1
Q3
Q1
Q1
3.23
3.23
0.98
0.98
3.23
0.98
3.23
3.23
0.98
0.98
3.23
0.98
0.98
3.23
0.98
0.98
3.17
3.17
1.46
1.46
3.17
1.46
3.17
3.17
1.46
1.46
3.17
1.46
1.46
3.17
1.46
1.46
1.37
1.37
0.69
0.69
1.37
0.69
1.37
1.37
0.69
0.69
1.37
0.69
0.69
1.37
0.69
0.69
3000
250
3000
3000
3000
250
3000
250
3000
3000
250
3000
3000
250
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS79333DBVR
TPS79333DBVR
TPS793475DBVR
TPS793475DBVR
SOT-23
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
DBV
5
5
5
5
3000
3000
3000
3000
178.0
179.0
178.0
179.0
9.0
8.4
9.0
8.4
3.23
3.2
3.17
3.2
1.37
1.4
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
3.23
3.2
3.17
3.2
1.37
1.4
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS79301DBVR
TPS79301DBVR
TPS79318DBVR
TPS79318DBVT
TPS79318YZQR
TPS79318YZQT
TPS79325DBVR
TPS79325YZQR
TPS793285DBVR
TPS793285DBVT
TPS793285YZQR
TPS793285YZQT
TPS79328DBVR
SOT-23
SOT-23
SOT-23
SOT-23
DSBGA
DSBGA
SOT-23
DSBGA
SOT-23
SOT-23
DSBGA
DSBGA
SOT-23
DBV
DBV
DBV
DBV
YZQ
YZQ
DBV
YZQ
DBV
DBV
YZQ
YZQ
DBV
6
6
5
5
5
5
5
5
5
5
5
5
5
3000
3000
3000
250
180.0
203.0
180.0
180.0
217.0
217.0
180.0
217.0
180.0
180.0
217.0
217.0
180.0
180.0
203.0
180.0
180.0
193.0
193.0
180.0
193.0
180.0
180.0
193.0
193.0
180.0
18.0
35.0
18.0
18.0
35.0
35.0
18.0
35.0
18.0
18.0
35.0
35.0
18.0
3000
250
3000
3000
3000
250
3000
250
3000
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2013
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS79328YZQR
TPS79328YZQT
TPS79330DBVR
TPS79330YZQR
TPS79330YZQT
TPS79333DBVR
TPS79333DBVR
TPS793475DBVR
TPS793475DBVR
DSBGA
DSBGA
SOT-23
DSBGA
DSBGA
SOT-23
SOT-23
SOT-23
SOT-23
YZQ
YZQ
DBV
YZQ
YZQ
DBV
DBV
DBV
DBV
5
5
5
5
5
5
5
5
5
3000
250
217.0
217.0
180.0
217.0
217.0
180.0
203.0
180.0
203.0
193.0
193.0
180.0
193.0
193.0
180.0
203.0
180.0
203.0
35.0
35.0
18.0
35.0
35.0
18.0
35.0
18.0
35.0
3000
3000
250
3000
3000
3000
3000
Pack Materials-Page 3
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
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supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
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