X9015UM8-2.7_技术文档

X9015

®

Low Noise, Low Power, Volatile

Data Sheet

August 31, 2006

FN8157.5

Single Digitally Controlled (XDCP™)

Potentiometer

Features

• 32 taps

The Intersil X9015 is a 32 tap potentiometer that is volatile.

The device consists of a string of 31 resistors that can be

programmed to connect the R /V wiper output with any of

the nodes between the connecting resistors. The connection

point of the wiper is determined by information

communicated to the device on the 3-wire port. The 3-wire

port changes the tap position by a falling edge on the

increment pin. The direction the wiper moves is determined by

the state of the up/down pin. The wiper position at power up is

Tap #15.

• Three-wire up/down serial interface

• V

= 2.7V–5V

• Operating I = 50µA max.

CC

W

CC

• Standby current = 1µA max.

• R = 10kΩ, 50kΩ

TOTAL

• Packages 8 Ld SOIC, 8 Ld MSOP

• Pb-free plus anneal available (RoHS compliant)

The X9015 can be used in a wide variety of applications that

require a digitally controlled variable resistor to set analog

values.

Pinout

SOIC/MSOP

V

CC

INC

U/D

1

2

3

4

8

7

6

5

CS

R /V

X9015

R /V

H

L

V

R

/V

W

SS

W

Block Diagram

U/D

INC

CS

5-Bit

Up/Down

Counter

R /V

H

31

H

V

(Supply Voltage)

CC

30

29

28

R /V

Up/Down

(U/D)

H

One

of

Thirty

Two

Increment

(INC)

Control

R /V

W W

Transfer

Gates

Resistor

Array

Device Select

(CS)

Decoder

R /V

L

2

V

(Ground)

SS

1

0

Control

Circuitry

General

V

CC

SS

R /V

L

/V

R

W

Detailed

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

1

X9015

Ordering Information

TEMPERATURE

RANGE (°C)

PKG.

DWG. #

PART NUMBER

X9015WS8T1

PART MARKING

V

LIMITS (V)

R

(kΩ)

PACKAGE

8 Ld SOIC

CC

TOTAL

X9015W

5 ±10%

10

0 to +70

M8.15

Tape and Reel

X9015WS8ZT1 (Note)

X9015W Z

0 to +70

8 Ld SOIC (Pb-free)

Tape and Reel

M8.15

X9015UM8

ABB

50

0 to +70

8 Ld MSOP

M8.118

M8.15

M8.118

M8.15

X9015UM8Z (Note)

X9015UM8I*

DCF

8 Ld MSOP (Pb-free)

8 Ld MSOP

ABD

-40 to +85

0 to +70

X9015UM8IZ* (Note)

X9015US8*

DCD

8 Ld MSOP (Pb-free)

8 Ld SOIC

X9015U

X9015U Z

X9015U I

X9015U Z I

X9015W F

X9015US8Z* (Note)

X9015US8I*

0 to +70

8 Ld SOIC (Pb-free)

8 Ld SOIC

-40 to +85

0 to +70

X9015US8IZ* (Note)

X9015WS8-2.7*

8 Ld SOIC (Pb-free)

8 Ld SOIC

2.7-5.5

10

50

X9015WS8Z-2.7* (Note) X9015W ZF

X9015UM8-2.7* ABC

X9015UM8Z-2.7* (Note) DCF

X9015UM8I-2.7* ABE

X9015UM8IZ-2.7* (Note) DCE

0 to +70

8 Ld SOIC (Pb-free)

8 Ld MSOP

0 to +70

8 Ld MSOP (Pb-free)

8 Ld MSOP

-40 to +85

0 to +70

8 Ld MSOP (Pb-free)

8 Ld SOIC

X9015US8-2.7*

X9015U F

X9015US8Z-2.7* (Note) X9015U ZF

0 to +70

8 Ld SOIC (Pb-free)

8 Ld SOIC

X9015US8I-2.7*

X9015U G

-40 to +85

X9015US8IZ-2.7* (Note) X9015U ZG

8 Ld SOIC (Pb-free)

* Add “T1” suffix for tape and reel.

NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin

plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are

MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

FN8157.5

August 31, 2006

2

X9015

The wiper, when at either fixed terminal, acts like its

mechanical equivalent and does not move beyond the last

position. That is, the counter does not wrap around when

clocked to either extreme.

Pin Descriptions

R /V and R /V

H

L

H

L

The high (R /V ) and low (R /V ) terminals of the X9015 are

H

L

H

L

equivalent to the fixed terminals of a mechanical

potentiometer. The minimum voltage is V and the

The electronic switches on the device operate in a “make

before break” mode when the wiper changes tap positions. If

the wiper is moved several positions, multiple taps are

SS

maximum is V . The terminology of R /V and R /V

H

CC

L

H

references the relative position of the terminal in relation to

wiper movement direction selected by the U/D input, and not

the voltage potential on the terminal.

connected to the wiper for t (INC to V change). The

IW

W

R

value for the device can temporarily be reduced by a

TOTAL

significant amount if the wiper is moved several positions.

R_W/V_W

When the device is powered-down, the wiper position is lost.

When power is restored, the wiper is set to Tap #15.

R /V is the wiper terminal and is equivalent to the movable

W

w

terminal of a mechanical potentiometer. The position of the

wiper within the array is determined by the control inputs.

The wiper terminal series resistance is typically 200Ω at

Instructions and Programming

The INC, U/D and CS inputs control the movement of the

wiper along the resistor array. With CS set LOW the device is

selected and enabled to respond to the U/D and INC inputs.

HIGH to LOW transitions on INC will increment or decrement

(depending on the state of the U/D input) a five bit counter.

The output of this counter is decoded to select one of thirty

two wiper positions along the resistive array.

V

=5V. At power up the wiper position is at Tap #15.

CC

(V /R =Tap #0).

L

Up/Down (U/D)

The U/D input controls the direction of the wiper movement

and whether the tap position is incremented or decremented.

Increment (INC)

The system may select the X9015, move the wiper and

deselect the device. The new wiper position will be maintained

until changed by the system or until a power-up/down cycle.

The INC input is negative-edge triggered. Toggling INC will

move the wiper and either increment or decrement the

counter in the direction indicated by the logic level on the U/D

input.

The state of U/D may be changed while CS remains LOW.

This allows the host system to enable the device and then

move the wiper up and down until the proper trim is attained.

Chip Select (CS)

The device is selected when the CS input is LOW. When CS

is returned HIGH while the INC input is also HIGH the X9015

will be placed in the low power standby mode until the device

is selected once again.

Mode Selection

CS

INC

U/D

MODE

L

H

Wiper up

Pin Names

L

X

H

Wiper down

SYMBOL

DESCRIPTION

H

X

L

Standby mode

R /V

High terminal

Wiper terminal

Low terminal

Ground

H

W

L

H

L

Standby mode

R

/V

W

Normal mode

R /V

L

Wiper Up (not recommended)

V

SS

Wiper Down (not recommend-

ed)

V

Supply voltage

CC

L

U/D

INC

CS

Up/Down control input

Increment control input

Chip select control input

Principles Of Operation

There are two sections of the X9015: the input control,

counter and decode section; and the resistor array. The input

control section operates just like an up/down counter. The

output of this counter is decoded to turn on a single electronic

switch connecting a point on the resistor array to the wiper

output. The resistor array is comprised of 31 individual

resistors connected in series.

FN8157.5

August 31, 2006

3

X9015

Absolute Maximum Ratings

Operating Conditions

Temperature under bias. . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C

Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C

Voltage on CS, INC, U/D, V , V and

Temperature Range

Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C

Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C

H

L

V

with respect to V

. . . . . . . . . . . . . . . . . . . . . . . . -1V to +7V

SS

Supply Voltage (V )

CC

ΔV = |V –V | . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V

Lead temperature (soldering 10s) . . . . . . . . . . . . . . . . . . . . .+300°C

X9015. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V ±10%

X9015-2.7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V

H

L

I

(10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±7.5mA

W

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

)

Potentiometer Specifications Over recommended operating conditions unless otherwise stated

SYMBOL

PARAMETER

TEST CONDITIONS/NOTES

MIN.

–20

0

TYP.

MAX.

UNIT

R

End to End Resistance Variation

+20

%

TOTAL

V

V /R Terminal Voltage

V

VH

H

CC

V

V /R Terminal Voltage

0

V

mW

VL

L

Power Rating

R

≤1kΩ

10

TOTAL

R

Wiper Resistance

Wiper Current

I

= 1mA, V

= 5V

200

400

Ω

W

CC

I

= 2.7V

1000

3.75

Ω

I

-3.75

mA

Noise

Ref: 1kHz

-120

3

dBV

Resolution

%

Absolute Linearity (Note 1)

Relative Linearity (Note 2)

V

–V

w(n)(actual) w(n)(expected)

-1

+1

MI (Note 3)

ppm/°C

pF

–[V

]

w(n)+MI

-0.2

+0.2

w(n+1)

R

Temperature Coefficient

±300

TOTAL

Ratiometric Temperature Coefficient

Potentiometer Capacitances

±20

C /C /C

W

See circuit #3

10/10/25

H

L

Power Up and Down Requirements

The are no restrictions on the power-up or power-down conditions of V

and the voltages applied to the potentiometer pins

≥ V , V , V . The V ramp rate spec is

CC

is always more positive than or equal to V , V , and V , i.e., V

provided that V

CC

H

L

W

CC

H

L

W

CC

always in effect.

NOTES:

1. Absolute Linearity is utilized to determine actual wiper voltage versus expected voltage = (V

2. Relative Linearity is a measure of the error in step size between

(actual)–V

(expected)) = ±1 Ml Maximum.

w(n)

taps = V

– [V

+ Ml] = ±0.2 Ml.

W

(n+1)

3. 1 Ml = Minimum Increment = R

w(n)

/31.

TOT

4. Typical values are for T = +25°C and nominal supply voltage.

A

5. This parameter is periodically sampled and not 100% tested.

FN8157.5

August 31, 2006

4

X9015

)

D.C. Operating Specifications Over recommended operating conditions unless otherwise specified

TYP.

SYMBOL

PARAMETER

TEST CONDITIONS

MIN.

(Note 4)

MAX.

UNITS

I

V

active current (increment)

CS = V , U/D = V or V and

50

µA

CC1

CC

IL IL IH

INC = 0.4V @ max. t

CYC

I

active current (Store) (EEPROM

CS = V , U/D = V or V and

IH IL IH

400

1

µA

CC2

Store)

INC = V @ max. t

IH WR

I

Standby supply current

CS = V

– 0.3V, U/D and

SB

CC

INC = V or V

– 0.3V

SS

= V to V

CC

I

CS, INC, U/D input leakage current

CS, INC, U/D input HIGH voltage

CS, INC, U/D input LOW voltage

V

±10

µA

V

LI

IN

SS

V

x 0.7

V

+ 0.5

CC

IH

CC

V

-0.5

V

x 0.1

V

IL

CC

C

(Note 5) CS, INC, U/D input capacitance

V

= 5V, V = V , T = 25°C,

IN SS

10

pF

IN

CC

A

f = 1MHz

TEST CIRCUIT #1

TEST CIRCUIT #2

CIRCUIT #3 SPICE MACRO MODEL

R

V /R

TOTAL

H

V /R

H

R

L

H

Test Point

C

L

C

W

C

H

10pF

V

S

Test Point

V

/R

VW

W

25pF

V

/R

W

Force

Current

W

10pF

V

V /R

L

V /R

R

L

W

Symbol Table

WAVEFORM

INPUTS

OUTPUTS

Must be

steady

Will be

steady

May change

from Low to

High

Will change

from Low to

High

May change

from High to

Low

Will change

from High to

Low

Don’t Care:

Changes

Allowed

Changing:

State Not

Known

N/A

Center Line

is High

Impedance

A.C. Conditions of Test

Input pulse levels

0V to 3V

10ns

Input rise and fall times

Input reference levels

1.5V

FN8157.5

August 31, 2006

5

X9015

A.C. Operating Specifications Over recommended operating conditions unless otherwise specified

SYMBOL

PARAMETER

MIN.

100

2.9

1

TYP. (Note 6)

MAX.

UNIT

ns

t

CS to INC setup

Cl

lD

DI

INC HIGH to U/D change

U/D to INC setup

ns

t

µs

t

INC LOW period

µs

lL

lH

lC

t

INC HIGH period

1

µs

INC inactive to CS inactive

CS deselect time (NO STORE)

CS deselect time (STORE)

INC to Vw change

1

µs

t

100

10

ns

CPH

ms

µs

t

1

5

IW

t

INC cycle time

4

µs

CYC

t

(Note 7) INC input rise and fall time

500

5

µs

R, F

t

(Note 7)

Power up to wiper stable

(Note 7) V power-up rate

µs

PU

t

V

0.2

50

10

V/ms

ms

R

CC

Store cycle

t

5

WR

A.C. Timing

CS

t

CYC

(store)

t

CPH

CI

IL

IH

IC

90%

INC

U/D

10%

t

R

ID

DI

F

t

IW

(8)

MI

V

W

NOTES:

6. Typical values are for T = +25°C and nominal supply voltage.

A

7. This parameter is periodically sampled and not 100% tested.

8. MI in the A.C. timing diagram refers to the minimum incremental change in the V output due to a change in the wiper position.

W

FN8157.5

August 31, 2006

6

X9015

Performance Characteristics (Typical)

0

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-110

-120

-130

-140

-150

0

10

20 30

40 50

60 70

80 90 100 110 120 130 140 150 160 170 180 190 200

FREQUENCY (kHz)

FIGURE 1. TYPICAL NOISE

10000

9800

9600

9400

9200

9000

8800

8600

8400

8200

8000

-55

-45 -35 -25 -15 -5

5

35 45

C

15

25

55 65

85 95 105 115 125

TEMPERATURE⁷⁵

FIGURE 2. TYPICAL RTOTAL VS. TEMPERATURE

0

-50

-100

-150

-200

-250

-300

-350

PPM

-55 -45 -35 -25 -15

-5

5

15

25

45

55

65

75

85

95

105 115 125

C

TEM³P⁵ERATURE

FIGURE 3. TYPICAL TOTAL RESISTANCE TEMPERATURE COEFFICIENT

FN8157.5

August 31, 2006

7

X9015

Performance Characteristics (Typical) (Continued)

800

700

600

500

400

300

200

100

0

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

V

= 2.7V

CC

TAP

FIGURE 4. TYPICAL WIPER RESISTANCE

40.0%

30.0%

20.0%

10.0%

0.0%

-10.0%

-20.0%

-30.0%

-40.0%

0

3

6

9

12

15

18

21

24

27

30

Tap

FIGURE 5. TYPICAL ABSOLUTE% ERROR PER TAP POSITION

20.0%

15.0%

10.0%

5.0%

0.0%

-5.0%

-10.0%

-15.0%

-20.0%

0

3

6

9

12

15

18

21

24

27

30

TAP

FIGURE 6. TYPICAL RELATIVE% ERROR PER TAP POSITION

FN8157.5

August 31, 2006

8

X9015

Applications Information

Electronic digitally controlled potentiometers provide two powerful application advantages: (1) the variability and reliability of a

solid-state potentiometer, and (2) the flexibility of computer-based digital controls.

Basic Configurations of Electronic Potentiometers

V

R

V

R

V /R

H

V

/R

W

V /R

L

I

THREE-TERMINAL POTENTIOMETER;

VARIABLE VOLTAGE DIVIDER

TWO-TERMINAL VARIABLE RESISTOR;

VARIABLE CURRENT

Basic Circuits

Noninverting Amplifier

+5V

Buffered Reference Voltage

Cascading Techniques

R

1

+V

LM308A

+V

V

+

S

+5V

V

O

–

V

/R

W

OP-07

+

–

V

REF

–5V

X

V

OUT

V

/R

W

R

2

+V

–5V

= V

R

1

V

/R

W

V

W

OUT

W

(a)

(b)

V

= (1+R /R )V

2 1 S

O

VOLTAGE REGULATOR

OFFSET VOLTAGE ADJUSTMENT

COMPARATOR WITH HYSTERESIS

R

2

1

V

V (REG)

O

317

IN

LT311A

V

S

V

–

+

S

V

O

R

100kΩ

1

–

+

V

O

I

adj

TL072

R

2

10kΩ

R

1

2

V

= {R /(R +R )} V (max)

1 1 2 O

UL

LL

10kΩ

= {R /(R +R )} V (min)

1

2

O

V

(REG) = 1.25V (1+R /R )+I

R

O

2

1

adj 2

+12V

-12V

(FOR ADDITIONAL CIRCUITS, SEE AN115.)

FN8157.5

August 31, 2006

9

X9015

Small Outline Plastic Packages (SOIC)

M8.15 (JEDEC MS-012-AA ISSUE C)

N

8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE

INDEX

AREA

0.25(0.010)

M

B M

H

INCHES

MILLIMETERS

E

SYMBOL

MIN

MAX

MIN

1.35

0.10

0.33

0.19

4.80

3.80

MAX

1.75

0.25

0.51

0.25

5.00

4.00

NOTES

-B-

A

A1

B

C

D

E

e

0.0532

0.0040

0.013

0.0688

0.0098

0.020

-

1

2

3

L

9

SEATING PLANE

A

0.0075

0.1890

0.1497

0.0098

0.1968

0.1574

-

-A-

3

h x 45°

D

4

-C-

0.050 BSC

1.27 BSC

-

α

H

h

0.2284

0.0099

0.016

0.2440

0.0196

0.050

5.80

0.25

0.40

6.20

0.50

1.27

-

e

A1

C

5

B

0.10(0.004)

L

6

0.25(0.010) M

C

A M B S

N

α

8

7

NOTES:

0°

8°

0°

8°

-

1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of

Publication Number 95.

Rev. 1 6/05

2. Dimensioning and tolerancing per ANSI Y14.5M-1982.

3. Dimension “D” does not include mold flash, protrusions or gate burrs.

Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006

inch) per side.

4. Dimension “E” does not include interlead flash or protrusions. Inter-

lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per

side.

5. The chamfer on the body is optional. If it is not present, a visual index

feature must be located within the crosshatched area.

6. “L” is the length of terminal for soldering to a substrate.

7. “N” is the number of terminal positions.

8. Terminal numbers are shown for reference only.

9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater

above the seating plane, shall not exceed a maximum value of

0.61mm (0.024 inch).

10. Controlling dimension: MILLIMETER. Converted inch dimensions

are not necessarily exact.

FN8157.5

August 31, 2006

10

X9015

Mini Small Outline Plastic Packages (MSOP)

N

M8.118 (JEDEC MO-187AA)

8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE

INCHES

MILLIMETERS

E1

E

SYMBOL

MIN

MAX

MIN

0.94

0.05

0.75

0.25

0.09

2.95

MAX

1.10

0.15

0.95

0.36

0.20

3.05

NOTES

A

A1

A2

b

0.037

0.002

0.030

0.010

0.004

0.116

0.043

0.006

0.037

0.014

0.008

0.120

-

-B-

0.20 (0.008)

INDEX

AREA

1 2

A

B

C

-

TOP VIEW

4X θ

9

0.25

(0.010)

R1

c

-

R

GAUGE

PLANE

D

3

E1

e

4

SEATING

PLANE

L

0.026 BSC

0.65 BSC

-

-C-

4X θ

L1

A

A2

E

0.187

0.016

0.199

0.028

4.75

0.40

5.05

0.70

-

L

6

SEATING

PLANE

L1

N

0.037 REF

0.95 REF

-

0.10 (0.004)

-A-

C

b

8

7

-H-

A1

e

R

0.003

-

0.07

-

D

0.20 (0.008)

C

R1

0

-

o

5

15

5

15

-

a

SIDE VIEW

C

L

o

0

6

0

6

-

α

E

1

-B-

Rev. 2 01/03

0.20 (0.008)

C

D

END VIEW

NOTES:

1. These package dimensions are within allowable dimensions of

JEDEC MO-187BA.

2. Dimensioning and tolerancing per ANSI Y14.5M-1994.

3. Dimension “D” does not include mold flash, protrusions or gate

burrs and are measured at Datum Plane. Mold flash, protrusion

and gate burrs shall not exceed 0.15mm (0.006 inch) per side.

4. Dimension “E1” does not include interlead flash or protrusions

- H -

and are measured at Datum Plane.

Interlead flash and

protrusions shall not exceed 0.15mm (0.006 inch) per side.

5. Formed leads shall be planar with respect to one another within

0.10mm (0.004) at seating Plane.

6. “L” is the length of terminal for soldering to a substrate.

7. “N” is the number of terminal positions.

8. Terminal numbers are shown for reference only.

9. Dimension “b” does not include dambar protrusion. Allowable

dambar protrusion shall be 0.08mm (0.003 inch) total in excess

of “b” dimension at maximum material condition. Minimum space

between protrusion and adjacent lead is 0.07mm (0.0027 inch).

- B -

to be determined at Datum plane

-A -

10. Datums

and

.

- H -

11. Controlling dimension: MILLIMETER. Converted inch dimen-

sions are for reference only.

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

FN8157.5

August 31, 2006

11


型号：	X9015UM8-2.7
厂家：	Rochester Electronics
描述：	50K DIGITAL POTENTIOMETER, INCREMENT/DECREMENT CONTROL INTERFACE, 32 POSITIONS, PDSO8, PLASTIC, MO-187AA, MSOP-8 光电二极管转换器电阻器
文件：	总12页 (文件大小：928K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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