BD00EA5WFP2_技术文档

Datasheet

500 mA Adjustable Output

LDO Regulators

BD00EA5WFP BD00EA5WHFP BD00EA5WFP2

General Description

Key Specifications

The BD00EA5Wxxx series are linear regulators designed

as low current consumption products for power supplies in

various automotive applications.

These products are designed for up to 45 V as an absolute

maximum voltage and to operate until 500 mA for the

output current with low current consumption 17 μA (Typ).

 Wide Temperature Range (Tj):

 Wide Operating Input Range:

 Low Current Consumption:

 Output Current Capability:

 High Output Voltage Accuracy:

 Output Voltage:

-40 °C to +105 °C

3 V to 42 V

17 μA(Typ)

500 mA

±1 %(Tj = 25 °C)

1.2 V to 16 V

These can regulate the output with

a very high

accuracy^{(Note 1)}, ±1 % (BD00EA5WFP, BD00EA5WHFP)

and ±1.5 % (BD00EA5WFP2). The output voltage can be

adjusted between 1.2 V and 16 V by an external resistive

divider connected to the adjustment pin. These regulators

are therefore an ideal for any applications requiring a direct

connection to the battery and a low current consumption.

Packages

FP: TO252-5

W(Typ) x D(Typ) x H(Max)

6.5 mm x 9.5 mm x 2.5 mm

A logical “HIGH” at the EN pin turns on the device, and in

the other side, the devices are controlled to disable by a

logical “LOW” input to the EN pin.

The devices feature the integrated Over Current Protection

to protect the device from a damage caused by a short-

circuiting or an overload. These products also integrate

Thermal Shutdown Protection to avoid the damage by

overheating.

HFP: HRP5

9.395 mm x 10.54 mm x 2.005 mm

Furthermore, low ESR ceramic capacitors are sufficiently

applicable for the phase compensation.

(Note 1) The tolerance of feedback resistor is not included.

Features

FP2: TO263-5 10.16 mm × 15.10 mm × 4.70 mm

 Output Shutdown Function (EN Function)

 Over Current Protection (OCP)

 Thermal Shutdown Protection (TSD)

Applications

 Power Supply for General Purpose

Typical Application Circuit

FIN

 Components Externally Connected

Capacitor: 0.1 µF ≤ C_IN(Min), 1.47 µF ≤ C_OUT(Min) ^{(Note 2)}

Resistor: 5 kΩ ≤ R₁≤ 200 kΩ ^{(Note 3) (Note 4)}

V_ADJ(Typ): 0.65 V

BD00EA5WFP

EN

ADJ

VOUT

N.C.

푉_푂푈푇

VIN

푅₂= 푅₁(

− ꢀ)

푉

퐴퐷퐽

Input

Voltage

Output

R₂

Voltage

(Note 2) Electrolytic, tantalum and ceramic capacitors can be used.

(Note 5)

C_ADJ

C_OUT

(Note 3) The tolerance of feedback resistor is not included in the accuracy of output voltage.

(Note 4) The value of a feedback resistor R₁must be within this range.

R₂value is defined by following the formula using the limitation of R₁.

(Note 5) If it needs better transient characteristic, insert a capacitor between

Enable

Voltage

R₁

C_IN

the VOUT and ADJ pin. Refer to Typical Application and Layout Example for the details such as equations.

〇Product structure : Silicon integrated circuit 〇This product has no designed protection against radioactive rays.

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Contents

General Description........................................................................................................................................................................1

Features..........................................................................................................................................................................................1

Applications ....................................................................................................................................................................................1

Key Specifications ..........................................................................................................................................................................1

Packages........................................................................................................................................................................................1

Typical Application Circuit...............................................................................................................................................................1

Pin Configurations ..........................................................................................................................................................................4

Pin Descriptions..............................................................................................................................................................................4

Block Diagram ................................................................................................................................................................................5

Description of Blocks ......................................................................................................................................................................6

Absolute Maximum Ratings............................................................................................................................................................7

Thermal Resistance........................................................................................................................................................................7

Operating Conditions......................................................................................................................................................................8

Electrical Characteristics.................................................................................................................................................................9

LDO Function..............................................................................................................................................................................9

Enable Function ..........................................................................................................................................................................9

Typical Performance Curves.........................................................................................................................................................10

Figure 1. Output Voltage vs Input Voltage.................................................................................................................................10

Figure 2. Output Voltage vs Input Voltage -Enlarged view ........................................................................................................10

Figure 3. Output Voltage vs Junction Temperature (I_OUT= 0.5 mA)........................................................................................10

Figure 4. Current Consumption + Enable Bias Current vs Input Voltage................................................................................10

Figure 5. Current Consumption + Enable Bias Current vs Junction Temperature...................................................................11

Figure 6. Current Consumption + Enable Bias Current vs Output Current .............................................................................11

Figure 7. Output Voltage vs Output Current (Over Current Protection) ..................................................................................11

Figure 8. Shutdown Current vs Junction Temperature (V_EN= 0 V) .........................................................................................11

Figure 9. Dropout Voltage vs Output Current (V_IN= 4.75 V)...................................................................................................12

Figure 10. Output Voltage vs Junction Temperature (Thermal Shutdown Protection).............................................................12

Figure 11. Output Voltage vs EN Input Voltage .........................................................................................................................12

Figure 12. EN Input Voltage vs Junction Temperature ..............................................................................................................12

Figure 13. Enable Bias Current vs Junction Temperature .........................................................................................................13

Figure 14. Ripple Rejection (ein = 1 Vrms, I_OUT= 100 mA).....................................................................................................13

Figure 15. Line Regulation (V_IN= 6 V → 42 V).......................................................................................................................13

Figure 16. Load Regulation (I_OUT= 0.5 mA → 400 mA)..........................................................................................................13

Figure 17. Line Transient Response (V_IN= 0 V → 16 V) ........................................................................................................14

Figure 18. Line Transient Response (V_IN= 6 V → 16 V) ........................................................................................................14

Figure 19. Load Transient Response (I_OUT= 1 mA ↔ 500 mA) ..............................................................................................15

Figure 20. Load Transient Response (I_OUT= 10 mA ↔ 500 mA) ............................................................................................16

Figure 21. EN ON/OFF Sequence ............................................................................................................................................17

Figure 22. V_INON/OFF Sequence.............................................................................................................................................18

Measurement Circuit for Typical Performance Curves .................................................................................................................19

Application and Implementation....................................................................................................................................................20

Selection of External Components............................................................................................................................................20

Input Pin Capacitor................................................................................................................................................................20

Output Pin Capacitor .............................................................................................................................................................20

Typical Application and Layout Example ...................................................................................................................................22

Surge Voltage Protection for Linear Regulators ........................................................................................................................23

Positive Surge to the Input.....................................................................................................................................................23

Negative Surge to the Input...................................................................................................................................................23

Reverse Voltage Protection for Linear Regulators ....................................................................................................................23

Protection against Reverse Input/Output Voltage..................................................................................................................23

Protection against Input Reverse Voltage..............................................................................................................................24

Protection against Reverse Output Voltage when Output Connect to an Inductor.................................................................25

Power Dissipation.........................................................................................................................................................................26

TO252-5....................................................................................................................................................................................26

HRP5.........................................................................................................................................................................................26

TO263-5....................................................................................................................................................................................27

Thermal Design ............................................................................................................................................................................28

I/O Equivalence Circuits................................................................................................................................................................29

Operational Notes.........................................................................................................................................................................30

1. Reverse Connection of Power Supply...................................................................................................................................30

2. Power Supply Lines ..............................................................................................................................................................30

3. Ground Voltage.....................................................................................................................................................................30

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4. Ground Wiring Pattern...........................................................................................................................................................30

5. Recommended Operating Conditions ...................................................................................................................................30

6. Inrush Current .......................................................................................................................................................................30

7. Thermal Consideration..........................................................................................................................................................30

8. Testing on Application Boards ...............................................................................................................................................30

9. Inter-pin Short and Mounting Errors ......................................................................................................................................30

10 Unused Input Pins................................................................................................................................................................30

11. Regarding the Input Pin of the IC ........................................................................................................................................31

12. Ceramic Capacitor...............................................................................................................................................................31

13. Thermal Shutdown Protection Circuit(TSD) ........................................................................................................................31

14. Over Current Protection Circuit (OCP) ................................................................................................................................31

15. Enable Pin...........................................................................................................................................................................31

Ordering Information.....................................................................................................................................................................32

Marking Diagrams.........................................................................................................................................................................32

Physical Dimension and Packing Information...............................................................................................................................33

Revision History............................................................................................................................................................................36

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Pin Configurations

TO252-5

HRP5

TO263-5

(TOP VIEW)

(Top View)

(TOP VIEW)

FIN

1

2

3

4 5

1 2 3 4 5

1 2 3 4

5

Pin Descriptions

Pin No.

Pin Name

Function

Descriptions

It is necessary to use a capacitor with a capacitance of 0.1 μF (Min)

or higher between the VIN pin and GND. The detail of a selection

is described in Selection of External Components. If the

inductance of power supply line is high, please adjust input

capacitor value.

1

VIN

Input Supply Voltage Pin

A logical “HIGH” (V_EN≥ 2.0 V) at the EN pin enables the device

and “LOW” (V_EN≤ 0.8 V) at the EN pin disables the device.

2

EN

Control Output ON/OFF Pin

N.C.^{(Note 1)}

(TO252-5)

Not Connected

Ground Pin

Not connected to chip

3

4

GND

ADJ

Ground.

Adjustment Pin

For Output Voltage

Connect an external resistor to adjust output voltage.

It is necessary to use a capacitor with a capacitance of 1.47

μF(Min) or higher between the VOUT pin and GND. The detail of

a selection is described in Selection of External Components

5

VOUT

Output Voltage Pin

Ground.

FIN

GND

Ground Pin

This pin should be connected to Analog ground / Power ground or

Heat Sink.

(Note 1) The N.C. is not connected inside of IC.

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Block Diagram

TO252-5

GND (FIN)

Power Tr.

OCP

EN

PREREG

VREF

AMP

DRIVER

TSD

DIS-

CHARGE

EN

VIN (Pin 1)

EN (Pin 2)

N.C. (Pin 3)

GND (FIN)

ADJ (Pin 4)

VOUT (Pin 5)

HRP5 / TO263-5

Power Tr.

OCP

EN

PREREG

VREF

AMP

DRIVER

TSD

DIS-

CHARGE

EN

VIN (Pin 1)

EN (Pin 2)

GND (Pin 3)

ADJ (Pin 4)

VOUT (Pin 5)

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Description of Blocks

Block Name

Function

Description of Blocks

A logical “HIGH” (V_EN≥ 2.0 V) at the EN pin enables the device

and “LOW” (V_EN≤ 0.8 V) at the EN pin disables the device.

EN

Control Output Voltage ON / OFF

Internal Power Supply

PREREG

Power supply for internal circuit.

In case maximum power dissipation is exceeded or the ambient

temperature is higher than the Maximum Junction Temperature,

overheating causes the chip temperature (Tj) to rise. The TSD

protection circuit detects this and forces the output to turn off in order

to protect the device from overheating. When the junction

temperature decreases to low, the output turns on automatically.

(Typ:175 °C)

TSD

Thermal Shutdown Protection

VREF

AMP

Reference Voltage

Error Amplifier

Generate the reference voltage.

The error amplifier amplifies the difference between the feedback

voltage of the output voltage and the reference voltage.

DRIVER

Output MOSFET Driver

Drive the output MOSFET (Power Tr.)

If the output current increases higher than the maximum output

current, it is limited by Over Current Protection in order to protect the

device from a damage caused by an over current.

While this block is operating, the output voltage may decrease

because the output current is limited.

OCP

Over Current Protection

If an abnormal state is removed and the output current value returns

to normal, the output voltage also returns to normal state.(Typ:1400

mA)

Output pin is discharged when EN

detected.(Typ:4 kΩ)

= Low input or TSD

DISCHARGE Output Discharge Function

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Absolute Maximum Ratings

Parameter

Supply Voltage^{(Note 1)}

Symbol

Ratings

Unit

V_IN

V_EN

-0.3 to +45

V

EN Pin Voltage^{(Note 2)}

Output Pin Voltage

V_OUT

V_ADJ

Tj

-0.3 to +20 (≤ V_IN+ 0.3)

-0.3 to +7

V

ADJ Pin Voltage

V

Junction Temperature Range

Storage Temperature Range

Maximum Junction Temperature

-40 to +150

-55 to +150

150

°C

Tstg

Tjmax

Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit

between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is

operated over the absolute maximum ratings.

Caution 2:Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the

properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance and power dissipation taken into

consideration by increasing board size and copper area so as not to exceed the maximum junction temperature rating.

(Note 1) Do not exceed Tjmax.

(Note 2) The start-up orders of power supply (V_IN) and the V_ENdo not influence if the voltage is within the operation power supply voltage range.

Thermal Resistance ^{(Note 3)}

Thermal Resistance (Typ)

Parameter

Symbol

Unit

1s^{(Note 5)}

2s2p^{(Note 6)}

TO252-5

Junction to Ambient

Junction to Top Characterization Parameter^{(Note 4)}

θ_JA

136.0

17

23.0

3

°C/W

Ψ_JT

HRP5

Junction to Ambient

Junction to Top Characterization Parameter^{(Note 4)}

θ_JA

91.3

8

21.4

3

°C/W

Ψ_JT

TO263-5

Junction to Ambient

Junction to Top Characterization Parameter^{(Note 4)}

θ_JA

80.2

10

21.8

2

°C/W

Ψ_JT

(Note 3) Based on JESD51-2A(Still-Air).

(Note 4) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside

surface of the component package.

(Note 5) Using a PCB board based on JESD51-3.

(Note 6) Using a PCB board based on JESD51-5, 7.

Layer Number of

Measurement Board

Material

FR-4

Board Size

Single

114.3 mm x 76.2 mm x 1.57 mmt

Top

Copper Pattern

Thickness

70 μm

Footprints and Traces

Thermal Via^{(Note 7)}

Layer Number of

Measurement Board

Material

FR-4

Board Size

114.3 mm x 76.2 mm x 1.6 mmt

2 Internal Layers

Pitch

Diameter

4 Layers

1.20 mm

Φ0.30 mm

Top

Copper Pattern

Bottom

Thickness

70 μm

Copper Pattern

Thickness

35 μm

Copper Pattern

Thickness

70 μm

Footprints and Traces

74.2 mm x 74.2 mm

(Note 7) This thermal via connects with the copper pattern of all layers.

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Operating Conditions( -40 °C ≤ Tj ≤ +105 °C)

Parameter

Input Voltage^{(Note 1)}

Symbol

Min

Max

Unit

V_IN

V_{IN Start-Up}

V_OUT

R₁

V_OUT(Max) + ΔVd (Max)

42

-

V

Start-Up Voltage^{(Note 2)}

Output Voltage

3

1.2

5

16

V

Feedback Resistor ADJ vs GND^{(Note 3)}

Output Control Voltage

Output Current

200

42

kΩ

V

V_EN

0

I_OUT

0

500

-

mA

µF

Input Capacitor^{(Note 4)}

Output Capacitor^{(Note 5)}

C_IN

0.1

1.47

C_OUT

1000

Output Capacitor Equivalent Series

Resistance

ESR(C_OUT

)

-

5

Ω

VOUT-ADJ Capacitor

C_ADJ

Ta

-

1000

+105

pF

°C

Operating Temperature

-40

(Note 1) Minimum Input Voltage must be 3.3 V or more.

Please consider that the output voltage would be dropped (Dropout voltage ΔVd) by the output current.

(Note 2) If V_OUTsetting is 3 V or less, V_OUT(Min) = 90 % × V_OUT(Typ) when V_IN= 3 V, I_OUT= 0 mA.

(Note 3) If it needs better transient characteristic, insert a capacitor between the VOUT and ADJ pin. Refer to Typical Application and Layout Example for the

details such as equations.

(Note 4) If the inductance of power supply line is high, please adjust input capacitor value.

(Note 5) Set the value of the capacitor so that it does not fall below the minimum value. Take into consideration the temperature characteristics and DC device

characteristics.

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Electrical Characteristics

LDO Function (V_OUTsetting = 5 V, R₁= 120 kΩ, R₂= 803 kΩ)

Unless otherwise specified, Tj = -40 °C to +105 °C, V_IN= 13.5 V, I_OUT= 0 mA, V_EN= 5 V

Typical values are defined at Tj = 25 °C, V_IN= 13.5 V

Limits

Parameter

Shutdown Current

Symbol

I_SHUT

Unit

μA

Conditions

V_EN= 0 V

Min

-

Typ

1

Max

5

I_OUT≤ 500 mA

-

17

34

46

μA

Tj ≤ 25 °C

Current Consumption^{(Note 1)}

I_CC

I_OUT≤ 500 mA

μA

V

Tj ≤ 105 °C

TO252-5, HRP5 package

Tj = 25°C

0.643

0.640

0.637

0.633

0.650

0.657

0.660

0.663

0.667

6 V ≤ V_IN≤ 42 V

0.5 mA ≤ I_OUT≤ 400 mA

TO263-5 package

Tj = 25°C

V

6 V ≤ V_IN≤ 42 V

0.5 mA ≤ I_OUT≤ 400 mA

TO252-5, HRP5 package

-40 °C ≤ Tj ≤ 105 °C

6 V ≤ V_IN≤ 42 V

0.5 mA ≤ I_OUT≤ 400 mA

TO263-5 package

-40 °C ≤ Tj ≤ 105 °C

6 V ≤ V_IN≤ 42 V

0.5 mA ≤ I_OUT≤ 400 mA

V_IN= V_OUT× 0.95

I_OUT= 500 mA

Reference Voltage

V_ADJ

Dropout Voltage

Ripple Rejection

-

0.45

70

0.83

-

V

ΔVd

R.R.

f = 120 Hz, ein = 1 Vrms

I_OUT= 100 mA

60

dB

Line Regulation

Load Regulation

Reg.I

-

0.02

0.4

% × V_OUT

6 V ≤ V_IN≤ 42 V

Reg.L

0.5 mA ≤ I_OUT≤ 400 mA

6 V ≤ V_IN≤ 42 V

V_OUT= 90 % × V_OUT(Typ)

-

Overload Current Protection

I_OUT(OCP)

750

151

1400

175

-

mA

°C

Thermal Shutdown Temperature

Tj_(TSD)

(Note 1) It does not contain the current of R₁and R₂.

Enable Function

Unless otherwise specified, Tj = -40 °C to +105 °C, V_IN= 13.5 V, I_OUT= 0 mA, V_EN= 5 V

Typical values are defined at Tj = 25 °C, V_IN= 13.5 V

Limits

Parameter

Symbol

Unit

Conditions

Min

2.0

0

Typ

Max

42.0

0.8

8

Enable Mode Voltage

Disable Mode Voltage

Enable Bias Current

V_ENH

V_ENL

I_EN

-

V

-

4

µA

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Typical Performance Curves

Unless otherwise specified, V_IN= 13.5 V, V_OUTsetting = 5 V, V_EN= 5 V, R₁= 120 kΩ, R₂= 803 kΩ

10.0

7.5

5.0

2.5

0.0

10.0

7.5

5.0

2.5

0.0

Tj = -40 °C

Tj = +25 °C

Tj = +105 °C

Tj = -40 °C

Tj = +25 °C

Tj = +105 °C

0

10

20

30

40

50

0

1

2

3

4

5

6

Input Voltage: V_IN[V]

Figure 1.

Figure 2.

Output Voltage vs Input Voltage

Output Voltage vs Input Voltage -Enlarged view

5.100

5.075

5.050

5.025

5.000

4.975

4.950

4.925

4.900

100

80

60

40

20

0

Tj = -40 °C

Tj = +25 °C

Tj = +105°C

-40

0

40

80

120

0

10

20

30

40

50

Junction Temperature: Tj [°C]

Input Voltage: V_IN[V]

Figure 3.

Figure 4.

Output Voltage vs Junction Temperature

(I_OUT= 0.5 mA)

Current Consumption + Enable Bias Current

vs Input Voltage

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Typical Performance Curves - continued

Unless otherwise specified, V_IN= 13.5 V, V_OUTsetting = 5 V, V_EN= 5 V, R₁= 120 kΩ, R₂= 803 kΩ

100

90

80

70

60

50

40

30

20

10

0

90

80

70

60

50

40

30

20

10

0

Tj = -40 °C

Tj = +25 °C

Tj = +105 °C

-40

0

40

80

120

0

100

200

300

400

500

Junction Temperature: Tj [°C]

Output Current: I_OUT[mA]

Figure 5.

Figure 6.

Current Consumption + Enable Bias Current

vs Junction Temperature

Current Consumption + Enable Bias Current

vs Output Current

5

10.0

7.5

5.0

2.5

0.0

Tj = -40 °C

Tj = +25 °C

Tj = +105 °C

4

3

2

1

0

500

1000

1500

2000

-40

0

40

80

120

Output Current: I_OUT[mA]

Junction Temperature: Tj [°C]

Figure 7.

Figure 8.

Output Voltage vs Output Current

(Over Current Protection)

Shutdown Current vs Junction Temperature

(V_EN= 0 V)

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Typical Performance Curves - continued

Unless otherwise specified, V_IN= 13.5 V, V_OUTsetting = 5 V, V_EN= 5 V, R₁= 120 kΩ, R₂= 803 kΩ

1000

800

600

400

200

0

6

5

4

3

2

1

0

Tj = -40 °C

Tj = +25 °C

Tj = +105 °C

0

100

200

300

400

500

100

120

140

160

180

200

Output Current: I_OUT[mA]

Junction Temperature: Tj [°C]

Figure 9.

Dropout Voltage vs Output Current

(V_IN= 4.75 V)

Figure 10.

Output Voltage vs Junction Temperature

(Thermal Shutdown Protection)

7

6

5

4

3

2

1

0

2

Tj = -40 °C

Tj = +25 °C

Tj = +105 °C

V_ENH

V_ENL

1.8

1.6

1.4

1.2

1

1.0

1.2

1.4

1.6

1.8

2.0

-40

0

40

80

120

EN Input Voltage: V_EN[V]

Junction Temperature: Tj [°C]

Figure 11.

Figure 12.

Output Voltage vs EN Input Voltage

EN Input Voltage vs Junction Temperature

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Typical Performance Curves - continued

Unless otherwise specified, V_IN= 13.5 V, V_OUTsetting = 5 V, V_EN= 5 V, R₁= 120 kΩ, R₂= 803 kΩ

4.0

3.6

3.2

2.8

2.4

2.0

90

80

70

60

50

40

30

20

10

0

Tj = -40 °C

Tj = +25 °C

Tj = +105 °C

-40

0

40

80

120

0.01

0.1

1

10

100

Junction Temperature: Tj [°C]

Frequency: f [kHz]

Figure 13.

Figure 14. Ripple Rejection

(ein = 1 Vrms, I_OUT= 100 mA)

Enable Bias Current vs Junction Temperature

0.4

0.3

0.2

0.1

0.0

0.4

0.3

0.2

0.1

0.0

-40

0

40

80

120

-40

0

40

80

120

Junction Temperature: Tj [°C]

Figure 16. Load Regulation

(I_OUT= 0.5 mA → 400 mA)

Figure 15. Line Regulation

(V_IN= 6 V → 42 V)

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Typical Performance Curves - continued

Unless otherwise specified, V_IN= 13.5 V, V_OUTsetting = 5 V, V_EN= 5 V, R₁= 120 kΩ, R₂= 803 kΩ, Tj = +25 °C

10.0

7.5

5.0

2.5

0.0

10.0

7.5

5.0

2.5

0.0

C_OUT= 2.2 μF

C_OUT= 10 μF

C_OUT= 2.2 μF

C_OUT= 10 μF

1

10

100

1000

1

10

100

1000

Input Voltage Rise Time [μs]

(b. V_IN= 0 V → 16 V, C_ADJ= 220 pF)

(a. V_IN= 0 V → 16 V, C_ADJ= None)

Figure 17. Line Transient Response

(V_IN= 0 V → 16 V)

10.0

7.5

5.0

2.5

0.0

10.0

C_OUT= 2.2 μF

C_OUT= 10 μF

C_OUT= 2.2 μF

C_OUT= 10 μF

7.5

5.0

2.5

0.0

1

10

100

1000

1

10

100

1000

Input Voltage Rise Time [μs]

(c. V_IN= 6 V → 16 V, C_ADJ= None)

(d. V_IN= 6 V → 16 V, C_ADJ= 220 pF)

Figure 18. Line Transient Response

(V_IN= 6 V → 16 V)

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Typical Performance Curves - continued

Unless otherwise specified, V_IN= 13.5 V, V_OUTsetting = 5 V, V_EN= 5 V, R₁= 120 kΩ, R₂= 803 kΩ, Tj = +25 °C

0

-5

0

-5

-10

-15

-10

-15

C_OUT= 2.2 μF

C_OUT= 10 μF

C_OUT= 2.2 μF

C_OUT= 10 μF

1

10

100

1000

1

10

100

1000

Output Current Rise Time [μs]

(e. I_OUT= 1 mA → 500 mA, C_ADJ= None)

(f. I_OUT= 1 mA → 500 mA, C_ADJ= 220 pF)

15

10

5

15

10

5

C_OUT= 2.2 μF

C_OUT= 10 μF

C_OUT= 2.2 μF

C_OUT= 10 μF

0

1

10

Output Current Fall Time [μs]

(h. I_OUT= 500 mA → 1 mA, C_ADJ= 220 pF)

100

1000

1

10

Output Current Fall Time [μs]

(g. I_OUT= 500 mA → 1 mA, C_ADJ= None)

100

1000

Figure 19. Load Transient Response

(I_OUT= 1 mA ↔ 500 mA)

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Typical Performance Curves - continued

Unless otherwise specified, V_IN= 13.5 V, V_OUTsetting = 5 V, V_EN= 5 V, R₁= 120 kΩ, R₂= 803 kΩ, Tj = +25 °C

0

-5

0

-5

-10

-15

-10

-15

C_OUT= 2.2 μF

C_OUT= 10 μF

C_OUT= 2.2 μF

C_OUT= 10 μF

1

10

100

1000

1

10

100

1000

Output Current Rise Time [μs]

(i. I_OUT= 10 mA → 500 mA, C_ADJ= None)

(j. I_OUT= 10 mA → 500 mA, C_ADJ= 220 pF)

15

10

5

15

10

5

C_OUT= 2.2 μF

C_OUT= 10 μF

C_OUT= 2.2 μF

C_OUT= 10 μF

0

1

10

Output Current Fall Time [μs]

(l. I_OUT= 500 mA → 10 mA, C_ADJ= 220 pF)

100

1000

1

10

100

1000

Output Current Fall Time [μs]

(k. I_OUT= 500 mA → 10 mA, C_ADJ= None)

Figure 20. Load Transient Response

(I_OUT= 10 mA ↔ 500 mA)

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Typical Performance Curves - continued

Unless otherwise specified, V_IN= 13.5 V, V_OUTsetting = 5 V, V_EN= 5 V, R₁= 120 kΩ, R₂= 803 kΩ, I_OUT= 0 mA, Tj = +25 °C

V_EN= 2 V/div

V_OUT= 2 V/div

Time = 10 ms/div

Time = 40 µs/div

(a. V_EN= 0 V → 5 V, C_OUT= 2.2 µF)

(b. V_EN= 5 V → 0 V, C_OUT= 2.2 µF)

V_EN= 2 V/div

V_OUT= 2 V/div

(c. V_EN= 0 V → 5 V, C_OUT=10 µF)

Time = 20 ms/div

(d. V_EN= 5 V → 0 V, C_OUT= 10 µF)

Time = 40 µs/div

V_OUT= 2 V/div

Figure 21. EN ON/OFF Sequence

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Typical Performance Curves - continued

Unless otherwise specified, V_IN= 13.5 V, V_OUTsetting = 5 V, V_EN= 5 V, R₁= 120 kΩ, R₂= 803 kΩ, I_OUT= 0 mA, Tj = +25 °C

V_IN= 5 V/div

V_OUT= 2 V/div

Time = 20 ms/div

Time = 40 µs/div

(e. V_IN= 0 V → 13.5 V, C_OUT= 2.2 µF)

(f. V_IN= 13.5 V → 0 V, C_OUT= 2.2 µF)

V_IN= 5 V/div

V_OUT= 2 V/div

Time = 20 ms/div

Time = 40 µs/div

(g. V_IN= 0 V → 13.5 V, C_OUT= 10 µF)

(h. V_IN= 13.5 V → 0 V, C_OUT= 10 µF)

Figure 22. V_INON/OFF Sequence

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Measurement Circuit for Typical Performance Curves

C_ADJ

VIN

EN

VOUT

ADJ

VIN

EN

VOUT

ADJ

803kΩ

120kΩ

803kΩ

120kΩ

0.1µF

GND

2.2µF

0.1µF

GND

2.2µF

Measurement Setup for

Figure 4, 5, 8, 22

Measurement Setup for

Figure 1, 2, 3, 10, 15, 17, 18

VIN

EN

VOUT

ADJ

VIN

EN

VOUT

ADJ

803kΩ

120kΩ

803kΩ

120kΩ

0.1µF

GND

2.2µF

0.1µF

GND

2.2µF

I_OUT

Measurement Setup for

Figure 6

Measurement Setup for

Figure 7

VIN

EN

VOUT

ADJ

VIN

EN

VOUT

ADJ

803kΩ

120kΩ

803kΩ

120kΩ

0.1µF

GND

2.2µF

GND

2.2µF

0.1µF

I_OUT

Measurement Setup for

Figure 11, 12, 13, 21

Measurement Setup for

Figure 9

C_ADJ

VIN

EN

VOUT

ADJ

VIN

EN

VOUT

ADJ

803kΩ

120kΩ

803kΩ

120kΩ

ein

GND

2.2µF

0.1µF

I_OUT

0.1µF

GND

2.2µF

I_OUT

Measurement Setup for

Figure 14

Measurement Setup for

Figure 16, 19, 20

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Application and Implementation

Notice: The following information is given as a reference or hint for the application and the implementation. Therefore, it does

not guarantee its operation on the specific function, accuracy or external components in the application. In the

application, it shall be designed with sufficient margin by enough understanding about characteristics of the external

components, e.g. capacitor, and also by appropriate verification in the actual operating conditions.

Selection of External Components

Input Pin Capacitor

If the battery is placed far from the regulator or the impedance of the input-side is high, higher capacitance is required for

the input capacitor in order to prevent the voltage-drop at the input line. The input capacitor and its capacitance should be

selected depending on the line impedance which is between the input pin and the smoothing filter circuit of the power

supply. At this time, the capacitance value setting is different each application. Generally, the capacitor with capacitance

value of 0.1 µF (Min) with good high frequency characteristic is recommended for this regulator.

In addition, the consideration should be taken as the output pin capacitor, to prevent an influence to the regulator’s

characteristic from the deviation or the variation of the external capacitor’s characteristic. All output capacitors mentioned

above are recommended to have a good DC bias characteristic and a temperature characteristic (approximately ±15 %,

e.g. X7R, X8R) with being satisfied high absolute maximum voltage rating based on EIA standard. These capacitors should

be placed close to the input pin and mounted on the same board side of the regulator not to be influenced by implement

impedance.

Output Pin Capacitor

The output capacitor is mandatory for the regulator in order to realize stable operation. The output capacitor with

capacitance value ≥ 1.47 µF (Min) and ESR up to 5 Ω (Max) must be required between the output pin and the GND pin.

A proper selection of appropriate both the capacitance value and ESR for the output capacitor can improve the transient

behavior of the regulator and can also keep the stability with better regulation loop. The correlation of the output capacitance

value and ESR is shown in the graph on the next page as the output capacitor’s capacitance value and the stability region

for ESR. As described in this graph, this regulator is designed to be stable with ceramic capacitors as of MLCC, with the

capacitance value from 1.47 µF to 1000 µF and with ESR value within almost 0 Ω to 5 Ω. The frequency range of ESR can

be generally considered as within about 10 kHz to 100 kHz.

Note that the provided the stable area of the capacitance value and ESR in the graph is obtained under a specific set of

conditions which is based on the measurement result in single IC on our board with a resistive load. In the actual

environment, the stability is affected by wire impedance on the board, input power supply impedance and also loads

impedance. Therefore, please note that a careful evaluation of the actual application, the actual usage environment and

the actual conditions should be done to confirm the actual stability of the system.

Generally, in the transient event which is caused by the input voltage fluctuation or the load fluctuation beyond the gain

bandwidth of the regulation loop, the transient response ability of the regulator depends on the capacitance value of the

output capacitor. Basically the capacitance value of ≥ 1.47 µF (Min) for the output capacitor is recommended as shown in

the table on Output Capacitance C_OUT, ESR Available Area. Using bigger capacitance value can be expected to improve

better the transient response ability in a high frequency. Various types of capacitors can be used for the output capacitor

with high capacity which includes electrolytic capacitor, electro-conductive polymer capacitor and tantalum capacitor. Noted

that, depending on the type of capacitors, its characteristics such as ESR (≤ 5 Ω) absolute value range, a temperature

dependency of capacitance value and increased ESR at cold temperature needs to be taken into consideration.

In addition, the same consideration should be taken as the input pin capacitor, to prevent an influence to the regulator’s

characteristic from the deviation or the variation of the external capacitor’s characteristic. All output capacitors mentioned

above are recommended to have a good DC bias characteristic and a temperature characteristic (approximately ±15 %,

e.g. X7R, X8R) with being satisfied high absolute maximum voltage rating based on EIA standard. These capacitors should

be placed close to the output pin and mounted on the same board side of the regulator not to be influenced by implement

impedance.

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Application and Implementation - continued

6

Unstable Available Area

5

4

3

2

1

0

Stable Available Area

1.47 μF ≤ C_OUT≤ 1000 μF

ESR(C_OUT) ≤ 5 Ω

0.1

1

10

100

1000

Output Capacitance C_OUT[μF]

Figure 23. Output Capacitance C_OUT, ESR Stable Available Area

(-40 °C ≤ Tj ≤ +105 °C, 6 V ≤ V_IN≤ 42 V, V_EN= 5 V, I_OUT= 0 mA to 500 mA)

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Application and Implementation – continued

Typical Application and Layout Example

Power Ground

FIN

2: EN

1: VIN

4: ADJ

3: N.C. 5: VOUT

C_IN

C_OUT

Input

Voltage

Output

Voltage

R₂

C_ADJ

R₁

Enable

Voltage

Parameter

Symbol

Reference Value for Application

Output Current Range

Output Voltage Range

Feedback Resistor between the ADJ and GND pins

I_OUT

V_OUT

R₁

I_OUT≤ 500 mA

1.2 V to 16 V

120 kΩ

Calc. (a) R₂= R₁× (V_OUT/ V_ADJ- 1) = 803 kΩ

5 V setting

Feedback Resistor between the ADJ and VOUT pins

R₂

ADJ Capacitor ^{(Note 1)}

Output Capacitor

C_ADJ

C_OUT

V_IN

Calc. (b) C_ADJ= 1 / (2π × R₂×f_ZERO) = 220 pF

4.7 μF

Input Voltage ^{(Note 2)}

Input Capacitor ^{(Note 3)}

Enable Mode Voltage

Disable Mode Voltage

13.5 V

C_IN

0.1 µF

V_ENH

V_ENL

2 V to V_IN

0 V to 0.8 V

(Note 1) For example, the C_ADJ’s value is defined at 220 pF based on the calculation (b) of the above table, if it is required to improve frequency characteristics

of regulator at around f_ZERO≒ 1 kHz with the component of R₂≒ 820 kΩ.

(Note 2) Minimum input voltage must be 3.3 V or more. For the output voltage, please consider the voltage dropping (the minimum dropout voltage) according to

the output current.

(Note 3) If the inductance of power supply line is high, please adjust input capacitor value.

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Application and Implementation - continued

Surge Voltage Protection for Linear Regulators

The following shows some helpful tips to protect ICs from possible inputting surge voltage which exceeds absolute

maximum ratings.

Positive Surge to the Input

If there is any potential risk that positive surges higher than absolute maximum ratings, it is applied to the input, a

Zener Diode should be inserted between the VIN pin and the GND to protect the device as shown in Figure 24.

VIN

VOUT

GND

V_IN

V_OUT

C_OUT

D₁

C_IN

Figure 24. Surges Higher than absolute maximum ratings is Applied to the Input

Negative Surge to the Input

If there is any potential risk that negative surges below the absolute maximum ratings, (e.g.) -0.3 V, is applied to the

input, a Schottky Diode should be inserted between the VIN and the GND to protect the device as shown in Figure

25.

VIN

VOUT

GND

V_IN

V_OUT

C_OUT

D₁

C_IN

Figure 25. Surges Lower than -0.3 V is Applied to the Input

Reverse Voltage Protection for Linear Regulators

A linear regulator which is one of the integrated circuit (IC) operates normally in the condition that the input voltage is

higher than the output voltage. However, it is possible to happen the abnormal situation in specific conditions which is

the output voltage becomes higher than the input voltage. A reverse polarity connection between the input and the output

might be occurred or a certain inductor component can also cause a polarity reverse conditions. If the countermeasure

is not implemented, it may cause damage to the IC. The following shows some helpful tips to protect ICs from the reverse

voltage occasion.

Protection against Reverse Input/Output Voltage

In the case that MOSFET is used for the pass transistor, a parasitic body diode between the drain-source generally

exists. If the output voltage becomes higher than the input voltage and if its voltage difference exceeds V_Fof the body

diode, a reverse current flows from the output to the input through the body diode as shown in Figure 26. The current

flows in the parasitic body diode is not limited in the protection circuit because it is the parasitic element, therefore

too much reverse current may cause damage to degrade or destroy the semiconductor elements of the regulator.

I_R

V_OUT

V_IN

Error

AMP.

V_REF

Figure 26. Reverse Current Path in a MOS Linear Regulator

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Protection against Reverse Input/Output Voltage – continued

An effective solution for this problem is to implement an external bypass diode in order to prevent the reverse current

flow inside the IC as shown in Figure 27. Note that the bypass diode must be turned on prior to the internal body

diode of the IC. This external bypass diode should be chosen as being lower forward voltage V_Fthan the internal

body diode. It should to be selected a diode which has a rated reverse voltage greater than the IC’s input maximum

voltage and also which has a rated forward current greater than the anticipated reverse current in the actual

application.

D₁

VIN

VOUT

GND

V_IN

V_OUT

C_OUT

C_IN

Figure 27. Bypass Diode for Reverse Current Diversion

A Schottky barrier diode which has a characteristic of low forward voltage (V_F) can meet to the requirement for the

external diode to protect the IC from the reverse current. However, it also has a characteristic that the leakage (I_R)

caused by the reverse voltage is bigger than other diodes. Therefore, it should be taken into the consideration to

choose it because if I_Ris large, it may cause increase of the current consumption, or raise of the output voltage in the

light-load current condition. I_Rcharacteristic of Schottky diode has positive temperature characteristic, which the

details shall be checked with the datasheet of the products, and the careful confirmation of behavior in the actual

application is mandatory.

Even in the condition when the input/output voltage is inverted, if the VIN pin is open as shown in Figure 28, or if the

VIN pin becomes high-impedance condition as designed in the system, it cannot damage or degrade the parasitic

element. It's because a reverse current via the pass transistor becomes extremely low. In this case, therefore, the

protection external diode is not necessary.

ON→OFF

IBIAS

VIN

VOUT

GND

V_OUT

C_OUT

V_IN

CIN

Figure 28. Open VIN

Protection against Input Reverse Voltage

When the input of the IC is connected to the power supply, accidentally if plus and minus are routed in reverse, or if

there is a possibility that the input may become lower than the GND pin, it may cause to destroy the IC because a

large current passes via the internal electrostatic breakdown prevention diode between the input pin and the GND

pin inside the IC as shown in Figure 29.

The simplest solution to avoid this problem is to connect a Schottky barrier diode or a rectifier diode in series to the

power supply line as shown in Figure 30. However, it increases a power loss calculated as V_F× I_CC, and it also causes

the voltage drop by a forward voltage V_Fat the supply voltage while normal operation.

Generally, since the Schottky barrier diode has lower V_F, so it contributes to rather smaller power loss than rectifier

diodes. If IC has load currents, the required input current to the IC is also bigger. In this case, this external diode

generates heat more, therefore select a diode with enough margin in power dissipation. On the other hand, a reverse

current passes this diode in the reverse connection condition, however, it is negligible because its small amount.

VIN

V_OUT

C_OUT

GND

VIN

VOUT

D1

VIN

VOUT

GND

V_OUT

C_OUT

VIN

-

GND

CIN

+

GND

Figure 30. Protection against Reverse Polarity 1

Figure 29. Current Path in Reverse Input Connection

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Protection against Input Reverse Voltage - continued

Figure 31 shows a circuit in which a P-channel MOSFET is connected in series to the power. The body diode (parasitic

element) is located in the drain-source junction area of the MOSFET. The drop voltage in a forward connection is

calculated from the on state resistance of the MOSFET and the output current I_O. It is smaller than the drop voltage

by the diode as shown in Figure 30 and results in less of a power loss. No current flows in a reverse connection where

the MOSFET remains off in Figure 31.

If the gate-source voltage exceeds maximum rating of MOSFET gate-source junction with derating curve in

consideration, reduce the gate-source junction voltage by connecting resistor voltage divider as shown in Figure 32.

Q1

VIN

Q1

V_OUT

VIN

VOUT

GND

VIN

VOUT

GND

VIN

V_OUT

C_OUT

R1

R2

CIN

C_OUT

CIN

Figure 31. Protection against Reverse Polarity 2

Figure 32. Protection against Reverse Polarity 3

Protection against Reverse Output Voltage when Output Connect to an Inductor

If the output load is inductive, electrical energy accumulated in the inductive load is released to the ground at the

moment that the output voltage is turned off. IC integrates ESD protection diodes between the IC output and ground

pins. A large current may flow in such condition finally resulting on destruction of the IC. To prevent this situation,

connect a Schottky barrier diode in parallel to the integrated diodes as shown in Figure 33.

Further, if a long wire is in use for the connection between the output pin of the IC and the load, confirm that the

negative voltage is not generated at the VOUT pin when the output voltage is turned off by observation of the

waveform on an oscilloscope, since it is possible that the load becomes inductive. An additional diode is required for

a motor load that is affected by its counter electromotive force, as it produces an electrical current in a similar way.

VOUT

VIN

VOUT

GND

D1

CIN

XLL

COUT

GND

Figure 33. Current Path in Inductive Load (Output: Off)

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Power Dissipation

TO252-5

10.0

8.0

6.0

4.0

2.0

0.0

(1) : 1-layer PCB

(Copper foil area on the reverse side of PCB: 0 mm × 0 mm)

Board material: FR-4

Board size: 114.3 mm × 76.2 mm × 1.57 mmt

Top copper foil: Footprint and Trace, 70 μm copper.

(2) : 4-layer PCB

(Copper foil area on the reverse side of PCB: 74.2 mm × 74.2 mm)

Board material: FR-4

Board size: 114.3 mm × 76.2 mm × 1.6 mmt

Top copper foil: Footprint and Traces, 70 μm copper.

2 inner layers copper foil area of PCB:

74.2 mm × 74.2 mm, 35 μm copper.

Bottom copper foil area of PCB:

(2) 5.43 W

(1) 0.91 W

74.2 mm × 74.2 mm, 70 μm copper.

Condition (1) : θ_JA= 136 °C/W, Ψ_JT(top center) = 17 °C/W

Condition (2) : θ_JA= 23 °C/W, Ψ_JT(top center) = 3 °C/W

0

25

50

75

100

125

150

Ambient Temperature Ta [°C]

Figure 34. Power Dissipation Graph (TO252-5)

HRP5

10.0

8.0

6.0

4.0

2.0

0.0

(1) : 1-layer PCB

(Copper foil area on the reverse side of PCB: 0 mm × 0 mm)

Board material: FR-4

Board size: 114.3 mm × 76.2 mm × 1.57 mmt

Top copper foil: Footprint and Trace, 70 μm copper.

(2) 5.84 W

(2) : 4-layer PCB

(Copper foil area on the reverse side of PCB: 74.2 mm × 74.2 mm)

Board material: FR-4

Board size: 114.3 mm × 76.2 mm × 1.6 mmt

Top copper foil: Footprint and Traces, 70 μm copper.

2 inner layers copper foil area of PCB:

74.2 mm × 74.2 mm, 35 μm copper.

Bottom copper foil area of PCB:

(1) 1.36 W

74.2 mm × 74.2 mm, 70 μm copper.

Condition (1) : θ_JA= 91.3 °C/W, Ψ_JT(top center) = 8 °C/W

Condition (2) : θ_JA= 21.4 °C/W, Ψ_JT(top center) = 3 °C/W

0

25

50

75

100

125

150

Ambient Temperature: Ta [°C]

Figure 35. Power Dissipation Graph (HRP5)

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Power Dissipation - continued

TO263-5

(1) : 1-layer PCB

(Copper foil area on the reverse side of PCB: 0 mm × 0 mm)

Board material: FR-4

Board size: 114.3 mm × 76.2 mm × 1.57 mmt

Top copper foil: Footprint and Trace, 70 μm copper.

10.0

8.0

6.0

4.0

2.0

0.0

(2) : 4-layer PCB

(Copper foil area on the reverse side of PCB: 74.2 mm × 74.2 mm)

Board material: FR-4

Board size: 114.3 mm × 76.2 mm × 1.6 mmt

Top copper foil: Footprint and Traces, 70 μm copper.

2 inner layers copper foil area of PCB:

74.2 mm × 74.2 mm, 35 μm copper.

Bottom copper foil area of PCB:

(2) 5.73 W

(1) 1.55 W

74.2 mm × 74.2 mm, 70 μm copper.

Condition (1) : θ_JA= 80.2 °C/W, Ψ_JT(top center) = 10 °C/W

Condition (2) : θ_JA= 21.8 °C/W, Ψ_JT(top center) = 2 °C/W

0

25

50

75

100

125

150

Ambient Temperature: Ta [°C]

Figure 36. Power Dissipation Graph (TO263-5)

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Thermal Design

This product exposes a frame on the back side of the package for thermal efficiency improvement. The power consumption

of the IC is decided by the dropout voltage condition, the load current and the current consumption. Refer to power dissipation

curves illustrated in Figure 34 and Figure 36 when using the IC in an environment of Ta ≥ 25 °C. Even if the ambient

temperature Ta is at 25°C, chip junction temperature (Tj) can be very high depending on the input voltage and the load current.

Consider the design to be Tj ≤ Tjmax = 150 °C in whole operating temperature range.

Should by any condition the maximum junction temperature Tjmax = 150 °C rating be exceeded by the temperature increase

of the chip, it may result in deterioration of the properties of the chip. The thermal impedance in this specification is based on

recommended PCB and measurement condition by JEDEC standard. Therefore, need to be careful because it might be

different from the actual use condition. Verify the application and allow sufficient margins in the thermal design by the following

method to calculate the junction temperature Tj. Tj can be calculated by either of the two following methods.

1. The following method is used to calculate the junction temperature Tj with ambient temperature Ta.

ꢁ푗 = ꢁ푎 + 푃_퐶× 휃_퐽퐴[°C]

Where:

Tj

is the Junction Temperature

Ta is the Ambient Temperature

is the Power Consumption

P_C

θ_JAis the Thermal Resistance (Junction to Ambient)

2. The following method is also used to calculate the junction temperature Tj with top center of case’s (mold) temperature T_T.

ꢁ푗 = ꢁ_푇+ 푃_퐶× 훹 [°C]

퐽푇

Where:

Tj

T_T

P_C

is the Junction Temperature

is the Top Center of Case’s (mold) Temperature

is the Power consumption

Ψ_JTis the Thermal Resistance (Junction to Top Center of Case)

3. The following method is used to calculate the power consumption Pc (W).

푃푐 = ꢂ푉 − 푉_푂푈푇ꢃ × ꢄ_푂푈푇+ 푉 × ꢄ_퐶퐶[W]

퐼푁

Where:

P_C

is the Power Consumption

V_INis the Input Voltage

V_OUTis the Output Voltage

I_OUTis the Load Current

I_CCis the Current Consumption

Calculation Example (TO263-5)

If V_IN= 13.5 V, V_OUT= 5.0 V, I_OUT= 200 mA, I_CC= 17 μA, the power consumption Pc can be calculated as follows:

푃_퐶= ꢂ푉 − 푉_푂푈푇ꢃ × ꢄ_푂푈푇+ 푉 × ꢄ_퐶퐶

퐼푁

ꢂ

ꢃ

=

ꢀ3.5 푉 – 5.0 푉 × ꢅ00 푚ꢆ + ꢀ3.5 푉 × ꢀ7 휇ꢆ

= ꢀ.7 푊

At the maximum ambient temperature Tamax = 65 °C,

the thermal impedance (Junction to Ambient) θ_JA= 21.8 °C/W (4-layer PCB)

ꢁ푗 = ꢁ푎푚푎푥 + 푃_퐶× 휃_퐽퐴

= 65 °ꢇ + ꢀ.7 푊 × ꢅꢀ.8 °ꢇ/푊

= ꢀ0ꢅ.ꢀ °ꢇ

When operating the IC, the top center of case’s (mold) temperature T_T= 80 °C, Ψ_JT= 10 °C/W (1-layer PCB)

ꢁ푗 = ꢁ_푇+ 푃_퐶× 훹

퐽푇

= 80 °ꢇ + ꢀ.7 푊 × ꢀ0 °ꢇ/푊

= 97.0 °ꢇ

If it is difficult to ensure the margin by the calculations above, it is recommended to expand the copper foil area of the

board, increasing the layer and thermal via between thermal land pad for optimum thermal performance.

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I/O Equivalence Circuits^{(Note 1)}

VIN Pin

EN Pin

EN

VIN

1 kΩ

800 kΩ

1300 kΩ

2600 kΩ

1300 kΩ

Internal

Circuit

ADJ Pin

VOUT Pin

VIN

10 kΩ

ADJ

4 kΩ

VOUT

PREREG

4 kΩ

10 MΩ

(Note 1) Resistance value is Typical.

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Operational Notes

1.

2.

Reverse Connection of Power Supply

Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when

connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply

pins.

Power Supply Lines

Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at

all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic

capacitors.

3.

4.

Ground Voltage

Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.

Ground Wiring Pattern

When using both small-signal and large-current ground traces, the two ground traces should be routed separately but

connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal

ground caused by large currents. Also ensure that the ground traces of external components do not cause variations

on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.

5.

6.

Recommended Operating Conditions

The function and operation of the IC are guaranteed within the range specified by the recommended operating

conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical

characteristics.

Inrush Current

When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow

instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.

Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing

of connections.

7.

Thermal Consideration

The power dissipation under actual operating conditions should be taken into consideration and a sufficient margin

should be allowed in the thermal design. On the reverse side of the package this product has an exposed heat pad for

improving the heat dissipation. The amount of heat generation depends on the voltage difference between the input

and output, load current, and bias current. Therefore, when actually using the chip, ensure that the generated heat

does not exceed the Pd rating. If Junction temperature is over Tjmax (=150 °C), IC characteristics may be worse due

to rising chip temperature. Heat resistance in specification is measurement under PCB condition and environment

recommended in JEDEC. Ensure that heat resistance in specification is different from actual environment.

8.

9.

Testing on Application Boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject

the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should

always be turned off completely before connecting or removing it from the test setup during the inspection process. To

prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and

storage.

Inter-pin Short and Mounting Errors

Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in

damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.

Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and

unintentional solder bridge deposited in between pins during assembly to name a few.

10. Unused Input Pins

Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and

extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge

acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause

unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power

supply or ground line.

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Operational Notes – continued

11. Regarding the Input Pin of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them

isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a

parasitic diode or transistor. For example (refer to figure below):

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to

operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be

avoided.

Resistor

Transistor (NPN)

Pin A

Pin B

B

E

C

Pin A

B

C

E

P

P⁺

N

P⁺

P

P⁺

N

Parasitic

Elements

Parasitic

Elements

P Substrate

GND GND

P Substrate

GND

Parasitic

Elements

Parasitic

Elements

N Region

close-by

12. Ceramic Capacitor

When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with

temperature and the decrease in nominal capacitance due to DC bias and others.

13. Thermal Shutdown Protection Circuit(TSD)

This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always

be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the

junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF power output pins. When the Tj

falls below the TSD threshold, the circuits are automatically restored to normal operation.

Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no

circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat

damage.

14. Over Current Protection Circuit (OCP)

This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This

protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should

not be used in applications characterized by continuous operation or transitioning of the protection circuit.

15. Enable Pin

The EN pin is for controlling ON/OFF the output voltage. Do not make voltage level of chip enable keep floating level,

or between V_ENHand V_ENL. Otherwise, the output voltage would be unstable or indefinite.

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Ordering Information

B

D

0

E

A

5

W

x

-

x

Output Voltage Withstand Output Current Enable Input

Package

Packaging and Forming Specification

00: Adjustable

Voltage

E: 45 V

A5: 500 mA

W: Includes

Enable

FP: TO252-5 TR: Embossed Tape and Reel

HFP: HRP5 (HRP5)

Input

FP2: TO263-5 E2: Embossed Tape and Reel

(TO252-5, TO263-5)

Marking Diagrams

TO252-5

(TOP VIEW)

Part Number Marking

D00EA5W

LOT Number

HRP5 (TOP VIEW)

Part Number Marking

LOT Number

B D 0 0 E A 5 W

Pin 1 Mark

TO263-5

(TOP VIEW)

Part Number Marking

LOT Number

B D 0 0 E A 5 W

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Physical Dimension and Packing Information

Package Name

TO252-5

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Physical Dimension and Packing Information – continued

Package Name

HRP5

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Physical Dimension and Packing Information – continued

Package Name

TO263-5

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Revision History

Date

Revision

001

Changes

22.Apr.2019

27.May.2019

New Release

Error is corrected of the Ordering Information.

Original TO252-3 → Corrected TO252-5

002

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Notice

Precaution on using ROHM Products

1. Our Products are designed and manufactured for application in ordinary electronic equipment (such as AV equipment,

OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you

intend to use our Products in devices requiring extremely high reliability (such as medical equipment ^{(Note 1)}, transport

equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car

accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or

serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.

Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any

damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific

Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN

USA

EU

CHINA

CLASSⅢ

CLASSⅣ

CLASSⅡb

CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are designed and manufactured for use under standard conditions and not under any special or

extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any

special or extraordinary environments or conditions. If you intend to use our Products under any special or

extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of

product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.

However, recommend sufficiently about the residue.) ; or Washing our Products by using water or water-soluble

cleaning agents for cleaning residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in

the range that does not exceed the maximum junction temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must

be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,

please consult with the ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice-PGA-E

Rev.004

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl₂, H₂S, NH₃, SO₂, and NO₂

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign

trade act, please consult with ROHM in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data.

2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the

Products with other articles such as components, circuits, systems or external equipment (including software).

3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM

will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to

manufacture or sell products containing the Products, subject to the terms and conditions herein.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice-PGA-E

Rev.004


型号：	BD00EA5WFP2
厂家：	ROHM
描述：	BD00EA5Wxxx系列是低消耗电流线性稳压器。该IC具有45V耐压，500mA输出电流，17μA消耗电流（典型值）。输出电压精度BD00EA5WFP和BD00EA5WFP为±1％，BD00EA5WFP2为±1.5％（不包括反馈电阻精度）。通过在ADJ引脚上增加一个电阻，可以将输出电压设置为1.2V至16V。有一个输出关闭功能，当EN引脚施加High电压时，IC输出开启，施加LOW电压时输出关闭。该IC具有过流保护功能，可防止因输出短路等导致的IC损坏，以及过热保护电路，可防止IC因过载等原因造成热损坏等。输出相位补偿电容可使用低ESR陶瓷电容器。电容器陶瓷电容器稳压器
文件：	总39页 (文件大小：2872K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BD00EA5WFP2 [ROHM]

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