BD18362EFV-M_技术文档

Datasheet

Matrix LED Driver

Automotive Dynamic Indicator Lamps

8ch Matrix LED Controller

BD18362EFV-M

General Description

Key Specifications

BD18362EFV-M is an 8-channel matrix LED controller

with an internal FET switch. Switching the FET on and off

allows a control of the sequential lighting.

An internal charge pump serves as a power supply for

the gate driver. Since sequential lighting pattern is built in,

the microcontroller is unnecessary.



Input Voltage Range:

Maximum Total LED’s Voltage:

Maximum SW Bypass Current

Internal FET Switch ON Resistance: 230mΩ(Typ)

Operating Temperature Range:

5.5V to 60V

48V(Max)

1.0A(Max)

-40°C to +125°C

Features

Package

HTSSOP-B28

W(Typ) x D(Typ) x H(Max)

9.70mm x 6.40mm x 1.00mm



AEC-Q100 Qualified^{(Note 1)}

8-channel Matrix Switch

Up to 2LED’s per Switch Control

Built in Sequential Lighting pattern

Sequential Lighting Phase Time Setting

Sequential Lighting Start-up Delay Time Setting

All-light-up (Hazard Mode)

LED Open Protection

LED Short Detection

Thermal shutdown

(Note 1) Grade1

Applications

Automotive Exterior Lamps

(Dynamic Indicator)



HTSSOP-B28

Typical Application Circuit

ILED

CFP

CFM

CFP

VCC

CNT

VCC

CNT

C

CF

C

CF

CP

C

VCC1

C

VCC2

C

VCC1

CVCC2

CFM

CP

HAZ

R

HAZ

RHAZ

CP

VREG

C

VREG

CP

CVREG

CH8

CH7

LED7b

LED7a

SETDLY

SETCLK

SET

SETDLY

SETCLK

SET

CH8

CH7

CH6

CH5

CH4

CH3

CH2

CH1

CH0

LED6b

LED6a

LED7

C

SETDLY

CSETDLY

CH6

CH5

CH4

CH3

CH2

CH1

CH0

C

SETCLK

LED6

LED5

LED4

LED3

LED2

LED1

LED0

CSETCLK

LED5b

LED5a

R

SET

RSET

LED4b

LED4a

SEL1

SEL2

SEL3

SEL1

SEL2

SEL3

LED3b

LED3a

LED2b

LED2a

R

CMPLT

FLAG

SG

RCMPLT

LED1b

LED1a

CMPLT

R

RFLAG

FLAG

SG

FLAG

SG

LED0b

LED0a

R

RSG

GND

〇Product structure: Silicon monolithic integrated circuit 〇This product has no designed protection against radioactive rays

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BD18362EFV-M

Pin Configuration

HTSSOP-B28

(TOP VIEW)

1

2

28

27

26

25

24

23

22

21

20

19

18

17

16

15

VCC

CNT

CFM

CFP

CP

3

HAZ

4

TEST

VREG

SEL1

SEL2

CH8

CH7

CH6

CH5

CH4

CH3

CH2

CH1

CH0

TEST

GND

5

6

7

8

SEL3

9

SETCLK

SETDLY

SET

10

11

12

13

14

CMPLT

SG

Thermal PAD

FLAG

Pin Description

No.

Symbol

No.

Function

Input power supply

Symbol

Function

1

2

3

4

5

6

7

8

9

VCC

CNT

15

16

17

18

19

20

21

22

23

GND

TEST

CH0

CH1

CH2

CH3

CH4

CH5

CH6

GND

Control input

TEST input ^{(Note 1)}

HAZ

Hazard mode switching input

TEST input ^{(Note 1)}

LED0 cathode connection

TEST

VREG

SEL1

SEL2

SEL3

LED0 anode & LED1 cathode connection

LED1 anode & LED2 cathode connection

LED2 anode & LED3 cathode connection

LED3 anode & LED4 cathode connection

LED4 anode & LED5 cathode connection

LED5 anode & LED6 cathode connection

Internal reference voltage output

Setting of the switch in use 1

Setting of the switch in use 2

Setting of the switch in use 3

SETCLK Sequential lighting phase time setting

Sequential lighting start-up delay time

setting

10

11

SETDLY

24

25

CH7

CH8

LED6 anode & LED7 cathode connection

LED7 anode connection

Sequential lighting phase time/

SET

start-up delay time setting

12

13

14

CMPLT Lighting complete signal output

26

27

28

CP

Charge pump output for internal switch

Connecting capacitor for charge pump +

Connecting capacitor for charge pump -

SG

Status good output

Error flag output

CFP

CFM

FLAG

(Note 1) Connect to GND

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BD18362EFV-M

Block Diagram

VCC

VREG

CFP

CFM

CP

VREG

TSD

Internal

Regulator

TSD

Charge Pump

VREG

UVLO

CH8

CH7

VREG

VCP

UVLO

TSD

Local power

supply

VREG

SETDLY

SW7

SW6

SETDLY

Level

Shift

Internal

Oscillator

LED

Open/short det

VCP

Local power

supply

VREG

SETCLK

SET

VREG

WDTDLY

WDTCLK

Level

Shift

SETCLK

LED

Open/short det

CH6

CH2

VREG

CNT

HAZ

CNT

・

VREG

LOGIC

HAZ

VCP

Local power

supply

VREG

SEL1

SEL2

SEL3

FLAG

SW1

SW0

Level

Shift

LED

Open/short det

SEL

CH1

CH0

VCP

Local power

supply

VREG

DIAG Output

Level

Shift

FLAG

LED

Open/short det

CMPLT

SG

CMPLT

SG

TEST

GND

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BD18362EFV-M

Description of Blocks

1. Total Function

The BD18362EFV-M is a matrix LED controller able to implement a sequential lighting (Dynamic Indicator) of LEDs

without the need for a microcontroller.

An LSI meant for driving LEDs with eight switches connected in a series and is used in conjunction with an LED driver.

The switches are connected to the anodes and cathodes of the LED. When the switch is OFF, a current flow through the

LED and the LED is light. When the switch is ON, the current is bypassed and the LED is unlighted.

When the CNT pin is given a high input, the switches are turned OFF sequentially from SW0 after the sequential lighting

start-up delay time (t_DLY) and the LEDs are lighting sequentially from LED0.

The t_DLYcan be set by means of a capacitor connected to the SETDLY pin and a resistor connected to the SET pin.

The sequential lighting phase time (t_PS1), in which the switch is turned from the ON to the OFF position, can be set by

means of a capacitor connected to the SETCLK pin and a resistor connected to the SET pin.

When the CNT pin is given a low input, the LEDs are turned to the all-OFF position. However, the switches are turned ON

sequentially from SW7 (LEDs are unlighted sequentially) at a fixed time (t_PSL). This avoids sudden output voltage

fluctuations.

Additionally, the BD18362EFV-M is built in hazard mode function. When the HAZ pin is given a high input at the lighting

condition, the LEDs are turned from the all-OFF to the all-ON position. However, the switches are turned OFF sequentially

from SW0 (LEDs are light sequentially) at a fixed time (t_PSH). This avoids sudden output voltage fluctuations.

Although there are 8 switches to the BD18362EFV-M, it is also possible to use it with 7 switches or less. The number of

used switches can be set by pulling up the SEL1 pin, the SEL2 pin and the SEL3 pin to the VREG pin or by pulling down

to GND.

Also, it is possible to use two BD18362EFV-M if more than 9 switches are employed. A sequential lighting of more than 9

switches is possible by connecting the CMPLT pin and the CNT pin so the phase shift of the second BD18362EFV-M will

start after the phase shift of the first BD18362EFV-M has been completed.

The BD18362EFV-M is built in a diagnostic function for LED open and LED short on each switch. If the LED open

diagnosis detects an open during the period when the LED is light (the switch is OFF), the immediately corresponding

switch is turned ON and the current is bypassed. Additionally, the FLAG pin will have a low output in order to report the

LED open. In the same way, the LED short diagnosis detects a short during the period when the LED is light (the switch is

OFF). The FLAG pin will have a low output in order to report the LED short.

BD18362EFV-M built in an internal watchdog timer.

●Watchdog timer for sequential lighting start-up delay time

If the capacitor connected to the SETDLY pin has a short, the LED will be unlighted, since the sequential lighting start-up

delay time cannot be set. When t_WDTDLYhas passed, there is a time-out and the FLAG pin will have a low output. Also,

the LEDs are automatically all light. As in the hazard mode, the switches are turned OFF sequentially at fixed time.

●Watchdog timer for sequential lighting phase time

If the capacitor connected to the SETCLK pin has a short, the LED will be unlighted, since the phase shift time t_PS1

cannot be set. When t_WDTCLKhas passed, there is a time-out and the FLAG pin will have a low output. Also, the LEDs are

automatically all light. As in the hazard mode, the switches are turned OFF sequentially at fixed time.

The BD18362EFV-M is built in charge pump serving as a power supply for the switch gate drive. All switches and gate

drive circuits form a floating circuit and operate under the voltage generated by the charge pump circuit.

The BD18362EFV-M has high voltage switches and each of switches can connect with up to 2 LEDs in series. Achieve

the 16 LEDs solution by 8-channels with 2LEDs in each of switches.

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BD18362EFV-M

Description of Blocks – continued

2. SG [Status Good]

After the VCC is supplied, the switches may happen to be OFF until the internal circuit comes to a stable condition.

In this condition, the LED might flicker when the LED current is supplied.

The BD18362EFV-M can report by the SG pin for internal condition as ready to switch in stable. In order to prevent a

flickering, it is recommended to provide an LED current after the SG pin switches from a low to Hiz.

If the VCC pin voltage rises above the UVLO release voltage (V_UVR) and the SG delay time (t_dSG) has passed, the SG pin

will switch from a low to Hiz.

During UVLO detection or thermal shutdown detection, the SG pin will switch to a low. If the SG delay time (t_dSG) has

passed after a UVLO release and thermal shutdown release, the SG pin will switch from a low to Hiz.

(refer to Figure19 (b))

The SG pin is open drain and needed pulled up resistor for monitoring output signal.

VUVR

VCC

SETDLY

LED0

SG

LED0 OFF

LED0 ON

t_dSG

L

HiZ

SWn

ILED

ALL ON

Phase Shift

Figure 1. Timing Chart

(Status Good Function)

To avoid the LED flicker, it is recommended to connect the SG pin and the current source LED drivers control pin (e.g.

enable pin and PWM pin). Pull up the SG pin to the VREG pin (BD18362EFV-M) with resister, connect the SG pin and the

current source LED drivers control pin. Design with sufficient consideration of the threshold voltage input, inside

impedance, pull up resister value and VREG voltage value.

control pin

Current Source

LED Driver

VREG

SG

BD18362EFV-M

Figure 2. Application of Connecting with the SG Pin to the current source LED Driver

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BD18362EFV-M

Description of Blocks – continued

3. SETDLY [Sequential Lighting Start-up Delay Time Setting]

The delay time until the switch is turned OFF must be set in order not to have a planned sequential operation where

BD18362EFV-M turns the switches OFF before the current supply to the LED (e.g. LED driver) operates. The setting can

be done the capacitor connected to the SETDLY pin (C_SETDLY) and the resistor connected to the SET pin (R_SET).

The charging of the capacitor connected to the SETDLY pin starts when the SG pin change from low to Hiz and the CNT

pin voltage has risen above the V_CNTHvoltage. SW0 turn OFF (LED0 turn ON) after the setting time (t_DLY).

Sequential Lighting Start-up Delay Time

푡_퐷퐿푌= 퐾_퐷퐿푌× 푅_푆퐸푇× 퐶_{푆퐸푇퐷퐿푌}[s]

When the Sequential lighting start-up delay time is passed, the SETDLY pin is discharged.

A recharge is possible under the following 3 conditions: (1) or (2) or (3)

(1) UVLO detection → UVLO release → Status good delay time passed → Recharge

(2) Thermal shutdown detection → Thermal shutdown release → Status good delay time passed → Recharge

(3) Input V_CNT≤ V_CNTH-V_CNTHYS→ Input V_CNT≥V_CNTH→ Recharge

V_UVR

VCC

CNT

V_CNTH

SG

SETDLY

LED0

t_DLY

LED0 OFF

LED0 ON

FLAG

(a) Start-up

VCC

CNT

V_UVR

VUVD

V_CNTH

CNT

V_CNTH-VCNTHYS

t_dSG

SG

SETDLY

LED

SG

SETDLY

LED

t_DLY

LED OFF

phase shift

FLAG

(b) CNT control

(c) Re-start

Figure 3. Timing Chart

(Sequential Lighting Start-up Delay Time)

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BD18362EFV-M

Description of Blocks – continued

4. SETCLK [Sequential Lighting Phase Time Setting]

Through the BD18362EFV-M it is possible to change the sequential lighting phase time.

The sequential lighting phase time (t_PS1) is determined by the clock period (t_CLK), which is set by the capacitor connected

to the SETCLK pin (C_SETCLK) and the resistor connected to the SET pin (R_SET).

Clock Period

ꢁ

푃ꢂ

×ꢃ

×ꢀ

ꢂꢄꢅ ꢂꢄꢅꢆꢇꢈ

푡_ꢀ퐿ꢁ

=

[s]

256

Sequential Lighting Phase Time

푡_ꢉ푆1= 퐾_ꢉ푆× 푅_푆퐸푇× 퐶_{푆퐸푇ꢀ퐿ꢁ}

[s]

CMPLT

LED7

t_PS1

LED OFF

LED ON

t_PS1

LED6

LED ON

t_PS1

LED1

LED0

LED OFF

LED ON

t_PS1

LED ON

LED OFF

Figure 4. Timing Chart

(Sequential Lighting Phase Shift HAZ=L)

SET

Current

Setting

R_SET

OFF/ON

ON/OFF

SETCLK

Oscillator

Phase Shift

CLK

C_SETCLK

SETCLK

t_CLK

CLK

Figure 5. CLK Generation Circuit for Sequential Lighting Phase Shift

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BD18362EFV-M

Description of Blocks – continued

5. HAZ [Hazard Mode Switching Input]

The BD18362EFV-M is built in hazard mode function. If the HAZ pin is given a high input (≥V_HAZH), the LEDs are turned

from the all-OFF to the all-ON position after sequential lighting start-up delay (t_DLY) passed. However, the switches are

turned OFF sequentially (LEDs are light sequentially) at a fixed time (t_PSH), this avoids sudden output voltage fluctuations.

CMPLT

LED7

LED6

LED OFF

LED ON

LED1

LED0

LED OFF

LED ON

CMPLT

LED7

t_PSH

LED ON

LED6

tPSH

LED1

LED0

LED OFF

LED ON

t_PSH

LED ON

LED OFF

Figure 6. Timing Chart

(Hazard mode HAZ=H)

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BD18362EFV-M

Description of Blocks – continued

6. SEL [Setting pin for switches in use]

The BD18362EFV-M has 8 switches. Therefore, in cases where only 7 or less switches are used, please short-circuit the

board with the pins that are not used. The protective function must be disabled for those switches that are not being used,

so that the short detection will not run.

The switches in use determine if the SEL1pin, the SEL2 pin and the SEL3 pin are setting high input (≥V_SELH) or low input

(≤V_SELL).

Protective Function

Invalidity Switches

Switches in use

SEL1

SEL2

SEL3

0, 1, 2, 3, 4, 5, 6, 7

0, 1, 2, 3, 4, 5, 6

0, 1, 2, 3, 4, 5

0, 1, 2, 3, 4

0, 1, 2, 3

0, 1, 2

0, 1

0

-

7

low

high

low

high

low

high

low

high

low

high

low

high

6, 7

5, 6, 7

4, 5, 6, 7

3, 4, 5, 6, 7

2, 3, 4, 5, 6, 7

1, 2, 3, 4, 5, 6, 7

high

The setting will not be changed even if the SEL pin voltage switches temporarily during the sequential lighting phase shift

operation.

The settings are changed at a restart. A restart is possible under the following 3 conditions: (1) or (2) or (3)

(1) UVLO detection → UVLO release → Status good delay time passed → Set SEL condition

(2) Thermal shutdown detection → Thermal shutdown release → Status good delay time passed → Set SEL condition

(3) Input V_CNT≤ V_CNTH-V_CNTHYS→ Input V_CNT≥V_CNTH→ Set SEL condition

CP

CH8

SW7

CH7

SW6

CH6

SW5

CH5

SEL1

SW4

CH4

SEL2

SW3

SEL3

CH3

SW2

CH2

SW1

CH1

SW0

CH0

Figure 7. A Circuit for Setting SEL (for using 6 Switches)

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BD18362EFV-M

Description of Blocks – continued

7. CMPLT [Lighting Complete Signal Output]

When the sequential lighting is complete, the CMPLT pin changes from a low to Hiz.

The BD18362EFV-M has 8 switches. Therefore, in cases where 9 or more switches are used for sequential lighting, a

second BD18362EFV-M comes into use. When the lighting of LED by an IC (A) is complete, the CMPLT pin of an IC (A)

will give a Hiz output. By connecting the CMPLT pin of an IC (A) and the CNT pin of an IC (B), the LED lighting of an IC (B)

will start after the LED lighting of an IC (A) is complete.

Also, the “lighting complete” timing is changed according to the used switches set by the SEL1 pin, the SEL2 pin and the

SEL3 pin.

If the 6 and 7 switches are invalidated, the CMPLT pin will have a Hiz output at the time when the start-up of switch 5 is

completed.

The CMPLT pin will change Hiz to low under following conditions. (1) or (2) or (3) (refer to Figure19 (c))

(1) UVLO detection → CMPLT=L

(2) Thermal shutdown detection → CMPLT=L

(3) Input V_CNT≤ V_CNTH-V_CNTHYS→ CMPLT=L

The CMPLT pin is open drain and needed pulled up resistor for monitoring output signal.

ILED

VCC

CNT

VCC

CNT

HAZ

CP

VREG

SETDLY

SETCLK

SET

SETDLY

SETCLK

SET

CH8

CH7

CH6

CH5

CH4

CH3

CH2

CH1

CH0

CH8

CH7

CH6

CH5

CH4

CH3

CH2

CH1

CH0

LED5

LED4

LED3

LED2

LED1

LED0

LED5

LED4

LED3

LED2

LED1

LED0

SEL1

SEL2

SEL3

SEL1

SEL2

SEL3

GND

CMPLT

IC (A)

IC (B)

Figure 8. Application Example

(for using 12 Switches)

LED5

・

IC (B)

LED ON

・

t_PS1

LED1

LED ON

t_PS1

LED0

LED ON

CMPLT

LED5

t_PS1

IC (A)

・

LED ON

・

t_PS1

LED1

LED ON

t_PS1

LED ON

LED0

LED OFF

Figure 9. Timing Chart

(for using 12 Switches)

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BD18362EFV-M

Description of Blocks – continued

CMPLT

LED7

t_PS1

LED ON

LED OFF

t_PS1

LED ON

LED6

t_PS1

LED1

LED0

LED OFF

LED ON

tPS1

LED OFF

LED ON

Figure 10. Timing Chart

(CMPLT output function SEL1=L, SEL2=L, SEL3=L)

CMPLT

LED7

LED6

LED5

t_PS1

LED ON

t_PS1

LED1

LED0

LED OFF

LED ON

t_PS1

LED ON

LED OFF

Figure 11. Timing Chart

(CMPLT output function SEL1=L, SEL2=H, SEL3=L)

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BD18362EFV-M

Description of Blocks – continued

8. CNT [Lighting On/Off Control]

It is possible to control the switches through the CNT pin.

If the CNT pin is given a high input (≥V_CNTH), the switches will be turned OFF sequentially and the LEDs are light

sequentially after the sequential lighting start-up delay time t_DLY

.

If the CNT pin is given a low input (≤V_CNTH-V_CNTHYS), the switches will be turned ON sequentially and the LEDs are

unlighted sequentially. Also, the CMPLT pin will have a low output.

The switches are turned ON sequentially (LEDs are unlighted sequentially) at a fixed time (t_PSL), this avoids sudden output

voltage fluctuations.

.

V_CNTH

CNT

V_CNTH-V_CNTHYS

SETDLY

CMPLT

LED7

t_PS1

LED ON

LED OFF

t_PSL

tPS1

LED6

LED ON

LED1

LED0

LED OFF

LED ON

t_PS1

t_PSL

LED ON

Figure 12. Timing Chart

(The CNT Pin Function)

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BD18362EFV-M

Description of Blocks – continued

9. LED Short Detection

The BD18362EFV-M is built in LED short detection.

While switch is turned OFF, the voltage between CHn-CHn-1 is monitored. If the voltage between CHn-CHn-1 falls below

the LED short detection voltage (V_LS), an LED short is detected. The FLAG pin will change to low. When SWn-1 turn OFF,

the short detection function will be disable in the time (t_LS).

(

)

푡_퐿푆= 푡_ꢉ푆1× 0.ꢊ ꢋ푦푝 when V_HAZ=L(≤V_HAZH-V_HAZHYS

)

(

)

푡_퐿푆퐻= 푡_ꢉ푆퐻× 0.ꢊ ꢋ푦푝 when V_HAZ=H(≥V_HAZH

)

The FLAG pin will change low to Hiz under following conditions. (1) or (2) or (3) (refer to Figure19 (a))

(1) UVLO detection → UVLO release → Status good delay time passed → FLAG=Hiz

(2) Thermal shutdown detection → Thermal shutdown release → FLAG=Hiz

(3) Input V_CNT≤ V_CNTH-V_CNTHYS→ FLAG=Hiz

The LED short detection function is invalid with regard to the unused switches set by the SEL pin.

CHn+1

V_LS

SWn

V_{CHn_CHn-1}

CHn

t_LS

SWn-1

FLAG

CHn-1

(a) Normal Operation

V_LS

CHn+1

V_{CHn_CHn-1}

SWn

CHn

t_LS

FLAG

SWn-1

CHn-1

(b) LED Short Operation

Figure 13. Functionality of LED Short Detection

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BD18362EFV-M

Description of Blocks – continued

10. LED Open Protection

The BD18362EFV-M is built in LED open protection.

While switch is turned OFF, the voltage between CHn-CHn-1 is monitored. If the voltage between CHn-CHn-1 is detected

to be the LED open protection voltage (V_LO) during the monitoring, SWn-1 will be turned ON immediately and this will

prevent a destruction of the switch. When the t_LOtime has passed after SWn-1 turned OFF, the FLAG pin will change to

low. The other switches keep lighting phase shift after detecting LED open.

(

)

푡_퐿푂= 푡_ꢉ푆1× 0.ꢊ ꢋ푦푝 when V_HAZ=L(≤V_HAZH-V_HAZHYS

)

(

)

푡_퐿푂퐻= 푡_ꢉ푆퐻× 0.ꢊ ꢋ푦푝 when V_HAZ=H(≥V_HAZH

)

The FLAG pin will change low to Hiz under following conditions. (1) or (2) or (3) (refer to Figure 19)

(1) UVLO detection → UVLO release → FLAG=Hiz

(2) Thermal shutdown detection → Thermal shutdown release → FLAG=Hiz

(3) Input V_CNT≤ V_CNTH-V_CNTHYS→ FLAG=Hiz

The LED open protection function is invalid with regard to the unused switches set by the SEL pin.

ILED

CHn+1

SWn

OFF

ON

CHn

SWn-1

CHn-1

(a) LED Open (SW=OFF)

(b) LED Open (SW=ON)

V_LO

V_{CHn_CHn-1}

t_LO

FLAG

(c) LED Open (Timing chart)

Figure 14. Functionality of LED Open Protection

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BD18362EFV-M

Description of Blocks – continued

ILED

CP

VCC

LED7

ON

LED6

ON

CH8

CH7

CH6

CH5

CH4

CH3

CH2

CH1

CH0

LED7

LED5

ON

LED4

ON

LED6

LED5

LED4

LED3

LED2

LED1

LED0

LED3

ON

LED2

ON

LED1

ON

LED0

ON

CH8

CMPLT

FLAG

(a) Normal Operation

ILED

CP

VCC

LED7

ON

CH8

CH7

CH6

CH5

CH4

CH3

CH2

CH1

CH0

LED7

LED6

LED5

LED4

LED3

LED2

LED1

LED0

LED6

ON

LED5

ON

LED4

ON

LED SHORT

DETECTION

LED3

ON

LED1

ON

LED0

ON

CH8

CMPLT

FLAG

(b) LED Short Detection (e.g. LED2 Short Mode)

VCC

ILED

CP

LED7

ON

LED6

ON

CH8

CH7

CH6

CH5

CH4

CH3

CH2

CH1

CH0

LED7

LED6

LED5

LED4

LED3

LED2

LED1

LED0

LED5

ON

LED4

ON

LED OPEN

PROTECTION

LED3

ON

LED1

ON

LED0

ON

CH8

CMPLT

FLAG

(c) LED Open Protection (e.g. LED2 Open Mode)

Figure 15. Timing Chart

(LED Short/LED Open)

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BD18362EFV-M

Description of Blocks – continued

11. WDTDLY [Watchdog Timer for SETDLY]

The BD18362EFV-M monitors the t_DLY(sequential lighting start-up delay time). Since the t_DLYcannot be set if the

capacitor connected to the SETDLY pin has a short, the LEDs will come unlighted.

The WDTDLY starts monitoring when the SG pin output has a Hiz and the CNT pin is given a high input (≥V_CNTH).

If the t_DLYis not detected within t_WDTDLY, there will be a time-out and the FLAG pin changes to low.

When there is a time-out, the LEDs will all-light automatically. However, the switches are turned OFF sequentially (LEDs

are light sequentially) at a fixed time (t_PSH).

The FLAG pin will change low to Hiz under following conditions. (1) or (2) or (3) (refer to Figure 19 (a))

(1) UVLO detection → UVLO release → FLAG=Hiz

(2) Thermal shutdown detection → Thermal shutdown release → FLAG=Hiz

(3) Input V_CNT≤ V_CNTH-V_CNTHYS→ FLAG=Hiz

V_UVR

VCC

CNT

V_CNTH

SG

SETDLY

CMPLT

LED7

LED7 OFF

LED6 OFF

LED7 ON

LED6 ON

LED6

SETDLY

LED1

LED0

FLAG

LED1 OFF

LED0 OFF

LED1 ON

LED0 ON

CSETDLY

t_WDTDLY

Figure 16. Timing Chart

(The SETDLY short to GND)

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BD18362EFV-M

Description of Blocks – continued

12. WDTCLK [Watchdog Timer for SETCLK]

The BD18362EFV-M monitors the sequential lighting phase time. Since the t_CLKcannot be set if the capacitor connected to

the SETCLK pin has a short, the LEDs will come unlighted.

The WDTCLK starts monitoring when the SG pin change from low to Hiz and the CNT pin is given a high input (≥V_CNTH).

If the clock period (t_CLK) is not detected within t_WDTCLK, there will be a time-out and the FLAG pin changes to low.

When there is a time-out, the LEDs will all-light automatically. However, the switches are turned OFF sequentially (LEDs

are light sequentially) at a fixed time (t_PSH).

The FLAG pin will change low to Hiz under following conditions. (1) or (2) or (3) (refer to Figure 19)

(1) UVLO detection → UVLO release → FLAG = Hiz

(2) Thermal shutdown detection → Thermal shutdown release → FLAG = Hiz

(3) Input V_CNT≤ V_CNTH-V_CNTHYS→ FLAG = Hiz

V_UVR

VCC

CNT

V_CNTH

SG

SETDLY

SETCLK

CMPLT

LED7

LED7 OFF

LED6 OFF

LED7 ON

LED6 ON

LED6

SETCLK

LED1 OFF

LED0 ON

LED1 ON

LED1

LED0

FLAG

CSETCLK

LED0 OFF

t_WDTCLK

Figure 17. Timing Chart

(The SETCLK Short to GND)

t_CLK

SETCLK

CMPLT

LED7

LED6

LED7 OFF

LED6 OFF

LED7 ON

LED6 ON

LED1

LED0

FLAG

LED1 OFF

LED1 ON

LED0 ON

t_WDTCLK

Figure 18. Timing Chart

(The CLK in Abnormal)

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BD18362EFV-M

Description of Blocks – continued

13. Monitor Function

BD18362EFV-M has pins (SG, FLAG and CMPLT) for monitoring condition. These pins are open drain and needed pull

up resistor for monitoring condition.

LED SHORT detection

SET

LED OPEN detection

RESET

WDTDLY detction

SET

WDTCLK detction

RESET

FLAG

V_CNT≤ V_CNTH- V_CNTHYS

TSD detction

UVLO detction

(a) The FLAG Pin Equivalence Circuit

SG

TIMER

TSD detction

UVLO detction

(b) The SG Pin Equivalence Circuit

Lighting Complet

CMPLT

V_CNT≤ V_CNTH- V_CNTHYS

TSD detction

UVLO detction

(c) The CMPLT Pin Equivalence Circuit

Figure 19. Monitor Pin Equivalence Circuits

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BD18362EFV-M

Absolute Maximum Ratings (Ta=25°C)

Parameter

Symbol

V_CC

Rating

-0.3 to +70

-0.3 to +7 ≤ V_CC

-0.3 to V_REG+0.3 ≤ +7

-0.3 to +7

Unit

V

Power Supply Voltage (VCC)

CNT, HAZ Voltage

V_CNT, V_HAZ

V_REG

V

VREG Voltage

V

SETDLY, SETCLK Voltage

SEL1, SEL2, SEL3 Voltage

CMPLT, SG, FLAG Voltage

CP Voltage

V_SETDLY, V_SETCLK

V_SEL1, V_SEL2, V_SEL3

V_CMPLT, V_SG, V_FLAG

V_CP

V

-0.3 to +67

-0.3 to +7

V

CP to CH8 Voltage

V_{VCP_CH8}

V_{CFP_CFM}

V_CHn

V

CFP to CFM Voltage

-0.3 to +7

V

CHn Voltage^{(Note 1)}

-0.3 to +60

-0.3 to +20

1.0

V

CHn to CHn-1 Voltage^{(Note 1)}

Maximum SWn Bypass Current^{(Note 2)}

Storage Temperature Range

Maximum Junction Temperature

V_{CHn_CHn-1}

I_SWn

V

A

Tstg

-55 to +150

°C

Tjmax

150

°C

Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit

between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is

operated over the absolute maximum ratings.

Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the

properties of the chip. In case of exceeding this absolute maximum rating, increase the board size and copper area to prevent exceeding the

maximum junction temperature rating.

(Note 1)

(Note 2)

CHn: n=0 to 8

SWn: n=0 to 7

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BD18362EFV-M

Thermal Resistance^{(Note 1)}

Thermal Resistance (Typ)

Parameter

Symbol

Unit

1s^{(Note 3)}

2s2p^{(Note 4)}

HTSSOP-B28

Junction to Ambient

Junction to Top Characterization Parameter^{(Note 2)}

θ_JA

107.0

6

25.1

3

°C/W

Ψ_JT

(Note 1) Based on JESD51-2A(Still-Air)

(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside

surface of the component package.

(Note 3) Using a PCB board based on JESD51-3.

Layer Number of

Measurement Board

Material

FR-4

Board Size

Single

114.3mm x 76.2mm x 1.57mmt

Top

Copper Pattern

Thickness

70μm

Footprints and Traces

(Note 4)Using a PCB board based on JESD51-5, 7.

Thermal Via^{(Note 5)}

Layer Number of

Material

Board Size

114.3mm x 76.2mm x 1.6mmt

2 Internal Layers

Measurement Board

Pitch

Diameter

4 Layers

FR-4

1.20mm

Φ0.30mm

Top

Bottom

Copper Pattern

Thickness

70μm

Copper Pattern

Thickness

35μm

Copper Pattern

Thickness

70μm

Footprints and Traces

74.2mm x 74.2mm

(Note 5) This thermal via connects with the copper pattern of all layers.

Recommended Operating Conditions

Parameter

Symbol

Min

5.5

-40

-

Typ

Max

60

Unit

V

Supply Input Voltage^{(Note 6) (Note 7)}

Operating Temperature

V_CC

Topr

13

+25

+125

48

°C

V

Maximum Total LED Voltage

CHn to CHn-1 LED Input Range

V_LED

-

V_{CHn_CHn-1}

t_PS1

1.2

5

9

V

Sequential Lighting Phase Time Setting

Range

100

225

ms

Sequential Lighting Start-up Delay Time

Setting Range

t_DLY

-

(Note 6) Supply input voltage range can be considered based on power dissipation.

(Note 7) At start-up time, please apply a voltage above 6.0V once. The value is the voltage range after the temporary rise to 6.0V.

Recommended Setting Parts Range

Parameter

Symbol

C_VREG

Min

1.0

Typ

2.2

Max

4.7

Unit

μF

Capacitor Connecting to the VREG Pin

Capacitor for Charge Pump

C_CP, C_CF

0.001

0.047

0.22

μF

Resistor for

Sequential Lighting Phase Time/

Sequential Lighting Start-up Delay Time

R_SET

6

-

40

kΩ

Capacitor for Sequential Lighting

Start-up Delay Time

C_SETDLY

C_SETCLK

-

10

μF

Capacitor for Sequential Lighting Phase

Time

0.001

0.047

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BD18362EFV-M

Electrical Characteristics (Unless otherwise specified: V_CC=13V Ta=-40°C to +125°C)

Limit

Parameter

Symbol

Unit

Conditions

Min

Typ

Max

[Total]

V_CNT=0V, V_CH0=0V

R_SET=22kΩ, C_SETCLK=0.01μF

VCC Input Current

I_VCC

-

3.8

7.0

mA

UVLO Detection Voltage

UVLO Release Voltage

UVLO Hysteresis Voltage

[Internal Reference Voltage]

V_UVD

V_UVR

V_HYS

4.7

4.95

-

5.1

5.40

0.3

5.5

5.85

-

V

V_CC: Sweep down

V_CC: Sweep up

C_VREG=2.2μF

I_VREG=0mA to 2mA

Regulator Output

V_REG

4.5

5.0

5.5

V

[Charge Pump]

Charge Pump Output Voltage

V_CP

V_CF

-

7

V

V_CP-V_CH8

Differential Voltage of Flying

Capacitor

V_CFP-V_CFM

[SET, SETDLY, SETCLK]

Coefficient for

Sequential Lighting Phase Time

t_PS1=K_PSx R_SETx C_SETCLK[s]

V_HAZ=0V

K_PS

278

320

368

-

Coefficient for Sequential

Lighting Start-up Delay Time

K_DLY

2.23

2.67

3.20

t_DLY=K_DLYx R_SETx C_SETDLY[s]

Sequential Lighting Phase Time

In the Hazard Mode

t_PSH

t_PSL

105

140

180

μs

V_HAZ=5V

Turn Off Phase Time

In the CNT=L

V_CNT=5V→0V

[CMPLT, SG, FLAG]

CMPLT Output Voltage Low

CMPLT Leak Current

SG Output Voltage Low

SG Leak Current

V_CMPLTL

I_CMPLTLK

V_SGL

-

0.2

1

V

μA

V

I_CMPLT=1mA

V_CMPLT=5.5V

I_SG=1mA

-

0.2

1

I_SGLK

μA

V

V_SG=5.5V

FLAG Output Voltage Low

FLAG Leak Current

SG Delay Time

V_FLAGL

I_FLAGLK

t_dSG

-

0.2

1

I_FLAG=1mA

V_FLAG=5.5V

-

μA

μs

ms

415

245

80

590

350

115

765

455

150

WDTDLY Time Out

WDTCLK Time Out

t_WDTDLY

t_WDTCLK

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BD18362EFV-M

Electrical Characteristics – continued (Unless otherwise specified: V_CC=13V Ta=-40°C to +125°C)

Limit

Parameter

[CNT, HAZ]

Symbol

Unit

Conditions

Min

Typ

Max

CNT Pin Input Current 1

CNT Pin Input Current 2

CNT Threshold Voltage

I_CNT1

I_CNT2

-10

-

-2.5

0

-

5

μA

V

V_CNT=0V

V_CNT=60V

Sweep up

V_CNTH

0.9

1.0

1.1

CNT Threshold Hysteresis

Voltage

V_CNTHYS

-

100

-

mV

HAZ Pin Input Current 1

HAZ Pin Input Current 2

I_HAZ1

I_HAZ2

-10

-

-2.5

0

-

μA

V_HAZ=0V

5

V_HAZ=60V

Hazard Mode Threshold

Voltage

Hazard Mode Threshold

Hysteresis Voltage

V_HAZH

0.9

-

1.0

1.1

-

V

Sweep up

V_HAZHYS

100

mV

[SEL1, SEL2, SEL3]

SEL1, SEL2, SEL3

High Level Input Voltage

SEL1, SEL2, SEL3

Low Level Input Voltage

SEL1, SEL2, SEL3

Pin Input Current

V_SELH

V_SELL

I_SEL

3.6

0

-

V_REG

1.1

V

10

20

30

μA

V_SEL1=5V, V_SEL2=5V, V_SEL3=5V

[CH]

CHn to CHn-1 Switch

ON Resistance

CH8 to CH0 Switch

Total ON Resistance

R_SW

-

230

460

2.2

mΩ

Ω

I_SW=300mA

All Switches On

I_SW70=300mA

R_SW70

0.95

LED Open Detection Voltage

LED Short Detection Voltage

V_LO

V_LS

9.0

-

15

V

V_{CHn_CHn-1}: Sweep up

1.2

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BD18362EFV-M

Typical Performance Curves (Reference Data)

(Unless otherwise specified: Ta=25°C V_CC=13V)

7.0

6.0

5.5

5.4

5.3

5.2

5.1

5.0

4.9

4.8

4.7

4.6

4.5

Ta=+125 °C

5.0

4.0

Ta=+25 °C

3.0

Ta=-40 °C

2.0

1.0

0.0

-50 -25

0

25

50

75 100 125 150

0

10

20

30

40

50

60

Temperature [°C]

VCC[V]

Figure 20. I_VCCvs V_CC

Figure 21. V_REGvs Temperature

3.2

3.0

2.8

2.6

2.4

2.2

370

360

350

340

330

320

310

300

290

280

270

-50 -25

0

25

50

75 100 125 150

-50 -25

0

25

50

75 100 125 150

Temperature [°C]

Figure 22. K_PSvs Temperature

(C_SETCLK=0.0047μF, R_SET=10kΩ)

Figure 23. K_DLYvs Temperature

(C_SETDLY=0.01μF, R_SET=10kΩ)

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BD18362EFV-M

Typical Performance Curves (Reference Data) - continued

(Unless otherwise specified: Ta=25°C V_CC=13V)

180

170

160

150

140

130

120

110

100

180

170

160

150

140

130

120

110

100

-50 -25

0

25

50

75 100 125 150

-50 -25

0

25

50

75 100 125 150

Temperature[°C]

Figure 24. t_PSHvs Temperature

Figure 25. t_PSLvs Temperature

0.30

0.25

0.20

0.15

0.10

0.05

0.00

0.30

0.25

0.20

0.15

0.10

0.05

0.00

Ta=-40°C

Ta=+125°C

Ta=+25°C

Ta=+125°C

Ta=+25°C

0.0

0.5

1.0

1.5

2.0

0.0

0.5

1.0

1.5

2.0

I_CMPLT[mA]

I_SG[mA]

Figure 26. V_CMPLTLvs I_CMPLT

Figure 27. V_SGLvs I_SG

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BD18362EFV-M

Typical Performance Curves (Reference Data) - continued

(Unless otherwise specified: Ta=25°C V_CC=13V)

740

700

660

620

580

540

500

460

420

0.30

0.25

Ta=-40°C

0.20

0.15

0.10

Ta=+125°C

Ta=+25°C

0.05

0.00

-50 -25

0

25

50

75 100 125 150

0.0

0.5

1.0

1.5

2.0

Temperature[°C]

IFLAG[mA]

Figure 28. V_FLAGLvs I_FLAG

Figure 29. t_dSGvs Temperature

450

425

400

375

350

325

300

275

250

140

130

120

110

100

90

80

-50 -25

0

25

50

75 100 125 150

-50 -25

0

25

50

75 100 125 150

Temperature[°C]

Figure 30. t_WDTDLYvs Temperature

Figure 31. t_WDTCLKvs Temperature

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BD18362EFV-M

Typical Performance Curves (Reference Data) - continued

(Unless otherwise specified: Ta=25°C V_CC=13V)

1.5

1.4

1.3

1.2

1.1

1.0

0.9

0.8

0.7

0.6

0.5

400

350

300

250

200

150

100

50

0

-50 -25

0

25

50

75 100 125 150

-50 -25

0

25

50

75 100 125 150

Temperature[℃]

Figure 32. R_SWvs Temperature

(I_SW=300mA)

Figure 33. R_SW70vs Temperature

(I_SW70=300mA)

15.0

14.0

13.0

12.0

11.0

10.0

9.0

1.2

1.1

1.0

0.9

0.8

0.7

0.6

-50 -25

0

25

50

75 100 125 150

-50 -25

0

25

50

75 100 125 150

Temperature[°C]

Figure 34. V_LOvs Temperature

Figure 35. V_LSvs Temperature

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BD18362EFV-M

Timing Chart

V_UVR

V_UVD

VCC

t_dSG

SG

SETDLY

t_dSG

t

PS1

tPS1

t

PS1

t

PS1

tPS1

Hiz

ON

OFF

Hiz

SW0

SW1

SW2

SW3

SW4

SW5

SW6

SW7

ON

OFF

Hiz

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

FLAG

CMPLT

ILED (External input)

Figure 36. Typical Timing Chart

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BD18362EFV-M

Recommended Application Circuit

ILED

U1

BD18362EFV-M

CFP

CFM

VCC

C_CF

C_VCC

CNT

HAZ

R_HAZ

CP

VREG

C_CP

C_VREG

SETDLY

SETCLK

SET

CH8

CH7

CH6

CH5

CH4

CH3

CH2

CH1

CH0

C_SETDLY

LED7

LED6

LED5

LED4

LED3

LED2

LED1

LED0

C_SETCLK

R_SET

SEL1

SEL2

SEL3

CMPLT

FLAG

SG

R_CMPLT

R_FLAG

R_SG

GND

To LED Driver

Recommended Parts List

(8 switches, t_PS1=15ms, t_DLY=1.25ms)

Parts

IC

Symbol

U1

Parts Name

BD18362EFV-M

Value

Unit

Product Maker

ROHM

murata

-

10

-

R_HAZ

MCR03EZPJ103

kΩ

μF

R_SET

MCR03EZPD1002

MCR03EZPJ223

10

Resistor

R_CMPLT

R_FLAG

R_SG

22

MCR03EZPJ223

22

MCR03EZPJ223

22

C_VCC

C_VREG

C_SETDLY

C_SETCLK

C_CF

GCM31CC72A225KE01L

GCM21BR71C225KA49

GCM188R11H473JA40

GCM2162C1H472JA01

GCM188R11H473JA40

2.2

0.047

0.0047

0.047

Capacitor

C_CP

●C_VCC: Choose rated voltage according to input voltage range.

●In case of BD18362EFV-M and the LEDs are connected with long wires, it might be triggered the malfunction of LED open

protection and LET short detection by ringing in the voltage which is produced by switching on and off of SW between IC

channels. Moreover, if the ringing level becomes higher than the case of above, it might damage the IC. Confirm the ringing

level with enough evaluation and respond to it by placing RC snubber circuit between CH_nand CH_n-1

.

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BD18362EFV-M

I/O Equivalence Circuits

No.

Symbol

Equivalence Circuit

No.

Symbol

Equivalence Circuit

VREG

CNT

SETCLK

2

CNT

9

SETCLK

2MΩ (Typ)

GND

VREG

HAZ

SETDLY

GND

3

HAZ

10

SETDLY

2MΩ (Typ)

GND

VREG

SET

VCC

5

VREG

11

SET

VREG

GND

350kΩ (Typ)

50kΩ (Typ)

GND

VREG

CMPLT

SG

FLAG

SEL1

SEL2

SEL3

6

7

8

SEL1

SEL2

SEL3

12

13

14

CMPLT

SG

FLAG

250kΩ

(Typ)

GND

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BD18362EFV-M

I/O Equivalence Circuits - continued

No.

Symbol

Equivalence Circuit

CFP

GND

CFM

CP

VREG

GND

CH8

GND

17

18

19

20

21

22

23

24

25

26

27

28

CH0

CH1

CH2

CH3

CH4

CH5

CH6

CH7

CH8

CP

CH7

CH2

GND

CFP

CFM

VCP

CH1

GND

CH0

GND

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BD18362EFV-M

Operational Notes

1.

2.

Reverse Connection of Power Supply

Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when

connecting the power supply, such as mounting an external diode between the power supply and the IC’s power

supply pins.

Power Supply Lines

Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at

all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic

capacitors.

3.

4.

Ground Voltage

Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.

Ground Wiring Pattern

When using both small-signal and large-current ground traces, the two ground traces should be routed separately but

connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal

ground caused by large currents. Also ensure that the ground traces of external components do not cause variations

on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.

5.

6.

Recommended Operating Conditions

The function and operation of the IC are guaranteed within the range specified by the recommended operating

conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical

characteristics.

Inrush Current

When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow

instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power

supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and

routing of connections.

7.

8.

Operation Under Strong Electromagnetic Field

Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.

Testing on Application Boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may

subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply

should always be turned off completely before connecting or removing it from the test setup during the inspection

process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during

transport and storage.

9.

Inter-pin Short and Mounting Errors

Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in

damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.

Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and

unintentional solder bridge deposited in between pins during assembly to name a few.

10. Unused Input Pins

Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and

extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small

charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and

cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the

power supply or ground line.

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BD18362EFV-M

Operational Notes – continued

11. Regarding the Input Pin of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them

isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a

parasitic diode or transistor. For example (refer to figure below):

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to

operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be

avoided.

Resistor

Transistor (NPN)

Pin A

Pin B

B

E

C

Pin A

B

C

E

P

P⁺

N

P⁺

P

P⁺

N

Parasitic

Elements

Parasitic

Elements

P Substrate

GND GND

P Substrate

GND

Parasitic

Elements

Parasitic

Elements

N Region

close-by

Figure 37. Example of monolithic IC structure

12. Ceramic Capacitor

When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with

temperature and the decrease in nominal capacitance due to DC bias and others.

13. Area of Safe Operation (ASO)

Operate the IC such that the output voltage, output current, and the maximum junction temperature rating are all within

the Area of Safe Operation (ASO).

14. Thermal Shutdown Circuit(TSD)

This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always

be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the

junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls

below the TSD threshold, the circuits are automatically restored to normal operation.

Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no

circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from

heat damage.

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BD18362EFV-M

Ordering Information

B D 1

8

3

6

2 E

F

V -

M E 2

Part Number

Package

EFV: HTSSOP-B28

Product Rank

M: for Automotive

Packaging and forming specification

E2: Embossed tape and reel

(HTSSOP-B28)

Marking Diagrams

HTSSOP-B28 (TOP VIEW)

Part Number Marking

LOT Number

B D 1 8 3 6 2

1PIN MARK

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BD18362EFV-M

Physical Dimension, Tape and Reel Information

Package Name

HTSSOP-B28

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BD18362EFV-M

Revision History

Date

Rev.

001

Changes

New Release

13.Jun.2017

28.Oct.2020

Page 21 Electrical Characteristics SET Pin Output Voltage

Delete

002

Page 33 Marking Diagrams

D18362 → BD18362

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Notice

Precaution on using ROHM Products

(Note 1)

1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment

,

aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,

bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales

representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any

ROHM’s Products for Specific Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN

USA

EU

CHINA

CLASSⅢ

CLASSⅣ

CLASSⅡb

CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.

Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the

use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our

Products under any special or extraordinary environments or conditions (as exemplified below), your independent

verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.

However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble

cleaning agents for cleaning residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in

the range that does not exceed the maximum junction temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must

be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,

please consult with the ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice-PAA-E

Rev.004

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl₂, H₂S, NH₃, SO₂, and NO₂

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign

trade act, please consult with ROHM in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data.

2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the

Products with other articles such as components, circuits, systems or external equipment (including software).

3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM

will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to

manufacture or sell products containing the Products, subject to the terms and conditions herein.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice-PAA-E

Rev.004


型号：	BD18362EFV-M
厂家：	ROHM
描述：	BD18362EFV-M是内置8ch的FET开关的矩阵LED控制器。可通过开关内置FET开关，控制LED的依次亮灯。内置电荷泵为栅极驱动器供电。内置亮灯图案，无需微控制器。开关栅极驱动控制器泵微控制器驱动器
文件：	总38页 (文件大小：1393K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BD18362EFV-M [ROHM]

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