BD3506EFV [ROHM]
Ultra Low Dropout Linear Regulators for PC Chipsets; 超低压差线性稳压器的PC芯片组![BD3506EFV](http://pdffile.icpdf.com/pdf1/p00143/img/icpdf/BD350_791978_icpdf.jpg)
型号: | BD3506EFV |
厂家: | ![]() |
描述: | Ultra Low Dropout Linear Regulators for PC Chipsets |
文件: | 总17页 (文件大小:698K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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TECHNICAL NOTE
High-performance Regulator IC Series for PCs
Ultra Low Dropout
Linear Regulators for PC Chipsets
BD3506F, BD3506EFV
Description
The BD3506F/EFV is an ultra-low dropout linear regulator for chipset that can achieve ultra-low voltage input to ultra-low
voltage output. By using N-MOS FET for built-in power transistor, the regulator can be used at ultra-low I/O voltage
difference up to voltage difference generated by ON resistor (Ron = 120 mΩ/100 mΩ). Because by reducing the I/O
voltage difference, large current (Iomax = 2.5A) output is achieved and conversion loss can be reduced, switching power
supply can be replaced. BD3506F/EFV does not need any choke coil, diode for rectification and power transistor which
are required for switching power supply, total cost of the set can be reduced and compact size can be achieved for the set.
Using external resistors, optional output from 0.65V to 2.5V can be set. In addition, since voltage output start-up time can
be adjusted by using the NRCS terminal, it is possible to meet the power supply sequence of the set.
Features
1) Built-in high-accuracy reference voltage circuit (0.65V±1%)
2) Built-in VCC low input maloperation prevention circuit (Vcc = 4.15V)
3) Reduced rush current by NRCS
4) Built-in ultra-low on-resistor (120/100 mΩ typ) Nch Power MOSFET (BD3506F/BD3506EFV)
5) Built-in current limiting circuit (2.5A min)
6) Built-in thermal shutdown circuit
7) Output variable type (0.65-2.5V)
8) Adoption of SOP8 package (BD3506F): 5.0 x 6.2 x 1.5 (mm)
9) Adoption of high power HTSSOP-B20 package (BD3506EFV): 5.0 x 6.4 x 1.0 (mm)
Applications
Mobile PC, desktop PC, LCD-TV, DVD, digital home appliances
●Line up
Parameter
Ron
BD3506F
120mΩ
2.5A
BD3506EFV
100mΩ
Output Current
Package
2.5A
SOP8
HTSSOP-B20
Oct. 2008
●ABSOLUTE MAXIMUM RATINGS
◎BD3506F
○ABSOLUTE MAXIMUM RATINGS(Ta=25℃)
Parameter
Symbol
BD3506F
7 *1
BD3506EFV
Unit
V
Input Voltage1
Input Voltage2
VCC
VIN
7 *1
7 *1
7 *1
V
Enable Input Voltage
Ven
7
7
V
Power Dissipation1
Pd1
560 *2
690 *3
-10~+100
-55~+125
+150
-
mW
mW
℃
Power Dissipation2
Pd2
1000 *4
-10~+100
-55~+125
+150
Operating Temperature Range
Storage Temperature Range
Topr
Tstg
Tjmax
℃
Maximum Junction Temperature
℃
*1 However, not exceeding Pd.
*2 In the case of Ta≥25°C (no heat radiation board), derated at 4.48 mW/°C.
*3 In the case of Ta≥25°C (when mounting to 70mmx70mmx1.6mm glass epoxy substrate), derated at 5.52 mW/°C.
*4 In the case of Ta≥25°C (when mounting to 70mmx70mmx1.6mm glass epoxy substrate), derated at 8.00 mW/°C.
●RECOMMENDED OPERATING CONDITIONS
◎BD3506F/EFV
○RECOMMENDED OPERATING CONDITIONS(Ta=25℃)
Parameter
Symbol
VCC
VIN
MIN
4.3
MAX
5.5
VCC-1 *5
Unit
V
Input Voltage1
Input Voltage2
1.2
V
Output Voltage
Vo
VFB
-0.3
0.001
2.5
V
Enable Input Voltage
Capacitor in NRCS pin
Ven
5.5
V
CNRCS
1
uF
*5 However, irrespective of charging order of VCC and VIN.
* No radiation-resistant design is adopted for the present product.
2/16
●ELECTRICAL CHARACTERISTICS
◎BD3506F/BD3506EFV
○ELECTRICAL CHARACTERISTICS
(unless otherwise noted, Ta=25℃ VCC=5V Ven=3V VIN=1.8V R1=3.9KΩ R2=3.3KΩ)
Standard Value
Parameter
Symbol
Unit
Condition
MIN
TYP
0.7
0
MAX
Bias Current
ICC
IST
-
1.4
mA
Bias current
-
-
10
-
uA Ven=0V
Shut-Down Mode Current
Output Voltage
VOUT
Io
1.200
-
V
A
Io=50mA
2.5
-
-
Maximum Output Current
Maximum Short Current
Temperature coefficient of Output
Voltage
Iost
Tcvo
2.0
0.01
-
A
Vo=0V
-
-
%/℃
VFB1
0.643
0.650
0.657
V
V
Io=50mA
Feed Back Voltage 1
Feed Back Voltage 2
Line Regulation 1
VFB2
Reg.l1
Reg.l2
Reg.L
dVo
0.630
0.650
0.1
0.1
0.5
120
100
-
0.670
0.5
0.5
10
Io=0 to 2A, Ta=-10 to 100℃ *5
-
%/V VCC=4.3V to 5.5V
-
%/V VIN=1.2V to 3.3V
Line Regulation 2
-
mV Io=0 to 2A
Dropout Voltage (BD3506F)
Dropout Voltage (BD3506EFV)
Standby Discharge Current
[Enable]
-
-
200
160
-
mV Io=1A,VIN=1.2V, Ta=-10 to 100℃ *5
mV Io=1A,VIN=1.2V, Ta=-10 to 100℃ *5
mA Ven=0V, Vo=1V
dVo
Iden
150
High level Enable Input Voltage
Low level Enable Input Voltage
Enable pin Input Current
[Voltage Feed Back]
Feed Back terminal Bias Current
[NRCS]
Enhi
Enlow
Ien
2
-0.3
-
-
-
5.5
0.8
10
V
V
7
uA Ven=3V
IFB
-100
0
100
nA
NRCS Charge Current
NRCS Standby Voltage
[UVLO]
Inrcs
VSTB
14
-
20
0
26
50
uA Vnrcs=0.5V
mV Ven=0V
VCC UVLO
VCCUVLO
Vcchys
4.00
100
4.15
160
4.30
220
V
Vcc:Sweep-up
VCC UVLO Hysterisis
mV Vcc:Sweep-down
*5 Design Guarantee
3/16
●Reference Data
10
8
⊿Vout
(50mV/div)
EN
Vin
6
Vcc
4
Iout
(1A/div)
2
Vo
0
0
2
4
6
8
VIN(V)
Fig.1 Transient Response
Fig.2 Input Voltage
SequenceFinal Input Voltage
EN
Fig.3 VIN-IIN(Ta=25℃)
656
655
654
653
652
651
650
649
648
647
646
EN
Vin
EN
Vin
Vcc
Vo
Vcc
Vo
-10
10
30
50
70
90
Ta(
)
℃
Fig.4 Input Voltage
SequenceFinal Input Voltage
VIN
Fig.5 Ta-Vfb
Fig.6 Input Voltage
SequenceFinal Input Voltage
18
16
14
12
10
8
Vo
20mV/DIV
Vo
20mV/DIV
Io
1A/DIV
Io
1A/DIV
6
4
2
0
0
1
2
3
4
5
VEN(V)
Fig.7 Transient Response (rise)
Cout=100uF
Fig.8 Transient Response (fall)
Cout=100uF
Fig.9 VEN-IEN
EN
2V/DIV
Vo
EN
20mV/DIV
2V/DIV
NRCS
0.5V/DIV
NRCS
0.5V/DIV
Io
1A/DIV
Vo
0.5V/DIV
Vo
0.5V/DIV
Fig.10 Transient Response (rise)
Cout=220uF
Fig.11 Start up Wave Form
Fig.12 Shut down Wave Form
4/16
700
600
500
400
300
200
100
0
Vo
20mV/DIV
Vo
50mV/DIV
Io
1A/DIV
Io
1A/DIV
0
0.2
0.4
0.6
0.8
1
1.2
VNRCS(V)
Fig.13 VNRCS-VFB
Fig.14 Transient Response (fall)
Cout=220uF
Fig.15 Transient Response (rise)
47u MLCC+30mΩ
Vo
50mV/DIV
Io
1A/DIV
Fig.16 Transient Response (fall)
47u MLCC+30mΩ
5/16
●BLOCK DIAGRAM
◎BD3506F
VCC
4
VCC
VCC
VIN
Vo1
Current
Limit
UVLO
Enable
EN
CL
VIN
Vo
2
Reference
Block
1
7
8
CL
Vo2
EN
UVLO
TSD
R2
R1
VFB
Thermal
3
Shutdown
NRCS
TSD
6
5
NRCS
GND
◎BD3506EFV
VCC
VCC
17
VIN1
VCC
14
15
VIN
Current
Limit
VIN2
CL
UVLO
EN
13
Reference
Block
VCC
Vo1
Vo2
5
6
Vo3
Vo4
Vo5
Vo6
7
Vo
8
CL
9
EN
UVLO
TSD
10
R2
R1
Thermal
FB
16
Shutdown
NRCS
TSD
2
3
20
4
GND
NRCS
6/16
◎BD3506F
●PIN CONFIGRATION
●PIN FUNCTION
PIN No.
PIN NAME
EN
PIN FUNCTION
Enable Pin
1
2
3
4
5
EN
1
2
3
4
8 VO2
VIN
Input Voltage Pin
Output Voltage Feedback
Power Source
FB
VIN
VO1
7
VCC
GND
Ground Pin
FB
6 NRCS
NRCS(Non Rush Current on
Start Up) time setup
6
NRCS
GND
5
VCC
7
8
VO1
VO2
VO1 Pin
VO2 Pin
◎BD3506EFV
●PIN CONFIGRATION
●PIN FUNCTION
PIN No.
1
PIN NAME
PIN FUNCTION
Non connection
Ground1 Pin
N.C.
2
3
GND1
GND2
N.C.
GND1
GND2
NRCS
1
2
3
20
19
18
17
16
15
14
13
GND3
N.C.
Ground2 Pin
NRCS(Non Rush Current on
Start Up) time setup
4
NRCS
5
VO1
VO2
VO3
VO4
VO5
VO6
N.C.
N.C.
EN
VO1 Pin
N.C.
VCC
6
VO2 Pin
4
5
6
7
VO3 Pin
8
VO4 Pin
VO1
VO2
VO3
FB
9
VO5 Pin
10
11
12
13
14
15
16
17
18
19
20
VO6 Pin
VIN2
VIN1
Non connection
Non connection
Enable Pin
7
8
VO4
VO5
VO6
EN
VIN1
VIN2
FB
Input Voltage1 Pin
Input Voltage2 Pin
Output Voltage Feedback
Power Source
Non connection
Non connection
Ground3 Pin
9
12
11
N.C.
N.C.
10
VCC
N.C.
N.C.
GND3
7/16
●Block Function
AMP
An error amplifier that compares reference voltage (VREF) to Vo and drives Nch FET (Ron = 120/100 mΩ) of output. The
frequency characteristics are optimized so that low ESR functional polymer capacitor can be used for the output capacitor
and high-speed transient response can be achieved. The input voltage range at the AMP section is GND-2.5V and the
output voltage range of the AMP section is GND-VCC. At the time of EN OFF or UVLO, the output is brought to the LOW
level and the output NchFET is turned OFF.
EN
By the logic input pin, regulator ON/OFF is controlled. At the time of OFF, the circuit current is controlled to be 0 μA to
reduce the standby current consumption of the apparatus. In addition, EN turns ON FET that can discharge NRCS
terminal Vo and removes excess electric charge to prevent maloperation of IC on the load side. Since there is no electrical
connection with the Vcc terminal as is the case of Di for electrostatic measures, it does not depend on the input sequence.
UVLO
UVLO turned OFF output to prevent output voltage from making maloperation at the time of Vcc reduced voltage. Same
as EN, UVLO discharges NRCS Vo. When voltage exceeds the threshold voltage (TYP 4.15V), UVLO starts output.
CURRENT LIMIT
In the event the output current that exceeds the current (2.5A or more) set inside the IC flows when output is turned ON,
output voltage is attenuated to protect the IC on the load side. When current reduces, output voltage returns to the set
voltage.
NRCS
Connecting an external capacitor to the counter-GND of NRCS pin can achieve soft start. The output voltage startup time
is determined by the time when the NRCS terminal reaches VFB (0.65V). During start-up, the NRCS terminal serves as a
constant current source of 20 uA (Typ.) output, and charges the capacitor externally connected.
TSD (Thermal Shut down)
In order to prevent thermal breakdown and thermal runaway of the IC, the output is turned OFF when chip temperature
becomes high. In addition, when temperature returns to the specified temperature, the output is recovered. However,
since the temperature protection circuit is originally built in to protect the IC itself, thermal design within Tj(max) is
requested.
VIN
This is a large-current supply line. The VIN terminal is connected to the rain of output NchFET. Since there is no
electrical connection with the Vcc terminal as is the case of Di for electrostatic measures, it does not depend on the input
sequence. However, because there is body Di of output NchFET between VIN and Vo, there is electrical connection
(Di-connection) between VIN and Vo. Consequently, when the output is turned ON/OFF by VIN, reverse current flows from
Vo to VIN, to which care must be taken.
8/16
●TIMING CHART
EN ON/OFF
VIN
VCC
EN
NRCS
Vo
Start up Time
t
VCC ON/OFF
VIN
UVLO
hysterisis
VCC
EN
NRCS
Vo
Start up Time
t
9/16
●Evaluation Board
■ BD3506F Evaluation Board Circuit
U1
EN
BD3506F
Vo
1
2
3
4
8
7
6
5
EN
VO2
VO1
VIN
CO
R1
R2
VIN
FB
Cin1
NRCS
GND
GND
VCC
CNRCS
VCC
Ccc
■ BD3506F Evaluation Board Application Components
Part No
U1
Value
Company
ROHM
Parts Name
BD3506F
Part No
Ccc
Value
Company
Parts Name
MCH184CN105K
MCH218CN106K
-
1uF
ROHM
ROHM
R1
R2
3.3k
3.9k
ROHM
MCR03EZPF3301
MCR03EZPF3901
Cin1
Co
10uF
220uF
0.01uF
ROHM
SANYO,etc 2R5TPE220MF
ROHM
C6
■ BD3506F Evaluation Board Layout
Silk Screen
TOP Layer
Bottom Layer
For Evaluation Board, BD3506EFV is available.
10/16
●Recommended Circuits
R2
VOUT(1.2V)/2.5A
1
8
C3
+
Ven
2
3
7
6
C2
VIN
R1
C4
4
5
C1
Vcc
Part No
R1/R2
Value
Notes for use
6.5k/5.5k
The present IC can set output voltage by external reference voltage (VR) and value of output
voltage setting resistors (R1, R2). Output voltage can be set by VRxR2/(R1+R2) but it is
recommended to use at the resistance value (total: about 10 kΩ) which is not susceptible to
VREF bias current (±100 nA).
C3
100μF
Connect the output capacitor between Vo1, Vo2 terminals and GND terminal without fail in
order to stabilize output voltage. The output capacitor has a role to compensate for the phase
of loop gain and to reduce output voltage fluctuation when load is rapidly changed. When
there is an insufficient capacity value, there is a possibility to cause oscillation, and when the
equivalent serial resistance (ESR) of the capacitors is large, output voltage fluctuation is
increased when load is rapidly changed. About 100-µF high-performance electrolytic
capacitors are recommended but output capacitor greatly depends on temperature and load
conditions. In addition, when only ceramic capacitors with low ESR are used, or various
capacitors are connected in series, the total phase allowance of loop gain becomes not
sufficient, and oscillation may result. Thoroughgoing confirmation at application temperature
and under load range conditions is requested.
C1
C2
C4
0.1μF
10μF
1μF
The input capacitor plays a part to lower output impedance of a power supply connected to
input terminals (Vcc). When output impedance of this power supply increases, the input
voltages (Vcc,) become unstable and there is a possibility of giving rise to oscillation and
degraded ripple rejection characteristics. The use of capacitors of about 0.1 μF with low ESR,
which provide less capacity value changes caused by temperature changes, is recommended,
but since input capacitor greatly depends on characteristics of the power supply used for input,
substrate wiring pattern, thoroughgoing confirmation under the application temperature and
load range, is requested.
The input capacitor plays a part to lower output impedance of a power supply connected to
input terminals (VIN). When output impedance of this power supply increases, the input
voltages (VIN) become unstable and there is a possibility of giving rise to oscillation and
degraded ripple rejection characteristics. The use of capacitors of about 10 μF with low ESR,
which provide less capacity value changes caused by temperature changes, is recommended,
but since input capacitor greatly depends on characteristics of the power supply used for input,
substrate wiring pattern, thoroughgoing confirmation under the application temperature and
load range, is requested.
To the present IC, there mounted is a function (Non Rush Current on Start-up: NRCS) to
prevent rush current from VIN to load and output capacitor via Vo at the output voltage start-up.
When the EN terminal is reset from High or UVLO, constant current is allowed to flow from the
NRCS terminal. By this current, voltage generated at the NRCS terminal becomes the
reference voltage and output voltage is started. In order to stabilize the NRCS set time, it is
recommended to use a capacitor (B special) with less capacity value change caused by
temperature change.
11/16
●About heat loss
In designing heat, operate the apparatus within the following conditions.
(Because the following temperatures are warranted temperature, be sure to take margin, etc. into account.)
1. Ambient temperature Ta shall be not more than 100°C.
2. Chip junction temperature Tj shall be not more than 150°C.
Chip junction temperature Tj can be considered under the following two cases.
①Chip junction temperature Tj is found from
IC surface temperature TC under actual
application conditions:
②Chip junction temperature Tj is found from ambient temperature Ta:
Tj=Ta+θj-a×W
<Reference value>
Tj=TC+θj-c×W
<Reference value>
(IC only)
θj-a:SOP8
222.0℃/W
181.0℃/W
θj-c:SOP8 41.0℃/W
Single-layer substrate
HTSSOP-B20 45.0℃/W
Substrate size:70×70×1.6mm
(substrate surface copper foil area: less 3%)
Single-layer substrate
θj-a:HTSSOP-B20 125.0℃/W
(Substrate surface capper
foil area:less3%)
(substrate surface copper foil area: less 3%))
2nd-layer
86.2℃/W
54.3℃/W
39.1℃/W
(substrate surface copper foil area:15×15mm2)
2nd-layer
θj-a:HTSSOP-B20 125.0℃/W
86.2℃/W
(substrate surface copper foil area: 70×70mm2)
4th-layer
54.3℃/W
39.1℃/W
(substrate surface copper foil area: 70×70mm2)
××3
Most of heat loss in BD3506F/EFV occurs at the output Nch FET. The power lost is determined by multiplying the voltage
between VIN and Vo by the output current. Confirm voltage and output current conditions of VIN and Vo used, and collate
them with the thermal derating characteristics. Because BD3506EFV employs the power PKG, the thermal derating
characteristics significantly vary in accord with the pc board conditions. When designing, care must be taken to the size of
a pc board to be used.
Power dissipation (W) = {Input voltage (VIN) – Output voltage (V0≒VREF)}×Io (averaged)
Ex.) If VIN = 1.8 volts, V0=1.2 volts, and Io (averaged)=1.5 A, the power dissipation is given by the following:
Power dissipation (W) =(1.8 volts – 1.2 volts) × 1.5 (A)
= 0.9 W
●EQUIVALENT CIRCUIT
Vcc
Vcc
1kΩ
1kΩ
VIN
NRCS
1kΩ
1kΩ
1kΩ
10kΩ
10kΩ
1kΩ
Vcc
Vcc
1kΩ
EN
VFB
1kΩ
Vo1
Vo2
350kΩ
100kΩ
100kΩ
1kΩ
50kΩ
10kΩ
20pF
12/16
●NOTE FOR USE
1. Input terminals(VCC,VIN,EN)
In the present IC, EN terminal, VIN terminal, and VCC terminal have an independent construction. In addition, in order
to prevent malfunction at the time of low input, the UVLO function is equipped with the VCC terminal. They begin to
start output voltage when all the terminals reach threshold voltage without depending on the input order of input
terminals.
2. Operating range
Within the operating range, the operation and function of the circuits are generally guaranteed at an ambient
temperature within the range specified. The values specified for electrical characteristics may not be guaranteed, but
drastic change may not occur to such characteristics within the operating range.
3. Permissible dissipation
With respect to the permissible dissipation, the thermal derating characteristics are shown in the Exhibit, which we hope
would be used as a good-rule-of-thumb. Should the IC be used in such a manner to exceed the permissible dissipation,
reduction of current capacity due to chip temperature rise, and other degraded properties inherent to the IC would result.
You are strongly urged to use the IC within the permissible dissipation.
4. Built-in thermal shutdown protection circuit
The thermal shutdown circuit is first and foremost intended for interrupt IC from thermal runaway, and is not intended to
protect and warrant the IC. Consequently, never attempt to continuously use the IC after this circuit is activated or to
use the circuit with the activation of the circuit premised.
5. Inspection by set substrate
In the event a capacitor is connected to a pin with low impedance at the time of inspection with a set substrate, there is a
fear of applying stress to the IC. Therefore, be sure to discharge electricity for every process. As electrostatic
measures, provide grounding in the assembly process, and take utmost care in transportation and storage. Furthermore,
when the set substrate is connected to a jig in the inspection process, be sure to turn OFF power supply to connect the jig
and be sure to turn OFF power supply to remove the jig.
6. For the present product, thoroughgoing quality control is carried out, but in the event that applied voltage, working
temperature range, and other absolute maximum rating are exceeded, the present product may be destroyed.
Because it is unable to identify the short mode, open mode, etc., if any special mode is assumed, which exceeds the
absolute maximum rating, physical safety measures are requested to be taken, such as fuses, etc..
7. The use in the strong electromagnetic field may sometimes cause malfunction, to which care must be taken.
8. In the event that load containing a large inductance component is connected to the output terminal, and generation of
back-EMF at the start-up and when output is turned OFF is assumed, it is requested to insert a protection diode.
(Example)
OUTPUT PIN
9. We are certain that examples of applied circuit diagrams are recommendable, but you are requested to thoroughly
confirm the characteristics before using the IC. In addition, when the IC is used with the external circuit changed,
decide the IC with sufficient margin provided while consideration is being given not only to static characteristics but also
variations of external parts and our IC including transient characteristics.
13/16
10. The present IC is a monolithic IC and has P+ isolation between elements to separate elements and a P substrate. With this
P layer and N layer of each element, PN junction is formed, and various parasitic elements are formed.
For example, when resistors and transistors are connected to terminals as illustrated below,
at the resistor, when GND>terminal A, and at transistor (NPN), when GND>terminal B,
PN junction works as a parasitic diode.
at the transistor (NPN), when GND>terminal B,
the parasitic NPN transistor is operated by the N-layer of other element adjacent to the parasitic diode.
The parasitic element is inevitably formed because of the IC construction. The operation of the parasitic element gives rise
to mutual interference between circuits and results in malfunction, and eventually, breakdown. Consequently, take utmost
care not to use the IC to operate the parasitic element such as applying voltage lower than GND (P substrate) to the input
terminal.
(PIN A)
Resistor
NPN Transistor Structure (NPN)
B
(PIN A)
(PIN B)
E
Parasitic diode
C
GND
GND
N
N
(PIN B)
P+
P+
P
P
P+
P+
N
C
N
N
N
N
B
E
Parasitic diode
GND
P substrate
P substrate
GND
GND
Parasitic diode
Nearby other device
Parasitic diode
●POWER DISSIPATION
SOP8
HTSSOPB-20
(1) Mounted on board
70mm×70mm×1.6mm Glass-epoxy PCB
θj-a=181℃/W
(2) Without heat sink
measure:TH-156(Kuwano-Denki)
measure condition:Rohm Standard Board
PCB size:70mm×70mm×1.6mmt
(PCB with Thermal Via)
[mW]
700
[W]
5
θj-a=222℃/W
PCB①:Single-layer substrate
PCB②:Double-layer substrate
(1) 690mW
600
500
(substrate surface copper foil area 15mm×15mm)
PCB③:Double-layer substrate
4
(substrate surface copper foil area 70mm×70mm)
PCB④:Fourth-layer substrate
④3.20W
(2) 560mW
3
(substrate surface copper foil area 70mm×70mm)
400
300
200
③2.30W
PCB①:θja=125.0℃/W
PCB②:θja=86.2℃/W
PCB③:θja=54.3℃/W
PCB④:θja=39.1℃/W
100℃
2
②1.45W
①1.00W
1
100
0
0
25
50 75
100 125 150
0
25
50
75 100 125 150
[℃]
[℃]
Ambient Temperature [Ta]
Ambient Temperature [Ta]
14/16
●Ordering part number
―
B
D
3
5
0
6
F
E
2
Part Number
・BD3506
Package Type
・F : SOP8
E2 Embossed carrier tape
・EFV : HTSSOP-B20
●Package specification
<Dimension>
<Tape and Reel information>
Tape
Embossed carrier tape
Quantity
2500pcs
E2
Direction
of feed
5.0 0.2
8
5
(The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand)
1
4
0.15 0.1
0.1
1.27
0.4 0.1
1Pin
※When you order , please order in times the amount of package quantity.
Direction of feed
Reel
(Unit:mm)
HTSSOP-B20
<Dimension>
<Tape and Reel information>
Tape
Embossed carrier tape
6.5 0.1
Quantity
Direction
of feed
2500pcs
20
11
E2
(The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand)
1
10
+0.05
−0.03
0.325
0.17
S
0.08
S
0.65
0.2 −+00..0045
Direction of feed
1pin
Reel
(Unit:mm)
※When you order , please order in times the amount of package quantity.
15/16
Catalog No.08T437A '08.10 ROHM ©
Appendix
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM
CO.,LTD.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you
wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM
upon request.
Examples of application circuits, circuit constants and any other information contained herein illustrate the
standard usage and operations of the Products. The peripheral conditions must be taken into account when
designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document. However, should
you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no respon-
sibility for such damage.
The technical information specified herein is intended only to show the typical functions of and examples of
application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or
exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility
whatsoever for any dispute arising from the use of such technical information.
The Products specified in this document are intended to be used with general-use electronic equipment or
devices (such as audio visual equipment, office-automation equipment, communication devices, electronic
appliances and amusement devices).
The Products are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or
malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard against the
possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as
derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your
use of any Product outside of the prescribed scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or system
which requires an extremely high level of reliability the failure or malfunction of which may result in a direct
threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment,
aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no
responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended
to be used for any such special purpose, please contact a ROHM sales representative before purchasing.
If you intend to export or ship overseas any Product or technology specified herein that may be controlled under
the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.
Thank you for your accessing to ROHM product informations.
More detail product informations and catalogs are available, please contact your nearest sales office.
THE AMERICAS / EUROPE / ASIA / JAPAN
ROHM Customer Support System
Contact us : webmaster@ rohm.co.jp
www.rohm.com
TEL : +81-75-311-2121
FAX : +81-75-315-0172
Copyright © 2008 ROHM CO.,LTD.
21 Saiin Mizosaki-cho, Ukyo-ku, Kyoto 615-8585, Japan
Appendix1-Rev3.0
相关型号:
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BD3506EFV-E2
Fixed Positive LDO Regulator, 1.2V, 0.16V Dropout, CMOS, PDSO20, 5 X 6.40 MM, 1 MM HEIGHT, ROHS COMPLIANT, HTSSOP-20
ROHM
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