BD37A41FVM-E2 [ROHM]
Power Supply Management Circuit, Fixed, 1 Channel, PDSO8, ROHS COMPLIANT, MSOP-8;型号: | BD37A41FVM-E2 |
厂家: | ROHM |
描述: | Power Supply Management Circuit, Fixed, 1 Channel, PDSO8, ROHS COMPLIANT, MSOP-8 光电二极管 |
文件: | 总9页 (文件大小:1402K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TECHNICAL NOTE
Power Management LSI Series for Automotive Body Control
Voltage Detector ICs
with Watchdog Timer
BD37A19FVM,BD37A41FVM,BD87A28FVM,BD87A29FVM
BD87A34FVM,BD87A41FVM,BD99A41F
zDescription
The BD37A19FVM,BD37A41FVM,BD87A28FVM,BD87A29FVM,BD87A34FVM,BD87A41FVM,BD99A41F is a watchdog timer reset IC. It
delivers a high precision detection voltage of ±1.5% and a super-low current consumption of 5 µA (Typ.). It can be used in a wide range of
electronic devices to monitor power supply voltages and in system operation to prevent runaway operation.
zFeatures
1) High precision detection voltage: ±1.5%, ±2.5% (Ta = −40°C to 105°C)
2) Super-low current consumption: 5 µA (Typ.)
3) Built-in watchdog timer
4) Reset delay time can be set with the CT pin's external capacitance.
5) Watchdog timer monitor time and reset time can be set with the CTW pin's external capacitance.
6) Output circuit type: N-channel open drain
7) Package: MSOP8(BD37A□□FVM,BD87A□□FVM)/SOP8(BD99A41F)
zApplications
All devices using microcontrollers or DSP, including vehicle equipment, displays, servers, DVD players, and telephone systems.
zProduct line
INH logic
H: Active
BD37A□□FVM
1.9 V/4.1V
L: Active
Model
Detection voltage
BD99A41F
4.1 V
BD87A□□FVM
2.8V/2.9V/3.4 V/4.1V
●Absolute maximum ratings (Ta = 25°C)
Parameter
Symbol
VDD
Limit
−0.3 to 10
Unit
V
Power supply voltage
CT pin voltage
VCT
−0.3 to VDD + 0.3
−0.3 to VDD + 0.3
−0.3 to VDD + 0.3
−0.3 to VDD + 0.3
−0.3 to VDD + 0.3
V
V
V
V
V
CTW pin voltage
VCTW
VRESET
VINH
RESET pin voltage
INH pin voltage
CLK pin voltage
VCLK
*1
470
Power dissipation
Pd
mW
*2
550
Operating ambient temperature
Storage temperature
Topr
Tstg
−40 to + 105
−55 to + 125
125
°C
°C
°C
Maximum junction temperature
Tjmax
*1 MSOP8 : Reduced by 4.70 mW/°C over 25°C, when mounted on a glass epoxy board (70 mm × 70 mm × 1.6 mm).
*2 SOP8 : Reduced by 5.50 mW/°C over 25°C, when mounted on a glass epoxy board (70 mm × 70 mm × 1.6 mm).
Ver.B July 2006
●Recommended operating ranges (Ta = −40°C to 105°C)
Parameter
Symbol
VDD RESET
VDD WDT
Min.
1.0
Max.
10
Unit
V
RESET power supply voltage
WDT power supply voltage
2.5
10
V
●Electrical characteristics (Unless otherwise specified, Ta = −40°C to 105°C, VDD = 5 V)
Limit
Parameter
Symbol
Unit
Conditions
Min.
Typ.
Max.
[Overall]
Total supply current 1
(during WDT operation)
Total supply current 2
(when WDT stopped)
Output leak current
Output current capacity
[RESET]
INH : WDT ON Logic Input
IDD1
IDD2
—
—
5
5
14
14
µA
CTW = 0.1 µF
µA
µA
INH : WDT OFF Logic Input
Ileak
IOL
—
—
—
1
VDD = VDS = 10 V
0.7
—
mA VDD = 1.2 V, VDS = 0.5 V
1.9V Detect
VDET1
VDET1
VDET1
VDET1
VDET1
VDET2
VDET2
VDET2
VDET2
VDET2
Vrhys
1.871
2.758
1.900
2.800
1.929
2.842
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Ta = 25°C
2.8V Detect
2.9V Detect
3.4V Detect
4.1V Detect
1.9V Detect
2.8V Detect
2.9V Detect
3.4V Detect
4.1V Detect
1.9V Detect
2.8V Detect
2.9V Detect
3.4V Detect
4.1V Detect
Ta = 25°C
Detection
voltage 1
2.886
2.930
2.974
Ta = 25°C
3.349
3.400
3.451
Ta = 25°C
4.039
4.100
4.162
Ta = 25°C
1.852
1.900
1.948
Ta = −40 to 105°C
Ta = −40 to 105°C
Ta = −40 to 105°C
Ta = −40 to 105°C
Ta = −40 to 105°C
Ta = −40 to 105°C
Ta = −40 to 105°C
Ta = −40 to 105°C
Ta = −40 to 105°C
Ta = −40 to 105°C
CT = 0.001 µF*1
When VDD = VDET ±0.5 V
2.730
2.800
2.870
Detection
voltage 2
2.857
2.930
3.003
3.315
3.400
3.485
4.007
4.100
4.202
VDET × 0.03
VDET × 0.018
VDET × 0.02
VDET × 0.02
VDET × 0.018
VDET × 0.13
VDET × 0.045
VDET × 0.05
VDET × 0.05
VDET × 0.035
VDET × 0.19
VDET × 0.060
VDET × 0.06
VDET × 0.07
VDET × 0.050
Vrhys
Hysteresis
width
Vrhys
Vrhys
Vrhys
RESET transmission delay
time: low → high
TPLH
3.9
6.9
10.1
ms
Delay circuit resistance
Delay pin threshold voltage
Delay pin output current
Min. operating voltage
[WDT]
Rrst
VCTH
ICT
5.8
VDD × 0.3
150
10.0
14.5
VDD × 0.6
—
MΩ VCT = GND
VDD × 0.45
V
µA
V
RL = 470 KΩ
—
—
VDD = 1.50 V, VCT = 0.5 V
VOL ≤ 0.4 V, RL = 470 KΩ
VOPL
1.0
—
WDT monitor time
TwH
7.0
2.4
10.0
3.3
—
20.0
7.0
ms CTW = 0.01 µF*2
ms CTW = 0.01 µF*3
WDT reset time
TwL
Clock input pulse width
CLK high threshold voltage
CLK low threshold voltage
CLK high threshold voltage
CLK low threshold voltage
CTW charge current
CTW discharge current
TWCLK
VCLKH
VCLKL
VINHH
VINHL
ICTWC
ICTWO
500
—
ns
V
VDD × 0.8
0
—
VDD
—
VDD × 0.3
VDD
V
VDD × 0.8
0
—
V
—
VDD × 0.3
0.75
V
0.25
0.50
1.50
µA
µA
VCTW = 0.2 V
VCTW = 0.8 V
0.75
2.00
*1 TPLH can be varied by changing the CT capacitance value.
TPLH (s) ≈ 0.69 × Rrst (MΩ) × CT (µF)
Rrst = 10 MΩ
(Typ.)
(Typ.)
*2 TwH can be varied by changing the CT capacitance value.
TwH (s) ≈ (0.5 × CTW (µF))/ICTWC (µA)
ICTWC = 0.5 µA
*3 TwL can be varied by changing the CTW capacitance value.
TwL (s) ≈ (0.5 × CTW (µF))/ICTWO (µA)
ICTWO = 1.5 µA (Typ.)
Note: This IC is not designed to be radiation-resistant.
2/8
●Reference data (Unless otherwise specified, Ta = 25°C) : 4.1V Detection
10
1400
1200
1000
800
600
400
200
0
12
10
8
Ta=105°C
8
6
4
2
0
6
Ta=25°C
4
Ta=−40°C
2
0
0
2
4
6
8
10
0
1
2
3
4
5
0
2
4
6
8
10
SUPPLY VOLTAGE: VDD [V]
Fig. 1 Detection Voltage
SUPPLY VOLTAGE: VDD [V]
Fig. 2 Total Supply Current
CT PIN VOLTAGE: VCT [V]
Fig. 3 Delay Pin Current vs
Power Supply Voltage
2
1.5
1
10000
1000
100
10
2
1.5
1
Ta=105°C
Ta=25°C
Ta=−40°C
0.5
0
0.5
0
-0.5
-1
1
0
2
4
6
8
10
0.0001
0.001
0.01
0.1
0
1
2
3
4
5
RESET VOLTAGE: VRESET [V]
Fig. 5 Output Current
CT PIN CAPACITY: CT [µF]
CTW PIN VOLTAGE: VCTW [V]
Fig. 6 RESET Transmission Delay
Time vs Capacitance
Fig. 4 CTW Charge Discharge Current
5
4.75
4.5
1
0.75
0.5
10000
1000
100
10
Monitor time
L→H
H→L
4.25
4
Reset time
0.25
0
1
3.75
3.5
0.1
0.001
0.01
0.1
1
10
-40
0
40
80
-40
0
40
80
CTW PIN CAPACITY : CTW[µF]
AMBIENT TEMPERATURE: Ta [
]
AMBIENT TEMPERATURE: Ta [
]
℃
℃
Fig. 9 Operating Marginal Voltage vs
Temperature
Fig. 7 WDT Time vs Capacitance
Fig. 8 Detection Voltage vs Temperature
13
12
11
10
9
10
9
15
12
9
Monitor time
8
7
6
Reset time
6
3
8
-40
0
40
80
5
0
-40
0
40
80
-40
0
40
80
AMBIENT TEMPERATURE: Ta [℃]
AMBIENT TEMPERATURE: Ta [
]
AMBIENT TEMPERATURE: Ta [
]
℃
℃
Fig. 10 CT Pin Circuit Resistance vs
Temperature
Fig. 11 RESET Transmission Delay
Time vs Temperature
Fig. 12 WDT Time vs Temperature
3/8
●Block diagram
BD37A□□FVM
BD87A□□FVM/BD99A41F
VDD
VDD
RESET
RESET
8
8
CTW
CLK
1
1
R
S
R
S
Q
Q
+
+
Vref
Vref
N.C.
INH
CT
CT
2
7
2
3
7
VDD
VDD
Pulse
generation
circuit
+
+
INH
R
S
R
S
CLK
GND
Q
CTW
Q
3
6
6
+
+
Pulse
generation
circuit
VthH
VthH
VthL
VthL
GND
VDD
N.C.
VDD
4
5
4
5
CT pin capacitor: 470 pF to 3.3 µF
CTW pin capacitor: 0.001 µF to 10 µF
Fig.13
●Pin assignments
8 7 6 5
1 2 3 4
Fig.14
BD37A□□FVM
BD87A□□FVM/BD99A41F
Pin
name
Pin
name
No.
1
Function
No.
1
Function
CLK
CT
Clock input from microcontroller
Reset delay time setting capacitor connection pin
WDT time setting capacitor connection pin
Power supply pin
CTW
WDT time setting capacitor connection pin
Reset delay time setting capacitor connection pin
Clock input from microcontroller
GND pin
2
2
CT
3
CTW
VDD
N.C.
GND
3
CLK
GND
VDD
4
4
5
NC pin
5
Power supply pin
WDT on/off setting pin
6
GND pin
INH=H/L:WDT=OFF/ON(BD87A□□FVM)
INH=H/L:WDT=ON/OFF(BD99A41F)
6
INH
WDT on/off setting pin
INH=H/L:WDT=ON/OFF
7
8
INH
7
8
N.C.
NC pin
RESET Reset output pin
RESET Reset output pin
4/8
●I/O Circuit diagram
CT
INH
CT
VDD
VDD
VDD
VDD
10MΩ(Typ.)
CT
CLK
INH
CTW
VDD
RESET
VDD
RESET
CTW
Fig.15
●Timing chart
VDETH
VDET
VDD
WDT circuit turns off
when INH is low.
VDETH = VDET + Vrhys
0
INH
(BD37A□□FVM/BD99A41F)
0
WDT circuit turns off
when INH is high.
INH
(BD87A□□FVM)
0
CLK
0
*4 TWCLK
TWCLK
VCT
VCTH
0
VthH
VthL
VCTW
0
*2
*1
TPLH
*3
TWL
TWH
RESET
0
(5) (4) (5) (6)
(8)
(5)
(9)
(4)
(5)
(2)
(10)
(3)
(1)(2)(3)
(4)
(7)
(7)
(4)
(5)
(4)
(4) (5)(10)(11)
(2)
(3)
(10)
Fig.16
●Explanation
(1) The RESET pin voltage (RESET) switches to low when the power supply voltage (VDD) falls to 0.8 V.
(2) The external capacitor connected to the CT pin begins to charge when VDD rises above the reset detection voltage (VDETH). The
RESET signal stays low until VDD reaches the VDETH voltage and switches to high when VDD reaches or exceeds the VDETH voltage.
The RESET transmission delay time TPLH allowed to elapse before RESET switches from low to high is given by the following equation:
TPLH (s) ≈ 0.69 × Rrst × CT (µF) [1]
Rrst denotes the IC's built-in resistance and is designed to be 10 MΩ (Typ.). CT denotes the external capacitor connected to the CT pin.
(3) The external capacitor connected to the CTW pin begins to charge when RESET rises, triggering the watchdog timer.
(4) The CTW pin state switches from charge to discharge when the CTW pin voltage (VCTW) reaches VthH, and RESET switches from high
to low. The watchdog timer monitor time TWH is given by the following equation:
TWH (s) ≈ (0.5 × CTW (µF))/(ICTWC) [2]
ICTWC denotes the CTW charge current and is designed to be 0.50 µA (Typ.). CTW denotes the external capacitor connected to the
CTW pin.
5/8
(5) The CTW pin state switches from charge to discharge when VCTW reaches VthL, and RESET switches from low to high. The watchdog
timer reset time TWL is given by the following equation:
TWL (s) ≈ (0.5 × CTW (µF))/(ICTWO) [3]
ICTWO denotes the CTW discharge current and is designed to be 1.50 µA (Typ.).
(6) The CTW pin state may not switch from charge to discharge when the CLK input pulse width TWCLK is short. Use a TWCLK input pulse
width of at least 500 ns.
TWCLK ≥ 500 ns (Min.)
(7) When a pulse (positive edge trigger) of at least 500 ns is input to the CLK pin while the CTW pin is charging, the CTW state switches from
charge to discharge. Once it discharges to VthL, it will charge again.
(8) Watchdog timer operation is forced off when the INH pin switches to low:BD37A□□FVM (Switches to high:BD87A□□FVM,BD97A41F).
At that time, only the watchdog timer is turned off. Reset detection is performed normally.
(9) The watchdog timer function turns on when the INH pin switches to high. The external capacitor connected to the CTW pin begins to
charge at that time.
(10) RESET switches from high to low when VDD falls to the RESET detection voltage (VDET) or lower.
(11) When VDD falls to 0 V, the RESET signal stays low until VDD reaches 0.8 V.
●Heat reduction curve
MSOP8
SOP8
800
600
400
200
800
600
400
200
When mounted on a glass epoxy board
(70 mm × 70 mm × 1.6mm) θja = 181.8 (°C /W)
When mounted on a glass epoxy board
(70 mm × 70 mm × 1.6mm) θja = 212.8 (°C /W)
550mW
470mW
105℃
105℃
0
G
0
25
50
75
100
125
0
25
50
75
100
125
AMBIENT TEMPERATURE: Ta [℃]
AMBIENT TEMPERATURE: Ta [℃]
Fig.17
●External settings for pins and precautions
1) Connect a capacitor (0.001 µF to 1,000 µF) between the VDD and GND pins when the power line impedance is high. Use of the IC when
the power line impedance is high may result in oscillation.
2) External capacitance
A capacitor must be connected to the CTW pin. When using a large capacitor such as 1 µF, the INH pin must allow a CTW discharge time of
at least 2 ms. The power-on reset time is given by equation [1] on page 5. The WDT time is given by equations [2] and [3] on page 5, 6. The
setting times are proportional to the capacitance value from the equations, so the maximum and minimum setting times can be calculated
from the electrical characteristics according to the capacitance. Note however that the electrical characteristics do not include the external
capacitor's temperature characteristics.
●Operation Notes
1.
Absolute maximum ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down the
devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated values will expect to
exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses.
2. GND voltage
The potential of GND pin must be minimum potential in all operating conditions.
3. Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
4.
Inter-pin shorts and mounting errors
Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any connection error or if pins
are shorted together.
6/8
5. Actions in strong electromagnetic field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction.
6. Testing on application boards
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always discharge
capacitors after each process or step. Always turn the IC's power supply off before connecting it to or removing it from a jig or fixture during
the inspection process. Ground the IC during assembly steps as an antistatic measure. Use similar precaution when transporting or storing
the IC.
7. Regarding input pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode or transistor. For
example, the relation between each potential is as follows:
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes can result in mutual interference among
circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes operate, such as applying a voltage that is
lower than the GND (P substrate) voltage to an input pin, should not be used.
Resistor
Transistor (NPN)
B
(Pin B)
(Pin A)
(Pin B)
C
E
B
C
E
P
P
GND
Parasitic element or
P+
P+
P+
P+
N
N
N
P
N
N
N
transistor
Parasitic element
GND
P substrate
GND
(Pin A)
Parasitic element
or transistor
Parasitic element
Fig. 18 Example of IC structure
8. Ground Wiring Pattern
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single ground
point at the ground potential of application so that the pattern wiring resistance and voltage variations caused by large currents do not cause
variations in the small signal ground voltage. Be careful not to change the GND wiring pattern of any external components, either.
9. Applications or inspection processes with modes where the potentials of the VDD pin and other pins may be reversed from their normal states
may cause damage to the IC’s internal circuitry or elements. Use an output pin capacitance of 1000µF or lower in case VDD is shorted with the
GND pin while the external capacitor is charged. It is recommended to insert a diode for preventing back current flow in series with VDD or
bypass diodes between Vcc and each pin.
Bypass diode
Back current prevention diode
VDD
Pin
Fig.19
10.
When VDD falls below the operating marginal voltage, output will be open. When output is being pulled up to input, output will be equivalent
to VDD.
11. Input pin
The CLK and INH pins comprise inverter gates and should not be left open. (These pins should be either pulled up or down.) Input to the CLK
pin is detected using a positive edge trigger and does not affect the CLK signal duty. Input the trigger to the CLK pin within the TWH time.
7/8
●Selecting a model name when ordering
A 4
V M
B D 3 7
1 F
T R
ROHM model
name
Detection
voltage
Taping
Part number
Package type
FVM : MSOP8
F : SOP8
E2: Reel-wound embossed taping
TR: Reel-wound embossed taping
37A: H Active
87A: L Active
99A: H Active
MSOP8
<Dimension>
<Tape and Reel information>
Tape
Embossed carrier tape
3000pcs
Quantity
2.9 0.1
TR
8
5
Direction
of feed
(The direction is the 1pin of product is at the upper light when you
hold
reel on the left hand and you pull out the tape on the right hand)
1
4
+0.05
−0.03
0.145
0.475
+0.05
0.22 −0.04
M
0.08
0.65
0.08 S
X X
X
X X
X
X X
X
X X
X
X X
X
X
X
X
X
X
X
X X
X
X X
X X
X
X X
X
X X
X
Direction
of
1Pin
Reel
(Unit:mm)
※When you order , please order in times the amount of package quantity.
SOP8
<Dimension>
<Tape and Reel information>
Tape
Embossed carrier tape
Quantity
2500pcs
Direction
of feed
E2
5.0 0.2
8
5
(The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand)
1
4
0.15 0.1
0.1
1.27
0.4 0.1
1Pin
Direction of feed
Reel
(Unit:mm
※When you order , please order in times the amount of package quantity.
Catalog No.05T391Be '06.7 ROHM C 1000 TSU
Appendix
Notes
No technical content pages of this document may be reproduced in any form or transmitted by any
means without prior permission of ROHM CO.,LTD.
The contents described herein are subject to change without notice. The specifications for the
product described in this document are for reference only. Upon actual use, therefore, please request
that specifications to be separately delivered.
Application circuit diagrams and circuit constants contained herein are shown as examples of standard
use and operation. Please pay careful attention to the peripheral conditions when designing circuits
and deciding upon circuit constants in the set.
Any data, including, but not limited to application circuit diagrams information, described herein
are intended only as illustrations of such devices and not as the specifications for such devices. ROHM
CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any
third party's intellectual property rights or other proprietary rights, and further, assumes no liability of
whatsoever nature in the event of any such infringement, or arising from or connected with or related
to the use of such devices.
Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or
otherwise dispose of the same, no express or implied right or license to practice or commercially
exploit any intellectual property rights or other proprietary rights owned or controlled by
ROHM CO., LTD. is granted to any such buyer.
Products listed in this document are no antiradiation design.
The products listed in this document are designed to be used with ordinary electronic equipment or devices
(such as audio visual equipment, office-automation equipment, communications devices, electrical
appliances and electronic toys).
Should you intend to use these products with equipment or devices which require an extremely high level
of reliability and the malfunction of which would directly endanger human life (such as medical
instruments, transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers
and other safety devices), please be sure to consult with our sales representative in advance.
It is our top priority to supply products with the utmost quality and reliability. However, there is always a chance
of failure due to unexpected factors. Therefore, please take into account the derating characteristics and allow
for sufficient safety features, such as extra margin, anti-flammability, and fail-safe measures when designing in
order to prevent possible accidents that may result in bodily harm or fire caused by component failure. ROHM
cannot be held responsible for any damages arising from the use of the products under conditions out of the
range of the specifications or due to non-compliance with the NOTES specified in this catalog.
Thank you for your accessing to ROHM product informations.
More detail product informations and catalogs are available, please contact your nearest sales office.
THE AMERICAS / EUROPE / ASIA / JAPAN
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Contact us : webmaster@ rohm.co.jp
www.rohm.com
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Copyright © 2008 ROHM CO.,LTD.
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Appendix1-Rev2.0
相关型号:
BD380-10
Power Bipolar Transistor, 2A I(C), 80V V(BR)CEO, 1-Element, PNP, Silicon, TO-126, Plastic/Epoxy, 3 Pin
SAMSUNG
BD380-16
Power Bipolar Transistor, 2A I(C), 80V V(BR)CEO, 1-Element, PNP, Silicon, TO-126, Plastic/Epoxy, 3 Pin
SAMSUNG
BD380-25
Power Bipolar Transistor, 2A I(C), 80V V(BR)CEO, 1-Element, PNP, Silicon, TO-126, Plastic/Epoxy, 3 Pin
SAMSUNG
BD380-6
Power Bipolar Transistor, 2A I(C), 80V V(BR)CEO, 1-Element, PNP, Silicon, TO-126, Plastic/Epoxy, 3 Pin
SAMSUNG
BD38010
Power Bipolar Transistor, 2A I(C), 80V V(BR)CEO, 1-Element, PNP, Silicon, TO-126, Plastic/Epoxy, 3 Pin
FAIRCHILD
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