BD39040MUF-C_技术文档

Datasheet

Supervisor IC

System Power Good + Watchdog Timer +

Reset for Automotive

BD39040MUF-C

General Description

Key Specifications

BD39040MUF-C is a supervisor IC with quad power

good, Watchdog timer and reset. This IC enables existing

system to improve its ASIL level easily.



VDD Input Voltage Range:

2.7 V to 5.5 V

(VDD voltage level needs to be fixed within this range

in 10% accuracy to avoid RSTIN reset detection)

Detection Voltage (VDD POR/Power Good)

The BD39040MUF-C includes built-in self-test (BIST).



Under Voltage Detection:

Over Voltage Detection:

Reset Off Time:

-10 % (3 % accuracy)

+10 % (3 % accuracy)

10 ms

Features



AEC-Q100 Qualified^{(Note 1)}



Operating Temperature Range: -40 °C to +125 °C

Quad Power Good for External Inputs

Over Voltage Detection (OVD)

Under Voltage Detection (UVD)

Adjustable Window Watchdog Timer(WDT)

Reset for VDD Input (POR)

Special Characteristics

Reference Voltage Accuracy



Under Voltage Detection:

Over Voltage Detection:

±3.0 %

Built-in Self-test (BIST)

(Note 1) Grade 1

Applications

Package

VQFN16FV3030

W (Typ) x D (Typ) x H (Max)

3.00 mm x 3.00 mm x 1.00 mm



Automotive for ADAS

Camera Module

Microwave Module

Power Train ECU

Other ECU

Close-up

VQFN16FV3030

Wettable Flank Package

Typical Application Circuit

Battery

VO1

RSTIN

DIN1

XRSTOUT

PG1

VDD

VO2

VO3

DIN2

DIN3

PG2

PMIC/

Discrete DCDC

VO4

BD39040MUF-C

PG3

PG4

Processor

VO5

DIN4

WDIN

WDEN

RTW

WDOUT

GND

〇Product structure : Silicon integrated circuit 〇This product has no designed protection against radioactive rays

www.rohm.com

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

1/26

TSZ22111 • 14 • 001

BD39040MUF-C

Contents

General Description ................................................................................................................................................................1

Features.................................................................................................................................................................................1

Applications............................................................................................................................................................................1

Key Specifications...................................................................................................................................................................1

Special Characteristics............................................................................................................................................................1

Package .............................................................................................................................................................................1

Typical Application Circuit........................................................................................................................................................1

Pin Configuration ....................................................................................................................................................................3

Pin Descriptions......................................................................................................................................................................3

Block Diagram ........................................................................................................................................................................4

Absolute Maximum Ratings.....................................................................................................................................................9

Thermal Resistance................................................................................................................................................................9

Recommended Operating Conditions ......................................................................................................................................9

Electrical Characteristics .....................................................................................................................................................10

Typical Performance Curves..................................................................................................................................................12

Timing Chart.........................................................................................................................................................................16

Application Example..............................................................................................................................................................20

Operational Notes.................................................................................................................................................................22

Ordering Information.............................................................................................................................................................24

Marking Diagram...................................................................................................................................................................24

Physical Dimension and Packing Information.........................................................................................................................25

Revision History....................................................................................................................................................................26

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

2/26

BD39040MUF-C

Pin Configuration

(TOP View)

12

11

10

9

WDEN 13

WDIN 14

8

7

6

5

PG2

DIN2

EXP-PAD

XRSTOUT 15

WDOUT 16

PG1

DIN1

1

2

3

4

Pin Descriptions

Pin No.

1

Pin Name

VDD

Function

IC’s Power Source

The VDD pin voltage divided by external resistor input pin. Nominal voltage level

needs to be 0.8 V.

IC’s Power Ground

WDT frequency setting pin. FAST Timeout and SLOW Timeout is adjusted by

the resistor value for this pin.

2

3

4

RSTIN

GND

RTW

Voltage for monitoring channel divided by external resistor input pin. Nominal

voltage level needs to be 0.8 V.

POWER GOOD output pin for the DIN1 pin, and Nch Open Drain output.

Hi-Z for assertion, and Low for de-assertion is its value. Please be pulled-up by

external resistor.

It can be pulled-up to any voltage source.

Voltage for monitoring channel divided by external resistor input pin. Nominal

voltage level needs to be 0.8 V.

POWER GOOD output pin for the DIN2 pin, and Nch Open Drain output.

Hi-Z for assertion, and Low for de-assertion is its value. Please be pulled-up by

external resistor.

It can be pulled-up to any voltage source.

Voltage for monitoring channel divided by external resistor input pin. Nominal

voltage level needs to be 0.8 V.

POWER GOOD output pin for the DIN3 pin, and Nch Open Drain output.

Hi-Z for assertion, and Low for de-assertion is its value. Please be pulled-up by

external resistor.

It can be pulled-up to any voltage source.

Voltage for monitoring channel divided by external resistor input pin. Nominal

voltage level needs to be 0.8 V.

POWER GOOD output pin for the DIN4 pin, and Nch Open Drain output.

Hi-Z for assertion, and Low for de-assertion is its value. Please be pulled-up by

external resistor.

5

DIN1

PG1

DIN2

PG2

DIN3

PG3

DIN4

PG4

6

7

8

9

10

11

12

It can be pulled-up to any voltage source.

13

14

WDEN

WDIN

Enable pin for WDT. High=Active, Low=Disable and WDT error is ignored.

Clock input pin for WDT

Reset output pin. Nch Open Drain output.

Hi-Z for normal, and Low for abnormal (reset) is its value. Please be pulled-up

by external resistor.

15

XRSTOUT

It can be pulled-up to any voltage source. Either error of OVD, UVD for RSTIN,

reference voltage monitoring, internal OSC monitoring, WDT and BIST at

power-up sequence causes this pin to drive low.

Buffer output pin for the WDEN pin input. Abnormal Power Source / the GND pin

shortage for the WDEN pin can be recognized by monitoring this pin. This pin

becomes Low when the XRSTOUT pin is low.

16

-

WDOUT

EXP-PAD

The EXP-PAD is connected to the PCB Ground plane.

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

3/26

BD39040MUF-C

Block Diagram

VDD

VREF

VREF_SUB

UVLO

VREF_DET

RSTIN_DET

BIST_ERROR

WDT_DET

BIST_EN

XRSTOUT

UVLO

CLK_DET

WDT_OSC_DET

XRSTOUT_DET

OVD

+

RSTIN

OVD_RST

UVD_RST

-

RSTIN_DET

BIST_EN

UVD

Filter

Counter

-

+

VREF_DET

OVD_RST

UVD_RST

BIST_ERROR

BIST_EN

BIST

OVD1,OVD2,

OVD3,OVD4

OVD2

OVD

BIST_EN

DIN1

UVD1,UVD2,

UVD3,UVD4

+

OVD1

UVD1

VREF

-

VREF_DET

Counter

PG1

BIST_EN

Filter

UVD

-

+

BIST_EN

DIN2

OVD

+

OVD2

UVD2

VREF

-

VREF_DET

Counter

PG2

PG3

PG4

BIST_EN

UVD

-

+

DIGITAL

BIST_EN

OVD

+

DIN3

DIN4

OVD3

UVD3

VREF

-

VREF_DET

Counter

BIST_EN

UVD

-

+

BIST_EN

OVD

+

OVD4

UVD4

VREF

-

VREF_DET

Counter

BIST_EN

UVD

Filter

-

+

BIST_EN

DIGITAL_OSC

CLK_DET

RTW

WDT_OSC

WDT_OSC_DET

WDT_DET

WDT

WDIN

VDD

WDOUT

XRSTOUT_DET

Counter

WDEN

UVLO

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

4/26

BD39040MUF-C

Block Diagrams - continued

Description of Blocks

Reference Voltage (VREF)

VREF is used for the reference voltage of monitoring each input voltage.

Reference Voltage (VREF_SUB)

VREF_SUB is used for the reference voltage of mutual monitoring VREF.

Reference Voltage (VREF_DET)

This is monitoring the 2 reference voltage, VREF and VREF_SUB.

This block contributes to the higher reliability by continuous, mutual monitoring each other if it turns on correctly.

Occurrence of error leads to Low output at the XRSTOUT pin and which is never de-asserted as long as abnormal status

lasts. It becomes High at 10 ms (Typ) after the voltage returned to the normal range.

Under Voltage Lockout Circuit (UVLO)

Protection circuit to prevent internal circuit from malfunction at lower voltage (Power-up sequence or input power supply

drop). This is monitoring the VDD pin voltage and UVLO works when it goes down to threshold level.

As UVLO is detected, the XRSTOUT, WDOUT, PG1, PG2, PG3 and PG4 pins output Low. Also Counter value in DIGITAL

BLOCK is initialized and DIGITAL_OSC/WDT_OSC stop working.

Oscillator (DIGITAL_OSC)

This OSC generates the clock to control DIGITAL BLOCK. The frequency of DIGITAL_OSC is fixed at 2.2 MHz

Oscillator (WDT_OSC)

This OSC generates the clock to control WDT.

The frequency of WDT_OSC is possible to be adjusted by the resistor value, so that FAST Timeout / SLOW Timeout is

changed by that.

WDT_OSC has the function to stop its working when the external resistor at the RTW pin is shorted or OPEN

(WDT_OSC_DET). Once CLK_DET is detected, XRSTOUT becomes Low.

Oscillator (CLK_DET)

This block monitors both DIGITAL_OSC and WDT_OSC.

2 OSCs always monitor their frequency each other and it leads to the higher reliability.

When an error happened at the monitoring, XRSTOUT becomes Low.

Over Voltage Detection (OVD1, OVD2, OVD3, OVD4, OVD_RST)

When input voltage goes over the threshold level, OVD is detected and the PG1, PG2, PG3 and PG4 pins are driven by Low.

Detecting pins are DIN1, DIN2, DIN3 and DIN4 and RSTIN. OVD detection for the DIN1, DIN2, DIN3 and DIN4 pins causes

corresponding the PG1, PG2, PG3 and PG4 pins to become Low. OVD detection for RSTIN causes the XRSTOUT pin to

become Low. These output signals become High at 10 ms (Typ) after each input pin returns within the nominal voltage range.

And each input has a filter in DIGITAL BLOCK, then overshoot within 50 µs (Min) is ignored.

Under Voltage Detection (UVD1, UVD2, UVD3, UVD4, UVD_RST)

When input voltage goes below the threshold level, UVD is detected and the PG1, PG2, PG3 and PG4 pins are driven by Low.

Detecting pins are DIN1, DIN2, DIN3, DIN4 and RSTIN. UVD detection for the DIN1, DIN2, DIN3 and DIN4 pins causes

corresponding the PG1, PG2, PG3 and PG4 pins to become Low. UVD detection for RSTIN causes the XRSTOUT pin to

become Low. These output signals become High at 10 ms (Typ) after each input pin returns within the nominal voltage range.

And each input has a filter in DIGITAL BLOCK, then undershoot within 50 µs (Min) is ignored.

BIST

When VDD Power on Reset (monitoring the RSTIN pin) is released, BIST is performed and self-test for DIN1, DIN2, DIN3,

DIN4, RSTIN and VREF_DET comparators are executed to see if each comparator correctly toggles their High/Low output

based on input level change.

BIST time (t_BIST) is 2 ms (Max). Once BIST ends without any errors, XRSTOUT becomes High. If an error is found during BIST,

XRSTOUT keeps Low and BIST is repeated until it passes.

Watchdog Timer (WDT)

Watchdog Timer (WDT) monitors microprocessor’s operation by detecting the time from both rise and fall edge of WDIN. If

BIST result is abnormality, WDT does not work and XRSTOUT is kept low. WDT is activated when WDOUT=High, and both

WDEN and XRSTOUT have to be High in order to get WDOUT to be High.

As long as the duty of WDIN clock is kept within “Trigger open window” in Figure 1, WDT does not detect any errors and

XRSTOUT stays at High.

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

5/26

BD39040MUF-C

Description of Blocks - continued

WDT Start from rising of WDOUT

Detecti on guaranteed

WDT

Fast Timeout

WDT

SLOW Ti meout

WDT

Trigger open window

WDIN

t_WF(Mi n)

t_WF(Max)

t[ms]

t_{O K}(Typ)

t_WS(Mi n)

t_WS(Max)

Figure 1. WDT Window Description

Sequence for FAST Timeout and SLOW Timeout are shown in Figure 2 and Figure 3.

WDT FAST Timeout Detection

1. WDIN input signal is ignored when WDOUT=Low. WDT is activated when WDOUT=High, and both WDEN and

XRSTOUT have to be High in order to get WDOUT to be High.

2. For the initial duration just after WDOUT goes to High, only SLOW Timeout detection works and FAST Timeout does not

work. Either Low or High input to the WDIN pin is acceptable as initial level. Once rising-up or falling-down edge of

WDIN comes within SLOW Timeout, both FAST Timeout and SLOW Timeout detections start to work.

3. These time detection monitors the time until next edge and when it detects WDIN edge within FAST Timeout (t_WF),

XRSTOUT and WDOUT becomes Low. XRSTOUT goes back to High after 10 ms (Typ) delay, while WDOUT goes back

to High after t_WDIM(500 ms: Typ) in addition to t_RSTL(10 ms: Typ) as long as WDEN=High.

t_WDIMis implemented as a time for microprocessor to be reset normally and stabilized.

If this time is unnecessary and WDT should be activated as soon as possible, WDEN may be controlled like state 5 in

the Figure 2.

WDEN toggle during XRSTOUT=Low is ignored.

4. When WDOUT becomes High, WDT is activated again and operation resumes.

Only SLOW Timeout detection works until the next first edge, and both SLOW Timeout and FAST Timeout starts at the

first edge like state 1 in Figure 2.

5. If this time is unnecessary and WDT should be activated as soon as possible, WDEN may be controlled like in Figure 2.

t_WDIMis canceled by toggling WDEN like High->Low->High and WDT is activated immediately even during t_WDIM

After WDT is enabled it works as same as state 2 in Figure 2.

.

6. When WDEN is Low, WDOUT becomes Low and WDT is disabled. During this period WDIN input signal is ignored and

XRSTOUT output is not affected by that.

FAST Timeout

Ignored

OK

Ignored OK

OK

WDIN

Enable:ON

Enable:OFF

Enable:ON

O.K.

Enable:OFF

WDEN

Ignored

SLOW

Timeout

SLOW

Timeout

SLOW

Timeout

O.K.

t_WS

FAST

Timeout

SLOW

Timeout

FAST

Timeout

SLOW

Timeout

O.K.

FAST

Timeout

SLOW

Timeout

O.K.

FAST

Timeout

SLOW

Timeout

FAST

Timeout

SLOW

Timeout

t_WF

t_WS

O.K.

Only SLOW Timeout is monitored for

the first edge right after WDOUT=High

FAST

Timeout

SLOW

Timeout

O.K.

FAST

Timeout

SLOW

Timeout

O.K.

FAST

Timeout

SLOW

Timeout

O.K.

t_RSTL

10ms

t_RSTL

10ms

XRSTOUT

WDOUT

t_WDIM

500ms

t_RSTL

10ms

t_RSTL

10ms

t_WDIM

⁵5^00ms

6

state

1

2

3

4

Figure 2. WDT FAST Timeout Detection

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

6/26

BD39040MUF-C

Block Diagrams - continued

WDT SLOW Timeout Detection

1. WDIN input signal is ignored when WDOUT=Low. WDT is activated when WDOUT=High, and both WDEN and

XRSTOUT have to be High in order to get WDOUT to be High.

2. For the initial duration just after WDOUT goes to High, only SLOW Timeout detection works and FAST Timeout does not

work. Either Low or High input to the WDIN pin is acceptable as initial level. Once rising-up or falling-down edge of

WDIN comes within SLOW Timeout, both FAST Timeout and SLOW Timeout detections start to work.

3. These time detection monitors the time until next edge and when it can not detect WDIN edge within SLOW Timeout

(t_WS), XRSTOUT and WDOUT becomes Low. XRSTOUT goes back to High after 10 ms (Typ) delay, while WDOUT goes

back to High after t_WDIM(500 ms: Typ) in addition to t_RSTL(10 ms: Typ) as long as WDEN=High.

t_WDIMis implemented as a time for microprocessor to be reset normally and stabilized.

If this time is unnecessary and WDT should be activated as soon as possible, WDEN may be controlled like state 5 in

the Figure 3.

WDEN toggle during XRSTOUT=Low is ignored.

4. When WDOUT becomes High, WDT is activated again and operation resumes.

Only SLOW Timeout detection works until the next first edge, and both SLOW Timeout and FAST Timeout starts at the

first edge like state 1 in Figure 3.

5. If this time is unnecessary and WDT should be activated as soon as possible, WDEN may be controlled like the Figure 3.

t_WDIMis canceled by toggling WDEN like High->Low->High and WDT is activated immediately even during t_WDIM

After WDT is enabled it works as same as state 2 in Figure3.

.

6. When WDEN is Low, WDOUT becomes Low and WDT is disabled. During this period WDIN input signal is ignored and

XRSTOUT output is not affected by that.

SLOW Timeout

Ignored

OK

Ignored OK

OK

WDIN

Enable:ON

Enable:OFF

Enable:ON

Enable:OFF

Ignored

WDEN

SLOW

Timeout

SLOW

Timeout

SLOW

Timeout

O.K.

t_WS

O.K.

FAST

Timeout

SLOW

Timeout

FAST

Timeout

SLOW

Timeout

O.K.

FAST

Timeout

SLOW

Timeout

O.K.

t_WF

t_WS

FAST

Timeout

SLOW

Timeout

O.K.

Only SLOW Timeout is monitored for

the first edge right after WDOUT=High

FAST

Timeout

SLOW

Timeout

O.K.

FAST

Timeout

SLOW

Timeout

O.K.

t_RSTL

10ms

t_RSTL

10ms

XRSTOUT

WDOUT

t_RSTL

10ms

t_RSTL

10ms

t_WDIM

500ms

t_WDIM

500ms

5

state

1

2

3

4

6

Figure 3. WDT SLOW Timeout Detection

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

7/26

BD39040MUF-C

WDT SLOW Timeout Detection - continued

SLOW Timeout

Ignored

SLOW Timeout

WDIN

Enable:ON

WDEN

SLOW

Timeout

SLOW

Timeout

SLOW

Timeout

SLOW

Timeout

O.K.

ｔ_WS

WDT

WDT Enabled

Disabled

t_RSTL

10ｍｓ

t_RSTL

10ｍｓ

t_RSTL

10ｍｓ

t_RSTL

10ｍｓ

XRSTOUT

WDOUT

t_RSTL

10ｍｓ

t_RSTL

10ｍｓ

t_RSTL

10ｍｓ

t_RSTL

10ｍｓ

t_WDIM

500ms

t_WDIM

500ms

t_WDIM

500ms

t_WDIM

500ms

Figure 4. XRSTOUT Behavior with Continuous WDT Timeout Detected

The window time for detection can be changed by the resistor value between the RTW and GND pins. Following figure

shows the detection time determined by R_RTWresistor value. Please refer to a table of electric characteristic regarding

accuracy. Customer can choose the value ranging from 10 kΩ to 47 kΩ according to their clock frequency. The ratio for

detection time is fixed and can be shown like this, FAST Timeout : SLOW Timeout = 1 : 2.

WDT Detection Time vs R_RTW

130

120

SLOW Timeout Detect Area guaranteed

110

100

90

80

70

60

50

40

30

20

10

0

SLOW Timeout Detect

FAST/SLOW Normal time

FAST Timeout Detect

FAST Timeout Detect Area guaranteed

10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47

R_RTW[kΩ]

Figure 5. Detection Time vs R_RTW

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

8/26

BD39040MUF-C

Absolute Maximum Ratings

Parameter

Symbol

Rating

Unit

VDD Voltage

V_DD

-0.3 to +7

V

RSTIN Voltage

V_RSTIN

V_DIN1,V_DIN2,

V_DIN3,V_DIN4

V_XRSTOUT

V_PG1,V_PG2,

V_PG3,V_PG4

DIN1,DIN2,DIN3,DIN4 Voltage

XRSTOUT Voltage

-0.3 to +7

V

PG1,PG2,PG3,PG4 Voltage

WDIN Voltage

V_WDIN

-0.3 to +7

V

WDEN Voltage

V_WDEN

V_WDOUT

V_RTW

-0.3 to +7

-0.3 to V_DD+0.3

150

V

WDOUT Voltage

RTW Voltage

V

Maximum Junction Temperature

Tjmax

°C

Storage Temperature Range

Tstg

-55 to +150

°C

Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit

between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is

operated over the absolute maximum ratings.

Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the

properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by

increasing board size and copper area so as not to exceed the maximum junction temperature rating.

Thermal Resistance^{(Note 1)}

Thermal Resistance (Typ)

Parameter

Symbol

Unit

1s^{(Note 3)}

2s2p^{(Note 4)}

VQFN16FV3030

Junction to Ambient

Junction to Top Characterization Parameter^{(Note 2)}

θ_JA

189.0

23

57.5

10

°C/W

Ψ_JT

(Note 1) Based on JESD51-2A(Still-Air).

(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside

surface of the component package.

(Note 3) Using a PCB board based on JESD51-3.

(Note 4) Using a PCB board based on JESD51-5, 7.

Layer Number of

Measurement Board

Material

FR-4

Board Size

Single

114.3 mm x 76.2 mm x 1.57 mmt

Top

Copper Pattern

Thickness

Footprints and Traces

70 μm

Thermal Via^{(Note 5)}

Layer Number of

Measurement Board

Material

FR-4

Board Size

114.3 mm x 76.2 mm x 1.6 mmt

2 Internal Layers

Pitch

Diameter

4 Layers

1.20 mm

Φ0.30 mm

Top

Copper Pattern

Bottom

Thickness

Copper Pattern

Thickness

Copper Pattern

Thickness

Footprints and Traces

70 μm

74.2 mm x 74.2 mm

35 μm

74.2 mm x 74.2 mm

70 μm

(Note 5) This thermal via connects with the copper pattern of all layers.

Recommended Operating Conditions

Parameter

Symbol

Min

Typ

Max

Unit

Operating Temperature

VDD Voltage

Topr

V_DD

-40

2.7

10

-

+125

5.5

°C

V

WDIN Input Pulse Width

WDIN Minimum ON Pulse / OFF Pulse

t_WDIN

t_WDP

ms

μs

125

100

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

9/26

BD39040MUF-C

Electrical Characteristics (Unless otherwise specified V_DD=2.7 V to 5.5 V, -40 °C ≤ Ta ≤ +125 °C)

Parameter

Symbol

Min

Typ

Max

Unit

Conditions

All

V_DD=4.1 V, R_RTW=27 kΩ,

XRSTOUT,PG1,PG2,PG3,PG4=H

Circuit Current

I_VDD

440

785

1320

2.65

µA

V

VDD Power On Reset Threshold

Voltage (Falling)

VDD Power On Reset Threshold

Voltage (Rising)

V_VDDUV1

2.25

2.50

VDD monitor

V_VDDUV2

V_VDDHYS

2.30

2.55

50

2.70

-

V

-

mV

VDD Power On Reset Hysteresis

Power Good

DIN1 Power Good Low Detect

Voltage

DIN1 Power Good High Detect

Voltage

V_UVD1

V_OVD1

0.698

0.854

0.720

0.880

0.742

0.906

V

DIN1 Pin Voltage=Sweep down

DIN1 Pin Voltage=Sweep up

DIN1 Input Filter Time

PG1 Low Voltage

t_DIN1

V_PG1L

I_LPG1

t_PG1

50

-

75

-

100

0.3

2

µs

V

I_PG1=1 mA

V_PG1=5.5 V

PG1 Leak Current

-

µA

ms

PG1 Assertion Delay Time

7

10

13

DIN2 Power Good Low Detect

Voltage

DIN2 Power Good High Detect

Voltage

V_UVD2

V_OVD2

0.698

0.854

0.720

0.880

0.742

0.906

V

DIN2 Pin Voltage=Sweep down

DIN2 Pin Voltage=Sweep up

DIN2 Input Filter Time

PG2 Low Voltage

t_DIN2

V_PG2L

I_LPG2

t_PG2

50

-

75

-

100

0.3

2

µs

V

I_PG2=1 mA

V_PG2=5.5 V

PG2 Leak Current

-

µA

ms

PG2 Assertion Delay Time

7

10

13

DIN3 Power Good Low Detect

Voltage

DIN3 Power Good High Detect

Voltage

DIN3 Pin Voltage=Sweep down

DIN3 Pin Voltage=Sweep up

V_UVD3

V_OVD3

0.698

0.854

0.720

0.880

0.742

0.906

V

DIN3 Input Filter Time

PG3 Low Voltage

t_DIN3

V_PG3L

I_LPG3

t_PG3

50

-

75

-

100

0.3

2

µs

V

I_PG3=1 m A

V_PG3=5.5 V

PG3 Leak Current

-

µA

ms

PG3 Assertion Delay Time

7

10

13

DIN4 Power Good Low Detect

Voltage

DIN4 Power Good High Detect

Voltage

V_UVD4

V_OVD4

0.698

0.854

0.720

0.880

0.742

0.906

V

DIN4 Pin Voltage=Sweep down

DIN4 Pin Voltage=Sweep up

DIN4 Input Filter Time

PG4 Low Voltage

t_DIN4

V_PG4L

I_LPG4

t_PG4

50

-

75

-

100

0.3

2

µs

V

I_PG4=1 mA

V_PG4=5.5 V

PG4 Leak Current

-

µA

ms

PG4 Assertion Delay Time

7

10

13

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

10/26

BD39040MUF-C

Electrical Characteristics (Unless otherwise specified V_DD=2.7 V to 5.5 V, -40 °C ≤ Ta ≤ +125 °C) - continued

Parameter

Symbol

Min

Typ

Max

Unit

Conditions

VDD Power On Reset

RSTIN Power Good Low Detect

Voltage

RSTIN Power Good High Detect

Voltage

RSTIN Pin Voltage=Sweep

down

V_UVDRST

V_OVDRST

0.698

0.854

0.720

0.880

0.742

0.906

V

RSTIN Pin Voltage=Sweep up

t_RSTIN

V_XRSTL

I_XRST

100

0.3

10

µs

V

RSTIN Input Filter Time

XRSTOUT Low Voltage

XRSTOUT Leak Current

XRSTOUT Assertion Delay Time

Watch Dog Timer

50

-

75

-

I_VDDRST=1 mA

V_VDDRST=5.5 V

-

µA

ms

t_XRSTL

7

10

13

R_RTW=10 kΩ

R_RTW=27 kΩ

R_RTW=47 kΩ

FAST Timeout Detect1

t_WF1

t_WS1

t_OK1

9.0

17.9

13.6

24.4

48.8

36.7

42.5

85.0

63.9

20

11.2

22.4

15.7

30.5

61.0

42.7

53.2

106.3

74.4

-

13.5

26.9

17.8

36.6

73.2

48.7

63.8

127.6

84.9

-

ms

µs

SLOW Timeout Detect1

FAST/SLOW Normal Time1

FAST Timeout Detect2

t_WF2

t_WS2

t_OK2

SLOW Timeout Detect2

FAST/SLOW Normal Time2

FAST Timeout Detect3

t_WF3

t_WS3

t_OK3

SLOW Timeout Detect3

FAST/SLOW Normal Time3

WDIN Detect Minimum Pulse Width

WDIN Initial Mask Time

WDIN Pull-down Resistor Value

t_WDIN

t_WDIM

R_WDIN

325

50

500

100

675

ms

kΩ

V_DD<5 V

150

0.2

x V_DD

WDIN Low Level Input Voltage

V_WDINL

-

V

0.8

x V_DD

WDIN High Level Input Voltage

WDEN Pull-down Resistor Value

WDEN Low Level Input Voltage

V_WDINH

R_WDEN

V_WDENL

-

100

-

V

kΩ

V

50

150

0.2

x V_DD

-

0.8

x V_DD

V_DD

WDEN High Level Input Voltage

V_WDENH

-

V

WDOUT Output High Voltage

WDOUT Output Low Voltage

V_OHWDO

V_OLWDO

-

V

I_WDOUT=-3 mA

I_WDOUT=+3 mA

-0.3

-

0.3

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

11/26

BD39040MUF-C

Typical Performance Curves

Figure 6. Circuit Current vs VDD Voltage

Figure 7. Circuit Current vs Temperature

Figure 8. RSTIN Power Good Low Detect Voltage

vs Temperature

Figure 9. RSTIN Power Good High Detect Voltage

vs Temperature

(“RSTIN UVD”, V_DD=3.3 V)

(“RSTIN OVD”, V_DD=3.3 V)

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

12/26

BD39040MUF-C

Typical Performance Curves - continued

Figure 10. DIN1 Power Good Low Detect Voltage

vs Temperature

Figure 11. DIN1 Power Good High Detect Voltage

vs Temperature

(“DIN1 UVD”, V_DD=3.3 V)

(“DIN1 OVD”, V_DD=3.3 V)

Figure 12. DIN2 Power Good Low Detect Voltage

vs Temperature

Figure 13. DIN2 Power Good High Detect Voltage

vs Temperature

(“DIN2 UVD”, V_DD=3.3 V)

(“DIN2 OVD”, V_DD=3.3 V)

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

13/26

BD39040MUF-C

Typical Performance Curves - continued

Figure 14. DIN3 Power Good Low Detect Voltage

vs Temperature

Figure 15. DIN3 Power Good High Detect Voltage

vs Temperature

(“DIN3 UVD”, V_DD=3.3 V)

(“DIN3 OVD”, V_DD=3.3 V)

Figure 16. DIN4 Power Good Low Detect Voltage

vs Temperature

Figure 17. DIN4 Power Good High Detect Voltage

vs Temperature

(“DIN4 UVD”, V_DD=3.3 V)

(“DIN4 OVD”, V_DD=3.3 V)

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

14/26

BD39040MUF-C

Typical Performance Curves - continued

Figure 18. VDD Power On Reset Threshold Voltage

vs Temperature

Figure 19. WDIN Input Current vs WDIN Input Voltage

(“WDIN Pull-down Resistor Value”, V_DD=3.3 V)

Figure 20. WDEN Input Current vs WDEN Input Voltage

(“WDEN Pull-down Resistor Value”, V_DD=3.3 V)

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

15/26

BD39040MUF-C

Timing Chart

Figure 21 shows ON/OFF normal sequence.

When UVLO (2.55 V) monitoring the VDD pin is released, internal OSC for DIGITAL BLOCK starts to work. Then after RSTIN

voltage reaches UVD release (adjustable), BIST starts to do self-test. If the BIST is normal, XRSTOUT goes to High at 10 ms

after RSTIN UVD released. If the BIST is abnormal, XRSTOUT, PG1 to PG4 and WDOUT stays at Low.

XRSTOUT goes to Low when either of 2 monitoring functions (RSTIN UVD or Watchdog Timer) is detected.

WDT block has initial mask time (Typ 500 ms). Even though High voltage is given to WDEN within this time from RSTIN UVD

released, WDT is not enabled. For example, as Figure 22 shows, in WDEN tied to VDD case WDT is enabled 500 ms after

RSTIN UVD released.

WDEN input signal works as an enable of Watchdog Timer. Even though clocks are input to the WDIN pin, they are ignored

as long as WDEN=Low. WDOUT is just a buffered version output of WDEN input and processor can use this output to

confirm if WDEN is correctly controlled by itself.

UVLO

Detect

UVLO

Release

VDD

RSTIN UVD

Release

RSTIN UVD

Detect

RSTIN

DIGITAL_OSC

(internal)

BIST time

(internal)

t_BIST

BIST is normal

t_VDDRST

XRSTOUT

BIST is abnormal

UVD1,UVD2,

UVD3,UVD4

Release

UVD3,UVD4 Release

t_{PG1, PG2,}

t_{PG3, PG4}

t

t_{PG1, PG2,}

t

t_{PG3, PG4}

t

BIST is abnormal

WDIN

WDT start

WDEN

Disabled

Enabled

Disabled

WDT function

(internal)

WDOUT

BIST is abnormal

Figure 21. Power ON/OFF Normal Sequence (WDEN is controlled by external signal)

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

16/26

BD39040MUF-C

Timing Chart - continued

UVLO

Release

UVLO

Detect

VDD

RSTIN UVD

Release

RSTIN UVD

Detect

RSTIN

DIGITAL_OSC

(internal)

BIST time

(internal)

t_BIST

BIST is normal

t_VDDRST

XRSTOUT

BIST is abnormal

UVD1,UVD2,

UVD3,UVD4

Release

UVD1,UVD2,

UVD3,UVD4 Release

t_{PG1, PG2,}

t_{PG3, PG4}

DIN1,DIN2,

DIN3,DIN4

t

t_{PG1, PG2,}

t

PG1,PG2,

PG3,PG4

t_{PG3, PG4}

t

BIST is abnormal

WDIN

t_WDIM(500ms)

WDT start

WDEN

Disabled

Enabled

Disabled

WDT function (internal)

WDOUT

BIST is abnormal

Figure 22. Power ON/OFF Sequence (WDEN is externally pulled-up to VDD)

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

17/26

BD39040MUF-C

Timing Chart - continued

Figure 23 shows monitoring sequence with VDD POR, DIN1, DIN2, DIN3 and DIN4 voltage detection and WDT monitoring.

XRSTOUT is qualified by either of RSTIN (VDD POR) and WDIN (WDT) and outputs Low level voltage when these are

detected.

When WDEN becomes Low, WDOUT goes to Low and WDT stops to work immediately.

PG1, PG2, PG3 and PG4 are de-asserted immediately de-bounce time by internal DIGITAL de-bounce filter when the

corresponding DIN1, DIN2, DIN3 and DIN4 input voltage goes out of PG window (±10 %). PG1, PG2, PG3 and PG4 are

asserted at 10 ms after DIN1, DIN2, DIN3 and DIN4 input voltage becomes inside PG window.

VDD

RSTIN OVD

Detect

RSTIN OVD

Release

+10%

RSTIN

-10%

RSTIN UVD

Release

RSTIN UVD

Detect

XRSTOUT

t_RSTL

SLOW

Timeout

FAST

Timeout

SLOW

Timeout

FAST

Timeout

WDIN

WDT OFF

WDEN

t_WDIM

WDOUT

WDT Monitoring time

WDT Unmonitored time

DIN1 UVD,DIN2 UVD,

DIN3 UVD,DIN4 UVD Detect

DIN1,DIN2,

DIN3,DIN4

+10%

DIN1 OVD,DIN2 OVD,

DIN3 OVD,DIN4 OVD Detect

-10%

DIN1 UVD,DIN2 UVD,

DIN1 OVD,DIN2 OVD,

DIN3 UVD,DIN4 UVD Release

DIN3 OVD,DIN4 OVD Release

t_PG1,t_PG2,

t_PG3,t_PG4

t_PG1,t_PG2,

t_PG3,t_PG4

PG1,PG2,

PG3,PG4

Figure 23. Monitoring Sequence 1

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

18/26

BD39040MUF-C

Timing Chart - continued

VDD

RSTIN OVD

+10%

RSTIN OVD

Release

Detect

RSTIN

-10%

RSTIN UVD

Release

RSTIN UVD

Detect

XRSTOUT

WDIN

t_RSTL

WDEN

t_WDIM

WDOUT

DIN1,DIN2,

DIN3,DIN4=Normal

PG1,PG2,

PG3,PG4=High

Figure 24. Monitoring Sequence 2 (2^ndreset factor appears and disappears within t_RSTL

)

VDD

RSTIN OVD

Release

+10%

Detect

RSTIN

-10%

RSTIN UVD

Detect

RSTIN UVD

Release

XRSTOUT

WDIN

t_RSTL

WDEN

t_WDIM

WDOUT

DIN1,DIN2,

DIN3,DIN4=Normal

PG1,PG2,

PG3,PG4=High

Figure 25. Monitoring Sequence 3 (2^ndreset factor appears within t_RSTLand disappear after t_RSTL

)

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

19/26

BD39040MUF-C

Application Example

VIN3

R_9B2

VIN4

R_11B

R_11A

R_9A

R₁₂

R₁₀

R_9B1

10

12

11

9

PG4

DIN4

PG3

DIN3

PG2

R₈

VIN2

13

14

15

16

8

7

6

5

WDEN

R_7B

R_7A

DIN2

PG1

WDIN

EXP-PAD

R₁₅

R₆

XRSTOUT

VIN1

R_5B

WDOUT

DIN1

R_5A

VDD

RSTIN

GND

RTW

1

2

3

4

U1

R_RTW

C₁

R_2B

R_2A

Figure 26. Typical Application Schematic

Example of Constant Setting

V_DD=3.3 V, R_RTW=27 kΩ, VIN1=3.3 V, VIN2=1.8 V, VIN3=1.5 V, VIN4=1.2 V

Item Value

Unit

-

Parts Number

BD39040MUF-C

Vendor

ROHM

MURATA

ROHM

U1

C₁

-

0.22

24

75

27

24

75

10

24

30

10

24

10

11

μF

kΩ

GCM188R71C224KA01

MCR01MZPD2402

MCR01MZPD7502

MCR01MZPD2702

MCR01MZPD2402

MCR01MZPD7502

MCR01MZPD1002

MCR01MZPD2402

MCR01MZPD3002

MCR01MZPD1002

MCR01MZPD2402

MCR01MZPD1002

MCR01MZPD1102

MCR01MZPD1002

MCR01MZPD2002

MCR01MZPD1002

R_2A

R_2B

R_RTW

R_5A

R_5B

R₆

R_7A

R_7B

R₈

R_9A

R_9B1

R_9B2

R₁₀

R_11A

R_11B

R₁₂

R₁₅

10

20

10

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

20/26

BD39040MUF-C

Application Example - continued

Procedure for Selecting Application Components

(1) Selecting input capacitor (C₁)

Place a ceramic capacitor connect to GND nearest the IC for the VDD pin.

Please consider temperature change, DC bias characteristics and dispersion enough, and it is necessary to choose the

product superior (over 0.1 µF at least) in thermal characteristics such as B characteristics or X7R characteristics.

The capacitor 1.5 times to 2 times larger than a limit is recommended about the pressure-resistant.

(2) Selecting a resistor of input pin (R_2A, R_2B, R_5A, R_5B, R_7A, R_7B, R_9A, R_9B1, R_9B2, R_11A, R_11B

Set a resistor divider voltage 0.8 V to input voltage V_DD, VIN1, VIN2, VIN3, VIN4.

)

푅_2퐴

푅_2퐴+ 푅_2퐵

RSTIN = 0.8 푉 = 푉_퐷퐷

×

푅_5퐴

푅_5퐴+ 푅_5퐵

DIN1 = 0.8 푉 = VIN1 ×

DINꢀ = 0.8 푉 = VINꢀ ×

푅_7퐴

푅_7퐴+ 푅_7퐵

푅_9퐴

DIN3 = 0.8 푉 = VIN3 ×

푅_9퐴+ 푅_9퐵ꢁ+ 푅_9퐵2

푅_ꢁꢁ퐴

푅_ꢁꢁ퐴+ 푅_ꢁꢁ퐵

DIN4 = 0.8 푉 = VIN4 ×

(3) Selecting a resistor of output pin (R₆, R₈, R₁₀, R₁₂, R₁₅)

Set more than 10 kΩ pull-up resistor connects to the VDD pin.

Please consider thermal characteristics and dispersion enough, and it is necessary to choose a resistor over 7.5 kΩ.

The PG1 to PG4 pins can be connected and used to OR output. In this case also, choose total impedance over 7.5 kΩ.

MCU

PG1

PG2

PG3

PG4

Figure 27. PG1, PG2, PG3, PG4 OR Output

(4) Selecting WDT (R_RTW

)

Place a resistor nearest GND for the RTW pin.

Change RTW resistor value enables WDT setting time change. Settable range is 10 kΩ to 47 kΩ.

Please consider thermal characteristics and dispersion enough, and it is necessary to choose component under ±1.0 %.

Refer to Figure 5 for the setting time.

(5) Expose thermal pad

The exposed thermal pad is highly recommended for GND connection.

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

21/26

BD39040MUF-C

Operational Notes

1. Reverse Connection of Power Supply

Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when

connecting the power supply, such as mounting an external diode between the power supply and the IC’s power

supply pins.

2. Power Supply Lines

Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at

all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic

capacitors.

3. Ground Voltage

Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.

4. Ground Wiring Pattern

When using both small-signal and large-current ground traces, the two ground traces should be routed separately but

connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal

ground caused by large currents. Also ensure that the ground traces of external components do not cause variations

on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.

5. Recommended Operating Conditions

The function and operation of the IC are guaranteed within the range specified by the recommended operating

conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical

characteristics.

6. Inrush Current

When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow

instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power

supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and

routing of connections.

7. Testing on Application Boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may

subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply

should always be turned off completely before connecting or removing it from the test setup during the inspection

process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during

transport and storage.

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

22/26

BD39040MUF-C

Operational Notes - continued

8. Inter-pin Short and Mounting Errors

Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in

damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.

Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and

unintentional solder bridge deposited in between pins during assembly to name a few.

9. Unused Input Pins

Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and

extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge

acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause

unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power

supply or ground line.

10.Regarding the Input Pin of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them

isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a

parasitic diode or transistor. For example (refer to figure below):

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to

operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be

avoided.

Resistor

Transistor (NPN)

Pin A

Pin B

B

E

C

Pin A

B

C

E

P

P⁺

N

P⁺

P

P⁺

N

Parasitic

Elements

Parasitic

Elements

P Substrate

GND GND

P Substrate

GND

Parasitic

Elements

Parasitic

Elements

N Region

close-by

Figure 28. Example of Monolithic IC Structure

11.Ceramic Capacitor

When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with

temperature and the decrease in nominal capacitance due to DC bias and others.

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

23/26

BD39040MUF-C

Ordering Information

B D 3

9

0

4

0 M U F

-

CE2

Part Number

Package

MUF: VQFN16FV3030

Packaging and forming specification

C: for Automotive

E2: Embossed tape and reel

Marking Diagram

VQFN16FV3030 (TOP VIEW)

Part Number Marking

D 3 9

0 4 0

LOT Number

Pin 1 Mark

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

24/26

BD39040MUF-C

Physical Dimension and Packing Information

Package Name

VQFN16FV3030

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

25/26

BD39040MUF-C

Revision History

Date

Revision

Rev.001

Changes

15.Feb.2019

New Release

www.rohm.com

TSZ22111 • 15 • 001

TSZ02201-0A3A0AM00460-1-2

15.Feb.2019 Rev.001

26/26

Notice

Precaution on using ROHM Products

(Note 1)

1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment

,

aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,

bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales

representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any

ROHM’s Products for Specific Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN

USA

EU

CHINA

CLASSⅢ

CLASSⅣ

CLASSⅡb

CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.

Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the

use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our

Products under any special or extraordinary environments or conditions (as exemplified below), your independent

verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.

However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble

cleaning agents for cleaning residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in

the range that does not exceed the maximum junction temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must

be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,

please consult with the ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice-PAA-E

Rev.004

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl₂, H₂S, NH₃, SO₂, and NO₂

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign

trade act, please consult with ROHM in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data.

2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the

Products with other articles such as components, circuits, systems or external equipment (including software).

3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM

will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to

manufacture or sell products containing the Products, subject to the terms and conditions herein.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice-PAA-E

Rev.004


型号：	BD39040MUF-C
厂家：	ROHM
描述：	BD39040MUF-C是一款具有电压监测、看门狗定时器和复位功能的电源监控IC。该集成电路使现有系统能够方便地提高其ASIL水平。BD39040MUF-C内置自我诊断功能（BIST: built-in self test）。8-channel power tree Reference DesignFor automotive ADAS and Info-Display 监控
文件：	总29页 (文件大小：2753K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BD39040MUF-C [ROHM]

相关型号：

SI9130DB

SI9135LG-T1

SI9135LG-T1-E3

SI9135_11

SI9136_11

SI9130CG-T1-E3

SI9130LG-T1-E3

SI9130_11

SI9137

SI9137DB

SI9137LG

SI9122E