BD6709FS-E2_技术文档

TECHNICAL NOTE

DC Brushless Motor Drivers for Cooling Fans

Speed Controllable

Single-phase Full-wave

DC Brushless Fan Motor Drivers

BD6709FS, BD6718FV, BD6721FS, BD6722FS

●Description

This is the summary of models that suit for 12V speed controllable fan for desktop PC and general consumer equipment.

They employ Bi-CDMOS process, and realize low ON resistance, low power consumption. They incorporate lock protection

and automatic restart circuit, current limiting circuit.

●Features

1) Power Tr incorporated (BD6709FS、BD6721FS)

2) Pre-driver compatible for external Tr (BD6718FV)

3) Low side power Tr incorporated half pre-driver (BD6722FS)

4) Current limiting circuit

5) PWM soft switching driver (BD6721FS、BD6722FS)

6) Soft start circuit (BD6722FS)

7) Lock protection and automatic restart circuit

8) Rotating speed pulse signal (FG) output

9) Lock alarm signal (AL) output (BD6718FV、BD6721FS、BD6722FS)

● Application

For 12V fan for desktop PC, server and general consumer equipment

●Lineup

12V speed controllable

single-phase full-wave

BD6709FS

BD6718FV

Soft switching not available

Soft switching available

Power Tr incorporated

Pre-driver

Power Tr incorporated

Half pre-driver

BD6721FS

BD6722FS

Jan. 2007

●Absolute Maximum Ratings

◎BD6709FS

Parameter

Symbol

Limit

Unit

Supply voltage

Vcc

Pd

17

812.5＊

-40～+95

-55～+150

1.2＊＊

10

V

mW

℃

Power dissipation

Operation temperature

Storage temperature

Output current

Topr

Tstg

℃

Iomax

IFG

A

FG signal output current

FG signal output voltage

Junction temperature

mA

V

VFG

Tjmax

15

150

℃

＊

Reduce by 6.5mW/℃ over 25℃.

(On 70.0mm×70.0mm×1.6mm glass epoxy board)

＊＊ This value is not to exceed Pd.

◎BD6718FV

Parameter

Symbol

Limit

Unit

Supply voltage

Vcc

Pd

15

V

mW

℃

Power dissipation

812.5＊

Operation temperature

Storage temperature

High side output voltage

Low side output voltage

Low side output current

FG signal output current

FG signal output voltage

AL signal output current

AL signal output voltage

VREF current ability

Topr

Tstg

-40～+95

-55～+150

℃

VOH

VOL

Iomax

IFG

36

15

20

8

V

mA

V

VFG

IAL

15

8

mA

V

VAL

15

4

IVREF

IHB

mA

℃

HB current ability

8

Junction temperature

Tjmax

150

＊

Reduce by 6.5mW/℃ over 25℃.

(On 70.0mm×70.0mm×1.6mm glass epoxy board)

◎BD6721FS

Parameter

Symbol

Limit

Unit

Supply voltage

Power dissipation

Vcc

Pd

20

812.5＊

-40～+100

-55～+150

1.0＊＊

10

V

mW

℃

Operation temperature

Storage temperature

Output current

Topr

Tstg

℃

Iomax

IFG

A

FG signal output current

FG signal output voltage

AL signal output current

AL signal output voltage

VREF current ability

Junction temperature

mA

V

VFG

IAL

20

10

mA

V

VAL

20

IVREF

Tjmax

8

mA

℃

150

＊

Reduce by 6.5mW/℃ over 25℃.

(On 70.0mm×70.0mm×1.6mm glass epoxy board)

＊＊ This value is not to exceed Pd.

2/40

◎BD6722FS

Parameter

Symbol

Limit

Unit

Vcc

Pd

20

812.5＊

-40～+100

-55～+150

34

V

mW

℃

V

Supply voltage

Power dissipation

Topr

Operation temperature

Storage temperature

High side output voltage

Low side output voltage

Low side output current

Signal output current

Signal output voltage

VREF current ability

VTH input voltage

Tstg

VOH

VOL

34

V

Iomax

IFG/IAL

VFG/VAL

IVREF

VVTH

Tjmax

1.5＊＊

10

A

mA

V

20

8

mA

V

15

Junction temperature

150

℃

＊

Reduce by 6.5mW/℃ over 25℃.

(On 70.0mm×70.0mm×1.6mm glass epoxy board)

＊＊ This value is not to exceed Pd.

●OPERATING CONDITIONS

◎BD6709FS

Parameter

Symbol

Vcc

Limit

Unit

V

Operating supply voltage range

Hall input voltage range

6.0～14.0

VH

0.5～Vcc-1.5

V

◎BD6718FV

Parameter

Operating supply voltage range

Hall input voltage range

Symbol

Vcc

Limit

Unit

V

4.5～14.0

0～Vcc-2.0

VH

V

◎BD6721FS

Parameter

Operating supply voltage range

Hall input voltage range

Symbol

Vcc

Limit

Unit

V

5.0～17.0

0～Vcc-2.0

VH

V

VTH input voltage range

VVTH

VVMIN

V

VMIN input voltage range

V

◎BD6722FS

Parameter

Operating supply voltage range

Hall input voltage range

Symbol

Vcc

Limit

Unit

V

5.0～17.0

0～Vcc-2.0

VH

V

VMIN input voltage range

VVMIN

V

3/40

●ELECTRICAL CHARACTERISTICS(Unless otherwise specified Ta=25℃,Vcc=12V)

◎BD6709FS

Limit

Parameter

Symbol

Unit

Conditions

Characteristics

Min.

3.0

±5

-

Typ.

6.0

Max.

9.0

Circuit current

Icc

mA

mV

V

Fig.1

Fig.2

Hall input hysteresis

Output low voltage

VHYS

VOL

±10

0.2

±15

0.3

Io=200mA

Fig.3,4

Io=-200mA

Output high voltage

VOH

-

0.2

0.3

V

Voltage between output and

Vcc

Fig.5,6

Lock detection ON time

Lock detection OFF time

FG output low voltage

FG output leak current

OSC low voltage

TON

TOFF

VFGL

IFGL

0.30

2.5

-

0.50

4.0

-

0.70

5.5

0.3

50

2.5

4.0

-

sec

V

Fig.7

Fig.8

IFG=5mA

VFG=15V

Fig.9,10

-

μA

V

-

VOSCL

VOSCH

FOSC

GLA

1.5

3.0

-

2.0

3.5

25 *

-

Fig.11

OSC high voltage

V

FIg.12

OSC frequency

kHz

dB

V

COSC=470pF

-

Level amp gain

50

-

Level amp output low voltage

VLAOL

0.9

1.2

ILAOUT=1mA

ILAOUT=-1mA

Voltage between output and

Vcc

Level amp output high voltage

VLAOH

-

1.2

1.5

V

-

VREF voltage

VREF

Vcofs

4.0

-

4.4

-

4.8

30

V

IVREF=-1mA

Fig.14,15

CL-CS offset voltage

mV

* This voltage is reference, not guarantee.

◎BD6718FV

Limit

Typ.

8.0

±10

10

Parameter

Symbol

Unit

Conditions

Characteristics

Min.

4.0

±5

5

Max.

12.0

±15

20

Circuit current

Icc

VHYS

IH

mA

mV

mA

μA

Fig.16

Fig.17

Fig.18

-

Hall input hysteresis

H side output current

H side output leak current

IHL

-

100

Io=-10mA

L side output high voltage

VLH

-

0.2

0.35

V

Voltage between output and

Fig.19

Vcc

L side output low voltage

Lock detection ON time1

Lock detection OFF time1

Lock detection ON time2

Lock detection OFF time2

FG output low voltage

AL output low voltage

FG output leak current

AL output leak current

OSC low voltage

VLL

TON1

TOFF1

TON2

TOFF2

VFGL

VALL

IFGL

-

0.15

1.5

0.15

3.0

-

0.2

0.3

3.0

0.3

6.0

0.3

-

0.35

0.5

5.0

0.5

10

V

sec

V

Io=10mA

Fig.20

Fig.21

Fig.22

Fig.21

Fig.23

Fig.24

-

SEL(6PIN)：OPEN or H

SEL(6PIN)=L

IFG=5mA

0.4

50

-

V

IAL=5mA

-

μA

V

VFG=15V

IALL

-

50

VAL=15V

-

VOSCL

VOSCH

FOSC

VREF

VHB

0.4

1.2

-

0.7

1.5

25 *

2.5

1.5

-

1.0

1.8

-

Fig.25

Fig.26

-

OSC high voltage

V

OSC frequency

kHz

V

COSC=470pF

IVREF=-1mA

VREF voltage

2.2

1.2

3

2.8

1.8

-

Fig.27

Fig.28

-

Hall bias voltage

V

CR current ability

ICR

mA

V

VCR=1.5V

ICR=0.5mA

CR output low voltage

CR discharge time

VCR

-

0.3

18.5

0.5

28

Fig.29

Fig.30

TCR

9

μsec

* This voltage is reference, not guarantee.

4/40

◎BD6721FS

Limit

Typ.

7.0

Parameter

Symbol

Unit

Conditions

Characteristics

Min.

4.0

Max.

10.0

±15

Circuit current

Icc

mA

mV

Fig.31

Fig.32

Hall input hysteresis

VHHYS

±5

±10

Io=300mA

Upper and Lower total

Output voltage

VO

-

0.6

0.9

V

Fig.33～36

Lock detection ON time

Lock detection OFF time

FG output low voltage

FG output leak current

AL output low voltage

AL output leak current

OSC low voltage

TON

TOFF

VFGL

IFGL

0.30

3.0

-

0.50

5.0

0.15

-

0.70

7.0

0.3

50

sec

V

Fig.37

Fig.38

Fig.39,40

Fig.41

Fig.39,40

Fig.41

Fig.42

Fig.43

Fig.44

-

IFG=5mA

VFG=17V

IAL=5mA

VAL=17V

-

μA

V

VALL

-

0.15

-

0.3

50

IALL

-

μA

V

VOSCL

VOSCH

ICOSC

IDOSC

GLA

0.8

2.3

-50

26

50

-

1.0

2.5

-32

32

1.2

2.7

-26

50

OSC high voltage

V

OSC charge current

OSC discharge current

Level amp gain

μA

dB

V

-

Level amp output low voltage

VLAOL

0.2

0.3

-

Voltage between LAOUT and

Vcc

Level amp output high voltage

VLAOH

-

1.6

2.0

V

-

VTH=VREF*0.383

OUT1=Pull up 1kΩ

COSC=470pF

Output ON Duty 1

DUTY1

85

90

95

%

-

VTH=VREF*0.583

OUT1=Pull up 1kΩ

COSC=470pF

VTH=VREF*0.783

OUT1=Pull up 1kΩ

COSC=470pF

Output ON Duty 2

Output ON Duty 3

DUTY2

DUTY3

45

5

50

10

55

15

%

-

VREF voltage

VREF

VCL

2.8

3.0

3.2

330

0.2

V

IVREF=-2mA

Fig.45

Fig.46

Fig.47

Fig.48

Current limit voltage

VTH input bias current

VMIN input bias current

290

310

mV

μA

IVTH

IVMIN

-

5/40

◎BD6722FS

Limit

Typ.

8.0

Parameter

Symbol

Unit

Conditions

Characteristics

Min.

5.0

±5

5

Max.

11.0

±15

20

Icc

VHYS

IH

mA

mV

mA

Fig.52

Fig.53

Fig.54

Circuit current

±10

10

Hall input hysteresis

High side output current

High side output leak

current

IHL

-

10

μA

VH=34V

Fig.55

VL

-

0.18

3.6

-

0.3

6.0

0.15

-

0.45

0.42

8.4

0.3

10

V

sec

V

Io=600mA

Fig.56,57

Fig.58

Low side output voltage

Lock detection ON time

Lock detection OFF time

FG output low voltage

FG output leak current

AL output low voltage

AL output leak current

OSC low voltage

TON

TOFF

VFGL

IFGL

Fig.59

IFG=5mA

VFG=17V

IAL=5mA

VAL＝17V

Fig.61,62

Fig.60

-

μA

V

VALL

-

0.15

-

0.3

10

Fig. 61,62

Fig.60

IALL

-

μA

V

VOSCL

VOSCH

ICOSC

IDOSC

0.8

2.24

-50

26

1.0

2.44

-32

32

1.2

2.64

-26

50

Fig.63

V

Fig.64

OSC high voltage

μA

Fig.65

OSC charge current

OSC discharge current

Fig.65

VTH=VREF*0.429

A1H=Pull up 1kΩ

COSC=470pF

VTH=VREF*0.573

A1H=Pull up 1kΩ

COSC=470pF

VTH=VREF*0.717

A1H=Pull up 1kΩ

COSC=470pF

DUTY1

DUTY2

DUTY3

75

45

15

80

50

20

85

55

25

%

-

Output ON Duty 1

Output ON Duty 2

Output ON Duty 3

VREF

VCL

2.8

3.0

3.2

380

0.2

V

IVREF=-2mA

Fig.66,67

Fig.68

VREF voltage

320

350

mV

μA

Current limit voltage

VTH input bias current

VMIN input bias current

IVTH

IVMIN

-

Fig.69

Fig.70

●Truth table

◎BD6709FS

H+

H

H-

L

OUT1

OUT2

FG

L

H

L

H

L

H

◎BD6718FV

H+

H

H-

L

CR

H

A1H

Hi-Z

L

A1L

H

A2H

L

A2L

L

FG

H

L

H

L

Hi-Z

H

L

◎BD6721FS

H+

H

H-

L

OUT1

OUT2

FG

H

L

H

L

H

L

◎BD6718FV

H+

H

H-

L

A1H

Hi-Z

L

A1L

L

A2H

L

A2L

Hi-Z

L

FG

H

L

H

Hi-Z

L

6/40

●Reference Data

◎BD6709FS

BD6709FS

10

15

10

5

2.5

2.0

1.5

1.0

0.5

0.0

95℃

8

25℃

-40℃

95℃

6

-40℃

25℃

0

25℃

95℃

4

-5

-40℃

25℃

2

0

-10

-15

-40℃

Operating Voltage Range

95℃

Operating Voltage Range

12

0

3

6

9

15

0

3

6

9

12

15

0

0.2

0.4

0.6

0.8

1

1.2

Supply voltage, Vcc [V]

Output current, Io [A]

Fig.1 Circuit current

Fig.2 Hall input hysteresis

Fig.3 Output low voltage

(Temperature characteristics)

BD6709FS

2.5

2.0

1.5

1.0

0.5

0.0

-0.5

-1.0

-1.5

-2.0

-2.5

-0.5

-1.0

-1.5

-2.0

-2.5

14V

12V

-40℃

25℃

95℃

6V

12V

14V

6V

0

0.2

0.4

0.6

0.8

1

1.2

0

0.2

0.4

0.6

0.8

1

1.2

0

0.2

0.4

0.6

0.8

1

1.2

Output current, Io [A]

Fig.4 Output low voltage

(Voltage characteristics)

Fig.6 Output high voltage

(Voltage characteristics)

Fig.5 Output high voltage

(Temperature characteristics)

BD6709FS

4.5

4.3

4.1

3.9

3.7

3.5

0.20

0.15

0.10

0.05

0.00

0.55

0.53

0.51

0.49

0.47

0.45

95℃

25℃

95℃

25℃

-40℃

25℃

-40℃

Operating Voltage Range

0

5

10

15

0

2

4

6

8

10

0

3

6

9

12

15

Supply voltage,Vcc [V]

FG Current, IFG [mA]

Supply voltage,Vcc [V]

Fig.7 Lock detection ON time

Fig.9 FG low voltage

(Temperature characteristics)

Fig.8 Lock detection OFF time

BD6709FS

4.0

3.5

3.0

2.5

2.0

3.0

2.5

2.0

1.5

1.0

0.5

0.0

0.2

0.1

0.0

95℃

-40℃

25℃

-40℃

25℃

95℃

6V

12V

14V

Operating Voltage Range

0

3

6

9

12

15

0

3

6

9

12

15

0

2

4

6

8

10

Supply voltage, Vcc [V]

FG Current, IFG [mA]

Fig.11 OSC low voltage

7/40

Fig.12 OSC high voltage

Fig.10 FG low voltage

(Voltage characteristics)

BD6709FS

5.0

4.5

4.0

3.5

3.0

60

30

0

5.0

4.8

4.5

4.3

4.0

95℃

25℃

-40℃

95℃

25℃

95℃

25℃

-40℃

-30

-60

-40℃

25℃

95℃

Operating Voltage Range

0

3

6

9

12

15

0

2

4

6

8

10

0

3

6

9

12

15

Supply voltage, Vcc [V]

VREF current, IVREF [mA]

Supply voltage, Vcc [V]

Fig.14 VREF voltage

Fig.15 VREF current ability

Fig.13 COSC charge discharge

current

◎BD6718FV

BD6718FV

15

10

20

15

10

5

95℃

-40℃

12

9

25℃

8

6

4

2

0

-40℃

25℃

-40℃

0

95℃

6

-5

95℃

-10

-15

-20

25℃

-40℃

3

Operating Voltage Range

0

3

6

9

12

15

0

3

6

9

12

15

0

3

6

9

12

15

Output voltage, VOH [V]

Supply voltage, Vcc [V]

Fig.16 Circuit current

Fig.17 Hall input hysteresis

Fig.18 H side output current

BD6718FV

0.4

0.3

0.2

0.1

0

0.0

0.4

-40℃

-0.1

-0.2

-0.3

-0.4

0.3

0.2

0.1

0

95℃

25℃

95℃

25℃

-40℃

25℃

-40℃

Operating Voltage Range

0

5

10

15

20

0

3

6

9

12

15

0

5

10

15

20

Output current, Io [mA]

Supply voltage, Vcc [V]

Output Current, Io [mA]

Fig.19 L side output high

voltage

Fig.20 L side output low voltage

Fig.21 Lock detection ON time1,2

BD6718FV

0.10

10

8

10.0

8.0

6.0

4.0

2.0

0.0

0.08

0.06

0.04

0.02

0.00

95℃

6

25℃

-40℃

4

95℃

25℃

-40℃

25℃

-40℃

2

Operating Voltage Range

0

2

4

6

8

0

3

6

9

12

15

0

3

6

9

12

15

FG/AL current, IFG/IAL [mA]

Supply voltage,Vcc[V]

Fig.22 Lock detection OFF time1

Fig.23 Lock detection OFF time2

8/40

Fig.24 FG/AL low voltage

BD6718FV

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0.0

3.0

2.5

2.0

1.5

1.0

0.5

0.0

95℃

25℃

95℃

25℃

-40℃

95℃

25℃

-40℃

Operating Voltage Range

0

3

6

9

12

15

0

3

6

9

12

15

0

1

2

3

4

Supply voltage, Vcc [V]

VREF current, IVREF [mA]

Fig.27 VREF current ability

Fig.25 OSC low voltage

Fig.26 OSC high voltage

BD6718FV

0.20

25.0

2.0

95℃

25℃

95℃

25℃

0.16

0.12

0.08

0.04

0.00

20.0

15.0

10.0

5.0

1.5

1.0

0.5

0.0

-40℃

95℃

25℃

-40℃

Operating Voltage Range

0.0

0

2

4

6

8

0

1

2

3

4

5

0

3

6

9

12

15

Hall bias current, IHB [mA]

CR current, ICR [mA]

Supply voltage, Vcc [V]

Fig.28 Hall bias current ability

Fig.29 CR output low voltage

Fig.30 CR discharge time

◎BD6721FS

BD6721FS

20

15

10

5

20

1.0

100℃

25℃

0.8

0.6

0.4

0.2

0.0

15

10

5

-40℃

25℃

0

-40℃

25℃

100℃

-5

100℃

25℃

-40℃

-10

-15

-20

Operating voltage range

0

5

10

15

20

5

10

15

20

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

Supply voltage, Vcc [V]

Output current, Io [A]

Fig.31 Circuit current

Fig.33 Output low voltage

(Temperature characteristics)

Fig.32 Hall input hysteresis

BD6721FS

1

0.8

0.6

0.4

0.2

0

-0.2

-0.4

-0.6

-0.8

-1

5V

-0.2

-0.4

-0.6

-0.8

-1

12V

100℃

25℃

17V

12V

17V

-40℃

5V

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

Output current, Io [A]

Fig.36 Output high voltage

(Voltage characteristics)

Fig.34 Output low voltage

(Voltage characteristics)

Fig.35 Output high voltage

(Temperature characteristics)

9/40

BD6721FS

0.60

0.55

0.50

0.45

0.40

6.0

5.5

5.0

4.5

4.0

0.30

0.25

0.20

0.15

0.10

0.05

0.00

100℃

25℃

-40℃

100℃

25℃

100℃

25℃

-40℃

Operating voltage range

Operating voltage Range

0

5

10

15

20

0

5

10

15

20

0

2

4

6

8

10

Supply voltage, Vcc [V]

FG/AL current, IFG/IAL [mA]

Fig.37 Lock detection ON time

Fig.38 Lock detection OFF time

Fig.39 FG/AL low voltage

(Temperature characteristics)

BD6721FS

1.20

1.12

1.04

0.96

0.88

0.80

1.0

0.8

0.6

0.4

0.2

0.0

0.30

0.25

0.20

0.15

0.10

0.05

0.00

17V

12V

5V

100℃

25℃

-40℃

100℃

25℃

-40℃

Operating Voltage Range

0

2

4

6

8

10

0

5

10

15

20

0

5

10

15

20

FG/AL current, IFG/IAL [mA]

FG/AL voltage, VFG/VAL [V]

Supply voltage, Vcc [V]

Fig.40 FG/AL low voltage

(Voltage characteristics)

Fig.41 FG/AL leak current

Fig.42 OSC low voltage

BD6721FS

2.64

2.56

2.48

2.40

2.32

2.24

60

30

0

4

-40℃

25℃

100℃

3

2

1

0

100℃

25℃

100℃

25℃

-40℃

100℃

25℃

-30

-60

-40℃

Operating Voltage Range

Operating voltage Range

0

5

10

15

20

0

2

4

6

8

0

5

10

15

20

Supply voltage, Vcc [V]

VREF current, IVREF [mA]

Supply voltage, Vcc [V]

Fig.44 OSC charge discharge current

Fig.43 OSC high voltage

Fig.45 VREF current ability

BD6721FS

320

0.2

0.1

315

310

305

300

0.1

0.0

100℃

25℃

100℃

25℃

0.0

100℃

25℃

-40℃

-0.1

-0.2

-40℃

Operating voltage Range

Operating Voltage Range

-0.2

0

5

10

15

20

0.0

5.0

10.0

15.0

20.0

0

5

10

15

20

Supply voltage, Vcc [V]

Fig.46 Current limit voltage

Fig.47 VTH input bias current

Fig.48 VMIN input bias current

10/40

BD6721FS

1.5

1.0

0.5

0.0

1.5

1.0

0.5

0.0

10.0

-40℃

25℃

-40℃

25℃

100℃

1.0

0.1

0

0.2

0.4

0.6

0.8

1

0.1

1.0

10.0

100.0

0

0.2

0.4

0.6

0.8

1

OUT1 inflow current, IOUT1 [A]

Drain current, Ids [A]

OUT1 outflow current, IOUT1 [A]

Fig.50 High side output Body Di

characteristics

Fig.49 Low side output Body Di

characteristics

Fig.51 Output Tr ASO

（upper and lower total）

（TON=100msec）

◎BD6722FS

BD6722FS

15.0

10

20

100℃

25℃

15

10

5

13.0

11.0

9.0

8

6

4

2

-40℃

25℃

-40℃

25℃

100℃

-40℃

0

-40℃

25℃

100℃

-5

100℃

Operating Voltage Range

-10

-15

-20

7.0

Operating Voltage Range

5.0

0

5

10

15

20

5

10

15

20

0

5

10

15

20

Supply voltage, Vcc [V]

Fig.54 High side output current

Fig.52 Circuit current

Fig.53 Hall input hysteresis

BD6722FS

1.5

10.0

8.0

6.0

4.0

2.0

1.5

1.2

0.9

0.6

0.3

0.0

1.2

0.9

0.6

0.3

0

5V

17V

12V

100℃

25℃

-40℃

100℃

25℃

-40℃

0.0

0

0.3

0.6

0.9

1.2

1.5

0

5

10

15

20

0

0.3

0.6

0.9

1.2

1.5

Output current, Io [A]

Output voltage, Vo [V]

Output Current, Io [A]

Fig.56 Low side output voltage

(Voltage characteristics)

Fig.55 High side output leak current

(Temperature characteristics)

Fig.57 Low side output voltage

（Voltage characteristics）

BD6722FS

0.42

10.0

8.4

7.6

6.8

6.0

5.2

4.4

3.6

8.0

6.0

4.0

2.0

0.0

0.36

100℃

25℃

-40℃

100℃

25℃

-40℃

0.30

0.24

100℃

25℃

-40℃

Operating Voltage Range

0.18

0

5

10

15

20

0

5

10

15

20

0

5

10

15

20

Supply voltage, Vcc [V]

FG/AL voltage, VFG/VAL [V]

Supply voltage, Vcc [V]

Fig.58 Lock detection ON time

Fig.59 Lock detection OFF time

11/40

Fig.60 FG/AL leak current

BD6722FS

0.30

0.25

0.20

0.15

0.10

0.05

0.00

1.20

1.12

1.04

0.96

0.88

0.80

0.30

0.25

0.20

0.15

0.10

0.05

0.00

5V

12V

17V

100℃

25℃

-40℃

100℃

25℃

-40℃

Operating Voltage Range

0

2

4

6

8

10

0

2

4

6

8

10

0

5

10

15

20

FG/AL Current, IFG/IAL [mA]

FG/AL current, IFG/IAL [mA]

Fig.62 FG/AL low voltage

(Voltage characteristics)

Supply voltage, Vcc [V]

Fig.61 FG/AL low voltage

(Temperature characteristics)

Fig.63 OSC low voltage

(Voltage characteristics)

BD6722FS

50

40

2.64

2.56

2.48

2.40

2.32

2.24

4.0

3.5

3.0

2.5

2.0

25℃

-40℃

100℃

30

20

100℃

25℃

-40℃

10

100℃

25℃

-40℃

0

-10

-20

-30

-40

-50

-40℃

100℃

25℃

Operating Voltage Range

0

2

4

6

8

0

5

10

15

20

0

5

10

15

20

VREF current, IVREF [mA]

Supply voltage, Vcc [V]

Fig.64 OSC high voltage

Fig.65 OSC charge discharge

current

Fig.66 VREF current ability

(Temperature characteristics)

BD6722FS

4.0

3.5

3.0

2.5

2.0

370

360

350

340

330

0.20

0.10

17V

12V

5V

100℃

25℃

100℃

25℃

-40℃

0.00

-40℃

-0.10

-0.20

Operating Voltage Range

0

2

4

6

8

0

5

10

15

20

0

5

10

15

20

VREF current, IVREF [mA]

Supply voltage, Vcc [V]

Fig.67 VREF current ability

(Voltage characteristics)

Fig.68 Current limit voltage

Fig.69 VTH input bias current

BD6722FS

3.0

2.5

2.0

1.5

1.0

0.5

0.0

10.0

0.20

0.10

1.5

1.0

0.00

100℃

25℃

-40℃

25℃

-0.10

-0.20

100℃

Operating Voltage Range

0.1

0

0.3

0.6

0.9

1.2

1.5

0

5

10

15

20

0.1

1.0

10.0

100.0

A1L outflow current, IA1L [A]

Supply voltage, Vcc [V]

Drain-source voltage, Vds [V]

Fig.71 Low side output Body Di

characteristics

Fig.70 VMIN input bias current

Fig.72 Low side output Tr ASO

(TON=100msec)

12/40

●Block diagram, application circuit, and pin assignment(Constant etc are for reference)

◎BD6709FS

1) DC input application

The example of an application for rotation speed control by thermistor.

Adjust the gain according to

the characteristics of level

amplifier gain setting resistor.

This is an open collector

output. Connect a pull-up

resistor.

GND

1

FG

16

REG

OSC

P.22

Lock Detect

Auto Restart

P.37

330pF

COSC

2

VREF

15

～1000pF

Vcc

-

REF

Set according to the amplitude

of hall element output and hall

input voltage range.

+

H-

14

LAOUT

3

HALL

TSD

P.28

Bias resistor for thermistor.

-

5kΩ

～200kΩ

H+

13

LAIN

4

+

Control

-

5kΩ

Current limit setting resistor.

Use a larger resistor in order to

reduce power consumption

from VREF.

+

CL

10

～200kΩ

VTH

5

5kΩ

～200kΩ

-

+

Speed control is enabled by

thermistor.

P.21,22

Pre Driver

P.24

100Ω

～200kΩ

VMIN

6

Vcc

11

5kΩ

～200kΩ

OUT1

7

CS

10

Set the minimum rotating

speed and full torque time in

restarting.

Take a measure against Vcc

voltage rise due to reverse

connection of power supply.

～10μF

100pF

～0.1μF

RNF

8

OUT2

9

P.36

P.22

1kΩ

～200kΩ

Output

current

detecting

～5Ω

RNF

low-pass filter.

voltage

smoothing

resistor. Pay attention to

wattage because large current

flows.

M

P.24

REG：Internal reference voltage OSC：Oscillation circuit REF：Reference voltage generating circuit

TSD：Thermal shutdown(heat rejection circuit)

Terminal

name

Terminal

name

OUT2

CS

PIN No.

Function

PIN No.

Function

Motor output terminal 2

1

2

GND

GND terminal

9

COSC

Oscillating capacitor connecting terminal

Level amplifier output terminal

(for setting speed control gain)

Level amplifier input terminal

10

Output current detecting terminal

3

4

5

LAOUT

LAIN

11

12

13

Vcc

CL

Power supply terminal

Current limiting input terminal

Hall input terminal +

(for setting speed control gain)

Variable speed input terminal

VTH

H+

(thermistor connecting terminal)

Minimum rotating speed setting terminal

Motor output terminal 1

6

7

VMIN

OUT1

14

15

H-

Hall input terminal -

VREF

Reference voltage terminal

Output current detecting resistor connecting terminal

(motor GND terminal)

8

RNF

16

FG

Rotating speed pulse signal output terminal

13/40

2) Pulse input application 1

The example of an application for converting external PWM signal into the DC voltage, and controlling the rotational

speed. Minimum rotational speed can be set.

GND

1

FG

16

REG

OSC

Lock Detect

Auto Restart

PWM signal → DC voltage

conversion circuit.

Adjust the value of resistance

and the capacitor according to

COSC

2

VREF

15

Vcc

-

REF

the

amplitude

and

the

+

frequency of the input signal.

H-

14

LAOUT

3

HALL

TSD

-

H+

13

LAIN

4

+

Control

-

+

CL

12

VTH

5

-

+

PWM input

Pre Driver

VMIN

6

Vcc

11

CS

10

OUT1

7

RNF

8

OUT2

9

M

3) Pulse input application 2

The example of an application for controlling the rotational speed by DUTY of external PWM signal. The minimum

rotational speed cannot be set.

GND

1

FG

16

REG

OSC

Lock Detect

Auto Restart

Set resistance in consideration

of the input voltage of the

VMIN and VTH terminal.

COSC

2

VREF

15

Vcc

-

REF

+

P.23

H-

14

LAOUT

3

HALL

TSD

-

H+

13

LAIN

4

+

Control

-

+

CL

12

VTH

5

-

+

Pre Driver

VMIN

6

Vcc

11

PWM input

CS

10

OUT1

7

RNF

8

OUT2

9

M

14/40

◎BD6718FV

1) DC input application

The example of an application for rotation speed control by thermistor.

Take a measure against Vcc

voltage rise due to reverse

connection of power supply

and back electromotive force.

This is an open collector

output. Connect a pull-up

resistor.

VM line

Vcc line

P.36

P.37

50Ω

～1kΩ

FG

11

GND

10

TSD

Output power Tr is equipped

Current limit setting resistor.

Use a larger resistor in order to

reduce power consumption

from VREF.

externally.

application is also allowed.

High

voltage

AL

12

A2H

9

P.27

A1H

8

N.C.

13

P.24

A2L

7

CS

14

Output

current

detecting

-

5kΩ

resistor. Pay attention to

wattage because large current

is present.

+

～200kΩ

Control

Minimum rotating speed and

A1L

6

CL

15

REG

full

torque

time

during

100Ω

～200kΩ

restarting can be set.

P.24

SEL

16

Vcc

5

P.22

330pF

～1000pF

～5Ω

COSC

17

CR

4

REG

-

+

Lock

Detect

Auto

OSC

10kΩ

～200kΩ

Simultaneous ON prevention

time can be set.

5kΩ

～200kΩ

H-

3

Speed control depending on

ambient temperature is

VMIN

18

Restart

enabled by thermistor.

P.26

+

-

HB

2

VTH

19

P.21,22

Hall

Bias

～0.1μF

VREF

20

H+

1

-

+

-

REF

+

Set according to the amplitude

of hall element output and hall

input voltage range.

HALL

RNF

low-pass filter.

voltage

smoothing

1kΩ

～200kΩ

P.24

P.28

100pF

～0.1μF

～10μF

REG Internal reference voltage OSC Oscillation circuit REF Reference voltage generating circuit

：

TSD Thermal shutdown(heat rejection circuit)

：

Terminal

name

FG

PIN No.

Function

PIN No.

Function

name

H+

1

2

3

Hall input terminal +

Hall bias terminal

Hall input terminal -

11

12

13

Rotating speed pulse signal output terminal

Lock alarm signal output terminal

HB

AL

H-

N.C.

Charging and discharging pulse circuit capacitor and

resistor connecting terminal

4

CR

14

CS

Output current detecting terminal

5

6

7

8

Vcc

A1L

A2L

A1H

Power supply terminal

15

16

17

18

CL

Current limiting input terminal

Low side output terminal (OUT1)

Low side output terminal (OUT2)

High side output terminal (OUT1)

SEL

Lock detection ON:OFF ratio selecting terminal

Oscillating capacitor connecting terminal

Minimum rotating speed setting terminal

Variable speed input terminal

COSC

VMIN

9

A2H

High side output terminal (OUT2)

GND terminal

19

20

VTH

(thermistor connecting terminal)

10

GND

VREF

Reference voltage terminal

15/40

2) Pulse input application 1

The example of an application for converting external PWM signal into the DC voltage, and controlling the rotational

speed. Minimum rotational speed can be set.

PWM signal

→ DC voltage

conversion circuit.

Adjust the value of resistance

and the capacitor according to

FG

11

GND

10

TSD

the

amplitude

and

the

AL

12

A2H

9

frequency of the input signal.

A1H

8

N.C.

13

A2L

7

CS

14

-

+

Control

A1L

6

CL

15

REG

SEL

16

Vcc

5

COSC

17

CR

4

REG

-

Lock

Detect

Auto

+

OSC

H-

3

VMIN

18

Restart

+

-

VTH

19

HB

2

Hall

Bias

VREF

20

H+

1

+

-

+

REF

PWM input

HALL

3) Pulse input application 2

The example of an application for controlling the rotational speed by DUTY of external PWM signal. The minimum

rotational speed cannot be set.

FG

GND

11

TSD

10

Set resistance in consideration

of the input voltage of the

VMIN and VTH terminal.

AL

12

A2H

9

A1H

8

P.23

N.C.

13

A2L

7

CS

14

-

+

Control

A1L

6

CL

15

REG

SEL

16

Vcc

5

COSC

17

CR

4

REG

-

Lock

Detect

Auto

+

OSC

H-

3

VMIN

18

Restart

+

-

VTH

19

HB

2

Hall

Bias

VREF

20

H+

1

+

-

+

PWM input

REF

HALL

16/40

◎BD6721FS

1) DC input application

The example of an application for rotation speed control by thermistor.

Adjust the gain according to

the characteristics of level

amplifier gain setting resistor.

GND

1

AL

16

FG

15

P.22

This is an open collector

output. Connect a pull-up

resistor.

COSC

VREF

SIGNAL

OUTPUT

COSC

2

SOFT

SWITCH

P.37

TSD

+

LOCK

PROTECTION

LAOUT

3

VREF

14

Bias resistor for thermistor.

-

PWM

COMP

Set according to the amplitude

of hall element output and hall

input voltage range.

LAIN

4

H-

13

-

+

HALL

P.28,29

CONTROL

LOGIC

Hall

COMP

LEVEL

AMP

Speed control is enabled by

thermistor.

H+

12

VTH

5

-

+

P.21,.22

PRE

DRIVER

VMIN

6

Current

Limit

Comp

Vcc

11

Vcc

+

Set the minimum rotating

speed and full torque time in

restarting.

-

CS

10

OUT1

7

Take a measure against Vcc

voltage rise due to reverse

connection of power supply.

P.22

OUT2

9

RNF

8

Output

current

detecting

P.36

resistor. Pay attention to

wattage because large current

flows.

RNF

voltage

smoothing

low-pass filter.

P.24

M

Terminal

PIN No.

Terminal

name

OUT2

CS

Function

PIN No.

Function

name

1

2

GND

GND terminal

9

Motor output terminal 2

COSC

Oscillating capacitor connecting terminal

Level amplifier output terminal

(for setting speed control gain)

Level amplifier input terminal

(for setting speed control gain)

Variable speed input terminal

(thermistor connecting terminal)

10

Output current detecting terminal

3

4

5

LAOUT

LAIN

11

12

13

Vcc

H+

H-

Power supply terminal

Hall input terminal +

VTH

Hall input terminal -

6

7

VMIN

OUT1

Minimum rotating speed setting terminal

Motor output terminal 1

VREF

FG

Reference voltage terminal

14

15

Rotating speed pulse signal output terminal

Lock alarm signal output terminal

Output current detecting resistor connecting terminal

(motor GND terminal)

8

RNF

16

AL

17/40

2) Pulse input application 1

The example of an application for converting external PWM signal into the DC voltage, and controlling the rotational

speed. Minimum rotational speed can be set.

GND

1

AL

16

FG

15

COSC

VREF

PWM signal

conversion circuit.

Adjust the value of resistance

and the capacitor according to

→

DC voltage

SIGNAL

OUTPUT

COSC

2

SOFT

SWITCH

the

amplitude

and

the

TSD

frequency of the input signal.

+

LOCK

PROTECTION

LAOUT

3

VREF

14

-

PWM

COMP

LAIN

4

H-

13

-

+

HALL

CONTROL

LOGIC

Hall

COMP

LEVEL

AMP

H+

12

VTH

5

-

+

PRE

DRIVER

VMIN

6

Current

Limit

Comp

Vcc

11

PWM input

Vcc

+

-

CS

10

OUT1

7

OUT2

9

RNF

8

M

3) Pulse input application 2

The example of an application for controlling the rotational speed by DUTY of external PWM signal. The minimum

rotational speed cannot be set.

GND

1

AL

16

FG

15

Set resistance in consideration

of the input voltage of the

VMIN and VTH terminal.

COSC

VREF

SIGNAL

OUTPUT

COSC

2

P.23

SOFT

SWITCH

TSD

+

LOCK

PROTECTION

LAOUT

3

VREF

14

-

PWM

COMP

LAIN

4

H-

13

-

+

HALL

CONTROL

LOGIC

Hall

COMP

LEVEL

AMP

H+

12

VTH

5

-

+

PRE

DRIVER

VMIN

6

Current

Limit

Comp

Vcc

11

Vcc

+

-

CS

10

OUT1

7

PWM input

OUT2

9

RNF

8

M

18/40

◎BD6722FS

1) DC input application

The example of an application for rotation speed control by thermistor.

VREF line

This is an open collector

output. Connect a pull-up

resistor.

This terminal can set the

minimum rotational speed and

soft start time.

P.37

GND

1

AL

16

SIGNAL

OUTPUT

COSC

VREF

P.30

330pF

～1000pF

COSC

2

FG

15

Set according to the amplitude

of hall element output and hall

input voltage range.

SOFT

START

TSD

SOFT

SWITCH

LOCK

PROTECTION

100ｋΩ

～１MΩ

VMIN

3

P.28,29

VREF

14

+

Speed control depending on

-

VTH

4

H-

13

ambient

temperature

is

PWM COMP

enabled by thermistor.

CONTROL

LOGIC

HALL

P.21,22

1μF

～10μF

H+

12

Vcc

5

Hall COMP

+

-

RNF

voltage

smoothing

low-pass filter.

PRE

DRIVER

100pF

～0.1μF

P.24

A1H

6

Current Limit

Comp

CS

11

+

-

Output

current

detecting

Output power Tr is equipped

externally. High voltage

application is also allowed.

resistor. Pay attention to

wattage because large current

is present.

A1L

7

A2H

10

1kΩ

～200kΩ

P.27

P.24

RNF

8

A2L

9

POW

Take a measure against Vcc

voltage rise due to reverse

connection of power supply

and back electromotive force.

0.3Ω

～0.5Ω

Power consumption of

H

output can be suppressed by

inserting resistance between

PMOS Gate-H output. Note

Wattage of the resistance.

P.36

Vcc line

VM line

50Ω

～1kΩ

P.31

0Ω

～2kΩ

Terminal

PIN No.

Terminal

name

A2L

Function

PIN No.

Function

name

GND terminal

Low side output terminal (OUT2)

High side output terminal (OUT2)

Current limiting input terminal

1

2

3

GND

COSC

VMIN

9

Oscillating capacitor connecting terminal

Minimum rotating speed setting terminal

10

11

A2H

CS

Variable speed input terminal

(thermistor connecting terminal)

Hall input terminal +

4

VTH

12

H+

Power supply terminal

Hall input terminal -

5

6

7

Vcc

A1H

A1L

13

14

15

H-

VREF

FG

High side output terminal (OUT1)

Low side output terminal (OUT1)

Reference voltage terminal

Rotating speed pulse signal output terminal

Output current detecting resistor connecting terminal

(motor GND terminal)

Lock alarm signal output terminal

8

RNF

16

AL

19/40

2) Pulse input application 1

The example of an application for converting external PWM signal into the DC voltage, and controlling the rotational

speed. Minimum rotational speed can be set.

VREF line

PWM signal

→

DC voltage

conversion circuit.

Adjust the value of resistance

and the capacitor according to

GND

1

AL

16

SIGNAL

OUTPUT

COSC

VREF

the

amplitude

and

the

frequency of the input signal.

COSC

2

FG

15

SOFT

START

TSD

SOFT

SWITCH

LOCK

PROTECTION

VMIN

3

VREF

14

+

-

VTH

4

H-

13

PWM COMP

CONTROL

LOGIC

HALL

H+

12

Vcc

5

Hall COMP

+

-

PRE

DRIVER

A1H

6

Current Limit

Comp

CS

11

+

-

A1L

7

A2H

10

RNF

8

A2L

9

POW

Vcc line

VM line

3) Pulse input application 2

The example of an application for controlling the rotational speed by DUTY of external PWM signal. The minimum

rotational speed cannot be set.

GND

1

AL

16

SIGNAL

OUTPUT

COSC

VREF

PWM signal can be input directly.

COSC

2

FG

15

P.23

SOFT

START

TSD

SOFT

SWITCH

LOCK

PROTECTION

VMIN

3

VREF

14

PWM INPUT

+

-

VTH

4

H-

13

Become direct pulse input mode

by pulling up VTH terminal to

VCC.

PWM COMP

CONTROL

LOGIC

HALL

H+

12

P.23

Vcc

5

Hall COMP

+

-

PRE

DRIVER

A1H

6

Current Limit

Comp

CS

11

+

-

A1L

7

A2H

10

RNF

8

A2L

9

POW

Vcc line

VM line

20/40

●Description of operations

Function table

Reference

page

BD6709FS

BD6718FV

BD6721FS

BD6722FS

〇

DC input

P.21,22

P.23

Variable speed control

Current limit

PWM input

P.24

Lock protection and automatic restart

P.25,26

Output Tr simultaneous ON preventing

circuit

High voltage application

PWM soft switching

Soft start

〇

P.26

〇

P.27

P.29

P.30

〇

1) Variable speed operation

Rotating speed changes by PWM ON-DUTY on the upper output.

PWM operation enables

a) PWM operation by DC input (Method by self-oscillation connecting a capacitor to COSC terminal)

b) PWM operation by pulse input (Method to change duty by inputting pulse directly to COSC terminal)

a) PWM operation by DC input

As shown in Fig.73, DC voltage input from LAOUT(BD6709FS, BD6721FS), or DC voltage input from VTH(BD6718FV,

BD6722FS)are compared with triangle wave produced by charging and discharging current to the capacitor connected

to COSC to change ON-DUTY.

Output is ON when COSC terminal voltage＞VTH terminal voltage or LAOUT terminal voltage

Output is OFF when COSC terminal voltage＜VTH terminal voltage of LAOUT terminal voltage

VMIN terminal is for setting the minimum rotating speed. ON-DUTY is determined by either VTH terminal voltage or

LAOUT terminal voltage, whichever is lower.

LAOUT or VTH

OSC H voltage

VMIN

①Full torque operating area

OSC L voltage

②ON-Duty set by VTH terminal

voltage (thermistor voltage)

determines the rotating speed.

BD6709FS

OUT

BD6721FS

③ON-Duty set by VMIN terminal

determines the rotating speed.

A1H

BD6718FV

BD6722FS

A2H

：High impedance

①

②

③

Fig.73 DC input PWM operation timing chart

COSC H and COSC L voltage is generated by dividing resistance of internal power supply, and the ratio of those voltage

are designed to be hard to fluctuate.

When the input voltage at LAOUT terminal is constant, effect by fluctuation of COSCH and COSCL voltage is large.

However, by setting that voltage input via VTH terminal is generated by dividing resistance of VREF terminal voltage,

application can be made hard to be affected by voltage fluctuation of triangle wave. For an application which requires

strict precision, determine a value with sufficient margin after full consideration of external constant is taken.

21/40

rpm

③

②

①

①Rotating speed in full torque operation

②Determined by LAOUT terminal voltage or VTH

③Rotating speed determined by VMIN terminal

Ta

Fig.74 Setting of rotating speed

Area ①

LAOUT or VTH＜OSC L voltage＜VMIN＜OSC H voltage

(Same as area ① in Fig.73)

Rotating speed in full torque operation (ON-DUTY = 100%)

Area ②

(Same as area ② in Fig.73)

OSCL voltage＜LAOUT or VTH＜VMIN＜OSC H voltage

Rotating speed is determined by ON-DUTY set by LAOUT terminal voltage or VTH

terminal voltage.

Area ③

OSCL voltage＜VMIN＜LAOUT or VTH＜OSC H voltage

(Same as area ③ in Fig.73)

Rotating speed is determined by ON-DUTY set by VMIN terminal voltage.

The motor can be stopped by setting OSCH voltage＜VMIN (ON-DUTY = 0%).

Assuming that VTH thermistor resistor is open, when VTH terminal voltage is above VREF, full torque operation is

performed.

〇Level amplifier ＜BD6709FS, BD6721FS＞

Level amplifier amplifies the voltage of VTH by the ratio of resistor connected to LAOUT and LAIN to be output to

LAOUT.

In the case of Fig.75, LAOUT = (10k + 20k)/10k×VTH, and the input voltage at VTH terminal is approximately tripled.

It enables a broad setting corresponding to the characteristics of thermistor resistor.

Furthermore, when VTH terminal voltage need not be amplified, LAOUT and LAIN should be shorted as shown in

Fig.76. VTH terminal voltage equals to LAOUT terminal voltage.

LAOUT

R2=20kΩ

LAIN

VTH

LAIN

VTH

－

VREF

+

R1=10kΩ

Fig.75 Level amplifier application

Fig.76 Level amplifier application 2

〇Restart from lock protecting operation＜BD6709FS, BD6718FV, BD6722FS＞

When restarting from lock protection operation, VMIN becomes L so that the motor restarts in full torque.

The time for reaching full torque is determined by resistor R1 and capacitor C1 connected to VMIN terminal as shown in

Fig.77.

VREF

LAOUT

R1

+

VMIN

－

COSC

R2

C1

Fig.77 Restart from lock protection (DC input)

22/40

b) PWM operation by pulse input ＜BD6709FS, BD6718FV, BD6721FS＞

Pulse signal can be input to VMIN terminal for PWM operation as shown in Fig.78.

The ratio of ON-DUTY of the output changes by the cycle of the input pulse signal as shown in Fig.79.

Set the voltage of the terminal VTH as VREF＞VTH＞COSCH.

Set the voltage input to the VMIN terminal

H level : VREF＞VMIN＞VOSCH

L level : VOSCL＞VMIN

as shown in Fig.79.

Output is ON in H logic of external PWM signal and OFF in L logic.

COSC

+

-

LAOUT

PWM COMP

LAIN

VTH

-

+

LEVEL AMP

VREF

VMIN

PWM input

Fig.78

Direct control by DUTY of external PWM

VREF

VTH

COSC

VMIN

GND

OUT

GND

OUTPUT Tr. OFF

Fig.79 VTH, VMIN input voltage and output PWM timing chart in pulse input mode

b-2) PWM operation by pulse input＜BD6722FS＞

By pulling up VTH(4PIN) to Vcc as shown in Fig.80, the output can operate in PWM by inputting the pulse signal

directly to VMIN(6PIN). However, adjust the value of R2 to become VTH=15V at Vcc≧15V so that the voltage of the

terminal VTH should not exceed 15V.

The ratio of ON-DUTY of the output changes by the cycle of the input pulse signal as shown in Fig.81.

Set the voltage input to the VMIN terminal

H level : Vcc-2.0V＞VMIN＞VOSCH

L level : VOSCL＞VMIN

as shown in Fig.81.

Output is ON in H logic of external PWM signal and OFF in L logic.

Vcc

R1

VTH

R2

COSC

VMIN

－

GND

VMIN

+

OUTPUT

A1H or A2H

COSC

PULSE INPUT

OUTPUT Tr

ON

OUTPUT Tr

OFF

Fig.80

External PWM signal input

Fig.81 Pulse input operation timing chart

23/40

2) Current limit (current limiting circuit)

The current limit circuit turns off the output, when the current that flows to the motor coil is detected exceeding a set

value.

The current value that current limit operates is determined by

a) Voltage of CL terminal and voltage of RNF terminal (BD6709FS, BD6718FV)

b) Internal setting voltage and voltage of RNF terminal (BD6721FS, BD6722FS)

VREF

Reference voltage

R1

CL

-

V1

R2

+

CS

R3

R4

R3

R4

RNF

C1

Fig.82 External setting of current limit voltage

Fig.83 Internal setting of current limit voltage

a) Setting according to voltage of CL terminal and RNF terminal.

For example about BD6718FV, in Fig.82

When R1=40kΩ、R2=10kΩ、R4=0.5Ω, the amperage I that current limit operates is

R2

10k

V1 =

I =

× VREF =

× 2.5 = 0.5V

R1+ R2

40k + 10k

V1

R4

0.5

=

= 1A

Current limit circuit operates at 1A.

Short CL terminal to VREF, short CS and RNF terminal to GND when the current limit function is not used.

b) Setting according to internal voltage and RNF terminal.

For example about BD6722FS, in Fig.83

When R4=0.33Ω, the current limit setting voltage is 350mV(typ.)

350mV

I =

=1.06A

0.33Ω

Current limit circuit operates at 1.06A.

Short CS and RNF terminal to GND when the current limit function is not used.

Both of a) and b)

R3 and C1 are low-pass filters for RNF smooth voltage. Adjust for a current limit not to malfunction in proportion to the

PWM frequency.

Connect the capacitor with the COSC terminal to do the resume operation after a current limit operates at the PWM

operation by the pulse input.

24/40

3) Lock protection and automatic restart

Motor rotation is detected by hall signal, and lock detection ON time (TON) and lock detection OFF time (TOFF) are

set by the IC internal counter. Timing chart is shown in Fig.84.

H+

TOFF

TON

TOFF

OUT1

OUT2

FG

Output Tr

OFF

Output Tr ON

BD6709FS

BD6721FS

A1H

A1L

A2H

A2L

FG

BD6718FV

HIGH(open collecter)

Recovers normal operation

AL

A1H

A1L

A2H

A2L

FG

BD6722FS

HIGH(open collector)

AL

Lock release

Motor

locking

Lock

detection

TON :

TOFF :

:

Lock detection ON time

Lock detection OFF time

High-impedance

Fig.84 Lock protection (incorporated counter system) timing chart

＊For BD6718FV, lock detection time (TOFF) setting can be changed by SEL terminal.

(See the electric characteristics item)

25/40

＊BD6721FS、BD6722FS

When torque off logic is input by the control signal during fixed time (typ.1ms), the lock protection function becomes off.

It is not influenced at the lock protection time and it is possible to restart at once.

PWM INPUT

1ms(typ.)

LOCK PROTECTION

ENABLE (INTERNAL IC)

enable

disable

enable

ON

MOTOR OUTPUT

ON

OFF

Fig.85 PWM signal and lock protection operation＜BD6722FS＞

The lock protection function doesn't work in an input frequency that is slower than 1kHz(typ.) when assuming H level

DUTY≒0% of the PWM input signal.

Input signal that frequency are faster than 2kHz.

4) Output Tr simultaneous ON prevention circuit ＜BD6718FV＞

The capacitor is discharged according to the cycle of hall signal by connecting an external capacitor and resistor to CR

terminal.

When CR terminal voltage is lower than internal reference voltage (2.5V:typ), IC output has a high impedance. High

impedance block in output switching can be changed by changing the capacitance and resistance to be connected to

CR terminal. It allows prevention of simultaneous activation, regardless of switching speed of external Tr.

Hysteresis

Hall signal H-

H+

DELAY

HALLHYS

A1H

A2H

A1L

A2L

High impedance

：

FG

CR

2.5V

Discharging time

CR

(T

)

26/40

5) High voltage application ＜BD6718FV＞

VM line

Vcc line

FG

11

GND

10

TSD

AL

12

A2H

9

A1H

8

N.C.

13

A2L

7

CS

14

-

+

Control

A1L

6

CL

REG

15

SEL

16

Vcc

5

COSC

17

CR

4

REG

-

Lock

Detect

Auto

OSC

+

H-

3

VMIN

18

Restart

VTH

19

HB

2

+

-

Hall

Bias

VREF

20

H+

1

+

-

+

REF

Hall

Fig.87 High voltage application (BD6718FV)

The absolute maximum rating of Vcc is 15V, while the absolute maximum rating of A1H and A2H terminal voltage is 36V.

Therefore it is possible to make VM line an application with another power supply higher than 15V.

To ensure the absolute maximum rating 36V of A1H and A2H terminal voltage is not exceeded, take physical measures,

such as placing a Zenner diode or a capacitor to create a return route of current between VM line and GND.

＜BD6722FS＞

The absolute maximum rating of Vcc is 20V, while the absolute maximum rating of A1H, A2H, A1L and A2L terminal

voltage is 34V. Therefore it is possible to make VM line an application with another power supply higher than 20V.

To ensure the absolute maximum rating 34V of A1H, A2H, A1L and A2L terminal voltage is not exceeded, take physical

measures, such as placing a Zenner diode or a capacitor to create a return route of current between VM line and GND.

Maximum rating

VM line

voltage 20V

Vcc line

5

6

10

7

9

Maximum rating

voltage34V

Fig.88 High voltage application (BD6722FS)

27/40

6) Hall input setting

Hall input voltage range is shown in operating conditions.

Vcc

Hall input voltage range

upper limit

Hall input voltage range

lower limit

GND

Fig.89 Hall input voltage range

Adjust the value of hall element bias resistor R1 and R2 in Fig.90 so that the input voltage of a hall amplifier is input in

"hall input voltage range" including signal amplitude.

○Reducing the noise of hall signal

Hall element may be affected by Vcc noise or the like depending on the wiring pattern of board. In this case, place a

capacitor like C1 in Fig.90. In addition, when wiring from the hall element output to IC hall input is long, noise may be

loaded on wiring. In this case, place a capacitor like C2 in Fig.90.

H-

H+

HB

H+

Vcc

C2

R1

RH

R2

Hall bias current

= HB / (R1 + RH)

C1

Hall bias current

= Vcc / (R1 + R2 + RH)

C1

RH

Hall element

＜BD6718FV＞

＜BD6709FS、BD6721FS、BD6722FS＞

Setting R2=0 ohm is acceptable for

BD6721FS and BD6722FS.

Fig.90 Application near hall signal

28/40

7) PWM soft switching＜BD6721FS、BD6722FS＞

The soft switching section is set to the timing before and after the change of the hall signal. The length of the soft

switching section can be changed by adjusting the amplitude of the hall signal. The soft switching section becomes

long if the amplitude of the hall signal is reduced, and the gradient of the output current becomes smooth. However,

when a soft switching is applied too much, torque shortage might be caused. Therefore, set to the hall signal amplitude

about 100mVpp that the reversely electromotive voltage is suppressed appropriately.

When Hall Amplitude =

large

When Hall Amplitude =

appropriate

When Hall Amplitude =

small

(H+)-(H-)

A1

A2

A1

A2

A1

A2

…SOFT SWITCHING

Fig.91 Relation between hall signal amplitude and output wave

The soft switching function operates in the DC input application and the pulse input application.

Adjust the hall bias resistance so that the hall signal amplitude become large when you do not want to use the soft

switching function.

29/40

8) Soft start＜BD6722FS＞

The soft start section is set at the rotation start or the LOCK protection release, etc.

The soft start time is decided by the constant circuit connected with VMIN terminal.

And VMIN terminal is used as the lowest rotational speed setting. Set VMIN to 1.75V or more (lowest rotational speed

DUTY≦50%).

VREF

R1

WITHOUT SOFT START

－

R2

+

SOFT START

TIME

Fig.92 Output current characteristic by soft start

Fig.93Soft start setting circuit

a) Soft start time of VTH setting DUTY≧50%

It gradually rises to the DUTY set with VTH after it starts.

Fig.94 shows the soft start operation at VTH setting DUTY=70% and VMIN setting DUTY=20%.

VTH=70%

50%

VMIN=20%

TIME

Fig.94 Soft start time chart of DUTY≧50%

b). Soft start time of VTH setting DUTY≦50%

DUTY rises gradually, and rises to Duty=50% temporarily after it starts. The purpose of this is to secure the start torque

when DUTY set with VTH and VMIN is too low.

It gradually descends to the DUTY set with VTH and VMIN after it rotates by DUTY=50% for a fixed time.

Fig.95 shows the soft start operation at VTH setting DUTY=10% and VMIN setting DUTY=20%.

50%

VMIN=20%

VTH=10%

TIME

Fig.95 Soft start time chart of DUTY≦50%

Because the lock protection function is turned off while soft start, soft start time can be set longer than the lock

detection time. The soft start function can be turned off by not connecting the capacitor to VMIN terminal.

30/40

9) The upside output of pre-driver＜BD6718FV、BD6722FS＞

High side output of pre-driver (half pre-driver) are constant current open-drain output. Decide the resistance of R1 so

that the voltage generated between G-S of external Pch transistor may exceed enough the threshold voltage of the

transistor.

VM line

R1

R2

6

IH

M1

10

7

9

Fig.96 Voltage setting between G-S of external Pch transistor

Ex. At R1=100Ω, VGSP : between G-S of the Pch transistor.

V_GSP= R1 × IH

= 100Ω × 10mA (typ.)

= 1V

＊R2 is used to suppress the power consumption of IC.

At VM = 12V, The power consumption of upside output transistor M1 is

P_M1= { VM - (R1 + R2) × IH } × IH

At R1 = 100Ω, R2 = 0Ω

At R1 = 100Ω, R2 = 1kΩ

P _M1=110mW

P_M1=10mW

Especially BD6722FS, useless power consumption in the upside output is suppressed by appropriately setting R2,

and a permissible loss of the package can be used effectively in lower output.

31/40

●Equivalent circuit

◎BD6709FS

1) Hall input terminal

2) Motor output terminal

Output current detecting resistor connecting terminal

Vcc

H+

H-

OUT1

OUT2

RNF

3) Current limiting input

4) FG output terminal

Output current detecting terminal

FG

Vcc

1kΩ

CL

CS

5) Reference voltage terminal

6) Oscillating capacitor connecting terminal

Variable amplifier input terminal

Level amplifier input terminal

Level amplifier output terminal

Minimum rotating speed setting terminal

Vcc

1kΩ

VREF

48.6kΩ

20kΩ

29kΩ

18kΩ

COSC

1kΩ

Vcc

45Ω

1kΩ

45Ω

1kΩ

VTH

LAIN

1kΩ

LAOUT

VMIN

1kΩ

32/40

◎BD6718FV

1) Hall input terminal

2) Charge and discharge pulse circuit capacitor

Resistor connecting terminal

1kΩ

CR

1kΩ

H-

H+

3) Current limiting input terminal

Output current detecting terminal

4) Output terminal on H side

5) Output terminal on L side

A1H

A2H

A1L

A2L

1kΩ

CL

CS

6) Hall bias terminal

8) Oscillating capacitor connecting terminal

Variable speed input terminal (thermistor connecting terminal)

Minimum speed input terminal

HB

COSC

20kΩ

1kΩ

7) Reference voltage terminal

1kΩ

VTH

1kΩ

VREF

1kΩ

30Ω

37.8kΩ

VMIN

9) Lock detection ON:OFF ratio selecting terminal

2.5V

10) FG output terminal or

AL output terminal

FG

100kΩ

or

AL

10kΩ

SEL

33/40

◎BD6721FS

1) Hall input terminal

2) Motor output terminal

Output current detecting resistor connecting terminal

Vcc

OUT1

OUT2

1kΩ

H+

H-

RNF

3) Output current detecting terminal

4) FG output terminal or

AL output terminal

FG or AL

20Ω

1kΩ

CS

5) Reference voltage terminal

Vcc

VREF

1kΩ

30kΩ

10.6kΩ

13kΩ

37kΩ

37.3kΩ

22kΩ

5kΩ

42kΩ

GND

6) Oscillating capacitor connecting terminal

Variable amplifier input terminal (thermistor connecting terminal)

Level amplifier input terminal

Level amplifier output terminal

Minimum rotating speed setting terminal

Vcc

1kΩ

COSC

1kΩ

30Ω

VMIN

1kΩ

GND

Vcc

VTH

45Ω

1kΩ

1kΩ 1kΩ

LAOUT

LAIN

45Ω

GND

34/40

◎BD6722FS

1) Hall input terminal

2) Motor output terminal

Output current detecting resistor connecting terminal

1kΩ

H+

H-

RNF

3) Output current detecting terminal

4) FG output terminal or

AL output terminal

FG or AL

20Ω

1kΩ

CS

5) Reference voltage terminal

VREF

Vcc

1kΩ

15kΩ

30kΩ

10.6kΩ

13kΩ

1kΩ

37.3kΩ

22kΩ

37kΩ

20kΩ

5kΩ

42kΩ

GND

6) Oscillating capacitor connecting terminal

Variable amplifier input terminal

Level amplifier input terminal

Level amplifier output terminal

Minimum rotating speed setting terminal

Vcc

1kΩ

COSC

1kΩ

GND

Vcc

VMIN

VTH

1kΩ

30Ω

1kΩ

GND

35/40

●Safety measure

1) Reverse connection protection diode

Reverse connection of power results in IC destruction as shown in Fig.46. When reverse connection is possible, reverse

connection protection diode must be added between power supply and Vcc.

After reverse connection

destruction prevention

Vcc

In normal energization

Vcc

Reverse power connection

Vcc

Circuit

block

Circuit

block

Circuit

block

Each

GND

Internal circuit impedance high

Large current flows

Æ Thermal destruction

No destruction

Æ amperage small

Fig.97 Flow of current when power is connected reversely

2) Measure against Vcc voltage rise by back electromotive force

Back electromotive force (Back EMF) generates regenerative current to power supply. However, when reverse

connection protection diode is connected, Vcc voltage rises because the diode prevents current flow to power supply.

ON

Phase

switching

ON

Fig.98 Vcc voltage rise by back electromotive force

When the absolute maximum rated voltage may be exceeded due to voltage rise by back electromotive force, place

(A) Capacitor or (B) Zenner diode between Vcc and GND. If necessary, add both (C).

(A) Capacitor

(B) Zenner diode

ON

(C) Capacitor and zenner diode

ON

Fig.99 Measure against Vcc voltage rise

36/40

3) Problem of GND line PWM switching

Do not perform PWM switching of GND line because GND terminal potential cannot be kept to a minimum.

Vcc

Motor

Driver

Controller

M

GND

PWM input

Prohibite

Fig.100 GND line PWM switching prohibited

4) FG and AL output

FG and AL output is an open collector and requires pull-up resistor.

The IC can be protected by adding resistor R1. An excess of absolute maximum rating, when FG or AL output terminal

is directly connected to power supply, could damage the IC.

Vcc

Pull-up

resistor

FG /AL

Protection

Connector

resistor R1

of board

Fig.101 Protection of FG and AL terminal

●Calculation of power consumed by IC

Vcc

Power consumed by this IC Pc is approximately calculated as follows:

Icc

FG

Pc=Pc1+Pc2+Pc3

IFG

・Pc1：Power consumption by circuit current

Pc1=Vcc×Icc

OUT1

Io

OUT2

・Pc2：Power consumption at output stage

Pc2=VOL×Io+VOH×Io

VOL is L voltage of output terminal 1 and 2.

VOH is H voltage of output terminal 1 and 2.

Io is the current flowing to output terminal 1 and 2.

Fig.102 Calculation of power consumed by

・Pc3：Power consumption at FG and AL

Pc3=VFG×IFG＋VAL×IAL

VFG is L voltage of FG output.

VAL is L voltage of AL output.

IFG and IAL are the current of FG and AL.

Power consumption by IC greatly changes with use condition of IC such as power supply voltage and output current.

Consider thermal design so that the maximum power dissipation on IC package is not exceeded.

37/40

●

Thermal derating curve

Power dissipation (total loss) indicates the power that can be consumed by IC at Ta = 25ºC (normal temperature). IC is

heated when it consumes power, and the temperature of IC chip becomes higher than ambient temperature. The

temperature that can be accepted by IC chip depends on circuit configuration, manufacturing process, etc, and

consumable power is limited. Power dissipation is determined by the temperature allowed in IC chip (maximum junction

temperature) and thermal resistance of package (heat dissipation capability). The maximum junction temperature is in

general equal to the maximum value in the storage temperature range.

Heat generated by consumed power of IC is radiated from the mold resin or lead frame of package. The parameter

which indicates this heat dissipation capability (hardness of heat release) is called heat resistance, represented by the

symbol θja [℃/W]. The temperature of IC inside the package can be estimated by this heat resistance. Fig.37 shows the

model of heat resistance of the package.

Heat resistance θja, ambient temperature Ta, junction temperature Tj, and power consumption P can be calculated by

the equation below:

θja ＝ (Tj－Ta) / P

[℃/W]

Thermal derating curve indicates power that can be consumed by IC with reference to ambient temperature. Power that

can be consumed by IC begins to attenuate at certain ambient temperature. This gradient is determined by thermal

resistance θja.

Thermal resistance θja depends on chip size, power consumption, package ambient temperature, packaging condition,

wind velocity, etc., even when the same package is used. Thermal derating curve indicates a reference value measured

at a specified condition. Fig.38 shows a thermal derating curve (Value when mounting FR4 glass epoxy board 70 [mm] x

70 [mm] x 1.6 [mm] (copper foil area below 3 [%]))

θja = (Tj-Ta) / P [℃/W]

Ambient temperature Ta[℃]

Chip surface temperature Tj[℃]

Power consumption P[W]

Fig.103 Thermal resistance

Pd(mW)

1000

812.5

800

600

400

BD6718FV,BD6709FS

BD6721FS,BD6722FS

200

95

100

0

25

50

75

125

150 Ta(℃)

＊Reduce by 6.5mW/℃ over 25℃.

(On 70.0mm×70.0mm×1.6mm glass epoxy board)

Fig.104 Thermal derating curve

38/40

●Cautions on use

1) Absolute maximum ratings

An excess in the absolute maximum rations, such as supply voltage, temperature range of operating conditions, etc., can

break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If

any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices,

such as fuses.

2) Connecting the power supply connector backward

Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply

lines. An external direction diode can be added.

3) Power supply line

Back electromotive force causes regenerated current to power supply line, therefore take a measure such as placing a

capacitor between power supply and GND for routing regenerated current. And fully ensure that the capacitor

characteristics have no problem before determine a capacitor value. (when applying electrolytic capacitors, capacitance

characteristic values are reduced at low temperatures)

4) GND potential

The potential of GND pin must be minimum potential in all operating conditions. Also ensure that all terminals except GND

terminal do not fall below GND voltage including transient characteristics. However, it is possible that the motor output

terminal may deflect below GND because of influence by back electromotive force of motor. Malfunction may possibly

occur depending on use condition, environment, and property of individual motor. Please make fully confirmation that no

problem is found on operation of IC.

5) Thermal design

Use a thermal design that allows for a sufficient margin in light of the power dissipation(Pd) in actual operating conditions.

6) Inter-pin shorts and mounting errors

Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any

connection error or if pins are shorted together.

7) Actions in strong electromagnetic field

Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to

malfunction.

8) ASO

When using the IC, set the output transistor so that it does not exceed absolute maximum rations or ASO.

9) Thermal shut down circuit

The IC incorporates a built-in thermal shutdown circuit (TSD circuit). Operation temperature is 175℃(typ.) and has a

hysteresis width of 25℃(typ.). When IC chip temperature rises and TSD circuit works, the output terminal becomes an

open state. TSD circuit is designed only to shut the IC off to prevent thermal runaway. It is not designed to protect the IC

or guarantee its operation. Do not continue to use the IC after operation this circuit or use the IC in an environment where

the operation of this circuit is assumed.

10) Testing on application boards

When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.

Always discharge capacitors after each process or step. Always turn the IC’s power supply off before connecting it to or

removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic

measure. Use similar precaution when transporting or storing the IC.

11) GND wiring pattern

When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns,

placing a single ground point at the ground potential of application so that the pattern wiring resistance and voltage

variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change

the GND wiring pattern of any external components, either.

12) Capacitor between output and GND

When a large capacitor is connected between output and GND, if Vcc is shorted with 0V or GND for some cause, it is

possible that the current charged in the capacitor may flow into the output resulting in destruction. Keep the capacitor

between output and GND below 100uF.

13) IC terminal input

When Vcc voltage is not applied to IC, do not apply voltage to each input terminal. When voltage above Vcc or below

GND is applied to the input terminal, parasitic element is actuated due to the structure of IC. Operation of parasitic

element causes mutual interference between circuits, resulting in malfunction as well as destruction in the last. Do not

use in a manner where parasitic element is actuated.

14) In use

We are sure that the example of application circuit is preferable, but please check the character further more in application

to a part which requires high precision. In using the unit with external circuit constant changed, consider the variation of

externally equipped parts and our IC including not only static character but also transient character and allow sufficient

margin in determining.

39/40

●Ordering part number

・Please order by ordering part number.・Please confirm the combination of each items.・Please write the letter close to left when column is blank.

―

0

E

2

B

D

6

9

F

S

7

Package Type

Part Number

Package specification

E2

Emboss tape reel Pin 1 opposite draw-out side

・FS ：SSOP-A16

・BD6709

・BD6721

・BD6718

・BD6722

・FV

：SSOP-B20

●Physical dimension

SSOP-A16

〈Tape and Reel information〉

Embossed carrier tape

2500pcs

Tape

Quant

6.6 0.2

E2

16

9

Direction

of feed

(The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand)

1

8

0.15 0.1

0.1

0.8

0.36 0.1

Direction of feed

1pin

Reel

(Unit:mm)

※When you order , please order in times the amount of package quantity.

SSOP-B20

〈Tape and Reel information〉

Embossed carrier tape

2500pcs

Tape

Quant

E2

6.5 0.2

Direction

of feed

20

11

(The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand)

1

10

0.15 0.1

0.1

0.65

0.22 0.1

Direction of feed

1pin

Reel

(Unit:mm)

※When you order , please order in times the amount of package quantity.

Appendix

Notes

No technical content pages of this document may be reproduced in any form or transmitted by any

means without prior permission of ROHM CO.,LTD.

The contents described herein are subject to change without notice. The specifications for the

product described in this document are for reference only. Upon actual use, therefore, please request

that specifications to be separately delivered.

Application circuit diagrams and circuit constants contained herein are shown as examples of standard

use and operation. Please pay careful attention to the peripheral conditions when designing circuits

and deciding upon circuit constants in the set.

Any data, including, but not limited to application circuit diagrams information, described herein

are intended only as illustrations of such devices and not as the specifications for such devices. ROHM

CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any

third party's intellectual property rights or other proprietary rights, and further, assumes no liability of

whatsoever nature in the event of any such infringement, or arising from or connected with or related

to the use of such devices.

Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or

otherwise dispose of the same, no express or implied right or license to practice or commercially

exploit any intellectual property rights or other proprietary rights owned or controlled by

ROHM CO., LTD. is granted to any such buyer.

Products listed in this document are no antiradiation design.

The products listed in this document are designed to be used with ordinary electronic equipment or devices

(such as audio visual equipment, office-automation equipment, communications devices, electrical

appliances and electronic toys).

Should you intend to use these products with equipment or devices which require an extremely high level

of reliability and the malfunction of which would directly endanger human life (such as medical

instruments, transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers

and other safety devices), please be sure to consult with our sales representative in advance.

It is our top priority to supply products with the utmost quality and reliability. However, there is always a chance

of failure due to unexpected factors. Therefore, please take into account the derating characteristics and allow

for sufficient safety features, such as extra margin, anti-flammability, and fail-safe measures when designing in

order to prevent possible accidents that may result in bodily harm or fire caused by component failure. ROHM

cannot be held responsible for any damages arising from the use of the products under conditions out of the

range of the specifications or due to non-compliance with the NOTES specified in this catalog.

Thank you for your accessing to ROHM product informations.

More detail product informations and catalogs are available, please contact your nearest sales office.

THE AMERICAS / EUROPE / ASIA / JAPAN

ROHM Customer Support System

Contact us : webmaster@ rohm.co.jp

www.rohm.com

TEL : +81-75-311-2121

FAX : +81-75-315-0172

21 Saiin Mizosaki-cho, Ukyo-ku, Kyoto 615-8585, Japan

Appendix1-Rev2.0


型号：	BD6709FS-E2
厂家：	ROHM
描述：	Brushless DC Motor Controller, 1.2A, BCDMOS, PDSO16, ROHS COMPLIANT, SSOP-16 电动机控制 CD 光电二极管
文件：	总41页 (文件大小：1916K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BD6709FS-E2 [ROHM]

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