BD6722FS_1 [ROHM]
Single-Phase Full-Wave Motor Driver for Fan Motor; 单相全波电机驱动的风扇电机
| 型号： | BD6722FS_1 |
| 厂家： | 
ROHM |
| 描述： | Single-Phase Full-Wave Motor Driver for Fan Motor |
| 文件： | 总5页 (文件大小：143K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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STRUCTURE
PRODUCT SERIES
TYPE
Silicon Monolithic Integrated Circuit
Single-Phase Full-Wave Motor Driver for Fan Motor
ＢＤ６７２２ＦＳ
FEATURES
Speed controllable by DC / PWM input
Current limit circuit
PWM soft switching drive
〇ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Limit
Unit
20
812.5＊
-40～+100
-55～+150
34
34
1.5＊＊
10
V
mW
℃
℃
V
V
A
mA
V
mA
V
Supply voltage
Power dissipation
Vcc
Pd
Topr
Tstg
VOH
Operating temperature
Storage temperature
High side output voltage
Low side output voltage
Low side output current
Signal output current
Signal output voltage
VREF current ability
VTH input voltage
VOL
Iomax
IFG/IAL
VFG/VAL
IVREF
VVTH
Tjmax
20
8
15
150
℃
Junction temperature
＊
Reduce by 6.5mW/℃ over Ta=25℃.
(On 70.0mm×70.0mm×1.6mm glass epoxy board)
＊＊ This value is not to exceed Pd.
〇OPERATING CONDITIONS
Parameter
Symbol
Limit
Unit
V
V
V
4.5～17.0
0～Vcc-2.0
0～Vcc-2.0
Operating supply voltage range
Hall input voltage range
VMIN input voltage range
Vcc
VH
VVMIN
＊This product is not designed for production against radioactive rays.
＊This document may be strategic data subject to COCOM regulations.
REV. D
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〇ELECTRICAL CHARACTERISTICS (Unless otherwise specified Ta=25℃,Vcc=12V)
Limit
Parameter
Circuit current
Hall input hysteresis
High side output current
Symbol
Unit
Conditions
Min.
5.0
±5
5
Typ.
8.0
±10
10
Max.
11.0
±15
15
Icc
VHYS
IH
mA
mV
mA
High side output leak current
IHL
-
-
10
μA VOH=34V
Low side output voltage
Lock detection ON time
Lock detection OFF time
Io=600mA
VL
TON
TOFF
-
0.3
0.3
6.0
0.45
0.42
8.4
V
s
s
0.18
3.6
FG output low voltage
FG output leak current
AL output low voltage
AL output leak current
VFGL
IFGL
VALL
IALL
-
-
-
-
0.15
0.3
10
V
IFG=5mA
-
0.15
-
μA VFG=17V
IAL=5mA
0.3
10
V
μA VAL=17V
OSC low voltage
VOSCL
VOSCH
ICOSC
IDOSC
0.8
2.24
-50
26
1.0
2.44
-32
32
1.2
2.64
-26
50
V
V
μA
μA
OSC high voltage
OSC charge current
OSC discharge current
VTH=VREF*0.429
Output ON duty 1
Output ON duty 2
DUTY1
DUTY2
75
45
80
50
85
55
%
%
H side pull up R=1kΩ
COSC=470pF
VTH=VREF*0.573
H side pull up R=1kΩ
COSC=470pF
VTH=VREF*0.717
H side pull up R=1kΩ
COSC=470pF
Output ON duty 3
VREF voltage
DUTY3
VREF
15
20
25
%
V
2.8
3.0
3.2
IVREF=-2mA
Current limit voltage
VTH bias current
VMIN bias current
VCL
IVTH
IVMIN
320
-
-
350
-
-
380
0.2
0.2
mV
μA
μA
REV. D
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〇PACKAGE OUTLINES
6.6 0.2
16
9
BD6722
1
8
0.15 0.1
0.1
Lot No.
0.8
0.36 0.1
SSOP-A16 (UNIT:mm)
〇BLOCK DIAGRAM
〇TERMINAL NAME
Terminal
AL
16
GND
1
PIN No.
SIGNAL
OUTPUT
COSC
VREF
name
GND
COSC
VMIN
VTH
Vcc
A1H
A1L
RNF
A2L
A2H
CS
H+
H-
VREF
FG
AL
SOFT
START
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
COSC
2
FG
15
TSD
SOFT
SWITCH
VREF
14
VMIN
3
LOCK
+
-
PROTECTION
VMIN
PWMCOMP
VTH
PWMCOMP
H-
13
VTH
4
+
-
CONTROL
LOGIC
HALL COMP
H+
12
Vcc
5
+
-
PRE
DRIVER
CURRENT
LIMIT COMP
A1H
6
CS
11
+
-
A1L
7
A2H
10
RNF
8
A2L
9
POW
POW
REV. D
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〇CAUTIONS ON USE
1) Absolute maximum ratings
An excess in the absolute maximum rations, such as supply voltage, temperature range of operating conditions, etc., can break
down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated
values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses.
2) Connecting the power supply connector backward
Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply lines. An
external direction diode can be added.
3) Power supply line
Back electromotive force causes regenerated current to power supply line, therefore take a measure such as placing a capacitor
between power supply and GND for routing regenerated current. And fully ensure that the capacitor characteristics have no problem
before determine a capacitor value. (when applying electrolytic capacitors, capacitance characteristic values are reduced at low
temperatures)
4) GND potential
The potential of GND pin must be minimum potential in all operating conditions. Also ensure that all terminals except GND terminal
do not fall below GND voltage including transient characteristics. However, it is possible that the motor output terminal may deflect
below GND because of influence by back electromotive force of motor. Malfunction may possibly occur depending on use condition,
environment, and property of individual motor. Please make fully confirmation that no problem is found on operation of IC.
5) Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation(Pd) in actual operating conditions.
6) Inter-pin shorts and mounting errors
Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any connection error
or if pins are shorted together.
7) Actions in strong electromagnetic field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction.
8) ASO
When using the IC, set the output transistor so that it does not exceed absolute maximum rations or ASO.
9) Thermal shut down circuit
The IC incorporates a built-in thermal shutdown circuit (TSD circuit). Operation temperature is 175℃(typ.) and has a hysteresis width
of 25℃(typ.). When IC chip temperature rises and TSD circuit works, the output terminal becomes an open state. TSD circuit is
designed only to shut the IC off to prevent thermal runaway. It is not designed to protect the IC or guarantee its operation. Do not
continue to use the IC after operation this circuit or use the IC in an environment where the operation of this circuit is assumed.
10) Testing on application boards
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always
discharge capacitors after each process or step. Always turn the IC’s power supply off before connecting it to or removing it from a
jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic measure. Use similar precaution
when transporting or storing the IC.
11) GND wiring pattern
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single
ground point at the ground potential of application so that the pattern wiring resistance and voltage variations caused by large
currents do not cause variations in the small signal ground voltage. Be careful not to change the GND wiring pattern of any external
components, either.
12) Capacitor between output and GND
When a large capacitor is connected between output and GND, if Vcc is shorted with 0V or GND for some cause, it is possible that
the current charged in the capacitor may flow into the output resulting in destruction. Keep the capacitor between output and GND
below 100uF.
13) IC terminal input
When Vcc voltage is not applied to IC, do not apply voltage to each input terminal. When voltage above Vcc or below GND is
applied to the input terminal, parasitic element is actuated due to the structure of IC. Operation of parasitic element causes mutual
interference between circuits, resulting in malfunction as well as destruction in the last. Do not use in a manner where parasitic
element is actuated.
REV. D
Appendix
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Appendix-Rev4.0
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