BD900N1WEFJ-C_技术文档

Datasheet

For Automotive 45 V 150 mA

Fixed/Adjustable Output

Nano Cap^TMLDO Regulators

BD9xxN1-C Series

General Description

Key Specifications

The BD9xxN1-C series are linear regulators using the

◼Wide Temperature Range (Tj):

-40 °C to +150 °C

3 V to 42 V

Nano Cap^TMtopology

consumption products for power supplies in various

automotive applications requiring a direct connection to the

battery.

These products are designed for up to 45 V as an absolute

maximum voltage and to operate until 150 mA for the

output current with low current consumption 28 μA (Typ).

These can regulate the output with a very high accuracy

±2.0 %.

designed as low current

(Note 1)

◼Wide Operating Input Range:

◼Output Voltage:

◼Low Current Consumption ^{(Note 3)}

3.3 V / 5.0 V / Adjustable

:

28 μA (Typ)

150 mA

◼Output Current Capability:

◼High Output Voltage Accuracy ^{(Note 4)}

:

±2.0 %

(Note 3) It does not contain the current of external feedback resistance.

(Note 4) The effect of external feedback resistor is not included.

The output capacitor 100 nF (Typ) or more can be used for

this product series, and it can realize a brilliant transient

characteristic even with small capacitance.

The output voltage line-up are 3.3 V, 5.0 V and Adjustable

type by an external resistive divider. The output voltage

can be adjusted between 1.0 V and 18 V by an external

resistive divider connected to the ADJ pin.

Features

◼Nano Cap^TMTopology ^{(Note 1)}

◼QuiCur^TMTopology ^{(Note 5)}

◼AEC-Q100 ^{(Note 6)}

Enable feature is integrated in the devices. A logical “HIGH”

at the EN pin turns on the device, and the devices are

controlled to disable by a logical “LOW” input to the EN pin

◼Automotive grade

◼Over Current Protection (OCP)

◼Thermal Shutdown Protection (TSD)

◼Under Voltage Lock Out (UVLO)

(Note 2)

.

The devices feature the integrated Over Current Protection

to protect the device from a damage caused by a short-

circuiting or an overload. These products also integrate

Thermal Shutdown Protection to avoid the damage by

overheating and Under Voltage Lock Out to avoid false

operation at low input voltage.

(Note 5) QuiCur^TMis a combination of technologies that provides

high-speed load response.

(Note 6) Grade 1

Applications

Furthermore, low ESR ceramic capacitors are sufficiently

◼Automotive (Power Train, Body ECU)

applicable for the phase compensation.

(Note 1) Nano Cap™ is a combination of technologies which allow stable

operation even if output capacitance is connected with the range of nF unit.

(Note 2) Applicable for product with Enable Function

◼Car Infotainment system, etc.

Packages

W (Typ) x D (Typ) x H (Max)

2.90 mm x 2.80 mm x 1.25 mm

◼SSOP5

◼HTSOP-J8

4.9 mm x 6.0 mm x 1.0 mm

SSOP5

HTSOP-J8

Nano Cap^TMand QuiCur^TMare a trademark or a registered trademark of ROHM Co., Ltd.

〇Product structure : Silicon integrated circuit 〇This product has no designed protection against radioactive rays.

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BD9xxN1-C Series

Typical Application Circuits1 (Output voltage fixed type)

Components Externally Connected

Capacitor: 0.047 μF ≤ C_IN(Min), 0.05 μF ≤ C_OUT(Min) ^{(Note 1)}

(Note 1) Electrolytic capacitor, tantalum capacitor and ceramic capacitors can be used.

In case of using electrolytic capacitor or ceramic capacitor with large ESR (> 500 mΩ), note that ceramic capacitor with 0.05 μF and more

must be connected near VOUT pin in parallel.

Applicable for product with Enable Function

Applicable for product without Enable Function

Input

Voltage

Output

Voltage

Input

Voltage

Output

Voltage

VIN

VOUT

VIN

VOUT

C_IN

C_OUT

C_IN

C_OUT

EN

GND

Enable

Voltage

Typical Application Circuits2 (Output voltage adjustable type)

Components Externally Connected

Capacitor: 0.047 μF ≤ C_IN(Min), 0.05 μF ≤ C_OUT(Min) ^{(Note 2)}

Resistor: 5 kΩ ≤ R₁≤ 200 kΩ ^{(Note 3)}

V_ADJ(Typ): 0.65 V

푉_푂푈푇

푅₂= 푅₁(

− ꢀ)

푉

퐴퐷퐽

(Note 2) Electrolytic capacitor, tantalum capacitor and ceramic capacitors can be used.

In case of using electrolytic capacitor or ceramic capacitor with large ESR (> 500 mΩ), note that ceramic capacitor with 0.05 μF and more

must be connected near VOUT pin in parallel.

(Note 3) The value of a feedback resistor R₁must be within this range.

R₂value is defined by following the formula using the limitation of R₁.

Error occurs due to the resistance value used and the ADJ terminal input current.

Applicable for product with Enable Function

Applicable for product without Enable Function

Input

Voltage

Output

Voltage

Input

Voltage

Output

Voltage

VIN

VOUT

ADJ

VIN

EN

VOUT

ADJ

R₂

R₁

R₂

R₁

C_IN

C_OUT

C_IN

C_OUT

GND

Enable

Voltage

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BD9xxN1-C Series

Contents

General Description........................................................................................................................................................................1

Key Specifications ..........................................................................................................................................................................1

Features..........................................................................................................................................................................................1

Applications ....................................................................................................................................................................................1

Packages .......................................................................................................................................................................................1

Typical Application Circuits1 (Output voltage fixed type)................................................................................................................2

Typical Application Circuits2 (Output voltage adjustable type) .......................................................................................................2

Pin Configurations ..........................................................................................................................................................................4

Pin Descriptions..............................................................................................................................................................................4

Block Diagram ................................................................................................................................................................................6

Description of Blocks ......................................................................................................................................................................8

Absolute Maximum Ratings ............................................................................................................................................................9

Thermal Resistances..................................................................................................................................................................10

Operating Conditions....................................................................................................................................................................11

Electrical Characteristics...............................................................................................................................................................12

Electrical Characteristics (Applicable for product with Enable Function) ^(Note6)..............................................................................13

Typical Performance Curves 5 V Output ......................................................................................................................................14

Typical Performance Curves 3.3 V Output....................................................................................................................................22

Measurement Circuit for Typical Performance Curves .................................................................................................................28

Application and Implementation....................................................................................................................................................30

Selection of External Components............................................................................................................................................30

Input Pin Capacitor................................................................................................................................................................30

Output Pin Capacitor .............................................................................................................................................................30

Typical Application.....................................................................................................................................................................31

Surge Voltage Protection for Linear Regulators ........................................................................................................................32

Positive Surge to the Input.....................................................................................................................................................32

Negative Surge to the Input...................................................................................................................................................32

Reverse Voltage Protection for Linear Regulators ....................................................................................................................32

Protection against Reverse Input/Output Voltage..................................................................................................................32

Protection against Input Reverse Voltage..............................................................................................................................33

Protection against Reverse Output Voltage when Output Connect to an Inductor.................................................................34

Power Dissipation.........................................................................................................................................................................35

■SSOP5....................................................................................................................................................................................35

■HTSOP-J8...............................................................................................................................................................................35

Thermal Design ............................................................................................................................................................................36

I/O Equivalence Circuit .................................................................................................................................................................38

Operational Notes.........................................................................................................................................................................40

1.

2.

3.

4.

5.

6.

7.

8.

Reverse Connection of Power Supply........................................................................................................................40

Power Supply Lines .....................................................................................................................................................40

Ground Voltage.............................................................................................................................................................40

Ground Wiring Pattern.................................................................................................................................................40

Operating Conditions...................................................................................................................................................40

Inrush Current...............................................................................................................................................................40

Thermal Consideration ................................................................................................................................................40

Testing on Application Boards....................................................................................................................................40

Inter-pin Short and Mounting Errors...........................................................................................................................40

Unused Input Pins........................................................................................................................................................40

Regarding the Input Pin of the IC................................................................................................................................41

Ceramic Capacitor........................................................................................................................................................41

Thermal Shutdown Protection Circuit (TSD)..............................................................................................................41

Over Current Protection Circuit (OCP) .......................................................................................................................41

9.

10.

11.

12.

13.

14.

Ordering Information.....................................................................................................................................................................42

Lineup...........................................................................................................................................................................................42

Marking Diagrams.........................................................................................................................................................................43

Physical Dimension and Packing Information .........................................................................................................................44

Revision History............................................................................................................................................................................46

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BD9xxN1-C Series

Pin Configurations

SSOP5

(TOP VIEW)

HTSOP-J8

(TOP VIEW)

5

4

8

7

6

5

EXP-PAD

1

2

3

1

2

3

4

Pin Descriptions

(SSOP5) BD9xxN1G-C, BD9xxN1WG-C (xx = 33, 50, 00)

Pin No.

Pin Name

Function

Descriptions

Connect an external resistor between VOUT pin and ADJ pin and

between ADJ pin and GND pin to adjust output voltage.

(Adjustment Pin

For Output

Voltage)

1

2

(ADJ)

Output voltage fixed type, this pin is not connected (N.C.) to the chip.

(Note 1)

GND

Ground Pin

Ground.

A logical “HIGH” (V_EN≥ 2.0 V) at the EN pin enables the device and

“LOW” (V_EN≤ 0.8 V) at the EN pin disables the device.

Although the output is turned off when the EN pin is open, it is

recommended to connect it to GND with low impedance to prevent

incorrect operation.

(Control Output

ON / OFF Pin)

3

(EN)

Without enable function, this pin is not connected (N.C.) to the chip.

(Note 1)

Set a capacitor with a capacitance of 0.047 μF (Min) or higher

between the VIN pin and GND. The selecting method is described in

Selection of External Components. If the inductance of power

supply line is high, please adjust input capacitor value.

Input Supply

Voltage Pin

4

5

VIN

Set a capacitor with a capacitance of 0.05 μF (Min) or higher between

VOUT

Output Voltage Pin the VOUT pin and GND. The selecting method is described in

Selection of External Components.

(Note 1) N.C. pin can be either left floated or for connect to GND.

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BD9xxN1-C Series

Pin Descriptions – continued

(HTSOP-J8) BD9xxN1EFJ-C, BD9xxN1WEFJ-C (xx = 33, 50, 00)

Pin No.

1

Pin Name

VOUT

Function

Descriptions

Set a capacitor with a capacitance of 0.05 μF (Min) or higher between

Output Voltage Pin the VOUT pin and GND. The selecting method is described in

Selection of External Components.

Connect an external resistor between VOUT pin and ADJ pin and

(Adjustment Pin

between ADJ pin and GND pin to adjust output voltage.

For Output

2

(ADJ)

Output voltage fixed type, this pin is not connected (N.C.) to the chip.

Voltage)

(Note 1)

3

4

5

6

N.C.

GND

N.C.

-

This pin is not connected (N.C.) to the chip. ^{(Note 1)}

Ground.

-

Ground Pin

-

This pin is not connected (N.C.) to the chip. ^{(Note 1)}

A logical “HIGH” (V_EN≥ 2.0 V) at the EN pin enables the device and

“LOW” (V_EN≤ 0.8 V) at the EN pin disables the device.

Although the output is turned off when the EN pin is open, it is

recommended to connect it to GND with low impedance to prevent

incorrect operation.

(Control Output

ON / OFF Pin)

7

(EN)

Without enable function, this pin is not connected (N.C.) to the chip.

(Note 1)

Set a capacitor with a capacitance of 0.047 μF (Min) or higher

between the VIN pin and GND. The selecting method is described in

Selection of External Components. If the inductance of power

supply line is high, please adjust input capacitor value.

Input Supply

Voltage Pin

8

-

VIN

It is recommended to connect EXP-PAD on the back side to external

Ground pattern in order to make heat dissipation better.

EXP-PAD

Heat Dissipation

(Note 1) N.C. pin can be either left floated or for connect to GND.

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BD9xxN1-C Series

Block Diagram

Applicable for product output voltage fixed type with Enable Function

･BD9xxN1WG-C, BD9xxN1WEFJ-C (xx = 33, 50)

VIN

PREREG

OCP

EN_SIG

DRIVER

UVLO

OCP

EN_SIG

VREF

EN

EN_SIG AMP

TSD

Power Tr.

OCP

TSD

EN

TSD

EN

DIS-

CHARGE

VOUT

TSD

GND

Applicable for product output voltage fixed type without Enable Function

･BD9xxN1G-C, BD9xxN1EFJ-C (xx = 33, 50)

VIN

PREREG

OCP

UVLO

OCP

VREF

AMP

Power Tr.

OCP

TSD

DRIVER

TSD

DIS-

CHARGE

VOUT

TSD

GND

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BD9xxN1-C Series

Block Diagram – continued

Applicable for product output voltage adjustable type with Enable Function

･BD900N1WG-C, BD900N1WEFJ-C

VIN

PREREG

OCP

EN_SIG

DRIVER

OCP

UVLO

EN_SIG

VREF

EN

EN_SIG AMP

TSD

Power Tr.

OCP

TSD

EN

TSD

EN

DIS-

CHARGE

VOUT

ADJ

TSD

GND

Applicable for product output voltage adjustable type without Enable Function

･BD900N1G-C, BD900N1EFJ-C

VIN

PREREG

OCP

UVLO

OCP

VREF

AMP

Power Tr.

OCP

TSD

DRIVER

TSD

DIS-

CHARGE

VOUT

ADJ

TSD

GND

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BD9xxN1-C Series

Description of Blocks

BD9xxN1WG-C, BD9xxN1WEFJ-C (xx = 33, 50, 00)

Block Name

EN

Function

Enable Input

Description of Blocks

A logical “HIGH” (V_EN≥ 2.0 V) at the EN pin enables the device

and “LOW” (V_EN≤ 0.8 V) at the EN pin disables the device.

PREREG

Internal Power Supply

Power supply for internal circuit.

In case maximum power dissipation exceeds or when the junction

temperature rises and the chip temperature (Tj) exceeds the heating

protection set temperature. The TSD protection circuit detects this

and forces the gate of output MOSFET to turn off in order to protect

the device from overheating. (Typ: 175 °C) When the junction

temperature decreases to low, the thermal Shutdown protection is

released and the output turns on automatically.

Thermal Shutdown

Protection

TSD

VREF

Reference Voltage

Generate the reference voltage.

The fixed output voltage product compares the voltage obtained by

dividing the output voltage with the reference voltage, and the variable

output voltage product compares the ADJ voltage with the reference

voltage, and controls the output power transistor via the DRIVER.

AMP

Error Amplifier

DRIVER

Output MOSFET Driver

Drive the output MOSFET.

If the output current increases higher than the maximum output

current, it is limited by Over Current Protection in order to protect the

device from a damage caused by an over current. (Typ: 280 mA)

While this block is operating, the output voltage may decrease

because the output current is limited.

OCP

Over Current Protection

If an abnormal state is removed and the output current value returns

to normal, the output voltage also returns to normal state.

Output pin is discharged by the internal resistance when EN = LOW

input or TSD is detected.

DISCHARGE Output Discharge Function

The Under Voltage Lock Out protection detects when V_INvoltage

becomes less than 2.4 V (Typ), it forces AMP to turn off in order to

avoid any false operation at low input voltage.

UVLO

Under Voltage Lock Out

BD9xxN1G-C, BD9xxN1EFJ-C (xx = 33, 50, 00)

Block Name

PREREG

Function

Description of Blocks

Internal Power Supply

Power supply for internal circuit.

In case maximum power dissipation exceeds or when the junction

temperature rises and the chip temperature (Tj) exceeds the heating

protection set temperature. The TSD protection circuit detects this

and forces the gate of output MOSFET to turn off in order to protect

the device from overheating. (Typ: 175 °C) When the junction

temperature decreases to low, the thermal Shutdown protection is

released and the output turns on automatically.

Thermal Shutdown

Protection

TSD

VREF

AMP

Reference Voltage

Error Amplifier

Generate the reference voltage.

The fixed output voltage product compares the voltage obtained by

dividing the output voltage with the reference voltage, and the variable

output voltage product compares the ADJ voltage with the reference

voltage, and controls the output power transistor via the DRIVER.

DRIVER

Output MOSFET Driver

Drive the output MOSFET.

If the output current increases higher than the maximum output

current, it is limited by Over Current Protection in order to protect the

device from a damage caused by an over current. (Typ: 280 mA)

While this block is operating, the output voltage may decrease

because the output current is limited.

OCP

Over Current Protection

If an abnormal state is removed and the output current value returns

to normal, the output voltage also returns to normal state.

Output pin is discharged by the internal resistance when TSD is

detected.

DISCHARGE Output Discharge Function

The Under Voltage Lock Out protection detects when V_INvoltage

becomes less than 2.4 V (Typ), it forces AMP to turn off in order to

avoid any false operation at low input voltage.

UVLO

Under Voltage Lock Out

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Absolute Maximum Ratings

Parameter

Symbol

Ratings

Unit

Supply Voltage ^{(Note 1)}

V_IN

V_EN

-0.3 to +45

-0.3 to +20 (≤ V_IN+ 0.3)

-0.3 to +7

V

EN Pin Voltage ^{(Note 2)}

VOUT Pin Voltage

V_OUT

V

ADJ Pin Voltage ^{(Note 3)}

V_ADJ

V

Junction Temperature Range

Storage Temperature Range

Maximum Junction Temperature

ESD Withstand Voltage (HBM) ^{(Note 4)}

ESD Withstand Voltage (CDM) ^{(Note 5)}

Tj

-40 to +150

-55 to +150

150

°C

V

Tstg

Tjmax

V_{ESD_HBM}

V_{ESD_CDM}

±2000

±750

V

Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit

between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is

operated over the absolute maximum ratings.

Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the

properties of the chip. In case of exceeding this absolute maximum rating, design a PCB boards with thermal resistance and power dissipation taken

into consideration by increasing board size and copper area so as not to exceed the maximum junction temperature rating.

(Note 1) Do not exceed Tjmax.

(Note 2) Applicable for product with BD9xxN1WG-C, BD9xxN1WEFJ-C (xx = 33, 50, 00)

The start-up orders of power supply (V_IN) and the V_ENdo not influence if the voltage is within the operation power supply voltage range.

(Note 3) Applicable for product with BD900N1G-C, BD900N1WG-C, BD900N1EFJ-C, BD900N1WEFJ-C.

(Note 4) ESD susceptibility Human Body Model “HBM”; base on ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF).

(Note 5) ESD susceptibility Charged Device Model “CDM”; base on AEC-Q100-011.

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BD9xxN1-C Series

Thermal Resistances

Thermal Resistance (Typ)^{(Note 1)}

Parameter

Symbol

Unit

(Note 3)

(Note 4)

1s

2s2p

SSOP5

Junction to Ambient

Junction to Top Characterization Parameter^{(Note 2)}

θ_JA

271.3

146.7

°C/W

Ψ_JT

46

37

HTSOP-J8

Junction to Ambient

Junction to Top Characterization Parameter^{(Note 2)}

θ_JA

157.2

32

36.2

11

°C/W

Ψ_JT

(Note 1) Based on JESD51-2A (Still-Air), using a BD950N1G-C, BD950N1EFJ-C Chip.

(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside

surface of the component package.

(Note 3) Using a PCB board based on JESD51-3.

(Note 4) Using a PCB board based on JESD51-5, 7.

Layer Number of

Measurement Board

Material

FR-4

Board Size

Single

114.3 mm x 76.2 mm x 1.57 mmt

Top

Copper Pattern

Thickness

70 μm

Footprints and Traces

Layer Number of

Measurement Board

Thermal Via^{(Note 5)}

Material

FR-4

Board Size

114.3 mm x 76.2 mm x 1.6 mmt

2 Internal Layers

Pitch

Diameter

4 Layers

1.20 mm

Φ0.30 mm

Top

Copper Pattern

Bottom

Thickness

70 μm

Copper Pattern

Thickness

Copper Pattern

Thickness

70 μm

Footprints and Traces

74.2 mm x 74.2 mm

35 μm

74.2 mm x 74.2 mm

(Note 5) This thermal via connects with the copper pattern of 1,2,4 layers. Placement follows the land pattern.

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BD9xxN1-C Series

Operating Conditions(-40 °C ≤ Tj ≤ +150 °C)

Parameter

Symbol

V_IN

Min

Max

Unit

4.5

42.0

-

V

Input Voltage ^{(Note 1) (Note 2)}

V_OUT(Max) + ΔV_D(Max)

Start-Up Voltage

V_{IN Start-Up}

V_OUT

R₁

3.0

1.0

5

V

Output Voltage ^{(Note 3)}

18.0

200

42

V

Feedback Resistor ADJ vs GND ^{(Note 3)}

Enable Input Voltage ^{(Note 4)}

Output Current

kΩ

V

V_EN

0

I_OUT

0

150

-

mA

μF

Input Capacitor ^{(Note 5) (Note 6)}

Output Capacitor ^{(Note 6)}

C_IN

0.047

0.05

C_OUT

470

Output Capacitor Equivalent Series

Resistance ^{(Note 7)}

ESR (C_OUT

Ta

)

-

500

mΩ

°C

Operating Temperature Ratings

-40

+125

(Note 1) Please consider that the output voltage would be dropped (Dropout voltage ΔVd) by the output current.

(Note 2) Apply 4.5V or VOUT (Max) + ΔVd (Max), whichever is higher.

(Note 3) Applicable for product with BD900N1G-C, BD900N1WG-C, BD900N1EFJ-C, BD900N1WEFJ-C.

(Note 4) Applicable for product with BD9xxN1WG-C, BD9xxN1WEFJ-C (xx = 33, 50, 00)

(Note 5) If the inductance of power supply line is high, please adjust input capacitor value in order to lower the input impedance.

A lower input impedance can bring out the ideal characteristic of IC as much as possible.

It also has the effect of preventing the voltage-drop at the input line.

(Note 6) Set capacitor value which do not fall below the minimum value. This value needs to consider the temperature characteristics and DC device

characteristics. For applications where the output voltage is 1.5 V or less, it is recommended to use an output capacitor of 0.22 μF or more because

the output capacitor holds less charge, increasing the amount of voltage fluctuation during transient response.

(Note 7) It is recommended to use ceramic capacitors that have low ESR characteristics for output phase compensation.

In case of using electrolytic capacitor or ceramic capacitor with large ESR (>500 mΩ), note that ceramic capacitor with 0.05μF and more must be

connected near VOUT pin in parallel.

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BD9xxN1-C Series

Electrical Characteristics

Unless otherwise specified, Tj = -40 °C to +150 °C, V_IN= 13.5 V, I_OUT= 0 mA, C_OUT= 0.1 μF

V_OUTsetting = 5 V, R₁= 10 kΩ, R₂= 67 kΩ

Typical values are defined at Tj = 25 °C, V_IN= 13.5 V

Limits

Parameter

Unit

μA

Symbol

I_CC

Conditions

I_OUT= 0 mA, Tj ≤ 125 °C

I_OUT= 0 mA, Tj ≤ 150 °C

Min

-

Typ

Max

48

28

Current Consumption ^{(Note 1)}

-

28

60

μA

6.0 V ≤ V_IN≤ 42 V, Tj = -40 °C to +150 °C

0 mA ≤ I_OUT≤ 100 mA,

or

Output Voltage ^{(Note 2)}

4.900

5.000

5.100

V

V_OUT

6.5 V ≤ V_IN≤ 42 V, Tj = -40 °C to +150 °C

0 mA ≤ I_OUT≤ 150 mA

4.5 V ≤ V_IN≤ 42 V, Tj = -40 °C to +150 °C

0 mA ≤ I_OUT≤ 100 mA,

or

Output Voltage ^{(Note 3)}

V_OUT

3.234

0.637

3.300

0.650

3.366

0.663

V

4.9 V ≤ V_IN≤ 42 V, Tj = -40 °C to +150 °C

0 mA ≤ I_OUT≤ 150 mA

4.5 V ≤ V_IN≤ 42 V,

Reference Voltage ^{(Note 4)}

V_ADJ

Tj = -40 °C to +150 °C,

0 mA ≤ I_OUT≤ 150 mA

V_IN= 4.75 V (V_OUT≥ 5 V)

I_OUT= 100 mA

ΔV_D1

ΔV_D2

ΔV_D3

ΔV_D4

-

420

500

650

780

70

1000

1200

1500

1800

-

mV

dB

V_IN= 3.135 V (V_OUT≥ 3.3 V)

I_OUT= 100 mA

Dropout Voltage

V_IN= 4.75 V (V_OUT≥ 5 V)

I_OUT= 150 mA

V_IN= 3.135 V (V_OUT≥ 3.3 V)

I_OUT= 150 mA

f = 1kHz, V_Ripple= 1 Vrms

I_OUT= 10 mA

Ripple Rejection ^{(Note 5)}

Line Regulation

R.R.

Reg.I1

Reg.I2

Reg.L1

Reg.L2

I_ADJ

V_OUT+ 1.5V ≤ V_IN≤ 42 V

(V_OUT≥ 3.0 V)

-

0.05

2

0.20

6

%

mV

%

4.5 V ≤ V_IN≤ 42 V

(V_OUT< 3.0 V)

0 mA ≤ I_OUT≤ 150 mA

(V_OUT≥ 3.0 V)

0.1

3

0.3

9

Load Regulation

0 mA ≤ I_OUT≤ 150 mA

(V_OUT< 3.0 V)

mV

nA

ADJ Input Current ^{(Note 4)(Note 5)}

0

15

V_ADJ= 1 V

(Note 1) Adjustable output voltage type does not contain the current of R₁and R₂.

(Note 2) BD950N1G-C, BD950N1WG-C, BD950N1EFJ-C, BD950N1WEFJ-C.

(Note 3) BD933N1G-C, BD933N1WG-C, BD933N1EFJ-C, BD933N1WEFJ-C.

(Note 4) BD900N1G-C, BD900N1WG-C, BD900N1EFJ-C, BD900N1WEFJ-C.

(Note 5) Not all devices are measured for shipment.

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BD9xxN1-C Series

Electrical Characteristics – continued

Unless otherwise specified, Tj = -40 °C to +150 °C, V_IN= 13.5 V, I_OUT= 0 mA, C_OUT= 0.1 μF

V_OUTsetting = 5 V, R₁= 10 kΩ, R₂= 67 kΩ

Typical values are defined at Tj = 25 °C, V_IN= 13.5 V

Limits

Parameter

Unit

V

Symbol

V_UVLOF

V_UVLOR

V_UVLOHYS

I_OCP

Conditions

Min

1.8

Typ

Max

2.8

UVLO fall threshold

2.4

V_INfalling

V_INrising

UVLO rise threshold

2.0

-

2.6

0.2

280

175

15

3.0

V

UVLO hysteresis

-

V

Over Current Protection

Thermal Shutdown Temperature

Thermal Shutdown Hysteresis

151

-

400

mA

°C

V_OUT= 0 V

-

T_TSD

-

T_TSDHYS

Electrical Characteristics (Applicable for product with Enable Function) ^(Note6)

Unless otherwise specified, Tj = -40 °C to +150 °C, V_IN= 13.5 V, I_OUT= 0 mA, C_OUT= 0.1 μF, V_EN= 5 V

V_OUTsetting = 5 V, R₁= 10 kΩ, R₂= 67 kΩ

Typical values are defined at Tj = 25 °C, V_IN= 13.5 V

Limits

Parameter

Shutdown Current

Symbol

Unit

Conditions

V_EN= 0 V

Min

-

Typ

Max

4.8

1.0

μA

V

I_SHUT

V_ENTH

V_ENTL

V_ENHYS

I_EN

Tj ≤ 125 °C

Enable ON threshold Voltage

Enable OFF threshold Voltage

Enable Hysteresis Voltage

Enable Bias Current

1.05

0.80

-

1.45

1.27

0.18

4

2.00

1.70

-

V_ENrising

V

V_ENfalling

-

V

-

8

μA

kΩ

V_EN= 5 V

V_EN= 0 V

VOUT Discharge Resistance

R_DSC

2.6

6.5

11.0

(Note 6) BD9xxN1WG-C, BD9xxN1WEFJ-C (xx = 33, 50, 00).

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BD9xxN1-C Series

Typical Performance Curves 5 V Output

Unless otherwise specified, Tj = -40 °C to +150 °C, V_IN= 13.5 V, I_OUT= 0 mA, V_EN= 5 V, C_OUT= 0.1 μF

1000

900

800

700

600

500

400

300

200

100

0

60

50

40

30

20

10

0

Tj = -40 ˚C

Tj = +25 ˚C

Tj = +125 ˚C

Tj = +150 ˚C

Tj = -40 ˚C

Tj = +25 ˚C

Tj = +125 ˚C

Tj = +150 ˚C

0

5

10 15 20 25 30 35 40 45

Input Voltage: V_IN[V]

0

5

10 15 20 25 30 35 40 45

Input Voltage: V_IN[V]

Figure 1. Circuit Current vs Input Voltage

(5 V output)

Figure 2. Circuit Current vs Input Voltage

*magnification of Figure 1 at narrow range circuit current

(5 V output)

100

400

350

300

250

200

150

100

50

Tj = -40 ˚C

Tj = +25 ˚C

Tj = +150 ˚C

Tj = -40 ˚C

90

Tj = +25 ˚C

Tj = +150 ˚C

80

70

60

50

40

30

20

10

0

0.0001

0.001

0.01

0.1

1

0

25

50

75

100

125

150

Output Current: I_OUT[mA]

Figure 3. Ground Current vs Output Current

(5 V output)

Figure 4. Ground Current vs Output Current

*magnification of Figure 3 at low output current

(5 V output)

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BD9xxN1-C Series

Typical Performance Curves 5 V Output - continued

Unless otherwise specified, Tj = -40 °C to +150 °C, V_IN= 13.5 V, I_OUT= 0 mA, V_EN= 5 V, C_OUT= 0.1 μF

60

50

40

30

20

10

0

5.10

5.08

5.06

5.04

5.02

5.00

4.98

4.96

4.94

4.92

4.90

-40

10

60

110

160

-40

10

60

110

160

Junction Temperature: Tj [˚C]

Figure 5. Circuit Current vs Junction Temperature

(5 V output)

Figure 6. Output Voltage vs Junction Temperature

(5 V output)

1000

120

Tj = -40 ˚C

Tj = +25 ˚C

Tj = +150 ˚C

Tj = -40 ˚C

900

800

700

600

500

400

300

200

100

0

Tj = +25 ˚C

100

Tj = +150 ˚C

80

60

40

20

0

25

50

75

100 125 150

10

100

1K

10K 100K 1M

10M

Output Current: I_OUT[mA]

Frequency [Hz]

Figure 7. Dropout Voltage vs Output Current

(5 V output, V_IN= 4.75 V)

Figure 8. Ripple Rejection vs Frequency

(5 V output, V_Ripple= 1 Vrms, I_OUT= 10 mA)

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BD9xxN1-C Series

Typical Performance Curves 5 V Output - continued

Unless otherwise specified, Tj = -40 °C to +150 °C, V_IN= 13.5 V, I_OUT= 0 mA, V_EN= 5 V, C_OUT= 0.1 μF

6.00

5.00

4.00

3.00

2.00

1.00

0.00

5.10

5.08

5.06

5.04

5.02

5.00

4.98

4.96

4.94

4.92

4.90

Tj = -40 ˚C

Tj = +25 ˚C

Tj = +150 ˚C

Tj = -40 ˚C

Tj = +25 ˚C

Tj = +150 ˚C

0

5

10 15 20 25 30 35 40 45

Input Voltage: V_IN[V]

0

5

10 15 20 25 30 35 40 45

Input Voltage: V_IN[V]

Figure 9. Output Voltage vs Input Voltage

(5 V output)

Figure 10. Output Voltage vs Input Voltage

*magnification of Figure 9 at narrow range output voltage

(5 V output)

6.00

5.00

4.00

3.00

2.00

1.00

0.00

Tj = -40 ˚C

Tj = +25 ˚C

Tj = +150 ˚C

V_IN

Falling

V_IN

Rising

0

1

2

3

4

5

6

Input Voltage: V_IN[V]

Figure 11. Output Voltage vs Input Voltage

*magnification of Figure 9 at low input voltage

(5 V output)

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BD9xxN1-C Series

Typical Performance Curves 5 V Output - continued

Unless otherwise specified, Tj = -40 °C to +150 °C, V_IN= 13.5 V, I_OUT= 0 mA, V_EN= 5 V, C_OUT= 0.1 μF

5.05

5.04

5.03

5.02

5.01

5.00

6.00

5.00

4.00

3.00

2.00

1.00

0.00

Tj = -40 ˚C

Tj = +25 ˚C

Tj = +150 ˚C

Tj = -40 ˚C

Tj = +25 ˚C

Tj = +150 ˚C

0

25

50

75

100 125 150

0

50 100 150 200 250 300 350

Output Current: I_OUT[mA]

Figure 12. Output Voltage vs Output Current

(5 V output, Load Regulation)

Figure 13. Output Voltage vs Output Current

(5 V output, Over Current Protection)

6.00

Temperature

Rising

5.00

4.00

3.00

2.00

1.00

0.00

Temperature

Falling

100

120

140

160

180

200

Junction Temperature: Tj [˚C]

Figure 14. Output Voltage vs Junction Temperature

(5 V output)

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BD9xxN1-C Series

Typical Performance Curves 5 V Output - continued

Unless otherwise specified, Tj = -40 °C to +150 °C, V_IN= 13.5 V, I_OUT= 0 mA, V_EN= 5 V, C_OUT= 0.1 μF

5.00

4.00

3.00

2.00

1.00

0.00

0.665

0.660

0.655

0.650

0.645

0.640

0.635

Tj = -40 ˚C

Tj = +25 ˚C

Tj = +125 ˚C

Tj = +150 ˚C

0

5

10 15 20 25 30 35 40 45

Input Voltage: V_IN[V]

-40

10

60

110

160

Junction Temperature: Tj [˚C]

Figure 16. Shutdown Current vs Input Voltage

(V_EN= 0 V)

Figure 15. Adjustment Voltage vs Junction Temperature

8.00

6.00

Tj = -40 ˚C

7.00

6.00

5.00

4.00

3.00

2.00

1.00

0.00

Tj = +25 ˚C

Tj = +125 ˚C

Tj = +150 ˚C

5.00

4.00

3.00

2.00

1.00

0.00

Tj = -40 ˚C

Tj = +25 ˚C

Tj = +150 ˚C

V_EN

Falling

V_EN

Rising

0

1

2

3

4

5

0

5

10 15 20 25 30 35 40 45

EN Input Voltage: V_EN[V]

Figure 18. Output Voltage vs EN Input Voltage

(5 V output)

Figure 17. EN Bias Current vs EN Input Voltage

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BD9xxN1-C Series

Typical Performance Curves 5 V Output - continued

Unless otherwise specified, Tj = -40 °C to +150 °C, V_IN= 13.5 V, I_OUT= 0 mA, V_EN= 5 V, C_OUT= 0.1 μF

VIN: 10 V/Div

V_IN: 10 V/Div

V_OUT: 100 mV/Div [offset: 5 V]

Tf = 1 μs

V_OUT: 100 mV/Div [offset: 5 V]

Tr = 1 μs

I_OUT: 1 mA to 150 mA

I_OUT: 100 mA/Div

I_OUT: 150 mA to 1 mA

I_OUT: 100 mA/Div

10 μs/Div

Figure 19. Load Transient 1 mA to 150 mA

(5 V output, Tr = 1 μs)

Figure 20. Load Transient 150 mA to 1 mA

(5 V output, Tf = 1 μs)

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BD9xxN1-C Series

Typical Performance Curves 5 V Output - continued

Unless otherwise specified, Tj = -40 °C to +150 °C, V_IN= 13.5 V, I_OUT= 0 mA, V_EN= 5 V, C_OUT= 0.1 μF

V_IN: 8 V to 16 V

V_IN: 5 V/Div [offset: 8 V]

Slew rate: 1 V/μs

V_IN: 16 V to 8 V

V_IN: 5 V/Div [offset: 8 V]

Slew rate: 1 V/μs

V_OUT: 100 mV/Div [offset: 5 V]

20 μs/Div

Figure 21. Line Transient 8 V to 16 V

(5 V output, I_OUT= 0 mA)

Figure 22. Line Transient 16 V to 8 V

(5 V output, I_OUT= 0 mA)

V_IN: 8 V to 16 V

V_IN: 5 V/Div [offset: 8 V]

Slew rate: 1 V/μs

V_IN: 16 V to 8 V

V_IN: 5 V/Div [offset: 8 V]

Slew rate: 1 V/μs

V_OUT: 100 mV/Div [offset: 5 V]

20 μs/Div

Figure 23. Line Transient 8 V to 16 V

(5 V output, I_OUT= 150 mA)

Figure 24. Line Transient 16 V to 8 V

(5 V output, I_OUT= 150 mA)

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BD9xxN1-C Series

Typical Performance Curves 5 V Output - continued

Unless otherwise specified, Tj = -40 °C to +150 °C, V_IN= 13.5 V, I_OUT= 0 mA, V_EN= 5 V, C_OUT= 0.1 μF

V_IN: 0 V to 16 V

V_IN: 5 V/Div

V_IN: 0 V to 16 V

V_IN: 5 V/Div

Slew rate: 2 V/μs

V_OUT: 2 V/Div

200 μs/Div

V_OUT: 2 V/Div

200 μs/Div

Figure 25. VIN Startup Waveform

Figure 26. VIN Startup Waveform

VIN: 0 V to 16 V

(5 V output, I_OUT= 0 mA)

(5 V output, I_OUT= 150 mA)

V_EN: 2 V/Div

V_OUT: 2 V/Div

100 μs/Div

V_OUT: 2 V/Div

1.0 ms/Div

Figure 27. EN Startup Waveform

(5 V output, I_OUT= 1 mA)

Figure 28. EN Shutdown Waveform

(5 V output, I_OUT= 1 mA)

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BD9xxN1-C Series

Typical Performance Curves 3.3 V Output

Unless otherwise specified, Tj = -40 °C to +150 °C, V_IN= 13.5 V, I_OUT= 0 mA, V_EN= 5 V, C_OUT= 0.1 μF

1000

900

800

700

600

500

400

300

200

100

0

60

50

40

30

20

10

0

Tj = -40 ˚C

Tj = +25 ˚C

Tj = +125 ˚C

Tj = +150 ˚C

Tj = -40 ˚C

Tj = +25 ˚C

Tj = +125 ˚C

Tj = +150 ˚C

0

5

10 15 20 25 30 35 40 45

Input Voltage: V_IN[V]

0

5

10 15 20 25 30 35 40 45

Input Voltage: V_IN[V]

Figure 29. Circuit Current vs Input Voltage

(3.3 V output)

Figure 30. Circuit Current vs Input Voltage

*magnification of Figure 29 at narrow range circuit current

(3.3 V output)

400

350

300

250

200

150

100

50

100

Tj = -40 ˚C

Tj = +25 ˚C

Tj = +150 ˚C

Tj = -40 ˚C

90

Tj = +25 ˚C

Tj = +150 ˚C

80

70

60

50

40

30

20

10

0

25

50

75

100

125

150

0.0001

0.001

0.01

0.1

1

Output Current: I_OUT[mA]

Figure 31. Ground Current vs Output Current

(3.3 V output)

Figure 32. Ground Current vs Output Current

*magnification of Figure 31 at low output current

(3.3 V output)

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BD9xxN1-C Series

Typical Performance Curves 3.3 V Output - continued

Unless otherwise specified, Tj = -40 °C to +150 °C, V_IN= 13.5 V, I_OUT= 0 mA, V_EN= 5 V, C_OUT= 0.1 μF

60

50

40

30

20

10

0

3.38

3.36

3.34

3.32

3.30

3.28

3.26

3.24

3.22

-40

10

60

110

160

-40

10

60

110

160

Junction Temperature: Tj [˚C]

Figure 33. Circuit Current vs Junction Temperature

(3.3 V output)

Figure 34. Output Voltage vs Junction Temperature

(3.3 V output)

1400

120

Tj = -40 ˚C

Tj = +25 ˚C

1200

Tj = +25 ˚C

Tj = +150 ˚C

100

Tj = +150 ˚C

1000

80

800

600

400

200

0

60

40

20

0

25

50

75

100 125 150

10

100

1K

10K 100K 1M

10M

Output Current: I_OUT[mA]

Frequency[Hz]

Figure 35. Dropout Voltage vs Output Current

(3.3 V output, V_IN= 3.135 V)

Figure 36. Ripple Rejection vs Frequency

(3.3 V output, V_Ripple= 1 Vrms, I_OUT= 10 mA)

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BD9xxN1-C Series

Typical Performance Curves 3.3 V Output - continued

Unless otherwise specified, Tj = -40 °C to +150 °C, V_IN= 13.5 V, I_OUT= 0 mA, V_EN= 5 V, C_OUT= 0.1 μF

3.50

3.00

2.50

2.00

1.50

1.00

0.50

0.00

3.36

3.34

3.32

3.30

3.28

3.26

Tj = -40 ˚C

Tj = +25 ˚C

Tj = +150 ˚C

Tj = -40 ˚C

Tj = +25 ˚C

Tj = +150 ˚C

0

5

10 15 20 25 30 35 40 45

Input Voltage: V_IN[V]

0

5

10 15 20 25 30 35 40 45

Input Voltage: V_IN[V]

Figure 38. Output Voltage vs Input Voltage

*magnification of Figure 37 at narrow range output voltage

(3.3 V output)

Figure 37. Output Voltage vs Input Voltage

(3.3 V output)

3.36

3.50

Tj = -40 ˚C

Tj = +25 ˚C

Tj = +150 ˚C

Tj = -40 ˚C

3.00

3.34

3.32

3.30

3.28

3.26

Tj = +25 ˚C

2.50

2.00

1.50

1.00

0.50

0.00

Tj = +150 ˚C

0

50 100 150 200 250 300 350

Output Current: I_OUT[mA]

0

25

50

75

100 125 150

Output Current: I_OUT[mA]

Figure 39. Output Current vs Output Voltage

(3.3 V output, Load Regulation)

Figure 40. Output Current vs Output Voltage

(3.3 V output, Over Current Protection)

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BD9xxN1-C Series

Typical Performance Curves 3.3 V Output - continued

Unless otherwise specified, Tj = -40 °C to +150 °C, V_IN= 13.5 V, I_OUT= 0 mA, V_EN= 5 V, C_OUT= 0.1 μF

V_IN: 10 V/Div

V_OUT: 100 mV/Div [offset: 3.3 V]

Tf = 1 μs

V_OUT: 100 mV/Div [offset: 3.3 V]

Tr = 1 μs

I_OUT: 150 mA to 1 mA

I_OUT: 100 mA/Div

I_OUT: 1 mA to 150 mA

I_OUT: 100 mA/Div

10 μs/Div

Figure 41. Load Transient 1 mA to 150 mA

(3.3 V output, Tr = 1 μs)

Figure 42. Load Transient 150 mA to 1 mA

(3.3 V output, Tf = 1 μs)

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BD9xxN1-C Series

Typical Performance Curves 3.3 V Output - continued

Unless otherwise specified, Tj = -40 °C to +150 °C, V_IN= 13.5 V, I_OUT= 0 mA, V_EN= 5 V, C_OUT= 0.1 μF

V_IN: 8 V to 16 V

V_IN: 5 V/Div [offset: 8 V]

Slew rate: 1 V/μs

V_IN: 16 V to 8 V

V_IN: 5 V/Div [offset: 8 V]

Slew rate: 1 V/μs

V_OUT: 100 mV/Div [offset: 3.3 V]

20 μs/Div

Figure 43. Line Transient 8 V to 16 V

(3.3 V output, I_OUT= 0 mA)

Figure 44. Line Transient 16 V to 8 V

(3.3 V output, I_OUT= 0 mA)

V_IN: 8 V to 16 V

V_IN: 5 V/Div [offset: 8 V]

V_IN: 16 V to 8 V

V_IN: 5 V/Div [offset: 8 V]

Slew rate: 1 V/μs

V_OUT: 100 mV/Div [offset: 3.3 V]

20 μs/Div

Figure 45. Line Transient 8 V to 16 V

(3.3 V output, I_OUT= 150 mA)

Figure 46. Line Transient 16 V to 8 V

(3.3 V output, I_OUT= 150 mA)

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BD9xxN1-C Series

Typical Performance Curves 3.3 V Output - continued

Unless otherwise specified, Tj = -40 °C to +150 °C, V_IN= 13.5 V, I_OUT= 0 mA, V_EN= 5 V, C_OUT= 0.1 μF

V_IN: 16 V to 0 V

V_IN: 5 V/Div

V_IN: 16 V to 0 V

V_IN: 5 V/Div

Slew rate: 2 V/μs

V_OUT: 2 V/Div

100 μs/Div

V_OUT: 2 V/Div

100 μs/Div

Figure 47. VIN Startup Waveform

VIN: 0 V to 16 V

Figure 48. VIN Startup Waveform

VIN: 0 V to 16 V

(3.3 V output, I_OUT= 0 mA)

(3.3 V output, I_OUT= 150 mA)

V_EN: 2 V/Div

V_OUT: 1 V/Div

400 μs/Div

40 μs/Div

Figure 49. EN Startup Waveform

(3.3 V output, I_OUT= 1 mA)

Figure 50. EN Shutdown Waveform

(3.3 V output, I_OUT= 1 mA)

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BD9xxN1-C Series

Measurement Circuit for Typical Performance Curves

VIN

EN

VOUT

VIN

EN

VOUT

0.1 μF

GND

0.1 μF

GND

0.1 μF

I_OUT

Measurement Setup for

Figure 1 to 5, 16, 29 to 33

Measurement Setup for

Figure 6, 9 to 12, 14, 34, 37 to 39

VIN

EN

VOUT

VIN

EN

VOUT

Vripple

0.1 μF

GND

0.1 μF

GND

0.1 μF

M

I_OUT

Measurement Setup for

Figure 7, 35

Measurement Setup for

Figure 8, 36

VIN

EN

VOUT

VIN

EN

VOUT

0.1 μF

GND

0.1 μF

GND

0.1 μF

Measurement Setup for

Figure 17 to 18

Measurement Setup for

Figure 13, 40

VIN

EN

VOUT

VIN

EN

VOUT

0.1 μF

M

GND

0.1 μF

M

0.1 μF

I_OUT

M

GND

0.1 μF

I_OUT

M

Measurement Setup for

Figure 27 to 28, 49 to 50

Measurement Setup for

Figure 19 to 26, 41 to 48

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BD9xxN1-C Series

Measurement Circuit for Typical Performance Curves - continued

VIN

EN

VOUT

ADJ

67 kΩ

10 kΩ

0.1 μF

GND

0.1 μF

Measurement Setup for

Figure 15

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BD9xxN1-C Series

Application and Implementation

Notice: The following information is given as a reference or hint for the application and the implementation. Therefore, it does

not guarantee its operation on the specific function, accuracy or external components in the application. In the

application, it shall be designed with sufficient margin by enough understanding about characteristics of the external

components, e.g. capacitor, and also by appropriate verification in the actual operating conditions.

Selection of External Components

Input Pin Capacitor

In order to fully demonstrate the performance of this IC, it is recommended that the input capacitor be placed as close as

possible to the input pin and the GND pin without being affected by mounting impedance, etc., and that it be laid out on the

same mounting surface. In this case, a capacitor with a capacitance value of 0.047 μF (Min) or higher is recommended.

Depending on the layout of the peripheral components, including this IC, from the input power supply, if the distance from

the battery is too far or the impedance of the input side is too high, for example, the current supply due to the load response

of the IC cannot be withstood, and the output voltage may become unstable due to fluctuations in the input voltage. In such

a case, it is necessary to use a large capacitor to prevent the line voltage from dropping. Select the capacitance of the input

terminal capacitor according to the line impedance between the power smoothing circuit and the input terminal, and the

load response required by the application.

In addition, the consideration should be taken as the output pin capacitor, to prevent an influence to the regulator’s

characteristic from the deviation or the variation of the external capacitor’s characteristic. All output capacitors mentioned

above are recommended to have a good DC bias characteristic and a temperature characteristic (approximately ±15 %,

e.g. X7R, X8R) with being satisfied high absolute maximum voltage rating based on EIA standard. These capacitors should

be placed close to the input pin and mounted on the same board side of the regulator not to be influenced by implement

impedance.

Output Pin Capacitor

The output capacitor is mandatory for the regulator in order to realize stable operation. The output capacitor with

capacitance value of 0.05 μF (Min) or higher and ESR up to 500 mΩ (Max) must be required between the output pin and

the GND pin. For applications where the output voltage is 1.5 V or less, it is recommended to use an output capacitor with

capacitance value of 0.22 μF or higher because the output capacitor holds less charge, increasing the amount of voltage

fluctuation during transient response.

A proper selection of appropriate both the capacitance value and ESR for the output capacitor can improve the transient

behavior of the regulator and can also keep the stability with better regulation loop. The correlation of the output capacitance

value and ESR is shown in the graph on the next page as the output capacitor’s capacitance value and the stability region

for ESR. As described in this graph, this regulator is designed to be stable with ceramic capacitors as of MLCC, with the

capacitance value from 0.05 μF to 470 μF and with ESR value within almost 0 Ω to 500 mΩ. The frequency range of ESR

can be generally considered as within about 10 kHz to 100 kHz.

Note that the provided the stable area of the capacitance value and ESR in the graph is obtained under a specific set of

conditions which is based on the measurement result in single IC on our board with a resistive load. In the actual

environment, the stability is affected by wire impedance on the board, input power supply impedance and also loads

impedance. Therefore, please note that a careful evaluation of the actual application, the actual usage environment and

the actual conditions should be done to confirm the actual stability of the system.

Generally, in the transient event which is caused by the input voltage fluctuation or the load fluctuation beyond the gain

bandwidth of the regulation loop, the transient response ability of the regulator depends on the capacitance value of the

output capacitor. Basically the capacitance value of 0.05 μF (Min) or higher for the output capacitor is recommended as

shown in the table on Output Capacitance C_OUT, ESR Available Area. Using bigger capacitance value can be expected to

improve better the transient response ability in a high frequency. Various types of capacitors can be used for the output

capacitor with high capacity which includes electrolytic capacitor, electro-conductive polymer capacitor and tantalum

capacitor. Noted that, depending on the type of capacitors, its characteristics such as ESR (≤ 500 mΩ) absolute value

range, a temperature dependency of capacitance value and increased ESR at cold temperature needs to be taken into

consideration. When using capacitor with large ESR (≤500mΩ) , note that ceramic capacitor with 0.05 uF or higher must

be connected in parallel to keep stability. In this case, the total capacitance should be less than 470 µF.

In addition, the same consideration should be taken as the input pin capacitor, to prevent an influence to the regulator’s

characteristic from the deviation or the variation of the external capacitor’s characteristic. All output capacitors mentioned

above are recommended to have a good DC bias characteristic and a temperature characteristic (approximately ±15 %,

e.g. X7R, X8R) with being satisfied high absolute maximum voltage rating based on EIA standard. These capacitors should

be placed close to the output pin and mounted on the same board side of the regulator not to be influenced by implement

impedance.

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BD9xxN1-C Series

Application and Implementation - continued

10

Unstable Area

1

Stable Area

0.1

0.01

0.1

1

10

100

1000

Output Capacitance C_OUT[μF]

Figure 51. Output Capacitance C_OUT, ESR Available Area

(-40 °C ≤ Tj ≤ +150 °C, 4.5 V ≤ V_IN≤ 42 V, V_EN= 5 V, IOUT = 0 mA to 150 mA)

Typical Application

Parameter

Symbol

Reference Value for Application

I_OUT≤ 150 mA

Output Current Range

Output Capacitor

Input Voltage

I_OUT

C_OUT

V_IN

0.1 μF

13.5 V

0.1 μF

Input Capacitor ^{(Note 1)}

C_IN

(Note 1) If the inductance of power supply line is high, please adjust input capacitor value.

To avoid any malfunctions by input voltage drop of power supply line, please consider to adjust the impedance of power supply line

to small as much as possible.

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BD9xxN1-C Series

Application and Implementation - continued

Surge Voltage Protection for Linear Regulators

The following shows some helpful tips to protect ICs from possible inputting surge voltage which exceeds absolute

maximum ratings.

Positive Surge to the Input

If there is any potential risk that positive surges higher than absolute maximum ratings, it is applied to the input, a

Zener Diode should be inserted between the VIN pin and the GND to protect the device as shown in Figure 52.

VIN

VOUT

GND

V_IN

V_OUT

C_OUT

D₁

C_IN

Figure 52. Surges Higher than absolute maximum ratings is Applied to the Input

Negative Surge to the Input

If there is any potential risk that negative surges below the absolute maximum ratings, (e.g.) -0.3 V, is applied to the

input, a Schottky Diode should be inserted between the VIN and the GND to protect the device as shown in Figure

53.

VIN

VOUT

GND

V_IN

V_OUT

C_OUT

D₁

C_IN

Figure 53. Surges Lower than -0.3 V is Applied to the Input

Reverse Voltage Protection for Linear Regulators

A linear regulator which is one of the integrated circuit (IC) operates normally in the condition that the input voltage is

higher than the output voltage. However, it is possible to happen the abnormal situation in specific conditions which is

the output voltage becomes higher than the input voltage. A reverse polarity connection between the input and the output

might be occurred or a certain inductor component can also cause a polarity reverse conditions. If the countermeasure

is not implemented, it may cause damage to the IC. The following shows some helpful tips to protect ICs from the reverse

voltage occasion.

Protection against Reverse Input/Output Voltage

In the case that MOSFET is used for the pass transistor, a parasitic body diode between the drain-source generally

exists. If the output voltage becomes higher than the input voltage and if its voltage difference exceeds V_Fof the body

diode, a reverse current flows from the output to the input through the body diode as shown in Figure 54. The current

flows in the parasitic body diode is not limited in the protection circuit because it is the parasitic element, therefore

too much reverse current may cause damage to degrade or destroy the semiconductor elements of the regulator.

I_R

V_OUT

V_IN

Error

AMP.

V_REF

Figure 54. Reverse Current Path in a MOS Linear Regulator

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Protection against Reverse Input/Output Voltage – continued

An effective solution for this problem is to implement an external bypass diode in order to prevent the reverse current

flow inside the IC as shown in Figure 55. Especially in applications where the output voltage setting is high and a

large output capacitor is connected, be sure to consider countermeasures for large reverse current values. Note that

the bypass diode must be turned on prior to the internal body diode of the IC. This external bypass diode should be

chosen as being lower forward voltage V_Fthan the internal body diode. It should to be selected a diode which has a

rated reverse voltage greater than the IC’s input maximum voltage and also which has a rated forward current greater

D₁

than the anticipated reverse current in the actual application.

VIN

VOUT

GND

V_IN

V_OUT

C_OUT

C_IN

Figure 55. Bypass Diode for Reverse Current Diversion

A Schottky barrier diode which has a characteristic of low forward voltage (V_F) can meet to the requirement for the

external diode to protect the IC from the reverse current. However, it also has a characteristic that the leakage (I_R)

caused by the reverse voltage is bigger than other diodes. Therefore, it should be taken into the consideration to

choose it because if I_Ris large, it may cause increase of the current consumption, or raise of the output voltage in the

light-load current condition. I_Rcharacteristic of Schottky diode has positive temperature characteristic, which the

details shall be checked with the datasheet of the products, and the careful confirmation of behavior in the actual

application is mandatory.

Even in the condition when the input/output voltage is inverted, if the VIN pin is open as shown in Figure 56, or if the

VIN pin becomes high-impedance condition as designed in the system, it cannot damage or degrade the parasitic

element. It's because a reverse current via the pass transistor becomes extremely low. In this case, therefore, the

protection external diode is not necessary.

ON→OFF

IBIAS

VIN

VOUT

GND

V_OUT

C_OUT

V_IN

CIN

Figure 56. Open VIN

Protection against Input Reverse Voltage

When the input of the IC is connected to the power supply, accidentally if plus and minus are routed in reverse, or if

there is a possibility that the input may become lower than the GND pin, it may cause to destroy the IC because a

large current passes via the internal electrostatic breakdown prevention diode between the input pin and the GND

pin inside the IC as shown in Figure 57.

The simplest solution to avoid this problem is to connect a Schottky barrier diode or a rectifier diode in series to the

power supply line as shown in Figure 58. However, it increases a power loss calculated as V_Fx I_CC, and it also causes

the voltage drop by a forward voltage V_Fat the supply voltage while normal operation.

Generally, since the Schottky barrier diode has lower V_F, so it contributes to rather smaller power loss than rectifier

diodes. If IC has load currents, the required input current to the IC is also bigger. In this case, this external diode

generates heat more, therefore select a diode with enough margin in power dissipation. On the other hand, a reverse

current passes this diode in the reverse connection condition, however, it is negligible because its small amount.

VIN

V_OUT

C_OUT

GND

VIN

VOUT

D1

VIN

VOUT

GND

V_OUT

C_OUT

VIN

-

GND

CIN

+

GND

Figure 58. Protection against Reverse Polarity 1

Figure 57. Current Path in Reverse Input Connection

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BD9xxN1-C Series

Protection against Input Reverse Voltage - continued

Figure 59 shows a circuit in which a P-channel MOSFET is connected in series to the power. The body diode (parasitic

element) is located in the drain-source junction area of the MOSFET. The drop voltage in a forward connection is

calculated from the on state resistance of the MOSFET and the output current I_O. It is smaller than the drop voltage

by the diode as shown in Figure 59 and results in less of a power loss. No current flows in a reverse connection where

the MOSFET remains off in Figure 59.

If the gate-source voltage exceeds maximum rating of MOSFET gate-source junction with derating curve in

consideration, reduce the gate-source junction voltage by connecting resistor voltage divider as shown in Figure 60.

Q1

VIN

Q1

V_OUT

VIN

VOUT

GND

VIN

VOUT

GND

VIN

V_OUT

C_OUT

R1

R2

CIN

C_OUT

CIN

Figure 59. Protection against Reverse Polarity 2

Figure 60. Protection against Reverse Polarity 3

Protection against Reverse Output Voltage when Output Connect to an Inductor

If the output load is inductive, electrical energy accumulated in the inductive load is released to the ground at the

moment that the output voltage is turned off. IC integrates ESD protection diodes between the IC output and ground

pins. A large current may flow in such condition finally resulting on destruction of the IC. To prevent this situation,

connect a Schottky barrier diode in parallel to the integrated diodes as shown in Figure 61.

Further, if a long wire is in use for the connection between the output pin of the IC and the load, confirm that the

negative voltage is not generated at the VOUT pin when the output voltage is turned off by observation of the

waveform on an oscilloscope, since it is possible that the load becomes inductive. An additional diode is required for

a motor load that is affected by its counter electromotive force, as it produces an electrical current in a similar way.

VOUT

VIN

VOUT

GND

D1

CIN

XLL

COUT

GND

Figure 61. Current Path in Inductive Load (Output: Off)

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BD9xxN1-C Series

Power Dissipation

■SSOP5

1.0

(1): 1-layer PCB

(Copper foil area on the reverse side of PCB: 0 mm x 0 mm)

Board material: FR-4

Board size: 114.3 mm x 76.2 mm x 1.57 mmt

Top copper foil: ROHM recommended footprint

+ wiring to measure, 70 μm. copper.

(2) 0.85 W

(1) 0.46 W

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0.0

(2): 4-layer PCB

(Copper foil area on the reverse side of PCB: 74.2 mm x 74.2 mm)

Board material: FR-4

Board size: 114.3 mm x 76.2 mm x 1.60 mmt

Top copper foil: ROHM recommended footprint

+ wiring to measure, 70 μm. copper.

2 inner layers copper foil area of PCB:

74.2 mm x 74.2 mm, 35 μm. copper.

Copper foil area on the reverse side of PCB:

74.2 mm x 74.2 mm, 70 μm. copper.

Condition (1) : θ_JA= 271.3 °C/W, Ψ_JT(top center) = 46 °C/W

Condition (2) : θ_JA= 146.7 °C/W, Ψ_JT(top center) = 37 °C/W

0

25

50

75

100 125 150

Ambient Temperature Ta [°C]

Figure 62. Power Dissipation Graph (SSOP5)

■HTSOP-J8

4.0

(1): 1-layer PCB

(Copper foil area on the reverse side of PCB: 0 mm x 0 mm)

Board material: FR-4

Board size: 114.3 mm x 76.2 mm x 1.57 mmt

Top copper foil: ROHM recommended footprint

+ wiring to measure, 70 μm. copper.

(2) 3.45 W

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

(2): 4-layer PCB

(Copper foil area on the reverse side of PCB: 74.2 mm x 74.2 mm)

Board material: FR-4

Board size: 114.3 mm x 76.2 mm x 1.60 mmt

Top copper foil: ROHM recommended footprint

+ wiring to measure, 70 μm. copper.

2 inner layers copper foil area of PCB:

74.2 mm x 74.2 mm, 35 μm. copper.

Copper foil area on the reverse side of PCB:

74.2 mm x 74.2 mm, 70 μm. copper.

(1) 0.79 W

0

25

50

75

100 125 150

Condition (1) : θ_JA= 157.2 °C/W, Ψ_JT(top center) = 32 °C/W

Condition (2) : θ_JA= 36.2 °C/W, Ψ_JT(top center) = 11 °C/W

Ambient Temperature Ta [°C]

Figure 63. Power Dissipation Graph (HTSOP-J8)

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Thermal Design

This product exposes a frame on the back side of the package for thermal efficiency improvement. The power consumption

of the IC is decided by the dropout voltage condition, the load current and the current consumption. Refer to power dissipation

curves illustrated in Figure 62 and 63 when using the IC in an environment of Ta ≥ 25 °C. Even if the ambient temperature Ta

is at 25°C, chip junction temperature (Tj) can be very high depending on the input voltage and the load current. Consider the

design to be Tj ≤ Tjmax = 150 °C in whole operating temperature range.

Should by any condition the maximum junction temperature Tjmax = 150 °C rating be exceeded by the temperature increase

of the chip, it may result in deterioration of the properties of the chip. The thermal impedance in this specification is based on

recommended PCB and measurement condition by JEDEC standard. Therefore, need to be careful because it might be

different from the actual use condition. Verify the application and allow sufficient margins in the thermal design by the following

method to calculate the junction temperature Tj. Tj can be calculated by either of the two following methods.

1. The following method is used to calculate the junction temperature Tj with ambient temperature Ta.

ꢁ푗 = ꢁ푎 + 푃_퐶× 휃_퐽퐴[°C]

Where:

Tj

is the Junction Temperature

Ta is the Ambient Temperature

is the Power Consumption

P_C

θ_JAis the Thermal Resistance (Junction to Ambient)

2. The following method is also used to calculate the junction temperature Tj with top center of case’s (mold) temperature T_T.

ꢁ푗 = ꢁ_푇+ 푃_퐶× 훹 [°C]

퐽푇

Where:

Tj

T_T

P_C

is the Junction Temperature

is the Top Center of Case’s (mold) Temperature

is the Power consumption

Ψ_JTis the Thermal Resistance (Junction to Top Center of Case)

3. The following method is used to calculate the power consumption Pc (W).

푃푐 = ꢂ푉 − 푉_푂푈푇ꢃ × ꢄ_푂푈푇+ 푉 × ꢄ_퐶퐶[W]

퐼푁

Where:

P_C

is the Power Consumption

V_INis the Input Voltage

V_OUTis the Output Voltage

I_OUTis the Load Current

I_CCis the Current Consumption

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BD9xxN1-C Series

Calculation Example (SSOP5)

If V_IN= 13.5 V, V_OUT= 5.0 V, I_OUT= 40 mA, I_CC= 28 μA, the power consumption Pc can be calculated as follows:

푃_퐶= ꢂ푉 − 푉_푂푈푇ꢃ × ꢄ_푂푈푇+ 푉 × ꢄ_퐶퐶

퐼푁

ꢂ

ꢃ

= ꢀ3.5 푉 – 5.0 푉 × 40 푚ꢅ + ꢀ3.5 푉 × ꢆ8 휇ꢅ

= 0.34 푊

At the maximum ambient temperature Tamax = 85 °C,

the thermal impedance (Junction to Ambient) θ_JA= 146.7 °C/W (4-layer PCB)

ꢁ푗 = ꢁ푎푚푎푥 + 푃_퐶× 휃_퐽퐴

= 85 °ꢇ + 0.34 푊 × ꢀ46.7 °ꢇ/푊

= ꢀ34.9 °ꢇ

When operating the IC, the top center of case’s (mold) temperature T_T= 100 °C, Ψ_JT= 46 °C/W (1-layer PCB)

ꢁ푗 = ꢁ_푇+ 푃_퐶× 훹

퐽푇

= ꢀ00 °ꢇ + 0.34 푊 × 46 °ꢇ/푊

= ꢀꢀ5.6 °ꢇ

If it is difficult to ensure the margin by the calculations above, it is recommended to expand the copper foil area of the

board, increasing the layer and thermal via between thermal land pad for optimum thermal performance.

Calculation Example (HTSOP-J8)

If V_IN= 13.5 V, V_OUT= 5.0 V, I_OUT= 40 mA, I_CC= 28 μA, the power consumption Pc can be calculated as follows:

푃_퐶= ꢂ푉 − 푉_푂푈푇ꢃ × ꢄ_푂푈푇+ 푉 × ꢄ_퐶퐶

퐼푁

ꢂ

ꢃ

= ꢀ3.5 푉 – 5.0 푉 × 40 푚ꢅ + ꢀ3.5 푉 × ꢆ8 휇ꢅ

= 0.34 푊

At the maximum ambient temperature Tamax = 85 °C,

the thermal impedance (Junction to Ambient) θ_JA= 36.2 °C/W (4-layer PCB)

ꢁ푗 = ꢁ푎푚푎푥 + 푃_퐶× 휃_퐽퐴

= 85 °ꢇ + 0.34 푊 × 36.ꢆ °ꢇ/푊

= 97.3 °ꢇ

When operating the IC, the top center of case’s (mold) temperature T_T= 100 °C, Ψ_JT= 32 °C/W (1-layer PCB)

ꢁ푗 = ꢁ_푇+ 푃_퐶× 훹

퐽푇

= ꢀ00 °ꢇ + 0.34 푊 × 3ꢆ °ꢇ/푊

= ꢀꢀ0.9 °ꢇ

If it is difficult to ensure the margin by the calculations above, it is recommended to expand the copper foil area of the

board, increasing the layer and thermal via between thermal land pad for optimum thermal performance.

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BD9xxN1-C Series

I/O Equivalence Circuit

VIN Pin

VOUT Pin ^{(Note 1)}

VIN

VOUT

1 kΩ

Internal

Circuit

6.25 kΩ

VOUT Pin ^{(Note 2)}

VIN

ADJ Pin ^{(Note 2)}

VOUT

1 kΩ

20 kΩ

ADJ

6.25 kΩ

(Note 1) Applicable for product with BD9xxN1G-C, BD9xxN1WG-C, BD9xxN1EFJ-C, BD9xxN1WEFJ-C.

(Note 2) Applicable for product with BD900N1G-C, BD900N1WG-C, BD900N1EFJ-C, BD900N1WEFJ-C.

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BD9xxN1-C Series

I/O Equivalence Circuit - continued

EN Pin ^{(Note 3)}

EN

100 kΩ

Internal

Circuit

(Note 3) Applicable for product with BD9xxN1WG-C, BD9xxN1WEFJ-C (xx = 33, 50, 00).

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BD9xxN1-C Series

Operational Notes

1.

2.

Reverse Connection of Power Supply

Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when

connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply

pins.

Power Supply Lines

Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at

all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic

capacitors.

3.

4.

Ground Voltage

Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.

Ground Wiring Pattern

When using both small-signal and large-current ground traces, the two ground traces should be routed separately but

connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal

ground caused by large currents. Also ensure that the ground traces of external components do not cause variations

on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.

5.

6.

Operating Conditions

The function and operation of the IC are guaranteed within the range specified by the recommended operating

conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical

characteristics.

Inrush Current

When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow

instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.

Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing

of connections.

7.

Thermal Consideration

The power dissipation under actual operating conditions should be taken into consideration and a sufficient margin

should be allowed in the thermal design. On the reverse side of the package this product has an exposed heat pad for

improving the heat dissipation. The amount of heat generation depends on the voltage difference between the input

and output, load current, and bias current. Therefore, when actually using the chip, ensure that the generated heat

does not exceed the Pd rating. If Junction temperature is over Tjmax (=150 °C), IC characteristics may be worse due

to rising chip temperature. Heat resistance in specification is measurement under PCB condition and environment

recommended in JEDEC. Ensure that heat resistance in specification is different from actual environment.

8.

9.

Testing on Application Boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject

the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should

always be turned off completely before connecting or removing it from the test setup during the inspection process. To

prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and

storage.

Inter-pin Short and Mounting Errors

Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in

damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.

Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and

unintentional solder bridge deposited in between pins during assembly to name a few.

10. Unused Input Pins

Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and

extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge

acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause

unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power

supply or ground line.

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BD9xxN1-C Series

Operational Notes – continued

11. Regarding the Input Pin of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them

isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a

parasitic diode or transistor. For example, (refer to figure below):

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to

operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be

avoided.

Resistor

Transistor (NPN)

Pin A

Pin B

B

E

C

Pin A

B

C

E

P

P⁺

N

P⁺

P

P⁺

N

Parasitic

Elements

Parasitic

Elements

P Substrate

GND GND

P Substrate

GND

Parasitic

Elements

Parasitic

Elements

N Region

close-by

12. Ceramic Capacitor

When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with

temperature and the decrease in nominal capacitance due to DC bias and others.

13. Thermal Shutdown Protection Circuit (TSD)

This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always

be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the

junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF power output pins. When the Tj

falls below the TSD threshold, the circuits are automatically restored to normal operation.

Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no

circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat

damage.

14. Over Current Protection Circuit (OCP)

This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This

protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should

not be used in applications characterized by continuous operation or transitioning of the protection circuit.

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BD9xxN1-C Series

Ordering Information

B D 9

x

x N 1 W x

x

-

C x x

Output

Voltage

33: 3.3 V

50: 5.0 V

00:

Output

Current

Capability

1: 150 mA

Enable

Function

None:

Package

: SSOP5

EFJ: HTSOP-J8

Product Rank

C: for Automotive

Packaging and Forming

Specification

TR: Embossed Tape and Reel

E2: Embossed Tape and Reel

G

Without

Enable

Function

Adjustable

W :

Enable

Function

Lineup

Output Current

Capability

Output Voltage

Enable Function

not available

available

Package

Ordering

SSOP5

HTSOP-J8

SSOP5

BD933N1G-CTR

BD933N1EFJ-CE2

3.3 V

5.0 V

BD933N1WG-CTR

BD933N1WEFJ-CE2

BD950N1G-CTR

HTSOP-J8

SSOP5

not available

available

HTSOP-J8

SSOP5

BD950N1EFJ-CE2

BD950N1WG-CTR

BD950N1WEFJ-CE2

BD900N1G-CTR

150 mA

HTSOP-J8

SSOP5

not available

available

HTSOP-J8

SSOP5

BD900N1EFJ-CE2

BD900N1WG-CTR

BD900N1WEFJ-CE2

Adjustable

HTSOP-J8

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BD9xxN1-C Series

Marking Diagrams

SSOP5(TOP VIEW)

Part Number Marking

LOT Number

Part Number

Part Number Marking

Output Voltage [V]

Enable Input^{(Note 1)}

not available

available

BD950N1G-C

BD933N1G-C

BD900N1G-C

BD950N1WG-C

BD933N1WG-C

BD900N1WG-C

dd

de

df

dk

dm

dn

5.0

3.3

Adjustable

5.0

3.3

Adjustable

available

HTSOP-J8(TOP VIEW)

Part Number Marking

LOT Number

Pin 1 Mark

Part Number

BD950N1EFJ-C

BD933N1EFJ-C

BD900N1EFJ-C

BD950N1WEFJ-C

BD933N1WEFJ-C

BD900N1WEFJ-C

Part Number Marking

950N1

Output Voltage [V]

Enable Input^{(Note 1)}

not available

available

5.0

3.3

Adjustable

5.0

3.3

Adjustable

933N1

900N1

950N1W

933N1W

available

900N1W

(Note 1) available: With Enable Input not available: Without Enable Input

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BD9xxN1-C Series

Physical Dimension and Packing Information

Package Name

SSOP5

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BD9xxN1-C Series

Physical Dimension and Packing Information – continued

Package Name

HTSOP-J8

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BD9xxN1-C Series

Revision History

Date

Revision

001

Changes

12.May.2022

New Release

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Notice

Precaution on using ROHM Products

(Note 1)

1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment

,

aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,

bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales

representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any

ROHM’s Products for Specific Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN

USA

EU

CHINA

CLASSⅢ

CLASSⅣ

CLASSⅡb

CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.

Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the

use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our

Products under any special or extraordinary environments or conditions (as exemplified below), your independent

verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.

However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble

cleaning agents for cleaning residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in

the range that does not exceed the maximum junction temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must

be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,

please consult with the ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice-PAA-E

Rev.004

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl₂, H₂S, NH₃, SO₂, and NO₂

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign

trade act, please consult with ROHM in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data.

2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the

Products with other articles such as components, circuits, systems or external equipment (including software).

3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM

will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to

manufacture or sell products containing the Products, subject to the terms and conditions herein.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice-PAA-E

Rev.004


型号：	BD900N1WEFJ-C
厂家：	ROHM
描述：	BD900N1WEFJ-C是一款采用了Nano Cap™技术的低静态电流线性稳压器，非常适用于直接连接电池用的车载系统。本IC的耐压为45V，输出电流为150mA，静态电流为28μA(Typ)，输出电压精度为±2.0%。什么是QuiCur™?QuiCur™是ROHM自有的一种控制技术，利用该技术可更大程度地追求电源IC的响应性能。电池稳压器
文件：	总49页 (文件大小：2036K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BD900N1WEFJ-C [ROHM]

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