BD9322EFJ_技术文档

TECHNICAL NOTE

Single-chip built-in FET type Switching Regulator Series

Simple Step-down

Switching Regulator

with Integrated Compensation

BD9322EFJ, BD9323EFJ, BD9324EFJ

zDescription

The BD9322EFJ, BD9323EFJ and BD9324EFJ are step-down regulators that integrate a low resistance high side N-channel

MOSFET.

It achieves 2A / 3A / 4A continuous output current over a wide input supply range.

Current mode operation provides fast transient response and easy phase compensation.

zFeatures

1) Wide operating INPUT Range 4.75V～18V

2) Selectable 2A / 3A / 4A Output Current

3) Selectable 0.1Ω / 0.15Ω Internal MOSFET Switch

4) Low ESR Output Ceramic Capacitors are Available

5) Low Stanby Current during Shutdown Mode

6) 380kHz Operating Frequency

7) Feedback voltage 0.9V ±1.5% Accuracy

8) Protection circuit: Undervoltage lockout protection circuit

Thermal shutdown circuit

Overcurrent protection circuit

9) HTSOP-J8 Package (with Exposed thermal PAD)

zApplications

Distributed Power System

Pre-Regulator for Linear Regulator

zAbsolute maximum ratings (Ta = 25°C)

Parameter

Supply Voltage

Symbol

VIN

Rating

20

Unit

V

Switch Voltage

V^SW

20

V

Power Dissipation for HTSOP-J8

Operating Temperature Range

Storage Temperature Range

Pd

3760*

-40～+85

-55～+150

150

mW

℃

V

Topr

Tstg

Junction Temperature

BST Voltage

Tjmax

VBST

VOTH

VSW+7

7

All other pins

V

* Derating in done 30.08 mW/℃ for operating above Ta≧25℃(Mount on 4-layer 70.0mm×70.0mm×1.6mm board)

Apr.2008

● Operation Range(Ta= -40～85℃)

Parameter

Symbol

Min

4.75

－

Typ

12

－

Max

18

Unit

V

Supply Voltage

VIN

ISW2

ISW3

ISW4

Output current for BD9322EFJ

Output current for BD9323EFJ

Output current for BD9324EFJ

** Pd, ASO should not be exceeded

2**

3**

4**

A

－

A

－

A

● Electrical characteristics (unless otherwise specified VIN=12V Ta=25℃)

Limits

Typ

Parameter

Error amplifier block

Symbol

Unit

Conditions

Min

Max

FB input bias current

Feedback voltage

SW block – SW

I_FB

-

0.1

2

μA

V_FB

0.886

0.900

0.914

V

Voltage follower

Hi-side FET On-resistance

for BD9322EFJ

R_ON2

R_ON3

R_ON4

-

0.15

0.10

-

Ω

I_SW= -0.8A ***

Hi-side FET On-resistance

for BD9323EFJ

Hi-side FET On-resistance

for BD9324EFJ

Lo-side FET On-resistance

Leak current N-channel

Switch Current Limit for BD9322EFJ

Switch Current Limit for BD9323EFJ

Switch Current Limit for BD9324EFJ

Maximum duty cycle

R_ONL

I_LEAKN

ILIMIT2

ILIMIT3

ILIMIT4

M_DUTY

-

10

0

-

10

-

Ω

μA

A

I_SW= 0.1A

VIN= 18V , V_SW= 0V

2.5

3.5

4.5

-

***

-

A

***

-

A

***

90

-

%

VFB= 0V

General

Enable Pull-up current

IEN

VEN

VUVLO

VHYS

ISS

12

0.4

4.05

-

23

0.63

4.40

0.1

34

0.9

4.75

-

μA

V

VEN= 0V

VIN rising

Enable Threshold voltage

Under Voltage Lockout threshold

Under Voltage Lockout Hysteresis

Soft Start Current

V

23

-

41

62

uA

ms

kHz

mA

μA

VSS= 0.1 V

Soft Start Time

TSS

1.6

-

CSS= 0.1 uF

Operating Frequency

FOSC

ICC

300

-

380

2.1

460

4.3

190

Circuit Current

VFB= 1.5V, VEN= OPEN

VEN= 0V

Quiescent Current

IQUI

-

100

*** See the series line-up table below.

● Series Line-up Table

LINE-UP

BD9322EFJ

BD9323EFJ

BD9324EFJ

FET

0.15 Ω

0.10 Ω

ON-RESISTANCE

OUTPUT

CURRENT

2.0 A

3.0A

4.0 A

2/13

● Block Diagram

VIN

VREF

OPEN

EN

5V

AUTOMATIC

STARTUP

OSC

VREG

BST

VIN

OCP

12V

UVLO

TSD

IBIAS

LVS

S

＋

FB

COMP

SS

ERR

SW

OUTPUT

DRV

－

LOGIC

R

＋

PWM

－

SLOPE

SoftStart

GND

● Typical Application Circuit

C_PC1

3300pF

R_PC

15k

Thermal PAD

R_DW

10k

R_UP

27k

L

VIN 12V

10μH

VOUT 3.33V

SW

C_SS

0.1μF

C_VC1

10μF

C_CO1

D

C_BS

20μF

0.1μF

3/13

z Block Operation

•VREG

A block to generate constant-voltage for DC/DC boosting.

•VREF

A block that generates internal reference voltage of 2.9 V (Typ.).

•TSD/UVLO

TSD (Thermal shutdown)/UVLO (Under Voltage Lockout) protection block. The TSD circuit shuts down IC at 175℃ (Typ.)

The UVLO circuit shuts down the IC when the Vcc is Low Voltage.

•Error amp block (ERR)

This is the circuit to compare the reference voltage and the feedback voltage of output voltage. The COMP pin voltage resulting

from this comparison determines the switching duty. At the time of startup, since the soft start is operated by the SS pin voltage,

the COMP pin voltage is limited to the SS pin voltage.

•Oscillator block (OSC)

This block generates the oscillating frequency.

•SLOPE block

This block generates the triangular waveform from the clock created by OSC. Generated triangular waveform is sent to the PWM

comparator.

•PWM block

The COMP pin voltage output by the error amp is compared to the SLOPE block's triangular waveform to determine the

switching duty. Since the switching duty is limited by the maximum duty ratio which is determined internally, it does not become

100%.

•DRV block

A DC/DC driver block. A signal from the PWM is input to drive the power FETs.

• CURRENT SENSE

Current flowing to the power FET is detected by voltage at the CURRENT SENSE and the overcurrent protection operates at

2.5/3.5/4.5A (min.). When the overcurrent protection operates, switching is turned OFF and the SS pin capacitance is

discharged.

• DELAY START

A start delay circuit for positive/negative charge pump and Boost converter.

•Soft start circuit

Since the output voltage rises gradually while restricting the current at the time of startup, it is possible to prevent the output

voltage overshoot or the rush current.

4/13

z Physical Dimension

4.9±0.1

(Max5.25 include.BURR)

(3.2)

+6°

4°

-4°

8

5

7

6

3

4

2

1

+0.05

0.545

1PIN MARK

0.17

-0.03

S

+0.05

-0.04

M

0.08

0.42

1.27

0.08

S

Fig HTSOP-J8 Package

(Unit:mm)

z Pin Assignment and Pin Function

Pin No.

Pin name

SS

Function

1

2

3

4

5

6

7

8

Soft Start Control Input

BST

VIN

High-Side Gate Drive Boost Input

Power Input

SW

Power Switching Output

Ground

GND

FB

Feed Back Input

COMP

EN

Compensation Node

Enable Input

5/13

z Typical Performance Characteristics (Unless otherwise specified, VIN= 12V Ta = 25℃)

0.1

0.08

0.06

0.04

0.02

0

2.5

2.4

2.3

2.2

2.1

2

200

180

160

140

120

100

80

1.9

1.8

1.7

1.6

1.5

-0.02

-0.04

-0.06

-0.08

-0.1

60

40

20

0

4

6

8

10

12

14

16

18

4

6

8

10

12

14

16

18

0

0.5

1

1.5

2

V^FB[V]

VIN : [V]

Fig. Circuit Current

Fig. Input Bias Current

Fig. Quiescent Current

0.95

0.94

0.93

0.92

0.91

0.9

0.25

0.2

0.15

0.1

0.05

0

390

380

370

360

350

340

330

BD9322EFJ

0.89

0.88

0.87

0.86

0.85

BD9323/24EFJ

-40

-20

0

20

40

60

80

-40

-20

0

20

40

60

80

-40

-20

0

20

40

60

80

Ta [℃]

TEMPERATURE : [C]

Fig. Feedback voltage

Fig. Hi-Side On-resistance

Fig. Operating Frequency

100

95

90

85

80

75

70

65

60

55

50

100

10

V^OUT= 5.0V

VOUT= 3.3V

V^OUT

V^SW

1

V^SS

I^OUT

0.1

0.01

0

0.2 0.4 0.6 0.8

1

1.2 1.4 1.6 1.8

2

0.001

0.01

0.1

1

Iout [A]

C^SS[uF]

Fig. STEP Down Efficiency

Fig. OverCurrent Protection

Fig. Soft Start Time

(VIN= 12V VOUT= 3.3V L= 22uH)

(VOUT is shorted to GND)

6/13

VOUT: 10.0 mV / Div

VOUT: 100 mV / Div

VOUT-MAX: +120mV

VOUT-MIN: -100m V

Δ: 20.8 mV

VOUT

IOUT: 1.0 A / Div

IOUT

Fig. Transient Response

Fig. Output Ripple Voltage

(VIN= 12V VOUT= 3.3V L= 10uH Cout =22uF Iout= 0.2-1.0A )

(VIN= 12V VOUT= 3.3V L= 10uH Cout =22uF I out= 1.0A )

VOUT: 10.0 mV / Div

VOUT: 200 mV / Div

VOUT-MAX: +520mV

Δ:29.8 mV

VOUT

VOUT-MIN: -240mV

IOUT: 1.0 A / Div

IOUT

Fig. Transient Response

Fig. Output Ripple Voltage

(VIN= 12V VOUT= 3.3V L= 10uH Cout =22uF Iout= 0.2-3.0A)

(VIN= 12V VOUT= 3.V L= 10uH Cout =22uF Io=3.0A )

EN

VOUT

IOUT

VOUT: 1.0V / Div

IOUT: 1.0A / Div

Fig. Start Up waveform

(VIN= 12V VOUT= 3.3V L= 22uH CSS= 0.1uF Iout= 0A)

7/13

z Selecting Application Components

(1) Output LC constant (Buck Converter)

The inductance L to use for output is decided by the rated current ILR and input current maximum value IOMAX of the

inductance.

VCC

IOMAX + ΔIL should not

reach the rated

IL

value level

I^L

Vo

ILR

L

IOMAX mean

current

Co

t

Fig.

Adjust so that IOMAX + ∆IL does not reach the rated current value ILR. At this time, ∆IL can be obtained by the following

equation.

1

L

Vo

1

f

[A]

∆IL =

× (Vcc - Vo) ×

×

Vcc

Set with sufficient margin because the inductance L value may have the dispersion of ± 30%.

For the capacitor C to use for the output, select the capacitor which has the larger value in the ripple voltage VPP permissible

value and the drop voltage permissible value at the time of sudden load change.

Output ripple voltage is decided by the following equation.

∆IL

Vo

1

f

∆VPP

=

∆IL × RESR +

×

[V]

2Co

Vcc

Perform setting so that the voltage is within the permissible ripple voltage range.

For the drop voltage VDR during sudden load change, please perform the rough calculation by the following equation.

∆I

VDR =

× 10μsec [V]

Co

However, 10μsec is the rough calculation value of the DC/DC response speed.

Make Co settings so that these two values will be within the limit values.

8/13

(2)Loop Compensation

Choosing compensation capacitor C¹and resistor R3

The example of DC/DC converter application bode plot is shown below. The compensation resistor R³will set the cross over frequency

F^Cthat decides the stability and response speed of DC/DC converter. So compensation resistor R3 has to be adjusted to adequate value

for good stability and response speed.

The cross over frequency F^Ccan be adjusted by changing the compensation resistor R3 connected to COMP terminal.

The higher cross over frequency achieves good response speed, but less stability. And the lower cross over frequency shows good

stability, but worse response speed.

Usually, the 1/10 of DC/DC converter operating frequency is used for cross over frequency F^C. So please decide the compensation

resistor and capacitor using the following formula on setting F^Cto 1/10 of operating frequency at first.

After that, please measure and adjust the cross over frequency on your set (on the actual application) to meet the enough response

speed and phase-margin.

( i ) Choosing phase compensation resistor R³

Please decide the compensation resistor R3 on following formula.

Where

C^OUT： Output capacitor connected to DC/DC output

V^OUT： Output voltage

F^C： Desired cross over frequency (38kHz)

Compensation

R3=

5800×COUT×FC×VOUT

[ohm]

Resistor

( ii ) Choosing phase compensation capacitor C¹

The stability of DC/DC converter needs to cancel the phase delay that is from output LC filter by inserting the phase advance.

The phase advance can be added by the zero on compensation resistor and capacitor.

The LC resonant frequency F^LCand the zero on compensation resistor and capacitor are expressed below.

1

LC resonant frequency F^LC=

[Hz]

2π√LC^OUT

1

Zero by C1 and R3

FZ=

2πC1R3

Please choose C1 to make F^Zto 1 / 3 of FLC .

Compensation

3

C¹=

[F]

Capacitor

2πF^LCR3

( iii ) The condition of the loop compensation stability

The stability of DC/DC converter is important. To secure the operating stability, please check the loop compensation has the enough

phase-margin. For the condition of loop compensation stability, the phase-delay must be less than 150 degree where Gain is 0 dB. Namely

over 30 degree phase-margin is needed.

Lastly after the calculation above, please measure and adjust the phase-margin to secure over 30 degree.

(a)

A

OUT

V

Gain [dB]

GBW(b)

R1

0

FB

COMP

F

－

＋

F^C

PHASE

0

R2

R3

C1

90°

－

90

－

PHASE MARGIN

180°

－

180

－

9/13

(3) Design of Feedback Resistance constant

Set the feedback resistance as shown below.

V_OUT

Feedback voltage 0.900V

R1+R2

R2

V_OUT=

× 0.900

[V]

R1

＋

ERR

－

FB

R2

z Soft Start Function

The buck converter has an adjustable SoftStart function to

prevent high inrush current during start up.

The soft-start time is set by the external capacitor

connected to SS pin.

COMP

ERRAMP

2.9V(typ)

+

-

70k(typ)

SS

The soft start time is given by;

CSS

T_SS

=

16200 × CSS

[s]

Please confirm the overshoot of the output voltage and inrush

current when deciding the SS capacitor value.

z EN Function

VIN

The EN terminal controls IC’s shut down.

Leaving EN terminal open, makes IC start up automatically.

To shut down the IC, the external component has

to pull the current from EN terminal and make the

EN voltage low.

EN

The EN threshold voltage is 0.63V (typ.).

The equivalent internal circuit.

ex)

The example of EN driving circuit.

10/13

zLayout Pattern Consideration

Two high pulsing current flowing loops exist in the buck regulator system.

The first loop, when FET is ON, starts from the input capacitors, to the VIN terminal, to the SW terminal, to the inductor, to the

output capacitors, and then returns to the input capacitor through GND.

The second loop, when FET is OFF, starts from the shotkey diode, to the inductor, to the output capacitor, and then returns to the

shotkey diode through GND.

To reduce the noise and improve the efficiency, please minimize these two loop area.

Especially input capacitor, output capacitor and shotkey diode should be connected to GND plain.

PCB Layout may affect the thermal performance, noise and efficiency greatly. So please take extra care when designing PCB

Layout patterns.

L

VIN

VOUT

COUT

CIN

FET

Di

2 Current loop in Buck regulator system

・The thermal Pad on the back side of IC has the

great thermal conduction to the chip. So using the

GND plain as broad and wide as possible can help

thermal dissipation. And a lot of thermal via for

helping the spread of heat to the different layer is also

effective.

SS

EN

・The input capacitors should be connected as close

as possible to the VIN terminal.

BST

COMP

FB

・Keep sensitive signal traces such as trace

connected FB and COMP away from SW pin.

・The inductor, the shot key diode and the output

capacitors should be placed close to SW pin as much

as possible.

CIN

VIN

FET

SW

GND

Di

COUT

L

V^OUT

The example of PCB layout pattern

11/13

z Operation Notes

1) Absolute maximum ratings

Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may result in IC damage.

Assumptions should not be made regarding the state of the IC (short mode or open mode) when such damage is suffered. A physical safety

measure such as a fuse should be implemented when use of the IC in a special mode where the absolute maximum ratings may be exceeded is

anticipated.

2) GND potential

Ensure a minimum GND pin potential in all operating conditions.

3) Setting of heat

Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.

4) Pin short and mistake fitting

Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in damage to the IC. Shorts

between output pins or between output pins and the power supply and GND pins caused by the presence of a foreign object may result in damage

to the IC.

5) Actions in strong magnetic field

Use caution when using the IC in the presence of a strong magnetic field as doing so may cause the IC to malfunction.

6) Testing on application boards

When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always discharge

capacitors after each process or step. Ground the IC during assembly steps as an antistatic measure, and use similar caution when transporting or

storing the IC. Always turn the IC's power supply off before connecting it to or removing it from a jig or fixture during the inspection process.

7) Ground wiring patterns

When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single ground point

at the application's reference point so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in

the small signal ground voltage. Be careful not to change the GND wiring patterns of any external components.

8) Regarding input pin of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated. P/N junctions are formed

at the intersection of these P layers with the N layers of other elements to create a variety of parasitic elements.

For example, when the resistors and transistors are connected to the pins as shown in Fig. , a parasitic diode or a transistor operates by inverting

the pin voltage and GND voltage.

The formation of parasitic elements as a result of the relationships of the potentials of different pins is an inevitable result of the IC's architecture.

The operation of parasitic elements can cause interference with circuit operation as well as IC malfunction and damage. For these reasons, it is

necessary to use caution so that the IC is not used in a way that will trigger the operation of parasitic elements such as by the application of voltages

lower than the GND (P substrate) voltage to input and output pins.

Resistor

Transistor (NPN)

(Pin B)

B

E

(Pin A)

C

E

C

(Pin B)

B

GND

N

P

P+

Parasitic

elements

P+

N

P

N

Fig. Example of a Simple

Monolithic IC Architecture

(Pin A)

P substrate

GND

Parasitic elements

GND

Parasitic

elements

Parasitic elements

GND

9) Overcurrent protection circuits

An overcurrent protection circuit designed according to the output current is incorporated for the prevention of IC damage that may result in the

event of load shorting. This protection circuit is effective in preventing damage due to sudden and unexpected accidents. However, the IC should

not be used in applications characterized by the continuous operation or transitioning of the protection circuits. At the time of thermal designing,

keep in mind that the current capacity has negative characteristics to temperatures.

10) Thermal shutdown circuit (TSD)

This IC incorporates a built-in TSD circuit for the protection from thermal destruction. The IC should be used within the specified power dissipation

range. However, in the event that the IC continues to be operated in excess of its power dissipation limits, the attendant rise in the chip's junction

temperature Tj will trigger the TSD circuit to turn off all output power elements. Operation of the TSD circuit presumes that the

IC's absolute maximum ratings have been exceeded. Application designs should never make use of the TSD circuit.

12/13

z I/O Equivalent Circuit Diagram

Fig.

1.SS

2.BST

4.SW

VIN

REG

SW

6.FB

7.COMP

8.EN

VIN

z Power Dissipation

On 70 × 70 × 1.6 mm glass epoxy PCB

(1) 1-layer board (Backside copper foil area 0 mm × 0 mm)

(2) 2-layer board (Backside copper foil area 15 mm × 15 mm)

(3) 2-layer board (Backside copper foil area 70 mm × 70 mm)

(4) 4-layer board (Backside copper foil area 70 mm × 70 mm)

4000

3000

(4)3760mW

(3)2110mW

(2)1100mW

2000

1000

0

(1)820mW

25

0

50

75

100

125 150

AMBIENT TEMPERATURE: Ta [°C]

13/13

Appendix

Notes

No technical content pages of this document may be reproduced in any form or transmitted by any

means without prior permission of ROHM CO.,LTD.

The contents described herein are subject to change without notice. The specifications for the

product described in this document are for reference only. Upon actual use, therefore, please request

that specifications to be separately delivered.

Application circuit diagrams and circuit constants contained herein are shown as examples of standard

use and operation. Please pay careful attention to the peripheral conditions when designing circuits

and deciding upon circuit constants in the set.

Any data, including, but not limited to application circuit diagrams information, described herein

are intended only as illustrations of such devices and not as the specifications for such devices. ROHM

CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any

third party's intellectual property rights or other proprietary rights, and further, assumes no liability of

whatsoever nature in the event of any such infringement, or arising from or connected with or related

to the use of such devices.

Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or

otherwise dispose of the same, no express or implied right or license to practice or commercially

exploit any intellectual property rights or other proprietary rights owned or controlled by

ROHM CO., LTD. is granted to any such buyer.

Products listed in this document are no antiradiation design.

The products listed in this document are designed to be used with ordinary electronic equipment or devices

(such as audio visual equipment, office-automation equipment, communications devices, electrical

appliances and electronic toys).

Should you intend to use these products with equipment or devices which require an extremely high level

of reliability and the malfunction of which would directly endanger human life (such as medical

instruments, transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers

and other safety devices), please be sure to consult with our sales representative in advance.

It is our top priority to supply products with the utmost quality and reliability. However, there is always a chance

of failure due to unexpected factors. Therefore, please take into account the derating characteristics and allow

for sufficient safety features, such as extra margin, anti-flammability, and fail-safe measures when designing in

order to prevent possible accidents that may result in bodily harm or fire caused by component failure. ROHM

cannot be held responsible for any damages arising from the use of the products under conditions out of the

range of the specifications or due to non-compliance with the NOTES specified in this catalog.

Thank you for your accessing to ROHM product informations.

More detail product informations and catalogs are available, please contact your nearest sales office.

THE AMERICAS / EUROPE / ASIA / JAPAN

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Contact us : webmaster@ rohm.co.jp

www.rohm.com

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Appendix1-Rev2.0


型号：	BD9322EFJ
厂家：	ROHM
描述：	Simple Step-down Switching Regulator with Integrated Compensation
文件：	总14页 (文件大小：431K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BD9322EFJ [ROHM]

相关型号：

BD9322EFJ-E2

BD9323EFJ

BD9324EFJ

BD9325FJ

BD9325FJ-E2

BD9325FJ-LB

BD9325FJ-LBE2

BD9326EFJ

BD9326EFJ-2E

BD9326EFJ-E2

BD9326EFJ-LB

BD9326EFJ-LBE2