BD9416F-E2 [ROHM]
LED Driver,;型号: | BD9416F-E2 |
厂家: | ROHM |
描述: | LED Driver, 驱动 接口集成电路 |
文件: | 总39页 (文件大小:2231K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LED Drivers for LCD Backlights
2ch Boost up type
White LED Driver for large LCD
BD9416xx Series
1.1 General Description
Key Specifications
BD9416xx Series is a high efficiency driver for white
LEDs and is designed for large LCDs. BD9416xx Series
has a boost DCDC converter that employs an array of
LEDs as the light source.
BD9416xx Series has some protection functions against
fault conditions, such as over-voltage protection (OVP),
over current limit protection of DCDC (OCP), LED OCP
protection, and Over boost protection (FBMAX).
Therefore it is available for the fail-safe design over a
wide range output voltage.
Operating Power Supply Voltage Range:
9.0V to 35.0V
Oscillator Frequency of DCDC:
150kHz (VRT=100kΩ)
5.1mA(Typ)
Operating Current:
Operating Temperature Range:
-40°C to +105°C
1.2 Packages
SOP24 (BD9416F)
W(Typ) x D(Typ) x H(Max)
15.00mm x 7.80mm x 2.01mm
Pin pitch 1.27mm
Features
DCDC Converter with Current Mode
LED Protection Circuit (Over Boost Protection, LED
OCP Protection)
Over Voltage Protection (OVP) for the Output Voltage
VOUT
Adjustable Soft Start
Adjustable Oscillation Frequency of DCDC
Analog Dimming from 0.2V to 3.0V
LED Dimming PWM Over Duty Protection(ODP)
Applications
TV, Computer Display, LCD Backlighting
Figure 1-1. SOP24
10.00mm x 7.80mm x 2.10mm
SSOP-A24 (BD9416FS)
Pin pitch
0.8mm
1.3 Typical Application Circuit
V
OUT2
VOUT1
VCC
V
IN
VCC
Figure 1-2. SSOP-A24
OVP
GATE1
CS1
REG90
STB
RT
GND1
DIMOUT1
ISENSE1
FB1
SS
FAILB
PWM1
PWM2
GATE2
CS2
DUTYP
GND2
DUTYON
DIMOUT2
ISENSE2
FB2
ADIM
Figure 2. Typical Application Circuit
○Product structure:Silicon monolithic integrated circuit ○This product has not designed protection against radioactive rays
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Contents
1.1 General Description..................................................................................................................................................................1
Features ................................................................................................................................................................................1
Applications ................................................................................................................................................................................1
Key Specifications...........................................................................................................................................................................1
1.2 Packages..................................................................................................................................................................................1
1.3 Typical Application Circuit .........................................................................................................................................................1
1.4 Pin Configuration ......................................................................................................................................................................3
1.5 Pin Descriptions........................................................................................................................................................................3
1.6 Block Diagram ..........................................................................................................................................................................4
1.7 Absolute Maximum Ratings ......................................................................................................................................................5
1.8 Thermal Resistance..................................................................................................................................................................5
1.9 Recommended Operating Ranges ...........................................................................................................................................5
2.0 Electrical Characteristics...........................................................................................................................................................6
2.1 Typical Performance Curves (Reference data).........................................................................................................................8
2.2 Pin Descriptions........................................................................................................................................................................9
2.3 List of The Protection Function Detection Condition (Typ Condition)......................................................................................12
2.4 List of The Protection Function Operation...............................................................................................................................12
3.1 Application Circuit Example ....................................................................................................................................................13
3.2 External Components Selection..............................................................................................................................................14
3.3 DCDC Parts Selection ............................................................................................................................................................18
3.4 Loop Compensation................................................................................................................................................................21
3.5 Timing Chart ...........................................................................................................................................................................22
3.6 I/O Equivalent Circuits ............................................................................................................................................................30
Operational Notes.........................................................................................................................................................................31
Ordering Information.....................................................................................................................................................................33
Marking Diagrams.........................................................................................................................................................................33
Physical Dimension, Tape and Reel Information...........................................................................................................................34
Revision History............................................................................................................................................................................36
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1.4 Pin Configuration
REG90
OVP
VCC
STB
1
2
3
24
23
CS1
GATE1
GND1
CS2
22
21
20
GATE2
GND2
DIMOUT2
ISENSE2
FB2
4
5
6
DIMOUT1
ISENSE1
FB1
19
18
17
16
7
8
SS
ADIM
9
PWM1
RT
15
14
13
10
11
12
DUTYP
DUTYON
PWM2
FAILB
Figure 3. Pin Configuration
1.5 Pin Descriptions
No.
Pin Name
IN/OUT
Function
1
VCC
IN
IN
Power supply pin
IC ON/OFF pin
2
STB
3
CS1
IN
DC/DC output current detect pin, OCP input pin ch1
DC/DC switching output pin ch1
GND ch1
4
GATE1
GND1
DIMOUT1
ISENSE1
FB1
OUT
-
5
6
OUT
IN
Dimming signal output for NMOS ch1
7
LED current detection input pin
Error amplifier output pin ch1
ADIM signal input pin
ch1
8
OUT
IN
9
ADIM
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
PWM1
PWM2
FAILB
DUTYON
DUTYP
RT
IN
External PWM dimming signal input pin ch1
External PWM dimming signal input pin ch2
Error detection output pin
IN
OUT
IN
Over Duty Protection ON/OFF pin
OUT
OUT
OUT
OUT
IN
Over Duty Protection reference frequency setting pin
DC/DC switching frequency setting pin
Soft start setting pin
SS
FB2
Error amplifier output pin ch2
ISENSE2
DIMOUT2
GND2
GATE2
CS2
LED current detection input pin
ch2
OUT
-
Dimming signal output for NMOS ch2
GND ch2
OUT
IN
DC/DC switching output pin ch2
DC/DC output current detect pin, OCP input pin ch2
Over voltage protection detection pin
9.0V output voltage pin
OVP
IN
REG90
OUT
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1.6 Block Diagram
VOUT2
VOUT1
VCC
VIN
VCC
OVP
REG90
STB
VCC
UVLO
VREG
TSD
OVP
REG90
REG90
UVLO
1MΩ
PWM
COMP
GATE1
CS1
+
-
-
RT
OSC
CONTROL
LOGIC
LEB
Current
compensation
GND1
Css
SS
SS
REG90
DIMOUT1
SS-FB
clamper
Auto-Restart
Control
LEDOCP
ISENSE1
FB1
-
+
+
1.015V
Fail
detect
ERROR
amp
FAILB
MAXFB
PWM1
PWM2
1MΩ
GATE2
CS2
DUTYP
DUTYON
ADIM
Over Duty
Protection
OSC
Each channel
GND2
1MΩ
DIMOUT2
1/3
ISENSE2
FB2
Figure 4. Block Diagram
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1.7 Absolute Maximum Ratings (Ta=25°C)
Rating
Unit
V
Parameter
Power Supply Voltage
SS, RT, ISENSE1, ISENSE2, FB1,
FB2, CS1, CS2, DUTYP
Pin Voltage
Symbol
VCC
-0.3 to +36
VSS,VRT,VISENSE1
VISENSE2, VFB1,VFB2
VCS1,VCS2,VDUTYP
VREG90,VDIMOUT1
VDIMOUT2,VGATE1
VGATE2
,
,
,
-0.3 to +7
-0.3 to +13
-0.3 to +20
V
V
V
,
,
REG90, DIMOUT1, DIMOUT2,
GATE1, GATE2 Pin Voltage
OVP, PWM1, PWM2, ADIM, STB,
FAILB, DUTYON
Pin Voltage
VOVP,VPWM1,VPWM2
ADIM,VSTB,VFAILB, VDUTYON
V
Junction Temperature
Tjmax
Tstg
150
°C
°C
Storage Temperature Range
-55 to +150
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the
properties of the chip. In case of exceeding this absolute maximum rating, increase the board size and copper area to prevent exceeding the
maximum junction temperature rating.
1.8 Thermal Resistance(Note 1)
Thermal Resistance (Typ)
Parameter
Symbol
Unit
1s(Note 3)
2s2p(Note 4)
SOP24
Junction to Ambient
Junction to Top Characterization Parameter(Note 2)
θJA
158.3
35
106.4
19
°C/W
°C/W
ΨJT
SSOP-A24
Junction to Ambient
Junction to Top Characterization Parameter(Note 2)
θJA
104.4
7
54.1
6
°C/W
°C/W
ΨJT
(Note 1) Based on JESD51-2A(Still-Air).
(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 3) Using a PCB board based on JESD51-3.
Layer Number of
Measurement Board
Material
FR-4
Board Size
Single
114.3mm x 76.2mm x 1.57mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70μm
(Note 4) Using a PCB board based on JESD51-7.
Layer Number of
Material
Board Size
114.3mm x 76.2mm x 1.6mmt
2 Internal Layers
Measurement Board
4 Layers
FR-4
Top
Bottom
Copper Pattern
Copper Pattern
Thickness
Copper Pattern
Thickness
Thickness
Footprints and Traces
70μm
74.2mm x 74.2mm
35μm
74.2mm x 74.2mm
70μm
1.9 Recommended Operating Ranges
Parameter
Symbol
Range
Unit
Operating Temperature Range
Topr
VCC
-40 to +105
°C
V
Power Supply Voltage
9.0 to 35.0
50 to 1000
0.2 to 3.0
90 to 2000
DC/DC Oscillation Frequency
Effective Range of ADIM Signal
PWM Input Frequency
fSW
kHz
V
VADIM
fPWM
Hz
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BD9416xx Series
2.0 Electrical Characteristics (Unless otherwise specified VCC=24V Ta=25°C)
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
【Total Current Consumption】
Circuit Current
ICC
IST
-
-
5.1
55
10.2
110
mA VSTB=3.0V, VPWM=3.0V
Circuit Current (standby)
【UVLO Block】
μA
VSTB=0V
Operation Voltage(VCC)
Hysteresis Voltage(VCC)
【DC/DC Block】
VUVLO_VCC
VUHYS_VCC
6.5
7.5
8.5
V
VCC=SWEEP UP
-
300
600
mV VCC=SWEEP DOWN
ISENSE Threshold Voltage 1
ISENSE Threshold Voltage 2
ISENSE Threshold Voltage 3
VLED1
VLED2
VLED3
0.225
0.656
0.988
0.233
0.667
1.000
0.242
0.677
1.012
V
V
V
VADIM=0.7V
VADIM =2.0V
VADIM =3.0V
VADIM =3.3V
(as masking analog dimming)
ISENSE Clamp Voltage
Oscillation Frequency
VLED4
fCT
0.989
142.5
1.015
150.0
1.040
V
157.5
+VRTN
KHz RRT=100kΩ
×90%
RT Short Protection Range
VRT_DET
-0.3
-
V
VRT=SWEEP DOWN
(Note 5)
RT Terminal Voltage
VRT
1.6
90
2.0
95
2.4
99
V
RRT =100kΩ
RRT =100kΩ
GATE Pin MAX DUTY Output
MAX_DUTY
%
GATE Pin ON Resistance
(as source)
GATE Pin ON Resistance
(as sink)
RONSOG
RONSIG
2.5
2.0
5.0
4.0
10.0
8.0
Ω
Ω
SS Pin Source Current
SS Pin ON Resistance at OFF
【DC/DC Block】
ISSSO
-3.75
-
-3.00
3.0
-2.25
5.0
μA
kΩ
VSS=2.0V
RSS_L
Soft Start Ended Voltage
FB Source Current
VSS_END
IFBSO
3.52
-115
85
3.70
-100
100
3.88
-85
V
VSS =SWEEP UP
μA
μA
VISENSE=0.2V, VADIM=3.0V, VFB=1.0V
VISENSE=2.0V, VADIM=3.0V, VFB=1.0V
FB Sink Current
IFBSI
115
【DC/DC Protection Block】
OCP Detect Voltage
VOCP
VOCPLT
VOVP
360
0.85
2.88
150
-2
400
1.00
3.00
200
0
440
1.15
3.12
250
+2
mV VCS=SWEEP UP
OCP Latch Off Detect Voltage
OVP Detect Voltage
V
V
VCS =SWEEP UP
VOVP=SWEEP UP
OVP Detect Hysteresis
OVP Pin Leak Current
VOVP_HYS
IOVP_LK
mV VOVP=SWEEP DOWN
μA
VOVP=4.0V, VSTB=3.0V
【LED Protection Block】
LED OCP Detect Voltage
Over Boost Detection Voltage
【Dimming Block】
VLEDOCP
VFBH
2.88
3.84
3.00
4.00
3.12
4.16
V
V
VISENSE=SWEEP UP
VFB=SWEEP UP
ADIM Pin Leak Current
ISENSE Pin Leak Current
ILADIM
-2
-2
0
0
+2
+2
μA
μA
VADIM=2.0V
IL_ISENSE
VISENSE=4.0V
DIMOUT Source ON
Resistance
DIMOUT Sink ON Resistance
【REG90 Block】
RONSOD
RONSID
4.0
3.0
8.0
6.5
16.0
13.0
Ω
Ω
REG90 Output Voltage 1
REG90 Output Voltage 2
REG90 Available Current
REG90_UVLO Detect Voltage
VREG90_1
VREG90_2
| IREG90
VREG90_TH
8.910
8.865
15
9.000
9.000
-
9.090
9.135
-
V
V
IO=0mA
IO=-15mA
|
mA
V
5.22
6.00
6.78
VREG90=SWEEP DOWN, VSTB=0V
(Note 5) VRTN is the RT terminal voltage at normal operation.
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BD9416xx Series
2.0 Electrical Characteristics (Unless otherwise specified VCC=24V Ta=25°C)
- continued
Conditions
Parameter
【STB Block】
Symbol
Min
Typ
Max
Unit
STB Pin HIGH Voltage
STB Pin LOW Voltage
STB Pull Down Resistance
【PWM Block】
VSTB_H
VSTB_L
RSTB
2.0
-0.3
600
-
-
18
V
V
+0.8
1400
1000
kΩ
VSTB=3.0V
PWM Pin HIGH Voltage
PWM Pin LOW Voltage
PWM Pin Pull Down Resistance
【DUTYON Block】
VPWM_H
VPWM_L
RPWM
1.5
-0.3
600
-
-
18
V
V
+0.8
1400
1000
kΩ
VPWM=3.0V
DUTYON Pin HIGH Voltage
DUTYON Pin LOW Voltage
DUTYON Pin Pull Down
Resistance
VDTYON_H
VDTYON_L
RDTYON
1.5
-
-
18
V
V
-0.3
+0.8
600
-
1000
1400
kΩ
VDUTYON=3.0V
【Over Duty Protection Block】
PWM ODP Protection Detect
Duty
DODP
VDTYP_DET
VDTYP
35
-
%
fPWM=120Hz, RDUTYP=341kΩ
+VDUTYPN
×90%
DUTYP Short Protection Range
-0.3
1.6
-
V
V
VDUTYP=SWEEP DOWN
(Note 6)
DUTYP Terminal Voltage
【Filter Block】
2.0
2.4
RDUTYP=100kΩ
Abnormal Detection Timer
AUTO Timer
tCP
-
-
20
-
-
ms
ms
fCT=800kHz
fCT=800kHz
tAUTO
163
【FAILB Block 】
FAILB Pin LOW Voltage
VFAILBL
0.25
0.5
1.0
V
IFAILB=1mA
(Note 6) VDUTUPN is the DUTYP terminal voltage at normal operation.
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BD9416xx Series
2.1 Typical Performance Curves (Reference data)
8
180
170
160
150
140
130
120
7
6
5
4
3
2
Ta=25°C
VSTB=3.0V
VPWM=3.0V
1
0
VCC=24V
RRT=100kΩ
8
12
16
20
24
28
32
36
-40
-20
0
20
40
60
80
100 120
Supply Voltage : Vcc[V]
Temperature : Temp[°C]
Figure 6. Oscillation Frequency vs Temperature
Figure 5. Operating Circuit Current vs Input Voltage
1.2
1.0
0.8
0.6
0.4
0.2
0.0
10000
1000
100
Ta=25°C
VCC=24V
Ta=25°C
VCC=24V
10
0
0.5
1
1.5
2
2.5
3
3.5
10
100
RT Resistance : RRT[Ω]
1000
ADIM Voltage : VADIM[V]
Figure 8. ISENSE Feedback Voltage vs ADIM Voltage
0
Figure 7. Oscillation Frequency vs RT Resistance
160
140
120
100
80
Ta=25°C
VCC=24V
Ta=25°C
VCC=24V
-20
-40
-60
-80
-100
60
-120
-140
-160
40
20
0
0.5
1
1.5
2
2.5
3
3.5
0.5
1
1.5
2
2.5
3
3.5
FB Voltage : VFB[V]
FB Voltage : VFB[V]
Figure 10. FB Source Current vs FB Voltage
Figure 9. FB Sink Current vs FB Voltage
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2.2 Pin Descriptions
Pin 1: VCC
This is the power supply pin of the IC. Input range is from 9.0V to 35.0V.
The operation starts when the supply is greater than 7.5V(Typ) and shuts down when the supply is less than 7.2V(Typ).
Pin 2: STB
This is the ON/OFF setting terminal of the IC. This pin is available for reset at shut down. Input reset-signal to this
terminal to reset IC from latch-off. At startup, internal bias starts at high level, and then DCDC boost starts after PWM
rising edge is detected.
Note: IC status (IC ON/OFF) changes depending on the voltage applied to STB terminal. Avoid the use of intermediate
level (from 0.8V to 2.0V).
Pin 3: CS1 , Pin 22: CS2
The CS pins have two functions.
VIN
1. DC / DC current mode Feedback terminal
The inductor current is converted to the CS pin voltage by the sense resistor RCS.
This voltage compared to the voltage set by error amplifier controls the output
pulse.
BD9416
2. Inductor current limit (OCP) terminal
GATEx
CSx
Id
The CS terminal also has an over current protection (OCP). If the voltage is more
than 0.4V(Typ), the switching operation will be immediately stopped. And the next
boost pulse will be restarted to normal frequency.
In addition, when the CS voltage is more than 1.0V(Typ) during four GATE clocks,
IC will be latched off. Above OCP operation, if the current continues to flow even
when GATE=L because of the destruction of the boost MOS, IC will stop operation
completely.
Cs
Rcs
GNDx
Figure 11. CS terminal circuit example
Both of the above functions are enabled after 300ns(Typ) when GATE pin
asserts high, because the Leading Edge Blanking function (LEB) is included into this IC to prevent the effect of noise.
Please refer to section “3.3.1 Calculation Method for the Current Rating of DCDC Parts”, for detailed explanation.
If the capacitance Cs on the figure to the right is increased to a value in the micro order, please be careful that the limited
value of NMOS drain current Id is more than the simple calculation. Because the current Id flows not only through Rcs but
also through Cs, the CS pin voltage moves according to Id.
Pin 4: GATE1 , Pin 21: GATE2
These are the output terminals for driving the gate of the boost MOSFET. The high level is REG90. Frequency can be set
by the resistor connected to RT. Refer to <RT> pin description for the frequency setting.
The phase lag of GATE1 and GATE2 is shown in Figure below. This Figure illustrates the waveform as both GATE pin
output the maximum duty. The inrush current of the VIN terminal can be suppressed because each channel turns on
alternately.
GATE1
0.95T
T
GATE2
T
T/2
CS1
CS2
Figure 12. GATE timing chart
Pin 5: GND1 , Pin 20: GND2
These are the GND pins of the IC.
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BD9416xx Series
Pin 6: DIMOUT1 , Pin 19: DIMOUT2
VOUTx
These are the output pins for external dimming NMOS. The table below shows the rough
output logic of each operation state, and the output H level is REG90. Please refer to “3.5
Timing Chart” for detailed explanations, because DIMOUT logic has an exceptional behavior.
Please insert the resistor RDIM between the dimming MOS gate to improve the over shoot of
LED current, as PWM turns from low to high.
REG90
DIMOUTx
R
DIM
Status
Normal
DIMOUT output
Same logic to PWM
GND Level
ISENSEx
Abnormal
BD9416
Figure 13. DIMOUT terminal circuit
example
Pin 7: ISENSE1 , Pin 18: ISENSE2
These are the input pins for the current detection. The error amplifier
compares with the lower voltage between 1/3 of the analog modulated light
pin ADIM and 1.015V(Typ). It also detects abnormal LED over current
ISENSE=3.0V(Typ). If GATE pin continues during four CLKs (equivalent to
40μs at fosc = 100kHz), the latch turns off. (Please refer to section “3.5.7
Timing Chart”.)
VOUTx
BD9416
DIMOUTx
Error AMP
ISENSEx
ADIM
1.015V
1.0V
-
+
+
1.015V
Gain=1/3
1/3
Rs
67mV
FBx
3.0
0
0.2
ADIM[V]
Figure 14. Relationship of the feedback voltage and ADIM
Figure 15. ISENSE terminal circuit example
Pin 8: FB1 , Pin 17: FB2
These are the output pins of error amplifier.
FB pin rises with the same slope as the SS pin during the soft-start period.
After soft -start completion (VSS>3.7V(Typ)), it operates as follows.
When PWM=H, it detects ISENSE terminal voltage and outputs error signal compared to analog dimming signal (ADIM).
When PWM=L, IC holds the voltage at the edge of PWM=H to L, and operates to hold the adjacent voltage.
It detects over boost (FBMAX) over VFB=4.0V(Typ). After the SS completion, if VFB>4.0V and PWM=H continues after
4clk GATE, the CP counter starts. After that, only the VFB>4.0V is monitored. When CP counter reaches 16384clk (214clk),
IC will be latched off. (Please refer to section “3.5.6 Timing Chart”.)
The loop compensation setting is described in section "3.4 Loop Compensation".
Pin 9: ADIM
This is the input pin for analog dimming signal. The ISENSE feedback point is set as 1/3 of this pin bias. If VADIM is
supplied more than 3.0V(Typ), ISENSE feedback voltage is clamped to limit the flow of LED large current. In this
condition, the input current is generated. Please refer to <ISENSE> terminal explanation.
Pin 10: PWM1 , Pin 11: PWM2
These are the PWM dimming signal input pins. The high / low level of PWM pins are the following.
State
PWM input voltage
VPWM=1.5V to 18.0V
VPWM=-0.3V to +0.8V
PWM=H
PWM=L
Pin 12: FAILB
This is fail signal output (OPEN DRAIN) pin. At normal operation, NMOS will be in the OPEN state, during abnormality
detection NMOS will be in the ON (500Ω(Typ)) state.
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Pin 13: DUTYON
This is the ON/OFF setting terminal of the LED PWM Over Duty Protection (ODP). By adjusting DUTYON input voltage,
the ON/OFF state of the ODP is changed.
State
DUTYON input voltage
VDUTYON=-0.3V to +0.8V
VDUTYON=1.5V to 18.0V
ODP=ON
ODP=OFF
Pin 14: DUTYP
This is the pin that sets the ODP. The ODP (Over Duty Protection) is the function to limit DUTY of LED PWM frequency
fPWM by ODP detection Duty (ODPduty) set by resistance (RDUTY) connected to DUTYP pin.
○Relationship between LED PWM frequency fPWM, ODP Detection Duty ODPduty and DUTYP resistance (ideal)
1172×ODP [%]
duty
RDUTYP
=
[kΩ]ꢀ
f
PWM [Hz]
The RDUTYP setting ranges from 15kΩ to 500kΩ.
The setting example is separately described in the section ”3.2.5 ODP Setting”.
Pin 15: RT
This is the pin that sets the DC/DC switching frequency. DCDC frequency is decided by connected RT resistor.
○The relationship between the frequency and RT resistance value (ideal)
15000
RRT
=
[kΩ]ꢀ
fSW [kHz]
The oscillation setting ranges from 50kHz to 1000kHz.
The setting example is separately described in the section ”3.2.4 DCDC Oscillation Frequency Setting”.
Pin 16: SS
This is the pin which sets the soft start interval of DC/DC converter. It performs the constant current charge of 3.0μA(Typ)
to external capacitance Css. The switching duty of GATE output will be limited during 0V to 3.7V(Typ) of the SS voltage.
So the soft start interval Tss can be expressed as follows
TSS =1.23×106 ×CSS [s]ꢀ Css: the external capacitance of the SS pin.
SS pin becomes L because it never became PWM=H after the latch turns OFF or reset is canceled. When SS
capacitance is under 1nF, please note if the in-rush current during startup is too large, or if over boost detection (FBMAX)
mask timing is too short.
Please refer to soft start behavior in the section “3.5.4 Timing Chart ”.
Pin 23: OVP
The OVP terminal is the input for over-voltage protection. If OVP is more than 3.0V(Typ), the over-voltage protection
(OVP) will work. At the moment of these detections, it sets GATE=L, DIMOUT=L and starts to count up the abnormal
interval. If OVP detection continued to count four GATE clocks, IC reaches latch off. (Please refer to “3.5.5 Timing Chart”)
The OVP pin is high impedance, because the internal resistance is not connected to a certain bias.
Even if OVP function is not used, pin bias is still required because the open connection of this pin is not a fixed potential.
The setting example is separately described in the section ”3.2.6 OVP Setting”.
Pin 24: REG90
This is the 9.0V(Typ) output pin. Available current is 15mA (Min).
Please place the ceramic capacitor connected to REG90 pin (1.0μF to 10μF) closest to REG90-GND pin.
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2.3 List of The Protection Function Detection Condition (Typ Condition)
Detect condition
Timer
operatio
n
Protect
Detection
pin
Release
Protection type
Detection
condition
function
condition
PWM
SS
Immediately auto-restart
after detection
(Judge periodically
whether normal or not)
Immediately auto-restart
after detection
214clk
FBMAX
FB
VFB>4.0V
H(4clk) VSS>3.7V
VFB<4.0V
LED OCP
ISENSE
VISENSE>3.0V
-
-
VISENSE<3.0V
4clk
(Judge periodically
whether normal or not)
RT GND
SHORT
VRT<VRTN×90%
VRT>VRTN×90%
Restart by release
Restart by release
RT
RT
-
-
-
-
No
No
(Note 6)
(Note 6)
RT HIGH
SHORT
REG90UVL
O
VRT>5V
VRT<5V
Restart by release
Restart by release
REG90
VCC
VREG90<6.0V
VCC<7.2V
-
-
-
-
VREG90>6.5V
VCC>7.5V
No
No
VCC UVLO
Immediately auto-restart
after detection
(Judge periodically
whether normal or not)
OVP
OVP
CS
VOVP>3.0V
VCS>0.4V
-
-
-
-
-
-
VOVP<2.8V
-
4clk
No
Pulse by Pulse
OCP
Immediately auto-restart
after detection
(Judge periodically
whether normal or not)
OCP LATCH
CS
VCS>1.0V
VDUTYP
VCS<1.0V
VDUTYP
4clk
DUTYP GND
SHORT
Restart by release
Restart by release
DUTYP
DUTYP
<VDUTYPN×90%
-
-
-
-
>VDUTYPN×90%
No
No
(Note 7)
(Note 7)
DUTYP
HIGH
VDUTYP>5V
VDUTYP<5V
SHORT
DUTYON=H
and
PWMduty>ODPduty
(Note 9)
ODP (Note 8)
Cycle by Cycle
PWM
H
-
-
No
The clock number of timer operation corresponds to the boost pulse clock.
(Note 6) VRTN is the RT voltage at normal operation.
(Note 7) VDUTYPN is the DUTYP voltage at normal operation.
(Note 8) About ODP, when PWM is inputted from low to high, PWM Duty count start and when PWM is inputted from high to lo, the counter is reest.
When PWM duty is set to 100%,after ODP works once, the GATE and DIMOUT outputs maintain low till PWM is inputted from high to low.
(Note 9) PWMduty is the Duty of PWM signal into PWM terminal and ODPduty is the Duty decided by the resister connecting to DUTY terminal.
2.4 List of The Protection Function Operation
Operation of the protect function
Protect function
DC/DC gate
output
Dimming transistor
(DIMOUT) logic
SS pin
FAILB pin
Stop after timer latch
Low after timer latch
Discharge after timer latch
Discharge after timer latch
Low after timer latch
Low after timer latch
FBMAX
Immediately high,
Low after timer latch
Stop immediately
LED OCP
Stop immediately
Stop immediately
Immediately low
Immediately low
Not discharge
Not discharge
-
-
RT GND SHORT
RT HIGH SHORT
Low after REG90UVLO
detects
Stop immediately
Discharge immediately
High
STB
Stop immediately
Stop immediately
Stop immediately
Stop immediately
Immediately low
Immediately low
Immediately low
Normal operation
Discharge immediately
Discharge immediately
Discharge after timer latch
Not discharge
High
REG90UVLO
VCC UVLO
OVP
High
Low after timer latch
-
OCP
Stop immediately
Low after timer latch
Discharge after timer latch
Low after timer latch
OCP LATCH
(Note10)
Stop immediately
Stop immediately
Stop immediately
Immediately low
Immediately low
Immediately low
Not discharge
Not discharge
Not discharge
-
-
-
DUTYP GND SHORT
DUTYP HIGH SHORT
ODP
Please refer to section “3.5 Timing Chart” for details.
(Note 10) Stop immediately due to detecting OCP before OCP_LATCH
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BD9416xx Series
3.1 Application Circuit Example
Introduce an example application using the BD9416xx Series.
3.1.1 Basic Application Example
3.1.2 Only Used 1ch Example
VOUT2
VOUT1
VOUT1
VCC
VIN
VCC
VIN
VCC
OVP
VCC
OVP
REG90
STB
RT
REG90
STB
RT
GATE1
CS1
GATE1
CS1
SS
SS
GND1
GND1
DIMOUT1
DIMOUT1
FAILB
ISENSE1
FB1
FAILB
ISENSE1
FB1
Rs1
Rs1
GATE2
CS2
PWM1
PWM2
ADIM
GATE2
CS2
PWM1
PWM2
ADIM
GND2
GND2
DIMOUT2
DIMOUT2
DUTYP
ISENSE2
FB2
DUTYP
ISENSE2
FB2
DUTYON
DUTYON
Rs2
Figure 16. Basic application example
Figure 17. Example circuit for only used 1ch
3.1.3 Analog Dimming or PWM Dimming Examples
VOUT2
VOUT2
VOUT1
VOUT1
VCC
VIN
VCC
VIN
VCC
OVP
VCC
OVP
REG90
STB
RT
REG90
STB
RT
GATE1
CS1
GATE1
CS1
SS
SS
GND1
GND1
DIMOUT1
DIMOUT1
FAILB
ISENSE1
FB1
FAILB
ISENSE1
FB1
Rs1
Rs1
REG90
GATE2
CS2
PWM1
PWM2
ADIM
GATE2
CS2
PWM1
PWM2
ADIM
REG90
GND2
GND2
DIMOUT2
DIMOUT2
DUTYP
ISENSE2
FB2
DUTYP
ISENSE2
FB2
DUTYON
Rs2
DUTYON
Rs2
Figure 18. Example circuit for analog dimming
Figure 19. Example circuit for PWM dimming
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BD9416xx Series
3.2 External Components Selection
3.2.1 Start Up Operation and Soft Start External Capacitance Setting
The below explanation is the start up sequence of this IC
1
5V
VOUT
SS
STB
SLOPE
FB
COMP
SS
OSC
GATE
CS
Css
DRIVER
OSC
SS=FB
Circuit
PWM
LED_OK
GATE
VOUT
2
DIMOUT
ISENSE
FB
3
ILED
PWM
4
LED_OK
6
5
Figure 20. Startup waveform
Figure 21. Circuit behavior at startup
○Explanation of start up sequence
1. Reference voltage REG90 starts by STB=H.
2. SS starts to charge at the time of first PWM=H. At this moment, the SS voltage of slow-start starts to equal FB
voltage,and the circuit becomes VFB=VSS regardless of PWM logic.
3. When VFB=VSS reaches the lower point of internal sawtooth waveform, GATE terminal outputs pulse and starts to
boost VOUT.
4. VOUT is increased and VOUT reaches the voltage to be able to flow LED current.
5. If LED current flows over the set level, FB=SS circuit disconnects and startup behavior completes.
6. Then it continues normal operation by feedback of ISENSE terminal. If LED current doesn't flow when VSS becomes
over 3.7V(Typ), SS=FF circuit completes immediately and FBMAX protection starts.
○Method of setting SS external capacitance
According to the sequence described above, start time when completed at VFB=VSS can be thought of as the time until FB
voltage reaches the feedback point from STB=ON.
The capacitance of SS terminal is defined as Css and the feedback voltage of FB terminal is defined as VFB. The
equation relating Css and VFB to TSS is as follows.
CSS [μF]× VFB[V ]
TSS =
[s]ꢀ
3[μA]
If Css is set to a very small value, rush current flows into the inductor at startup.
On the contrary, if Css is increased too much, LED will light up gradually.
The constant to set varies depending on characteristics required by Css and also differs by factors, such as voltage rise
ratio, output capacitance, DCDC frequency, and LED current. Please confirm with the system.
【Setting example】
When Css=0.1μF,Iss=3μA,and startup completes at VFB =3.7V, SS setting time is as follows.
0.1×10−6[F]×3.7[V ]
TSS =
=0.123[s]ꢀ
3×10−6[A]
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3.2.2 VCC Series Resistance Setting
VIN
Here are the following effects of inserting series resistor Rvcc into VCC line.
(i) It is possible to suppress the heat generation of the IC, when the voltage VCC
is reduced.
R
VCC
ΔV
(ii) It can limit the inflow current to VCC line.
VCC
However, if resistance Rvcc is set to a large value, VCC voltage is reduced below
minimum operation voltage (VCC<9V). Rvcc must be set to an appropriate series
resistance.
I
IN
I
CC
+
-
REG90
I
REG
IC’s inflow current line IIN has the following inflow lines.
・IC’s circuit current…ICC
Internal
BLOCK
R
REG
I
DCDC
・Current of RREG connected to REG90…IREG
・Current to drive FET’s Gate…IGATE
These decide the voltage ΔV at RVCC
VCC terminal voltage at that time can be expressed as follows.
.
I
GATE
GATE
DCDC
DRIVER
VCC [V ] = VIN [V ]ꢀ− (ICC [A]+ IDCDC[A]+ IREG[A])× RVCC [Ω] > 9[V ]
Here, judgement is the 9V minimum operation voltage.
Please consider a sufficient margin when setting the series resistor of VCC.
Figure 22. VCC series resistance
circuit example
【setting example】
Above equation is translated as follows.
VIN [V ] − 9[V ]
ICC [A] + IDCDC [A] + IREG[A]
RVCC [Ω] <
ꢀ
When VIN=24V, ICC=2.0mA, RREG=10kΩ and IDCDC=2mA, RVCC’s value is calculated as follows.
24[V ]− 9[V ]
0.0051[A]+ 0.002[A]+ 9.0[V ]/10000[Ω]
RVCC [Ω] <
ꢀ=1.88[kΩ]
(ICC is 5.1mA(Typ)) . Please set each values with tolerance and margin.
3.2.3 LED current setting
LED current can be adjusted by setting the resistance RS [Ω] which connects to ISENSE pin and VADIM [V].
Relationship between RS and ILED current
With DC dimming (VADIM<3.0V)
VOUTx
1 VADIM [V ]
3 ILED[A]
RS [Ω] =
[Ω]ꢀ
Without DC dimming (VADIM>3.0V)
I
LED
BD9416
Error AMP
DIMOUTx
1.015[V ]
RS [Ω] =
[Ω]ꢀ
I
LED[A]
ISENSEx
ADIM
-
【setting example】
If ILED current is 200mA and VADIM is 2.0V, we can calculate RS as below.
+
+
1.015V
1/3
Rs
1 VADIM [V ] 1 2.0[V ]
RS [Ω] =
=
= 3.33[Ω]ꢀ
FBx
3 ILED[A] 3 0.2[A]
Figure 23. LED current setting example
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3.2.4 DCDC Oscillation Frequency Setting
Frequency(fsw)
RRT which connects to RT pin sets the oscillation frequency fSW of DCDC.
○Relationship between frequency fSW and RT resistance (ideal)
15000
GATE
CS
RRT
=
[kΩ]ꢀ
fSW [kHz]
RT
Rcs
【setting example】
When DCDC frequency fsw is set to 200kHz, RRT is as follows.
RRT
GND
15000
15000
RRT =
=
= 75[kΩ]ꢀ
Figure 24. RT terminal setting example
fSW [kHz] 200[kHz]
3.2.5 ODP Setting
RDUTYP which connects to ODP pin sets the ODP detection duty.
○Relationship between LED PWM frequency fPWM, ODP Detection
GATE
Duty
and DUTYP resistance (ideal)
CS
DUTYP
Rcs
RDUTYP
1172×ODP [%]
duty
RDUTYP
=
[kΩ]ꢀ
f
PWM [Hz]
DIMOUT
ISENSE
【setting example】
Rs
PWM
When LED PWM frequency fPWM is set to 120Hz and ODP Detection Duty
(ODPduty) is set to 35%, RDUTYP is as follows.
GND
1172×35[%]
RDUTYP
=
= 341.8[kΩ]ꢀ
Figure 25. ODP setting example
120[Hz]
fPWM
PWM
3.2.6 OVP Setting
GATE
The OVP terminal is the input for over-voltage protection of the output
voltage.
The OVP pin is in high impedance state, because the internal
resistance is not connected to a certain bias.
DIMOUT
ODPduty
Detection voltage of VOUT is set by dividing resistors R1 and R2. The
resistor values can be calculated by the formula below.
Figure 26. The GATE and the DIMOUT
waveform as PWM dimming (ODP)
○OVP detection equation
If VOUT is boosted abnormally, VOVPDET is the detect voltage of OVP,
R1, R2 can be expressed by the following formula.
VOVPDET [V ] − 3.0[V ]
R1 = R2[kΩ
]
×
[kΩ]ꢀ
3.0[V ]
○OVP release equation
By using R1 and R2 in the above equation, the release voltage of OVP,
VOVPCAN can be expressed as follows.
COVP
R1[kΩ]+ R2[kΩ]
VOVPCAN = 2.8[V ]×
[V ]ꢀ
R2[kΩ]
Figure 27. OVP setting example
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【setting example】
If the normal output voltage, VOUT is 40V, the detect voltage of OVP is 48V, R2 is 10kΩ, R1 is calculated as follows.
VOVPDET [V ] − 3.0[V ]
3.0[V ]
48[V ] − 3[V ]
3[V ]
R1 = R2[kΩ]×
=10[kΩ]×
=150[kΩ]ꢀ
By using these R1 and R2, the release voltage of OVP, VOVPCAN can be calculated as follows.
R1[kΩ]+ R2[kΩ]
R2[kΩ]
10[kΩ]+150[kΩ]
10[kΩ]
VOVPCAN = 2.8[V ]×
= 2.8[V ]×
= 44.8[V ]ꢀ
3.2.7 Timer Latch Time Setting, Auto-Restart Timer Setting
About over boost protection (FBMAX), timer latch time is set by counting the clock frequency which is set at the RT pin.
About the behavior from abnormal detection to latch-off, please refer to the section “3.5.6 Timing Chart”.
If the condition VFB >4.0V(Typ) and PWM=H continues for more than four GATE clocks, it is counted as unusual. After
that, only the FB voltage is monitored and latch occurs after the time below has passed.
RRT
1.5×1010
RRT [kΩ]
1.5×107
LATCHTIME = 214 ×
=16384 ×
[s]ꢀ
And Auto-Restart Time after latch off can be expressed by the following formula.
RRT
1.5×1010
RRT [kΩ]
1.5×107
AUTOTIME = 217 ×
=131072 ×
[s]ꢀ
Here, LATCHTIME = time until latch condition occurs, AUTOTIME = auto restart timer’s time
RRT = Resistor value connected to RT pin
【setting example】
Timer latch time when RT=100kΩ
RRT [kΩ]
1.5×107
100[kΩ]
1.5×107
LATCHTIME =16384×
=16384×
=109.2[ms]ꢀ
RRT [kΩ]
1.5×107
100[kΩ]
AUTOTIME =131072×
=131072×
= 873.8[ms]ꢀ
1.5×107
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3.3 DCDC Parts Selection
3.3.1. OCP Setting / Calculation Method for the Current Rating of DCDC Parts
OCP detection stops the switching when the CS pin voltage is more than 0.4V(Typ). The resistor value of CS pin, RCS
needs to be considered after calculating the peak current in coil L. In addition, the current rating of DCDC external parts
should be greater than the peak current of the coil.
Shown below are the calculation method of the coil peak current, the selection method of Rcs (the resistor value of CS
pin) and the current rating of the external DCDC parts at Continuous Current Mode.
(the calculation method of the coil peak current, Ipeak at Continuous Current Mode)
At first, since the ripple voltage at CS pin depends on the application condition of DCDC, the following variables are used.
Vout voltage= VOUT [V]
LED total current= IOUT [A]
DCDC input voltage of the power stage = VIN [V]
Efficiency of DCDC =η[%]
L
VOUT
VIN
And then, the average input current IIN is calculated by the following
equation.
IL
VOUT [V ]× IOUT [A]
VIN [V ]×η[%]
II
=
[A]ꢀ
fsw
N
GATE
And the ripple current of the inductor L (ΔIL[A]) can be calculated by
using
DCDC the switching
frequency, fsw, as
[A]ꢀ
CS
(VOUT [V ]−VIN [V ])×VIN [V ]
L[H]×VOUT [V ]× fSW [Hz]
∆IL =
Rcs
follows.
GND
Figure 28. Circuit Structure of DCDC parts
On the other hand, the peak current of the inductor Ipeak can be expressed as follows.
(V)
∆IL[A]
… (1)
Ipeak = IIN [A]+
[A]
2
Therefore, the bottom of the ripple current IMin is
(A)
(t)
∆IL[A]
Ipeak
IMin = IIN [A]−
or 0ꢀ
2
ΔIL
I
IN
I
Min
If IMin >0, the operation mode is CCM (Continuous Current Mode), otherwise
the mode is DCM (Discontinuous Current Mode).
(t)
(V)
0.4V
(the selection method of Rcs at Continuous Current Mode)
Ipeak flows into Rcs and that causes the voltage signal to CS pin. (Please
refer to the timing chart at the right)
Peak voltage VCSpeakis as follows.
V
CSpeak
VCSpeak = RCS × I peak [V ]ꢀ
(t)
Figure 29. Coil current waveform
As this VCSpeak reaches 0.4V(Typ), the DCDC output stops switching.
Therefore, Rcs value is necessary to meet the condition below.
RCS × Ipeak [V ] << 0.4[V ]
(the current rating of the external DCDC parts)
The peak current as the CS voltage reaches OCP level (0.4V (Typ)) is defined as Ipeak_det
0.4[V ]
… (2)
Ipeak _det
=
[A]
RCS [Ω]
The relationship among Ipeak (equation (1)), Ipeak_det (equation (2)) and the current rating of parts is required to meet the
following
Ipeak << Ipeak _ det <<
The current rating of parts
Please make the selection of the external parts such as FET, Inductor, diode meet the above condition.
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[setting example]
Output voltage = VOUT [V] = 40V
LED total current = IOUT [A] = 0.48V
DCDC input voltage of the power stage = VIN [V] = 24V
Efficiency of DCDC =η[%] = 90%
Averaged input current IINis calculated as follows.
VOUT [V ]× IOUT [A] 40[V ]× 0.48[A]
I IN[A] =
=
= 0.89[A]
VIN [V ]×η[%]
24[V ]×90[%]
If the switching frequency, fSW = 200kHz, and the inductor, L=100μH, the ripple current of the inductor L (ΔIL[A]) can be
calculated as follows.
(VOUT [V ]−VIN [V ])×VIN [V ]
(40[V ]− 24[V ])× 24[V ]
∆IL =
=
= 0.48[A]
L[H]×VOUT [V ]× fSW [Hz] 100×10−6[H]× 40[V ]× 200×103[Hz]
Therefore the inductor peak current, Ipeak is
∆IL[A]
0.48[A]
…calculation result of the peak current
…Rcs value confirmation
Ipeak = IIN [A]+
[A] = 0.89[A]+
=1.13[A]
2
2
If Rcs is assumed to be 0.3Ω
VCSpeak = RCS × Ipeak = 0.3[Ω]×1.13[A] = 0.339[V ] << 0.4V
The above condition is met.
And Ipeak_det, the current OCP works, is
0.4[V ]
I peak _ det
=
=1.33[A]
0.3[Ω]
If the current rating of the used parts is below 2A,
Ipeak << Ipeak _ det <<
= 1.13[A] << 1.33[A] << 2.0[A]
The current rating
…current rating confirmation
of DCDC parts
This inequality meets the above relationship. The parts selection is proper.
And IMIN, the bottom of the IL ripple current, can be calculated as follows.
∆IL[A]
IMin = IIN [A]−
[A] =1.13[A] − 0.48[A] = 0.65[A] >> 0
2
This inequality implies that the operation is continuous current mode.
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3.3.2. Inductor Selection
The inductor value affects the input ripple current, as shown the previous section 3.3.1.
(VOUT [V ] −VIN [V ])×VIN [V ]
L[H]×VOUT [V ]× fSW [Hz]
∆IL =
[A]
VOUT [V ]× IOUT [A]
ΔI
L
I IN[A] =
[A]
VIN [V ]×η[%]
∆IL[A]
VIN
I peak = IIN [A] +
[A]
2
IL
L
Where
L: coil inductance [H]
VIN: input voltage [V]
IOUT: output load current (the summation of LED current) [A]
IIN: input current [A] fSW: oscillation frequency [Hz]
VOUT
VOUT: DCDC output voltage [V]
RCS
COUT
Figure 30. Inductor current waveform and diagram
In continuous current mode, ⊿IL is set to 30% to 50% of the output load current in many cases.
In using smaller inductor, the boost is operated in discontinuous current mode in which the coil current returns to zero
at every period.
*The current exceeding the rated current value of inductor passing through the coil causes magnetic saturation, and
this results in to a decrease in efficiency. Inductor needs to be selected to have adequate margin such that the peak
current does not exceed the rated current value of the inductor.
*To reduce inductor loss and improve efficiency, inductor with low resistance components (DCR, ACR) needs to be
selected
3.3.3. Output Capacitance Cout Selection
Output capacitor COUT needs to be selected in consideration of equivalent series
resistance RESR required to smooth out the ripple voltage. Be aware that the required
VIN
LED current may not be observed due to decrease in LED terminal voltage if the
output ripple component is high.
IL
L
Output ripple voltage
⊿Vis determined by Equation (4):
OUT
VOUT
ΔVOUT =ΔIL× RESR [ꢀV ]ꢀꢀ(3)
RESR
COUT
When the coil current is charged to the output capacitor as MOS turns off, a large
output ripple is caused. Large ripple voltage of the output capacitor may cause the
LED current ripple.
RCS
Figure 31. Output capacitor diagram
* Rating of capacitor needs to be selected to have adequate margin against output voltage.
*To use an electrolytic capacitor, adequate margin against allowable current is also necessary. Be aware that the LED
current is larger than the set value momentarily especially in the case that LED is provided with PWM dimming.
3.3.4. Switching MOSFET Selection
There is no problem if the absolute maximum rating is larger than the rated current of the inductor L, or is larger than
the sum of the tolerance voltage of COUT and the rectifying diode VF. The product with small gate capacitance (injected
charge) needs to be selected to achieve high-speed switching.
* One with over current protection setting or higher is recommended.
* The selection of one with small on resistance results in high efficiency.
3.3.5. Rectifying Diode Selection
A schottky barrier diode which has current ability higher than the rated current of L, reverse voltage larger than the
tolerance voltage of COUT, and most importantly, low forward voltage VF needs to be selected.
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3.4 Loop Compensation
A current mode DCDC converter has one pole (phase lag) fp due to CR filter composed of the output capacitor and the
output resistance (= LED current) and one zero (phase lead) fZ by the output capacitor and the ESR of the capacitor.
Moreover, a step-up DCDC converter has RHP zero (right-half plane zero point) fZRHP which is unique with the boost
converter. This zero may cause the unstable feedback. To avoid this by RHP zero, the loop compensation that the
cross-over frequency fc, set as follows, is suggested.
fc = fZRHP /5 (fZRHP: RHP zero frequency)
Considering the response speed, the calculated constant below is not always completely optimized. It needs to be
adequately verified with an actual device.
V
OUT
VIN
I
LED
L
-
+
V
OUT
FB
gm
RFB1
RESR
CFB2
CFB1
RCS
COUT
Figure 32. Output stage and error amplifier diagram
i.
Calculate the pole frequency fp and the RHP zero frequency fZRHP of DC/DC converter
VOUT ×(1− D)2
2π × L× ILED
ILED
f p =
[ꢀHz]ꢀꢀ
fZRHP
=
[ꢀHz]ꢀꢀ
2π ×VOUT ×COUT
VOUT −VIN
Where ILED = the summation of LED current,
(Continuous Current Mode)
D =
ꢀꢀ
VOUT
ii.
Calculate the phase compensation of the error amp output (fc = fZRHP/5)
fRHZP × RCS × ILED
5× fp × gm×VOUT ×(1− D)
RFB1
=
ꢀ[Ω]ꢀꢀ
1
5
CFB1
=
=
[F]
2π × RFB1 × fC 2π × RFB1 × fZRHP
gm = 4.0 ×10−4 [S]ꢀ
The above equation is described for lighting LED without the oscillation. The value may cause a large error if the quick
response for the abrupt change of dimming signal is required.
To improve the transient response, RFB1 needs to be increased, and CFB1 needs to be decreased. It needs to be
adequately verified with an actual device to consider part to part variation since phase margin could be decreased.
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3.5 Timing Chart
3.5.1 PWM Start up 1 (Input PWM Signal After Input STB Signal)
7.5V
VCC
STB
PWM
6.5V
REG90
3.7V
SS
0.4V
0.4V
GATE
DIMOUT
2.0V
RT
FAILB
OFF
STANDBY
SS
Normal
SS
STANDBY
STATE
(*1) (*2)
(*3)
(*4)
(*5)
(*6)
Figure 33. PWM Start Up 1 (Input PWM Signal After Input STB Signal)
(*1)…REG90 starts up when STB is changed from Low to High. In the state where the PWM signal is not supplied, SS terminal
is not charged and DCDC does not start to operate, either.
(*2)…When REG90 is more than 6.5V(Typ), the reset signal is released.
(*3)…The charge of the pin SS starts at the positive edge of PWM=L to H, and the soft start starts. And while the SS is less than
0.4V, the pulse does not output. The pin SS continues charging in spite of the assertion of PWM or OVP level.
(*4)…The soft start interval will end once the voltage of the pin SS, Vss reaches 3.7V(Typ). By this time, it boosts VOUT to the
voltage where the set LED current flows. The abnormal detection of FBMAX starts to be monitored.
(*5)…As STB=L, the boost operation is stopped immediately.
(*6)…In this diagram, before the charge period is completed, STB is changed to High again. As STB=H again, the boost
operation restarts the next PWM=H. It is the same operation as the timing of (*2). (For capacitance setting of SS terminal,
please refer to the section 3.2.1.
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3.5.2 PWM Start Up 2 (Input STB Signal after Inputted PWM Signal)
7.5V
VCC
STB
PWM
6.5V
REG90
3.7V
0.4V
SS
0.4V
GATE
DIMOUT
RT
2.0V
FAILB
STATE
OFF
SS
NORMAL
STANDBY
SS
(*3)
Figure 34. PWM Start Up 2 (Input STB Signal After Inputted PWM Signal)
(*1)…REG90 starts up when STB=H.
(*4)
(*5)
(*1) (*2)
(*2)…When REG90UVLO releases or PWM is supplied to the edge of PWM=L→H, SS charge starts and soft start period is
started. And while the SS is less than 0.4V, the pulse does not output. The pin SS continues charging in spite of the
assertion of PWM or OVP level.
(*3)…The soft start interval will end once the voltage of the pin SS, Vss reaches 3.7V(typ.). By this time, it boosts VOUT to the
point where the set LED current flows. The abnormal detection of FBMAX starts to be monitored.
(*4)…As STB=L, the boost operation is stopped immediately (GATE=L, SS=L).
(*5)…In this diagram, before the discharge period is completed, STB is changed to High again. As STB=H again, operation will
be the same as the timing of (*1).
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3.5.3 Turn Off
STB
PWM
REG90
6.0V
REG90UVLO
DIMOUT
GATE
VOUT
SS
RT
2.0V
High
FAILB
ON
STATE
Dischange
OFF
(*2)
Figure 35. Turn Off
(*1)
(*1)…As STB=H→L, boost operation stops and REG90 starts to discharge.
(*2)…While STB=L, REG90UVLO=H, DIMOUT becomes same as PWM. When VREG90=9.0V is less than 6.0V(Typ), IC changes
to OFF state. REG90 capacitor is discharged quickly and VRT becomes 0V at the same time. VOUT is discharged
completely until this time. It should be set to avoid sudden brightness.
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3.5.4 Soft Start Function
STB
PWM
7.2V
VCCUVLO
7.5V
6.0V
6.5V
3.0V
REG90UVLO
OVP
2.8V
GATE
DIMOUT
4clk
2.0V
RT
0.4V
0.4V
0.4V
0.4V
0.4V
SS
FAILB
(*1)
(*2)(*3)
(*4)
(*5)
(*6)
Figure 36. Soft Start Function
(*1)…The SS pin charge does not start by just STB=H. PWM=H is required to start the soft start. In the low SS voltage, the
GATE pin duty depends on the SS voltage. And while the SS is less than 0.4V, the pulse does not output.
(*2)…By the time STB=L, the SS pin is discharged immediately. Because of REG90UVLO=H, RT is still High.
(*3)…As the STB recovered to STB=H, The SS charge starts immediately by the logic PWM=H in this chart.
(*4)…The SS pin is discharged immediately by the VCCUVLO=L.
(*5)…The SS pin is discharged immediately by the REG90UVLO=L.
(*6)…Unusual detection to latch OFF including OVP detection turns OFF latch, only after SS pin is discharged.
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3.5.5 OVP Detection
STB
PWM
REG90
3.0V
2.8V
2.8V
3.0V
2.8V
3.0V
OVP
Abnormal
COUNTOR
Smaller than
Gate 4count
Gate 4count
Gate 4count
Auto
Restart
Auto Restart
COUNTOR
Smaller than
Gate 217count
Gate 217count
SS
0.4V
0.4V
GATE
DIMOUT
RT
2.0V
FAILB
Auto
Restart
STATE NORMAL
Reset
(OFF)
Latch off
OVP
NORMAL
OVP
Latch off
NORMAL
NORMAL
OVP
abnormal
abnormal
abnormal
(*10)
(*1)
(*3)
(*4) (*5)
(*6)
(*7)
(*9)
(*8)
(*2)
Figure 37. OVP Detection
(*1)…As OVP is detected, the output GATE=L, DIMOUT=L, and the abnormal counter starts.
(*2)…If OVP is released within 4 clocks of abnormal counter of the GATE pin frequency, the boost operation restarts.
(*3)…As the OVP is detected again, the boost operation is stopped.
(*4)…As the OVP detection continues up to 4 count by the abnormal counter, IC will be latched off. After latch off, auto counter
starts counting.
(*5)… Once IC is latched off, the boost operation doesn't restart even if OVP is released.
(*6)… STB=L can release latch off. At the same time, Auto Restart counter is reset.
(*7)…Normal operation starts when STB is changed from Low to High.
(*8)…The operation of the OVP detection is not related to the logic of PWM. OVP detects and abnormal counter starts.
(*9)…same as (*4)
(*10)…When auto counter reaches 131072clk (217clk), IC will be auto-restarted. At this time, if VOVP is normal level, IC state
shifts to normal.
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3.5.6 FBMAX Detection
STB
PWM
REG90
4.0V
4.0V
4.0V
4.0V
FB
Abnormal
COUNTOR
Gate 4count
Gate 4count
Smaller than
Gate 4count
CP
COUNTOR
Gate 214count
Gate 214count
Auto
Restart
Auto Restart
COUNTOR
Gate 217count
Smaller than
Gate 217count
3.7V
3.7V
0.4V
0.4V
SS
RT
0.4V
2.0V
GATE
DIMOUT
FAILB
Auto
Restart
NOR
MAL
CP
COUNTOR
abnormal
Latch
off
NOR
MAL
Latch
off
SS
STANDBY
FBMAX
CP COUNTOR
abnormal
STANDBY
SS
STATE
FBMAX
SS
abnormal
abnormal
(*6)
(*7)
(*8)
(*9)
(*10)
(*11)
(*3)
(*12)
(*13)
(*1)
(*4)
(*5)
(*2)
Figure 38. FBMAX Detection
(*1) …When PWM is changed to high, soft-start starts.
(*2) …During the soft start, it is not judged as an abnormal state even if the FB=H(VFB >4.0V(Typ)).
(*3) …When VSS reaches to 3.7V, soft-start finishes.
(*4) …When the PWM=H and FB=H, the abnormal counter start immediately.
(*5)…The CP counter will start if the PWM=H and the FB=H detection continues up to 4 clocks of the GATE frequency. Once the
count starts, only FB level is monitored.
(*6)…When the FBMAX detection continues till the CP counter reaches 16384clk (214clk), IC will be latched off. The latch off
interval (LATCHTIME) can be calculated by the external resistor of RT pin. (Please refer to the section 3.2.7.)
(*7)…STB=L can release latch off.
(*8)…When PWM is set from low to high, IC starts normal start-up..
(*9)…same as (*3)
(*10)…same as (*4)
(*11)…same as (*5)
(*12)…same as (*6)
(*13)…When auto counter reaches 131072clk (217clk), IC will be auto-restarted. At this time, if VFB is normal level, IC state shifts
to normal.
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3.5.7 LED OCP Detection
STB
PWM
REG90
3.0V
3.0V
3.0V
3.0V
3.0V
3.0V
ISENSE
Abnormal
4count
COUNTOR
4count
Smaller than
4count
Auto
Restart
Auto Reatart
COUNTOR
Gate 217count
Smaller than
Gate 217count
SS
0.4V
0.4V
GATE
DIMOUT
RT
2.0V
FAILB
Auto
Restart
STATE
NORMAL
Reset
(OFF)
Latch off
Latch off
LEDOCP
abnormal
NORMAL
NORMAL
LEDOCP
abnormal
NORMAL
LEDOCP
abnormal
(*2)
(*1)
(*3)
(*4) (*5)
(*6)
(*7)
(*8)
(*9)
(*10)
Figure 39. LED OCP Detection
(*1)…If VISENSE>3.0V(Typ), LEDOCP is detected, and GATE becomes L. To detect LEDOCP continuously, The DIMOUT is
forced high, regardless of the PWM dimming signal.
(*2)…When the LEDOCP releases within 4 counts of the GATE frequency, the boost operation restarts.
(*3) …As the LEDOCP is detected again, the boost operation is stopped.
(*4)…If the LEDOCP detection continues up to 4 counts of GATE frequency. IC will be latch off. After latched off, auto counter
starts counting.
(*5)…Once IC is latched off, the boost operation doesn't restart even if the LEDOCP releases.
(*6)…STB=L can release latch off.
(*7)…When PWM is set from low to high, IC starts normal start-up.
(*8)…The operation of the LEDOCP detection is not related to the logic of the PWM.
(*9)…same as (*4)
(*10)…When auto counter reaches 131072clk (217clk), IC will be auto-restarted. At this time, if VISENSE is normal level, IC state
shifts to normal.
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3.5.8 ODP Operation
DUTYON
(*1)
(*2)
PWMduty<ODPduty PWMduty>ODPduty
(*5)
PWMduty<ODPduty PWMduty>ODPduty
(*3)
(*6)
(*7)
(*4)
PWMduty=100%
PWMduty=100%
PWM
ODPCLK
(internal
signal)
DIMOUT
GATE
Figure 40. ODP Operation
(*1)…When DUTYON=L and PWM pin’s duty (PWMduty) is smaller than internal ODPCLK’s duty (ODPduty), PWMduty is reflected
to DIMOUT and GATE.
(*2)…When DUTYON=L and PWM pin’s duty (PWMduty) is larger than internal ODPCLK’s duty (ODPduty), ODPduty is reflected to
DIMOUT and GATE.
(*3)…When DUTYON=L and PWM pin’s duty (PWMduty) is equal to internal ODPCLK’s duty (ODPduty), ODPduty is reflected to
DIMOUT and GATE only once, and then untill PWM is changed from low to high, DIMOUT and GATE output is low.
(*4) … When PWM is changed from low to high, ODPduty is reflected to DIMOUT and GATE again.
(*5)(*6)(*7)…When DUTYON=L, PWMduty is reflected to DIMOUT and GATE.
Please refer to the section “3.2.5 ODP Setting ” for ODPduty setting.
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3.6 I/O Equivalent Circuits
STB
DIMOUT1 / DIMOUT2 /
GND1 / GND2
GATE1 / GATE2 / REG90 / CS1 / CS2
REG90
REG90
STB
100k
GATEx
DIMOUTx
5V
1M
100k
GNDx
CSx
100k
GNDx
ISENSE1 / ISENSE2
FB1 / FB2
ADIM
ISENSEx
ADIM
20k
45k
FBx
5V
5V
FAILB
PWM1 / PWM2
DUTYON
PWMx
FAILB
DUTYON
100k
100k
500
5V
1M
5V
1M
DUTYP
RT
SS
SS
RT
DUTYP
6k
5V
OVP
OVP
100k
5V
Figure 41. Equivalent Circuits
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Operational Notes
1.Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
pins.
2.Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at all
power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3.Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal ground
caused by large currents. Also ensure that the ground traces of external components do not cause variations on the ground
voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.Recommended Operating Conditions
The function and operation of the IC are guaranteed within the range specified by the recommended operating conditions.
The characteristic values are guaranteed only under the conditions of each item specified by the electrical characteristics.
6.Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.
Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of
connections.
7.Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
8.Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject the
IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always be
turned off completely before connecting or removing it from the test setup during the inspection process. To prevent
damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage.
9.Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin. Inter-pin
shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and unintentional
solder bridge deposited in between pins during assembly to name a few.
10.Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge
acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power supply
or ground line.
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Operational Notes – continued
11.Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a parasitic diode or
transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
Pin B
B
E
C
Pin A
B
C
E
P
P+
P+
N
P+
P
P+
N
N
N
N
N
N
N
Parasitic
Elements
Parasitic
Elements
P Substrate
GND GND
P Substrate
GND
GND
Parasitic
Elements
Parasitic
Elements
N Region
close-by
Figure 42. Example of monolithic IC structure
12.Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with temperature
and the decrease in nominal capacitance due to DC bias and others.
13.Area of Safe Operation (ASO)
Operate the IC such that the output voltage, output current, and the maximum junction temperature rating are all within the
Area of Safe Operation (ASO).
14.Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always be
within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below the
TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat
damage.
15.Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This protection
circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should not be used in
applications characterized by continuous operation or transitioning of the protection circuit.
16.Disturbance Light
In a device where a portion of silicon is exposed to light such as in a WL-CSP and chip products, IC characteristics may be
affected due to photoelectric effect. For this reason, it is recommended to come up with countermeasures that will prevent
the chip from being exposed to light.
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TSZ22111・15・001
08.Apr.2017 Rev.001
BD9416xx Series
Ordering Information
B D 9 4 1 6
x
x
-
E 2
Part Number
Package
F: SOP24
Packaging and forming specification
E2: Embossed tape and reel
FS:SSOP-A24
Marking Diagrams
SSOP-A24(TOP VIEW)
SOP24(TOP VIEW)
Part Number Marking
LOT Number
Part Number Marking
LOT Number
B D 9 4 1 6 F S
B D 9 4 1 6 F
1PIN MARK
1PIN MARK
Part Number Marking
BD9416F
Package
SOP24
Orderable Part Number
BD9416F-E2
BD9416FS
SSOP-A24
BD9416FS-E2
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08.Apr.2017 Rev.001
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BD9416xx Series
Physical Dimension, Tape and Reel Information
Package Name
SOP24
(Max 15.35 (include.BURR))
(UNIT : mm)
PKG : SOP24
Drawing No. : EX118-5001
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© 2017 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
TSZ02201-0T5T0C100020-1-2
08.Apr.2017 Rev.001
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BD9416xx Series
Physical Dimension, Tape and Reel Information
- continued
Package Name
SSOP-A24
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TSZ22111・15・001
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08.Apr.2017 Rev.001
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BD9416xx Series
Revision History
Date
Revision
Rev.001
Changes
08.Apr.2017
New Release
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Notice
Precaution on using ROHM Products
1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅣ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅢ
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
Rev.003
© 2015 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
Rev.003
© 2015 ROHM Co., Ltd. All rights reserved.
Daattaasshheeeett
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall not be in an y way responsible or liable for failure, malfunction or accident arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
相关型号:
BD9416FS
BD9416FS是白色LED用高效率驱动器,适用于大屏幕液晶驱动器。BD9416FS内置了可向光源(LED串联连接的阵列)提供适当电压的DCDC转换器。BD9416FS中内置了应对异常状态的几种保护功能。过电压保护(OVP: Over Voltage Protection)、过电流检测(OCP: Over Current Limit Protection of DCDC)、LED 过流保护(LEDOCP: LEDOver Current Protection)、过升压保护(FBMAX: Over Boost Protection)等。因此,可在更宽的输出电压条件及负载条件下使用。
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BD9421F-GE2
LED Driver, 72-Segment, PDSO24, 15 X 7.80 MM, 2.01 MM HEIGHT, 1.27 MM PITCH, ROHS COMPLIANT, SOP-24
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