BD95602MUV-LB_技术文档

Datasheet

5.5V to 28V Input,

2ch Synchronous Buck DC/DC Controller

BD95602MUV-LB

General Description

Applications

Industrial Equipment ,FPGA, POL Power Supply,

This is the product guarantees long time support in

Industrial market.



Mobile PC, Desktop PC, LCD-TV,

Digital Components, etc.

BD95602MUV-LB is a dual buck regulator controller with

adjustable output voltage from1.0V to 5.5V and an input

voltage range of 5.5 to 28V. High efficiency is achieved

Key Specifications



Input Voltage Range:

Output Voltage Range:

Switching Frequency:

5.5V to 28V

1.0V to 5.5V

150k to 500MHz(Typ)

with an external synchronous Nch-MOSFET. H³Reg^TM

,

Rohm’s advanced proprietary control method that uses

constant on-time control to provide ultra high transient

responses to load changes is used. SLLM(Simple Light

Load Mode) technology is added to improve efficiency

with light loads giving high efficiency over a wide load

range. In addition to the dual buck regulator controllers,

here are 2 LDO regulators included that are fixed output

voltage of 3.3V and 5.0V. Other functions included are

soft start, variable frequency, short circuit protection with

timer latch, over voltage, and power good outputs. This

buck regulator is optimal for high-current applications.

Operating Temperature Range:

-20°C to +85°C

Package

VQFN032V5050

W(Typ) x D(Typ) x H(Max)

5.00mm x 5.00mm x 1.00mm

Features



Long Time Support Product for Industrial

Applications.

Adjustable Simple Light Load Mode (SLLM), Quiet

light Load Mode (QLLM), Forced continuous Mode.

Multifunctional Protection Circuit

-Settable Over Current Protection (OCP)

-Thermal Shut down (TSD)

VQFN032V5050

-Under Voltage Lock Out (UVLO)

-Over Voltage Protection (OVP)

-Short Circuit Protection with Timer-Latch (SCP)

150kHz to 500kHz Switching frequency.

Adjustable Soft Start.

Power Good.

Dual Linear Regulator (5V/3.3V (total 50mA)).

Output Discharge.



Reference voltage Circuit (0.7V).

〇Product structure : Silicon monolithic integrated circuit 〇This product has no designed protection against radioactive rays

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Typical Application Circuit

R15

R25

16

15

14

13

12

11

10

9

R5

R6

ILIM1

ILIM2

VO2

SS2

17

18

19

20

21

22

23

24

8

7

6

5

4

3

2

1

MCTL1

SS1

C5

C6

PGOOD1

EN1

PGOOD2

EN2

U1

BD95602MUV

BD95602MUV-LB

EN_2.5

EN_3.3

BOOT1

HG1

BOOT2

HG2

L1

L2

2.5V

3.3V

SW1

SW2

25

26

27

28

29

30

31

32

GND PGND

Figure 1. Application Circuit

Pin Configuration

24 23 22 21 20 19 18 17

PGND1 25

LG1 26

16 MCTL2

15

14

13

12

11

10

9

FS1

27

FB1

Vo1

REG2

REG1

28

29

AGND

FIN

REF

FB2

VIN 30

LG2

31

32

FS2

CTL

PGND2

3

4

5

7

8

Figure 2. Pin Configuration

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Pin Descriptions

Pin No.

Pin Name

Function

1

24

SW2

SW1

Ground pin for High-side FET. The maximum voltage range of this pin is 30V.

2

23

HG2

HG1

High-side FET gate drive pin.

This is the power supply pin for High-side FET driver. The maximum voltage range to

ground is to 35V, to SW pin is to 7V. In switching operations, the voltage swings from

(VIN+REG1) to REG1 by BOOT pin operation.

3

22

BOOT2

BOOT1

When EN pin voltage is at least 2.3V, the status of the switching regulator becomes active.

Conversely, the status switches off when EN pin voltage goes lower than 0.8V.

This pin is pulled down to AGND with 1MΩ resistor.

4

21

EN2

EN1

5

20

PGOOD2

PGOOD1

If FB pin voltage is 15% or less of reference voltage, it will output low level.

The output format is open drain, so please connect pull-up resistance.

This is the setting pin for soft start. The rising time is determined by the capacitor connected

between SS and ground, and the fixed current inside IC after it is the status of low in standby

mode. It controls the output voltage till SS voltage catch up the REF pin to become the SS

terminal voltage.

6

19

SS2

SS1

7

27

VO2

VO1

This is the output discharge pin, and output voltage feedback pin for frequency setting.

This is the coil current limit setting pin. Set the resistor which is connected in between ground.

8

17

ILIM2

ILIM1

When CTL pin voltage is at least 2.3V, the status of the linear regulator REG1 and REG2

output becomes active. Conversely, the status switches off when CTL pin voltage goes lower

than 0.8V. The switching regulator doesn’t become active when the status of CTL pin is low, if

the status of EN pin is high.

9

CTL

This pin is pulled up to VIN with 1MΩ resistor.

10

15

FS2

FS1

Frequency input. A resistor to ground will set the switching frequency.

Frequencies from 150kHz to 500kHz are possible.

11

14

FB2

FB1

This is the output voltage feedback pin.

The IC controls reference voltage and FB terminal voltage are almost same.

This is the output voltage setting pin.

The IC controls reference voltage and FB terminal voltage are almost same.

12

13

REF

AGND

Ground input for control circuit.

This is the operation mode setting pin. If terminal voltage reaches less than 0.8V, it will be Low

Level.

If terminal voltage reaches more than 2.3V, it will be High Level. This pin is pulled down to

AGND with 300kΩ resistor.

Input

Control Mode

16

18

MCTL2

MCTL1

Low

MCTL2

Low

SLLM

Low

High

Low

QLLM

High

Continuous PWM Mode

High

25

32

PGND1

PGND2

This is the ground pin for Low-side FET drive.

This is the Low-side FET gate drive pin. It is operated in switching between REG1 to PGND.

ON resistance of output stage when High, it is 2Ω and when Low, it is 0.5Ω drive

Low-side FET gate with the high pace.

26

31

LG1

LG2

This is the output pin for 3.3V/50mA linear regulator (5V/3.3V (total 50mA)).

Please connect 10µF capacitor which characteristic is more than X5R near the pin.

28

29

REG2

REG1

This is the output pin for 5V/50mA linear regulator (5V/3.3V (total 50mA)).

Please connect 10µF capacitor which characteristic is more than X5R near the pin.

Supply pin of H³Reg^TMcontrol circuit and linear regulator. Monitor input voltage and determine

necessary on-time. As a result, this terminal voltage changes, and then the IC operation

become unstable. Please connect 10µF capacitor which characteristic is more than X5R near

the pin.

30

VIN

FIN

This is the thermal PAD. Please connect to the ground.

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Output condition table

Input

EN1

Low

High

Low

High

Output

REG2(3.3V)

CTL

Low

High

EN2

Low

High

Low

High

Low

High

Low

High

REG1(5V)

OFF

ON

DC/DC1

OFF

ON

DC/DC2

OFF

ON

OFF

ON

OFF

ON

*CTL pin is connected to VIN pin with 1MΩ resistor(pull up) internal IC.

*EN pin is connected to AGND pin with 1MΩ resistor(pull down) internal IC.

Block Diagram

3

2

1

31

REG1

32

22

23

24

26

25

REG1

AGND

13

CL2

SCP2

OVP2

CL1

SCP1

OVP1

Short through

Protection

Circuit

Short through

Protection

Circuit

FS1 RFS1

PGOOD1

FS2

15

20

10

5

SLLM^TM

Block

SLLM^TM

Block

MCTL

FS2

MCTL

PGOOD2

H³Reg^TM

Controller

Block

H³Reg^TM

Controller

Block

FS1

EN2

EN1

FB2

FB1

Thermal

Protection

11

6

14

12

19

REF

SS1

SS2

ILIM2

ILIM1

8

17

Reference

Block

5V

Reg

3.3V

Reg

EN2

EN1

21

4

30

29

9

27

7

28

18

16

Figure 3. Block Diagram

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Absolute Maximum Ratings(Ta = 25°C)

Parameter

Symbol

Rating

30

Unit

V

Conditions

Note 1

V_IN, CTL, SW1, SW2

EN1, EN2, PGOOD1, PGOOD2

Vo1, Vo2, MCTL1, MCTL2

Note 1, Note 2

6

V

FS1, FS2, FB1, FB2, I_LIM1, I_LIM2

,

Note 1

REG1+0.3

V

SS1, SS2, LG1, LG2, REF,REG2

BOOT1, BOOT2

BOOT1-SW1, BOOT2-SW2,

HG1-SW1, HG2-SW2

HG1

Note 1, Note 2

35

7

Terminal Voltage

Note 1, Note 2

Note 3

BOOT1+0.3

BOOT2+0.3

AGND±0.3

0.38

V

HG2

V

PGND1, PGND2

V

Power Dissipation1

Power Dissipation2

Power Dissipation3

Power Dissipation4

Operating Temperature Range

Storage Temperature Range

Pd1

Pd2

W

°C

Note 4

0.88

Note 5

Pd3

3.26

Note 6

Pd4

4.56

Topr

Tstg

Tjmax

-20 to +85

-55 to +150

+150

Junction Temperature

(Note 1) Not to exceed Pd.

(Note 2) Instantaneous surge voltage, back electromotive force and voltage under less than 10% duty cycle.

(Note 3) Derating in done 3.0 mW/°C for operating above Ta ≥ 25°C (when don’t mounted on a heat radiation board).

(Note 4) Derating in done 7.0 mW/°C for operating above Ta ≥ 25°C (Mount on 1-layer 74.2mm x 74.2mm x 1.6mm board).

Surface heat dissipation copper foil:20.2mm².

(Note 5) Derating in done 26.1 mW/°C for operating above Ta ≥ 25°C (Mount on 4-layer 74.2mm x 74.2mm x 1.6mm board

Two sides heat dissipation copperfoil:20.2mm². 2 or 3-layer : heat dissipation copper foil : 5505mm²).

(Note 6) Derating in done 36.5 mW/°C for operating above Ta ≥ 25°C (Mount on 4-layer 74.2mm x 74.2mm x 1.6mm board)

All layers heat dissipation copper foil:5505mm².

Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit

between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over

the absolute maximum ratings.

Recommended Operating Conditions (Ta=25°C)

Parameter

Symbol

Min

Typ

Max

Unit

Conditions

-

V_IN

CTL

5.5

-0.3

4.5

28

5.5

33

28

V

EN1, EN2, MCTL1, MCTL2

BOOT1, BOOT2

SW1, SW2

Terminal Voltage

-0.3

BOOT1-SW1, BOOT2-SW2,

HG1-SW1, HG2-SW2

-0.3

-

5.5

V

Vo1, Vo2, PGOOD1, PGOOD2

-0.3

-

5.5

V

Minimum ON Time

TONMIN

150

nsec

This product should not be used in a radioactive environment.

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Electrical Characteristics (Unless otherwise noted, Ta=25°CVIN=12V, CTL=OPEN, EN1=EN2=5V, FS1=FS2=51kΩ)

Parameter

Symbol

Min

Typ

Max

Unit

Conditions

VIN Standby Current

VIN Bias Current

I_STB

I_IN

70

60

150

250

230

18

μA

V

EN1= EN2= 0V, CTL= 5V

Vo1= 5V

130

VIN Shut Down Mode Current

CTL Low Voltage

I_SHD

V_CTLL

V_CTLH

I_CTL

6

12

CTL= 0V

-0.3

2.3

-18

-0.3

2.3

-

0.8

28

CTL High Voltage

V

CTL Bias Current

-12

-

-6

μA

V

CTL= 0V

EN= 3V

EN Low Voltage

V_ENL

V_ENH

I_EN

0.8

5.5

6

EN High Voltage

-

V

EN Bias Current

3

μA

5V Linear Regulator -VIN

REG1 Output Voltage

Maximum Current

V_REG1

I_REG1

4.90

5.00

-

5.10

-

V

IREG1=1mA

50

-

mA

mV

IREG2= 0mA, (Note 7)

VIN= 5.5 to 28V

Line Regulation

R_EG.I1

R_EG.L1

90

30

180

50

Load Regulation

-

IREG1= 0 to 30mA

3.3V Linear Regulator

REG2 Output Voltage

Maximum Current

V_REG2

I_REG2

3.27

3.30

3.33

-

V

IREG2= 1mA

50

-

mA

mV

IREG1= 0mA, (Note 7)

VIN= 5.5 to 28V

Line Regulation

R_EG.I2

R_EG.L2

20

30

Load Regulation

-

IREG2= 0 to 30mA

5V Linear Regulator -Vo1

Input Threshold Voltage

Input Delay Time

R_EG1th

T_REG1

R_REG1

4.1

1.5

-

4.4

3

4.7

6

V

ms

Ω

Vo1: Sweep up

Switch Resistance

1.0

3.0

Under Voltage Lock Out Block

REG1 Threshold Voltage

Hysteresis Voltage

R_EG1

_

3.9

50

4.2

4.5

V

REG1: Sweep up

UVLO

dV_ _UVLO

100

200

mV

REG1: Sweep down

Output Voltage Sense Block

Feedback Voltage1

FB1 Bias Current

V_FB1

I_FB1

0.693

0.700

0

0.707

1

V

μA

Ω

-

50

FB1= REF

FB2= REF

Output Discharge Resistance1

Feedback Voltage2

FB2 Bias Current

R_DISOUT1

V_FB2

100

0.700

0

200

0.707

1

0.693

-

V

I_FB2

μA

Ω

Output Discharge Resistance2

H³REG^TMControl Block

On Time1

R_DISOUT2

50

100

200

t_ON

1

2

0.760

0.470

2.5

0.910

0.620

5

1.060

0.770

10

μs

Vo1= 5V,FS1= 51kΩ

Vo2= 3.3V ,FS2= 51kΩ

Vo1= 5V

On Time2

t_ON

Maximum On Time 1

Maximum On Time 2

Minimum Off Time

t_ONMAX

1

2

t_ONMAX

1.65

-

3.3

6.6

Vo2= 3.3V

t_OFFMIN

0.2

0.4

FET Driver Block

HG High Side ON Resistance

HG Low Side ON Resistance

LG High Side ON Resistance

HGHON

HGLON

LGHON

LGLON

-

3.0

2.0

0.5

6.0

4.0

1.0

Ω

LG Low Side ON Resistance

(Note 7) I_REG1+I_REG2≤ 50mA.

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Electrical Characteristics (Unless otherwise noted, Ta=25°CVIN=12V, CTL=OPEN, EN1=EN2=5V, FS1=FS2=51kΩ)

Over Voltage Protection Block

0.77

0.84

0.91

OVP Threshold Voltage

VOVP

V

(+10%) (+20%) (+30%)

OVP Hysteresis

dV_OVP

50

150

300

mV

Output Short Protection Block

0.42

0.49

0.56

SCP Threshold Voltage

VSCP

TSCP

V

(-40%) (-30%) (-20%)

0.4

Delay Time

0.75

1.5

ms

Over Current Protection Block

Offset Voltage

dVSMAX

80

100

120

mV

ILIM= 100kΩ

Power Good Block

0.525

(-25%) (-15%)

0.595

0.665

(-5%)

Power Good Low Threshold

VPGTHL

V

Power Good Low Voltage

Delay Time

VPGL

-

0.1

0.75

0

0.2

1.5

2

V

IPGOOD= 1mA

VPGOOD= 5V

TPGOOD

ILEAKPG

0.4

-2

ms

μA

Power Good Leakage Current

Soft Start Block

Charge Current

ISS

1.5

-

2.3

-

3.1

50

μA

Standby Voltage

VSS_STB

mV

Mode Control Block

MCTL Low Voltage

VMCTL_L

VMCTL_H

IMCTL

-0.3

2.3

8

-

0.3

V

REG1

+0.3

MCTL High Voltage

MCTL Bias Current

16

24

μA

MCTL= 5V

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Typical Performance Curves (Reference data)

HG

10V/div

SW

10V/div

LG

5V/div

2μs

Figure 4. Switching Waveform

(Vo= 5V, Io= 0A, PWM)

Figure 5. Switching Waveform

(Vo= 5V, Io= 8A, PWM)

HG

10V/div

SW

10V/div

グラフ中の文字は 9pt

LG

5V/div

10μs

Figure 6. Switching Waveform

(Vo= 5V, Io= 0A, QLLM)

Figure 7. Switching Waveform

(Vo= 5V, Io= 0A, SLLM)

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Typical Performance Curves - continued

HG

10V/div

SW

10V/div

LG

5V/div

2μs

Figure 8. Switching Waveform

(Vo= 3.3V, Io= 0A, PWM)

Figure 9. Switching Waveform

(Vo= 3.3V, Io= 8A, PWM)

HG

10V/div

SW

10V/div

LG

5V/div

10μs

Figure 10. Switching Waveform

(Vo= 3.3V, Io= 0A, QLLM)

Figure 11. Switching Waveform

(Vo= 3.3V, Io= 0A, SLLM)

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Typical Performance Curves - continued

HG

10V/div

SW

10V/div

LG

5V/div

2μs

Figure 12. Switching Waveform

(Vo= 1V, Io= 0A, PWM)

Figure 13. Switching Waveform

(Vo= 1V, Io= 8A, PWM)

HG

10V/div

SW

10V/div

LG

5V/div

10μs

Figure 14. Switching Waveform

(Vo= 1V, Io= 0A, QLLM)

Figure 15. Switching Waveform

(Vo= 1V, Io= 0A, SLLM)

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Typical Performance Curves - continued

100

80

60

40

20

0

100

80

60

40

20

0

5V

7V

12V

7V

21V

1

10

100

Io[mA]

1000

10000

1

10

100

1000

10000

Io[mA]

Figure 16. Efficiency

(Vo= 5V, PWM)

Figure 17. Efficiency

(Vo= 5V, QLLM)

100

80

60

40

20

0

100

7V

80

60

40

20

0

12V

7V

21V

12V

21V

1

10

100

1000 10000

1

10

100

1000

10000

Io[mA]

Figure 18. Efficiency

(Vo= 5V, SLLM)

Figure 19. Efficiency

(Vo= 3.3V, PWM)

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Typical Performance Curves - continued

100

80

60

40

20

0

7V

80

12V

21V

12V

7V

60

40

20

0

21V

1

10

100

Io[mA]

1000

10000

1

10

100

Io[mA]

1000

10000

Figure 21. Efficiency

(Vo= 3.3V, SLLM)

Figure 20. Efficiency

(Vo= 3.3V, QLLM)

100

80

60

40

20

0

80

60

40

20

0

7V

12V

7V

12V

21V

1

10

100

1000

10000

1

10

100

1000

10000

Io[mA]

Figure 22. Efficiency

(Vo= 1V, PWM)

Figure 23. Efficiency

(Vo= 1V, QLLM)

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Typical Performance Curves - continued

100

7V

80

Vo

100mV/div

60

12V

21V

40

I_L

5A/div

I_O

5A/div

20

0

20μs

1

10

100

1000

10000

Io[mA]

Figure 24. Efficiency

(Vo= 1V, SLLM)

Figure 25. Transient Response

(Vo= 5V, PWM, Io= 0A→8A)

Vo

100mV/div

I_L

5A/div

I_O

5A/div

I_O

5A/div

20μs

Figure 26. Transient Response

Figure 27. Transient Response

(Vo= 5V, PWM, Io= 8A→0A)

(Vo= 3.3V, PWM, Io= 0A→8A)

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Typical Performance Curves - continued

Vo

100mV/div

I_L

5A/div

I_O

5A/div

I_O

5A/div

20μs

Figure 28. Transient Response

Figure 29. Transient Response

(Vo= 3.3V, PWM, Io= 8A→0A)

(Vo= 1V, PWM, Io= 0A→8A)

Vo

100mV/div

50mV/div

I_L

5A/div

I_O

5A/div

2μs

20μs

Figure 30. Transient Response

(Vo= 1V, PWM, Io= 8A→0A)

Figure 31. Output Voltage

(Vo= 5V, PWM, Io= 0A)

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Typical Performance Curves - continued

Vo

50mV/div

2μs

10μs

Figure 32. Output Voltage

(Vo= 5V, PWM, Io= 8A)

Figure 33. Output Voltage

(Vo= 5V, QLLM, Io= 0A)

Vo

50mV/div

2μs

Figure 34. Output Voltage

(Vo= 5V, SLLM, Io= 0A)

Figure 35. Output Voltage

(Vo= 3.3V, PWM, Io= 0A)

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Typical Performance Curves - continued

Vo

50mV/div

10μs

2μs

Figure 36. Output Voltage

(Vo= 3.3V, PWM, Io= 8A)

Figure 37. Output Voltage

(Vo= 3.3V, QLLM, Io= 0A)

Vo

50mV/div

2μs

Figure 38. Output Voltage

(Vo= 3.3V, SLLM, Io= 0A)

Figure 39. Output Voltage

(Vo= 1V, PWM, Io= 0A)

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Typical Performance Curves - continued

Vo

50mV/div

10μs

2μs

Figure 40. Output Voltage

(Vo= 1V, PWM, Io= 8A)

Figure 41. Output Voltage

(Vo= 1V, QLLM, Io= 0A)

EN1

5V/div

Vo1

2V/div

Vo

50mV/div

EN2

5V/div

Vo2

2V/div

400μs

2μs

Figure 42. Output Voltage

(Vo= 1V, SLLM, Io= 0A)

Figure 43. Start-up

(EN1= EN2)

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Typical Performance Curves - continued

EN1

5V/div

Vo1

2V/div

EN2

5V/div

Vo2

2V/div

40ms

Figure 44. Start-up

Figure 45. Start-up

(EN2→EN1)

(EN1→EN2)

IOUT-frequency (VOUT=5V, R(FS)=68kΩ)

500

450

400

350

300

EN1

5V/div

PGOOD1

2V/div

VIN=7.5V

VIN=12V

VIN=18V

EN2

5V/div

PGOOD2

2V/div

40ms

0

1

2

3

4

5

6

7

IOUT [A]

Figure 46. Start-up

(EN1/2→PGOOD1/2)

Figure 47. Io-frequency

(Vo= 5V, PWM, RFS= 68kΩ)

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Typical Performance Curves - continued

IOUT-frequency (VOUT=5V, R(FS)=68kΩ)

2.5

2

500

VOUT=5V

VOUT=3.3V

450

400

1.5

1

VIN=7.5V

VIN=12V

VIN=18V

350

0.5

0

300

0

50

100

150

0

1

2

3

4

5

6

7

RFS [kΩ]

IOUT [A]

Figure 49. On time-RFS

Figure 48. lo-frequency

(Vo= 3.3V, PWM, RFS= 68kΩ)

5.500

5.000

4.500

4.000

3.500

3.000

2.500

2.000

1.500

1.000

0.500

0.000

700

600

500

400

300

200

100

0

VOUT=5V

VIN=7.5V(-5℃）

VIN=21V（-5℃）

VIN=7.5V(75℃）

VIN=21V（75℃）

VOUT=3.3V

0

2

4

6

8

10

12

14

16

0

50

100

150

RFS [kΩ]

IOUT [A]

Figure 50. SW Frequency-RFS

Figure 51. Current Limit

(Vo= 5V)

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Typical Performance Curves - continued

IOUT - REG1 voltage

3.500

5.1

5

3.000

VIN=7.5V(-5℃）

2.500

2.000

1.500

1.000

0.500

0.000

VIN=21V（-5℃）

VIN=7.5V(75℃）

VIN=21V（75℃）

4.9

4.8

4.7

4.6

4.5

0

50

100

150

200

250

0

2

4

6

8

10

12

14

16

IOUT [A]

IOUT [mA]

Figure 53. REG1 Load Regulation

Figure 52. Current Limit

(Vo= 3.3V)

IOUT - REG2 voltage

3.4

3.3

3.2

3.1

3

2.9

2.8

0

50

100

150

200

250

IOUT [mA]

Figure 54. REG2 Load Regulation

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Description of Block

BD95602MUV-LB is a dual channel synchronous buck regulator using H³Reg^TM, Rohm’s latest constant on-time controller

technology. Fast load response is achieved by controlling the output voltage using a comparator without relying on the

switching frequency.

When V_OUTdrops due to a rapid load change, the system quickly restores V_OUTby extending the t_ONtime interval. Thus, it

serves to improve the regulator’s transient response. Activation of the light load mode further increases efficiency by using

V_IN

Simple Light Load Mode (SLLM) control.

H³Reg^TMControl

Comparator for

Output voltage control

V_OUT/V_IN

Circuit

HG

FB

V_OUT

A

○

SW

LG

Driver

Internal

Reference

Voltage

REF

B

○

Transient

Circuit

(Normal operation)

FB

When FB falls to a reference voltage (REF),

the drop is detected, activating the H³Reg^TM

control system

REF

HG

LG

V_OUT

V_IN

1

f

t_ON

=

x

[sec]・・・(1)

HG output on-time is determined by the formula (1).

When HG is off, LG is on until the output voltage becomes

FB= REF.

After the status of HG is off, LG go on outputting until

output voltage become FB= REF.

(V_OUTdrops due to a rapid load change)

FB

When V_OUTdrops due to a rapid load change, and

the voltage remains below the output setting following the

programmed t_ONtime, the system quickly restores V_OUT

by extending the t_ONtime, thus improving the transient

response. Once V_OUTis restored, the controller continues

normal operation.

REF

Io

t_ON+α

HG

LG

(When V_INdrops)

V

IN

ON

_tON4

t

1

t^ON2

t

3

t_ON4+α

H₃Reg^TM

HG

t_OFF

1

t_OFF2

t _OFF

3

t_OFF4=t_OFF

3

t_OFF4=t_OFF3

LG

FB

FB=REF

REF

Output voltage drops

Based on the value of V_IN, the on-time t_ONand off-time t_OFFare determined by t_ON= V_OUT/ V_INx I/f and t_OFF= (V_IN- V_OUT)/V_IN.

As the V_INvoltage drops, in order to maintain the output voltage, t_ONbecomes longer and t_OFFis shorter. However, for

normal operation, if V_INdrops further, t_ONis longer and t_OFF= tminoff (minimum off- time is defined internally), the output

voltage will decrease because t_OFFcannot be any shorter than the minimum off-time. With H³Reg^TM, if V_INgoes even lower,

the output voltage is maintained as the t_ONtime is extended. (t_ONtime is extended until FB>REF). In this case, the switching

frequency is lowered so that the t_ONtime can be extended.

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Description of Block - continued

Light Load Control

(SLLM)

FB

SLLM will activate when the LG pin is off and the coil current is

near 0A (current flows from V_OUTto SW).

REF

When the FB input is lower than the REF voltage again, HG will

be enabled once again.

HG

LG

0A

(QLLM)

FB

QLLM will activate when the LG pin is off and the coil

current is near 0A (current flows from V_OUTto SW). In this

case, the next HG is prevented. Then, when FB falls below

the output programmed voltage within the programmed time

(Typ= 40μs), HG will resume. In the case where FB doesn’t

fall in the programmed time, LG is forced on causing V_OUTto

fall. As a result, the next HG is on.

REF

HG

LG

0A

The BD95602MUV-LB operates in PWM mode until the SS

input reaches the clamp voltage (2.5V), regardless of the

control mode setting, this assures stable operation while the

during soft start.

MCTL1

MCTL2

Control Mode

SLLM

Start-up

PWM

L

H

X

QLLM

PWM

H

PWM

*Attention: To effect the rapid transient response, the H³Reg^TMcontrol

monitors the current from the output capacitor to the load using

the ESR of the output capacitor Do not use ceramic capacitors

on C_OUTside of power supply. Ceramic bypass capacitors can

be used near the individual loads if desired.

COUT

Load

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Timing Chart

・Soft Start Function

Soft start is exercised with the EN pin set high. Current

control takes effect at startup, enabling a moderate

output voltage “ramping start.” Soft start timing and

incoming current are calculated with formulas (2) and (3)

below.

EN

t_SS

SS

V_OUT

IIN

・Soft start time

0.7(Typ) x C_SS

[sec]

・・・(2)

t_SS

=

2.3μA(Typ)

C_SS(pF)

18000

33000

68000

Soft start time(ms)

5

10

20

・ Inrush current

Co x V_OUT

t_SS

V_OUT

[A]

・・・(3)

x

Iin

=

V_IN

(Css: Soft start capacitor Co: Output capacitor)

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Timing Chart - continued

・Notes when waking up with CTL pin or V_INpin

If EN pin is high or short (or pull up resistor) to REG1 pin, IC starts up by switching CTL pin, the IC might fail to start

up (SCP function) with the reason below, please be careful of SS pin and REF pin capacitor capacity.

REG1 REG2

FB

V_IN

CTL

REF

BG

Inner

Reference

Circuit

SCP circuit

Delay

SCP

SCP_REF

1ms(Typ)

SCP

PWM

(Switching control signal)

SS

CTL

(Vin)

REG1(5V)

REG2(3.3V)

SS

SCP invalid for

SS has not reached 1.5V.

SCP becomes valid from

the point SS reached 1.5V.

about 1.5V

SCP_REF

FB

SCP is effective at SCP_REF>FB condition.

SCP protection (function) activates when output

shorts and FB falls below the activation standard

of SCP.

FB

SCP valid area

REF

FB

SCP is valid here, SCP is valid here,but with FB exceeding

Inclination of REF is

because this is

SCP valid area

and also because

FB fall below

SCP_REF.

SCP_REF it is normally activate-able

area.

influenced by the external

condenserconnected to

REF.

SCP will be

effective with

EN=ON at this

section.

EN

Start up NG

SCP

SW

EN

Start up OK

SW

?

To be accurate,Delay occurs after SCP activating.

But this shows the relationship of each signals briefly

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Output Discharge

It will be available to use if connecting V_OUTpin to DC/DC output.

(about 100Ω) . Discharge function operates when <1> EN=’L’

<2> UVLO= ON(If input voltage is low) <3> SCP latch

<4> TSD= ON.

V_IN,CTL

EN

The function at output discharge time is shown as left.

[1] When switch to low from high with EN pin.

If EN pin voltage is below than EN threshold voltage, output

discharge function is operated, and discharge output capacitor charge.

V_OUT

V_IN, CTL

REG1

[2] When switch to low from high with EN pin

1) IC is in normal operation until REG1 voltage becomes lower than

UVLO voltage. However, because V_INvoltage also becomes low, output

voltage will drop, too.

2) If REG1 voltage reaches the UVLO voltage, output discharge function is

operated, and discharge output capacitor charge.

V_OUT

The efficiency of V_INvoltage

drop output discharge

Output discharge

3) In addition, if REG1 voltage drops, inner IC logic cannot operate, so that

output discharge function does not work, and becomes output Hi-z.

(In case, FB has resistor against ground, discharge at the resistor. )

Output Hi-Z

UVLO ON

・Timer Latch Type Output Short Circuit Protection

FB

Short protection is enabled when the output voltage

falls to or below REF X 0.7.

REF x 0.7

Once the programmed time period has elapsed, the

output is latched off to prevent destruction of the circuit.

(HG= Low, LG= Low) Output voltage can be restored

either by cycling the EN pin or disabling UVLO.

0.75ms(Typ)

SCP

EN / UVLO

・Over Voltage Protection

When the output voltage increases to or above REF x

1.2(Typ), output over voltage protection is enabled, and

the Low-side FET turns on to reduce the output.

(LG= High, HG= Low).

REF x 1.2

FB

When the output falls to within normal operation, the

function is restored to normal operation.

HG

LG

Switching

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・Over current protection circuit

t

ON

t

ON

t

ON

t

ON

During normal operation, if FB is less than REF, HG is

high during the time t_ON,but when the coil current

exceeds the I_LIMITthreshold, HG is set to off. The next

pulse returns to normal operation if the output voltage

drops after the maximum on-time or I_Lbecomes lower

than I_LIMIT.

HG

LG

IL

t

_OFF1

t

_OFF1

t

_OFF1

t_OFFα

Over current protection

setting value

OCP detection

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Selection of Components Externally Connected

1.Inductor (L) selection

The inductor value is a major influence on the output ripple current.

As formula (4) below indicates, the greater the inductor or the switching

frequency, the lower the ripple current.

ΔIL

(VI -V_OUT) x V_OUT

IN

ΔIL=

[A]・・・(4)

V_IN

L x V_INx f

Generally, lower inductance values offer faster response times but

also result in increased output ripple and lower efficiency.

I_L

V_OUT

0.47µH to 2.2µH are recommended as appropriate setting value.

L

Co

The peak current rating of coil is approximated by formula (5).

Please select inductor which is higher than this value.

(V_IN-V_OUT) x V_OUT

I_LPEAK= I_OUTMAX

+

[A]・・・(5)

Output ripple current

2 x L x V_INx f

*Passing a current larger than inductor’s rated current will cause magnetic saturation in the inductor and decrease

system efficiency. In selecting the inductor, be sure to allow enough margin to assure that peak current does not

exceed the inductor rated current value.

*To minimize possible inductor damage and maximize efficiency, choose an inductor with a low (DCR, ACR) resistance.

2. Output Capacitor (CO) Selection

V_IN

The output capacitor should be determined by equivalent series resistance

and equivalent series inductance so that the output ripple voltage is 30mV

or more.

The rating of the capacitor is selected with sufficient margin given the

output voltage.

V_OUT

L

ESR

Load

ΔV_OUT=ΔIL x ESR+ESL x ΔIL / t_ON・・・(6)

CEXT

ESL

ΔIL: Output ripple current

Co

ESR: Equivalent series resistance,

ESL: Equivalent series inductance

Output Capacitor

Please give due consideration to the conditions in formula (7) below for the output capacitor, bearing in mind that the

output start-up time must be established within the soft start timeframe. Capacitors used as bypass capacitors are

connected to the load side affect the overall output capacitance (C_EXT, figure above). Please set the soft start time or

over-current detection value, regarding these capacities.

T_SS: Soft start time

Limit : Over current detection

T_SSx (Limit- I_OUT

V_OUT

)

Co+C_EXT

≤

・・・(7)

Note: If an inappropriate capacitor is used, OCP may be detected during activation and may cause startup malfunctions.

3. Input Capacitor (Cin) Selection

The input capacitor selected must have low enough ESR to fully support high output

ripple so as to prevent extreme over current conditions. The formula for ripple current

IRMS is given in (8) below.

V_IN

Cin

√

V_OUT

V_OUT(V_IN-V_OUT

)

IRMS= I_OUT

x

[A]・・・(8)

L

V_IN

Co

IOUT

Where VIN= 2 x VOUT, IRMS=

2

Input Capacitor

A ceramic capacitor is recommended to reduce ESR loss and maximize efficiency.

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4.MOSFET Selection

High-side driver and Low-side driver are designed to activate N channel MOSFET’s

with low on-resistance.

The chosen MOSFET may result in the loss described below, please select a proper

FET for each considering the input-output and load current.

V_IN

High-side MOSFET

< Loss of High-side MOSFET >

Pmain= P_RON+P_TRAN

V_OUT

L

(Tr+Tf) x V_INx I_OUTx f

6

V_OUT

V_IN

Co

2

x R_ONx I_OUT

+

・・・(9)

=

PGND

(Ron: On-resistance of FET

f: Switching frequency

PGND

Low-side MONFET

Tr: Rise time, Tf: Fall time)

< Loss of Low-side MOSFET >

Psyn= PRON

V_IN-V_OUT

2

x RON x I_OUT

=

・・・(10)

V_IN

The High-side MOSFET generates loss when switching, along with the loss due to on-resistance.

Good efficiency is achieved by selecting a MOSFET with low on-resistance and low Qg (gate total charge amount).

Recommended MOSFETs for various current values are as follows:

Output current

to 5A

High-side MOSFET

RQ3E080GN

Low-side MOSFET

RQ3E100GN

5 to 8A

RQ3E120GN

RQ3E150GN

8 to 10A

RQ3E150GN

RQ3E180GN

5. Output Voltage Set Point

This IC operates such that output voltage is REF ≌ FB.

(R1+R2)

R2

1

2

(ΔV_OUT: Output ripple voltage)

V_OUT

=

x REF(0.7V)+

ΔV_OUT

(ΔI_L: ripple current of coil)

ΔV_OUT=ΔI_Lx ESR

ΔI_L=( V_IN- V_OUT) x

V_OUT

(L x V_INx f)

L: inductance[H] f: switching frequency[Hz]

*(Notice)Please set output ripple voltage more than 30mV to 50mV.

(Example) V_IN= 20V, V_OUT= 5V, f= 300kHz, L= 2.5µH, ESR= 20mΩ, R1= 56kΩ, R2= 9.1kΩ

5V

ΔI_L=(20V-5V) x

=5(A)

(2.5 x 10^-6H x 20V x 300 x 10³Hz)

ΔV_OUT=5A x 20 x 10^-3Ω= 0.1(V)

(51kΩ+ 9.1kΩ)

V_OUT= 0.7V x

1

2

+

x 0.1V=5.057(V)

9.1kΩ

V_IN

SLLM

R

S

Q

Output

voltage

H³REG

CONTROLLER

Driver

Circuit

REF

FB

R1

R2

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6. Setting over current protection

VIN

The on resistance (between SW and PGND) of the low side MOSFET is used

to set the over current protection.

Over current reference voltage (I_{LIM_ref}) is determined as in formula(11) below.

L

V_OUT

CO

10k

I_LIM_ref =

[A]・・・(11)

SW

R_ILIM[kΩ] x R_ON[mΩ]

(R_ILIM: Resistance for setting of over current voltage protection value[kΩ]

R_ON: Low-side on resistance value of FET[mΩ])

PGND

RILIM

Over current protection is actually determined by the formula (12) below.

1

ΔIL

I_LIM_ref +

I_ocp

=

2

1

2

Coil current

Vo

V_IN

V_IN- V_O

L

I

f

・・・(12)

x

I_LIM_ref +

=

I_OCP

ΔIL:Coil ripple current[A]

V_IN:Input voltage[V]

V_O:Output voltage [V]

f:Switching frequency [H_Z]

L:Inductance [H]

ILIM_ref

(Example)

If a load current 5A is desired with V_IN=6 to 19V, V_OUT=5V, f=400kHZ, L=2.5µH, RON=20mΩ, the formula would be:

10k

1

2

V_O

V_IN

I

f

V_IN– V_O

x

> 5

x

I_OCP=

+

RILIM[kΩ] ×RON[mΩ]

L

When V_IN= 6V, I_OCPwill be minimum(this is because the ripple current is also minimum) so that if each condition is

input, the formula will be the following: RILIM<109.1[kΩ].

*To design the actual board, please consider enough margin for FET on resistance variation, Inductance variation, IC

over current reference value variation, and frequency variation.

7. Relation between output voltage and t_ONtime

For BD95602MUV-LB, both channels, are high efficiency synchronous regulator controllers with variable frequency.

t_ONtime varies with Input voltage [V_IN], output voltage [V_OUT], and RFS of FS pin resistance.

See Figure 52 and Figure 53 for t_ONtime.

3.5

2.5

VIN=7V

VIN=12V

VIN=21V

VIN=7V

VIN=12V

VIN=21V

3

2.5

2

1.5

1

1.5

1

0.5

0

0.5

0

20

40

60

80

100

120

0

20

40

60

80

100

120

RFS[kΩ]

Figure55. RFS – ontime(V_OUT= 5V)

From t_ONtime, frequency on application condition is following:

Figure56. RFS – ontime(V_OUT= 3.3V)

V_OUT

V_IN

1

Frequency =

[kHz]・・・(13)

x

t_ON

However, real-life considerations (such as the external MOSFET gate capacitor and switching speed) must be

factored in as they affect the overall switching rise and fall time, so please confirm by experiment.

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Application Example (Vin= 12V, Vo1= 3.3V/8A, f1= 400kHz, Vo2= 2.5V/8A, f2= 400kHz)

R15

R25

16

15

14

13

12

11

10

9

R5

R6

ILIM1

ILIM2

VO2

SS2

17

18

19

20

21

22

23

24

8

7

6

5

4

3

2

1

MCTL1

SS1

C5

C6

PGOOD1

EN1

PGOOD2

EN2

^UU¹1

BD95602MUV

BD95602MUV-LB

EN_2.5

EN_3.3

BOOT1

HG1

BOOT2

HG2

L1

L2

2.5V

3.3V

SW1

SW2

25

26

27

28

29

30

31

32

GND PGND

Figure 57. Application Example

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Reference

Designator

Manufacturer

Part Number

Configuration

(mm)

Type

Value

Description

Manufacturer

C1, C9, C10,

C11, C12

Ceramic

Capacitor

Ceramic

Capacitor

Ceramic

Capacitor

Ceramic

Capacitor

10µF

35V, X5R, ±10%

16V, X5R, ±10%

GRM32ER6YA106KA12

GRM21BR61C106ME15

GRM155R61C104KA88

GRM188R61A474KA61

6TPE330MIL

MURATA

SANYO

ALPS

3225

2012

1005

1608

7343

6565

3333

C2, C3

C4, C5, C6

C7, C8

0.1µF 16V, X5R, ±10%

0.47µF 10V, X5R, ±10%

C18, C19,

C28, C29

6.3V, ±20%, ESR

330µF

POSCAP

Inductor

18mΩmax

±20%,10A(L=-30%),

DCR=5.8mΩ±10％

N-ch, Vdss 30V, Id 15A,

Ron 4.7mΩ

N-ch, Vdss 30V, Id 18A,

Ron 3.3mΩ

L1,L2

1µH

GLMC1R003A

Q1, Q3

Q2, Q4

MOSFET

-

RQ3E150GN

ROHM

-

RQ3E180GN

ROHM

R5, R6

R7, R8

R15

Resistor

IC

62kΩ 1/16W, 50V, 5%

51kΩ 1/16W, 50V, 5%

16kΩ 1/16W, 50V, 0.5%

4.3kΩ 1/16W, 50V, 0.5%

100Ω 1/16W, 50V, 5%

12kΩ 1/16W, 50V, 0.5%

4.7kΩ 1/16W, 50V, 0.5%

MCR01MZPJ623

MCR01MZPJ513

MCR01MZPD1602

MCR01MZPD4301

MCR01MZPJ101

MCR01MZPD1202

MCR01MZPD4701

BD95602MUV-LB

ROHM

1005

R16

1005

R24

1005

R25

1005

R26

1005

U1

-

Buck DC/DC Controller

VQFN032V5050

Without any ripple (about 10mV), there is a possibility that the FB signal is not stable due to the adoption of the comparator control method. Please ensure

enough ripple voltage either by (1)reducing the L-value of inductor, or (2)using high ESR output capacitor. Ripple voltage can be generated in FB terminal by

adding a capacitor in parallel to resistor (R17, R19) of the FB input, but the circuit will be sensitive to noise from the output (Vo1/Vo2) line and is not

recommended. Stability of the circuit is influenced by the layout of the PCB, please pay careful attention to the layout.

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Power Dissipation

[mW]

1000

74.2mm x 74.2mm x 1.6mm Glass-epoxy PCB

880mW

θj-a=142. °C /W

800

600

IC Only θj-a=328.9°C/W

380mW

400

200

[°C]

150

0

25

50

75 85

100

125

Ambient Temperature (Ta)

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I/O equivalence circuits

1, 24pin (SW2, SW1)

2, 23pin (HG2, HG1)

3, 22pin (BOOT2, BOOT1)

BOOT

HG

SW

4, 21pin (EN2, EN1)

5, 20pin (PGOOD2, PGOOD1)

6, 19pin (SS2, SS1)

REG1

50Ω

1MΩ

12pin (REF)

11, 14pin (FB2, FB1)

10, 15pin (FS2, FS1)

REG1

16, 18pin (MCTL2, MCTL 1)

9pin (CTL)

26, 31pin (LG1, LG2)

VIN

REG1

1MΩ

100kΩ

500kΩ

300kΩ

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I/O equivalence circuit(s) - continued

7, 27pin (Vo2, Vo1)

28pin (REG2)

29pin (REG1)

REG1

V_IN

50Ω

30pin (VIN)

8, 17pin (ILIM2, ILIM1)

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Operational Notes

1.

2.

Reverse Connection of Power Supply

Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when

connecting the power supply, such as mounting an external diode between the power supply and the IC’s power

supply pins.

Power Supply Lines

Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the

digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog

block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and

aging on the capacitance value when using electrolytic capacitors.

3.

4.

Ground Voltage

Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.

Ground Wiring Pattern

When using both small-signal and large-current ground traces, the two ground traces should be routed separately but

connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal

ground caused by large currents. Also ensure that the ground traces of external components do not cause variations

on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.

5.

Thermal Consideration

Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in

deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when

the IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum

rating, increase the board size and copper area to prevent exceeding the Pd rating.

6.

7.

Recommended Operating Conditions

These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.

The electrical characteristics are guaranteed under the conditions of each parameter.

Inrush Current

When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush

current may flow instantaneously due to the internal powering sequence and delays, especially if the IC

has more than one power supply. Therefore, give special consideration to power coupling capacitance,

power wiring, width of ground wiring, and routing of connections.

8.

9.

Operation Under Strong Electromagnetic Field

Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.

Testing on Application Boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may

subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply

should always be turned off completely before connecting or removing it from the test setup during the inspection

process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during

transport and storage.

10. Inter-pin Short and Mounting Errors

Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in

damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.

Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and

unintentional solder bridge deposited in between pins during assembly to name a few.

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Operational Notes – continued

11. Unused Input Pins

Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and

extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small

charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and

cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the

power supply or ground line.

12. Regarding the Input Pin of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them

isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a

parasitic diode or transistor. For example (refer to figure below):

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to

operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should

be avoided.

Resistor

Transistor (NPN)

Pin A

Pin B

B

E

C

Pin A

B

C

E

P

P⁺

N

P⁺

P

P⁺

N

Parasitic

Elements

Parasitic

Elements

P Substrate

GND GND

P Substrate

GND

Parasitic

Elements

Parasitic

Elements

N Region

close-by

Figure 58. Example of monolithic IC structure

13. Ceramic Capacitor

When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with

temperature and the decrease in nominal capacitance due to DC bias and others.

14. Area of Safe Operation (ASO)

Operate the IC such that the output voltage, output current, and power dissipation are all within the Area of Safe

Operation (ASO).

15. Thermal Shutdown Circuit(TSD)

This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always

be within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction

temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below

the TSD threshold, the circuits are automatically restored to normal operation.

Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no

circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from

heat damage.

16. Over Current Protection Circuit (OCP)

This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This

protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should

not be used in applications characterized by continuous operation or transitioning of the protection circuit.

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Ordering Information

B D 9

5

6

0

2 M U V -

L B E 2

Part Number

Package

Product class

Packaging and forming

MUV: VQFN

LB for Industrial specification

applications

E2: Embossed tape and reel

(packing quantity 2500pcs)

H2: Embossed tape and reel

(packing quantity 250pcs)

Marking Diagrams

VQFN032V5050

(TOP VIEW)

Part Number Marking

LOT Number

9 5 6 0 2 L

1PIN MARK

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Physical Dimension, Tape and Reel Information

Package Name

VQFN032V5050

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Revision History

Date

Revision

Changes

31.Oct.2014

26.Jun.2015

001

002

New Release

P.31 Change ‘’the description’’ of L1,L2

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Notice

Precaution on using ROHM Products

1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,

OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you

intend to use our Products in devices requiring extremely high reliability (such as medical equipment ^{(Note 1)}, transport

equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car

accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or

serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.

Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any

damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific

Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN

USA

EU

CHINA

CLASSⅢ

CLASSⅣ

CLASSⅡb

CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are designed and manufactured for use under standard conditions and not under any special or

extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any

special or extraordinary environments or conditions. If you intend to use our Products under any special or

extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of

product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of

flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning

residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in

the range that does not exceed the maximum junction temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must

be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,

please consult with the ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice-PGA-E

Rev.003

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign

trade act, please consult with ROHM in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data.

2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the

Products with other articles such as components, circuits, systems or external equipment (including software).

3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM

will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to

manufacture or sell products containing the Products, subject to the terms and conditions herein.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice-PGA-E

Rev.003


型号：	BD95602MUV-LB
厂家：	ROHM
描述：	本产品是面向工业设备市场的产品，保证可长期稳定供货。是适合这些用途的产品。BD95602MUV-LB是可在宽输入电压范围(5.5～28V)内通过大电流输出低输出电压(1.0V～5.5V)的2ch开关稳压控制器。可通过使用N-MOSFET外接开关晶体管，实现高效率的同步整流开关稳压器。采用罗姆独创的恒定时间控制模式升级版H3Reg™，可实现很快的瞬态响应特性。此外，为改善轻负载时的效率，采用SLLM™(Simple Light Load Mode)，可实现对大范围负载电流的高效率。具有2ch LDO(5V/3.3V (total 50mA))、软启动功能、频率可变功能、带计时锁存的短路保护电路功能、过电压保护功能、电源良好输出功能，适用于大电流用途。Power Supply Reference BoardFor Xilinx’s FPGA Spartan-7 开关控制器软启动晶体管稳压器
文件：	总42页 (文件大小：3332K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BD95602MUV-LB [ROHM]

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