BD9V101MUF-LB_技术文档

Datasheet

16V to 60V, 1A 1ch 2.1MHz

Synchronous Buck Converter Integrated FET

BD9V101MUF-LB

General Description

Key Specifications

This is the product guarantees long time support in

Industrial market.



Input Voltage Range:

Output Voltage Range:

Output Current:

Operating Frequency:

Reference Voltage Accuracy:

16V to 60V

0.8V to 5.5V

1A(Max)

1.9MHz to 2.3MHz

BD9V101MUF-LB is a current mode synchronous buck

converter integrating high voltage rating POWER

MOSFETs. The wide range input 16V to 60V and very

short minimum pulse width down to 20ns enables direct

conversion from 60V power supply to 3.3V at 2.1MHz

±2%

0µA(Typ)



Shutdown Circuit Current:

Operating Junction Temperature Range:

operation by Nano Pulse Control^TM

.

-40°C to +150°C

Features

Package

W(Typ) x D(Typ) x H(Max)

4.00mm x 4.00mm x 1.00mm



Nano Pulse Control^TMEnables Direct Conversion

VQFN24FV4040

60V to 3.3V at 2.1MHz

Long Time Support Product for Industrial

Applications.



SW Minimum ON Time 20ns(Max)

Synchronous Switching Regulator Integrating

POWER MOSFETs

Enlarged View



Soft Start Function

Current Mode Control

Over Current Protection

Input Under Voltage Lock Out Protection

Input Over Voltage Lock Out Protection

Thermal Shutdown Protection

Output Over Voltage Protection

Short Circuit Protection

VQFN24FV4040

Wettable Flank Package

Wettable Flank QFN Package

Applications

 Industrial Equipment

 Consumer Supplies

Typical Application Circuit

Figure 1. Application Circuit

Nano Pulse Control^TMis a trademark of ROHM Co., Ltd.

〇Product structure : Silicon monolithic integrated circuit 〇This product has no designed protection against radioactive rays

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Pin Configuration

(TOP VIEW)

Figure 2. Figure of Terminal Placement

Pin Description

Pin No.

Pin Name

Function

Enable pin. Apply Low-level (0.8V or lower) to turn this device off.

Apply High-level (2.5V or higher) to turn this device on.

1

EN

Power supply input pin of the internal circuitry.

Connect this pin to PVIN.

2

VIN

Power supply input pins that are used for the output stage of the switching regulator.

Connecting input ceramic capacitors with values of 2.2µF and 0.1µF to this pin is

recommended.

3 to 6

PVIN

7 to 10

11,12

PGND

N.C.

Power GND input pins.

No connection pins. Leave these pins open, or connect PGND pin.

Switching node pins. These pins are connected to the source of the internal the Top

POWER MOSFET and the drain of the internal Bottom side POWER MOSFET.

Connect the power inductor and the bootstrap capacitor 0.022µF and resistor 3.3Ω to

these pins.

13,14

15

SW

Power supply pin of the internal the Top POWER MOSFET. Connect a 3.3Ω resistor to

this pin in series with a 0.022µF bootstrap capacitor connected to SW pin.

This capacitor’s voltage becomes the power supply of the Top POWER MOSFET gate

driver.

BST

16

17

N.C.

No connection pin. Leave this pin open.

Internal power supply output pin. This node supplies power 5V(Typ) to other blocks

which are mainly responsible for the control function of the switching regulator.

Connect a ceramic capacitor with value of 2.2µF to ground.

VREGH

Power Good pin. This pin is in open drain configuration so pull-up resistor is needed to

turn it HIGH or LOW.

18

19

PGOOD

RT

This pin is used for setting the switching frequency. Connect a frequency setting

resistor between this pin and GND pin.

Output of the gm error amplifier, and the input of PWM comparator. Connect phase

compensation components to this pin. See page 23 on calculate the resistance and

capacitance of phase compensation.

20

21

22

COMP

GND

FB

Ground pin.

V_OUTvoltage feedback pin. Inverting input node for the gm error amplifier. Connect

output voltage divider to this pin to set the output voltage. See page 22 on how to

compute for the resistor values.

Short Circuit Protection threshold detect pin. This node is monitoring the output voltage

and discharging it during shutdown.

23

24

-

VMON

N.C.

No connection pin. Leave this pin open.

Exposed pad. Connect this pad to the internal PCB ground plane using multiple via

holes to obtain excellent heat dissipation characteristics.

E-PAD

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Block Diagram

Figure 3. Block Diagram

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Description of Blocks

- ERRAMP

The ERRAMP block is an error amplifier and its inputs are the reference voltage 0.8V(Typ) and the FB pin voltage. The

duty of switching pulse is controlled by ERRAMP output COMP. Set output voltage with FB pin. Moreover, the external

resistor and capacitor are required to COMP pin as phase compensation circuit (refer to SelectionofthePhaseCompensation

Circuit R_COMP, C_COMPon page 23).

- Soft Start

The Soft Start block prevents the overshoot of the output voltage by gradually increasing the input of the error amplifier

when the power supply turns ON to gradually increase the switching duty cycle. The soft start time is set to 1.1ms

(f_SW=2.1MHz). The soft start time can be changed by adjusting the oscillating frequency (refer to SoftStart Time on page 24).

- EN

This IC is in normal operation when the voltage at EN terminal is 2.5V or more. The IC will be shutdown when the voltage

at EN terminal becomes open or 0.8V or less.

- VREGH

This block outputs a regulated 5V(Typ) and supplies it to different blocks in the chip. Connect 2.2µF ceramic capacitor to

GND.

- OSC (Oscillator)

This circuit generates a clock signal that determines converter switching frequency which is 1.9MHz to 2.3MHz. The

frequency of the clock can be set by a resistor connected between the RT pin and the GND pin (refer to page 24 Figure

38). The OSC output send the clock signal to PWM Logic. This clock is also used to set the Soft Start time and Protect

block counter.

- SLOPE

This block generates a sawtooth waveform from OSC clock. The inductor current feedback is added to the sawtooth signal.

- PWM COMP

This block modulates duty cycle by comparing the COMP pin voltage and the sawtooth signal from the SLOPE block.

- PWM Logic

The PWM Logic block controls the POWER MOSFETs ON and OFF timings. In normal operation, the clock signal from

OSC block determines the Top POWER MOSFET ON timing, and the PWM COMP block output determines the OFF timing.

In addition, each protection output signal is passed to the PWM Logic and it controls proper protection functions.

- TSD (Thermal Shutdown)

This block is a thermal shutdown circuit. Both of the output MOSFETs are turned OFF and the VREGH is stopped to prevent

thermal damage or a thermal-runaway of the IC when the chip temperature reaches to approximately 175°C(Typ) or more,

and the operation comes back when the chip temperature comes down to 150°C(Typ) or less. Note that the thermal

shutdown circuit is intended to prevent destruction of the IC itself. Therefore, it is highly recommended to keep the IC

temperature always within the operating temperature range. Operation above operating temperature range will reduce the

lifetime of the IC.

- OCP (Over Current Protection)

While the Bottom POWER MOSFET is ON, if the voltage between the drain and source exceeds the reference voltage

which is internally set within IC, OCP will activate. This protection is a self-return type. This protection circuit is effective in

preventing damage due to sudden and unexpected incidents. However, the IC should not be used in applications

characterized by continuous operation of the protection circuit (e.g. when a load that significantly exceeds the output current

capability of the chip is connected).

- OVP (Over Voltage Protection)

This is the output over voltage protection circuit. When the output becomes 120%(Typ) or more of the target voltage, both

of the output MOSFETs are turned OFF and the regulator operation is stopped. When the output voltage becomes

110%(Typ) or less of the target voltage, it returns to normal operation.

- UVLO (Under Voltage Lock-Out)

UVLO is a protection circuit that prevents low voltage malfunction, especially during power up and down. It monitors the

V_INpower supply voltage. If V_INbecomes 15.0V(Max) or less, both of the output MOSFETs are turned OFF and the regulator

operation is stopped. When the input voltage becomes 16.0V(Max) or more, the regulator restarts the operation with Soft

Start.

- DRIVER

This circuit drives the gate of the output POWER MOSFETs.

- OVLO (Over Voltage Lock-Out)

This is the input over voltage protection circuit. When the input voltage becomes 60.0V(Min) or more, the regulator is

shutdown. When the input voltage becomes 59.0V(Min) or less the falling threshold, the regulator restarts the operation

with SOFT START. This hysteresis is 1.0V(Typ).

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Description of Blocks - continued

- PGD

The PGOOD circuit is a reference voltage monitoring circuit. The PGOOD pin sets to Hi-Z when the FB voltage is 90%(Typ)

or more and 110%(Typ) or less of reference voltage, otherwise the PGOOD pin is pulled down to GND. PGOOD detection

has a hysteresis of 20mV(Typ) for each of the upper and lower thresholds.

- SCP (Short Circuit Protection)

The short circuit protection circuit. Depending on the level of the VIN terminal voltage and VMON terminal voltage, a

reference pulse signal with varying ON time will be produced. If the SW ON time exceeds 2.5times(Typ) the ON time of this

reference pulse signal for 2clk cycles, short circuit protection will be activated. Then the Top and Bottom POWER MOSFETs

will be turned OFF.

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Absolute Maximum Ratings (Tj=25°C)

Parameter

Symbol

Rating

Unit

Supply Voltage

V_IN, PV_IN

V_EN

-0.3 to +70

-0.3 to V_IN

V

EN Input Voltage

BST Voltage

V_BST

-0.3 to +70

Voltage from SW to BST

ΔV_BST

V_SW-0.3 to V_SW+ 7

V_FB,V_RT,

V_COMP,

FB, RT, COMP, PGOOD Input Voltage

-0.3 to +7

V

V_PGOOD

VMON Input Voltage

V_VMON

V_VREGH

Tstg

-0.3 to +7

-55 to +150

150

V

VREGH Input Voltage

Storage Temperature Range

Maximum Junction Temperature

˚C

Tjmax

Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit

between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is

operated over the absolute maximum ratings.

Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the

properties of the chip. In case of exceeding this absolute maximum rating, increase the board size and copper area to prevent exceeding the maximum

junction temperature rating.

Thermal Resistance^{(Note 1)}

Thermal Resistance(Typ)

Parameter

Symbol

Unit

1s^{(Note 3)}

2s2p^{(Note 4)}

VQFN24FV4040

Junction to Ambient

Junction to Top Characterization Parameter^{(Note 2)}

θ_JA

150.6

20

37.9

9

°C/W

Ψ_JT

(Note 1) Based on JESD51-2A (Still-Air)

(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside

surface of the component package.

(Note 3) Using a PCB board based on JESD51-3.

Layer Number of

Measurement Board

Material

FR-4

Board Size

Single

114.3mm x 76.2mm x 1.57mmt

Top

Copper Pattern

Thickness

Footprints and Traces

70μm

(Note 4) Using a PCB board based on JESD51-5, 7.

Thermal Via^{(Note 5)}

Layer Number of

Material

Board Size

114.3mm x 76.2mm x 1.6mmt

2 Internal Layers

Measurement Board

Pitch

Diameter

4 Layers

FR-4

1.20mm

Φ0.30mm

Top

Bottom

Copper Pattern

Thickness

Copper Pattern

Thickness

Copper Pattern

Thickness

70μm

Footprints and Traces

70μm

74.2mm x 74.2mm

35μm

74.2mm x 74.2mm

(Note 5) This thermal via connects with the copper pattern of all layers.

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Recommended Operating Conditions

Parameter

Symbol

Min

Typ

Max

Unit

V_IN

Tjopr

V_OUT

t_ONMIN

I_OUT

f_SW

16

-40

0.8

-

60

+150

5.5

20

V

˚C

V

Power Supply Voltage

Operating Junction Temperature

Output Voltage

-

SW Minimum ON Time^{(Note 1)}

9

ns

A

0

-

1

Output Current

1.9

1.2

6.9

2.1

-

2.3

-

MHz

µF

kΩ

Switching Frequency

Input Capacitor^{(Note 2)}

C_IN

R_RT

7.5

8.1

Switching Frequency Setting Resistor

(Note 1) This parameter is for 0.5A output. Not 100% tested.

(Note 2) Ceramic capacitor is recommended. The capacitor value including temperature change, DC bias change, and aging change must be larger than

minimum value (Refer to Selection of Input Capacitor CIN, CBLK on page 22). Also, the IC might not function properly when the PCB layout or the

position of the capacitor is not good. Please check PCB Layout Design on page 30.

Electrical Characteristics (Unless otherwise specified Tj=25˚C, V_IN=48V, V_EN=5V)

Parameter

Symbol

Min

Typ

Max

Unit

Conditions

Shutdown Circuit Current

Circuit Current

I_SDN

I_CC

-

0

2.5

0.800

0

5

3.8

µA

mA

V

V_EN=0V, Tj=105˚C

V_FB=2.0V

Reference Voltage

V_FB

0.784

-1

0.816

+1

V_FB=V_COMP

FB Input Current

I_FB

µA

ms

mΩ

V_FB=5.0V

COMP Pin Sink Current

COMP Pin Source Current

Soft Start Time^(Note1)

I_CPSINK

I_CPSOURCE

t_SS

35

-85

0.7

-

60

85

V_COMP=1.0V, V_FB=2V

V_COMP=1.0V, V_FB=0V

f_SW=2.1MHz, R_RT=7.5kΩ

I_OUT=-50mA

-60

1.1

600

400

-35

1.5

Top Power NMOS ON Resistance

Bottom Power NMOS ON Resistance

R_ONH

R_ONL

900

600

-

I_OUT=50mA

V_IN=70V, V_EN=0V

Tj=105˚C, V_SW=0V

Output Leak Current H

Output Leak Current L

I_OLEAKH

I_OLEAKL

I_SW

-5

0

+5

µA

A

V_IN=70V, V_EN=0V

Tj=105˚C, V_SW=70V

Operating Output Switch Current of

Overcurrent Protection

1.5

2.4

3.3

Oscillating Frequency

EN Threshold Voltage H

EN Threshold Voltage L

EN Input Current

f_SW

V_ENH

V_ENL

I_EN

1.9

2.5

0

2.1

-

2.3

V_IN

0.8

20

MHz R_RT=7.5kΩ

V

-

8.5

µA

V

V_EN=5V

VIN Under Voltage Protection

Detection Voltage

V_{UV_ON}

V_{UV_OFF}

V_{OV_ON}

V_{OV_OFF}

12.5

13.5

60.0

59.0

13.7

14.7

62.5

61.5

15.0

16.0

65.0

64.0

V_INFalling

VIN Under Voltage Protection

Return Voltage

V

V_INRising

V_INFalling

VIN Over Voltage Protection

Detection Voltage

VIN Over Voltage Protection

Return Voltage

OVP Threshold Voltage H

OVP Threshold Voltage L

V_OVPH

V_OVPL

0.87

0.83

0.96

0.92

1.05

1.01

V

V_FBRising

V_FBFalling

V_FB

x 0.82

V_FB

x 0.90

V_FB

x 0.98

PGOOD L Threshold

PGOOD L Hysteresis

PGOOD H Threshold

V_PGDL

V_PGDLH

V_PGDH

V

mV

V

V_FBFalling

4

20

40

V_FB

x 1.02

V_FB

x 1.10

V_FB

x 1.18

V_FBRising

PGOOD H Hysteresis

PGOOD ON Resistance

PGOOD Leak Current

V_PGDHL

R_PGD

I_PGD

-40

-20

0.22

0

-4

1

mV

kΩ

µA

-

I_PGOOD=10mA

V_PGOOD=5V

1

(Note 1) V_FBtransient time from 0.1V to 0.7V.

(Note 2) Not 100% tested.

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Typical Performance Curves

0.815

0.81

30

25

20

15

10

5

0.805

0.8

0.795

0.79

0.785

0

-50

0

50

100

150

0

200

400

600

800

1000

Ambient Temperature : Ta [˚C]

Output Current : I_OUT[mA]

Figure 4. SW Minimum ON Time vs Output Current

Figure 5. Reference Voltage vs Ambient Temperature

2.25

2.2

100

90

80

70

60

50

2.15

2.1

2.05

2

40

30

20

10

0

V_IN=48V

1.95

1.9

V_IN=24V

V_IN=16V

1.85

0

0.2

0.4

0.6

0.8

1

-50

0

50

100

150

Output Current : I_OUT[A]

Ambient Temperature : Ta [˚C]

Figure 6. Oscillating Frequency vs Ambient Temperature

Figure 7. Efficiency vs Output Current

(V_OUT=5.5V, f_SW=1.9MHz)

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Typical Performance Curves - continued

1

0.75

0.5

1

0.75

0.5

0.25

0

0.25

0

-0.25

-0.5

-0.75

-1

-0.25

-0.5

-0.75

-1

16

27

38

49

60

0

200

400

600

800

1000

Power SupplyVoltage : V [V]

IN

Output Current : I_OUT[mA]

Figure 8. Load Regulation

(V_IN=48V, V_OUT=5V)

Figure 9. Line Regulation

(V_OUT=5V, I_OUT=500mA)

4

3.5

3

9

8

7

6

5

4

3

2

1

0

Ta=+125˚C

2.5

2

Ta=+25˚C

Ta=+125˚C

1.5

1

Ta=-40 ˚C, +25˚C

Ta=-40˚C

0.5

0

16

27

38

49

60

16

27

38

49

60

Power SupplyVoltage : V [V]

IN

Power SupplyVoltage : V_IN[V]

Figure 10. Shutdown Circuit Current vs

Power Supply Voltage (V_EN=0V)

Figure 11. Circuit Current vs Power Supply Voltage

(V_EN=V_IN, No Switching)

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Typical Performance Curves - continued

V_IN(20V/div)

V_EN(20V/div)

V_OUT(2V/div)

V_SW(20V/div)

V_OUT(2V/div)

V_SW(20V/div)

Time (1s/div)

Time (500µs/div)

Figure 12. Startup Waveform

(V_IN=48V, V_OUT=5V, I_OUT=0.5A)

Figure 13. Startup and Shutdown Waveform

(V_IN=0V ↔ 70V, V_OUT=5V, I_OUT=0.5A)

V_OUT(2V/div)

V_SW(10V/div)

Time (50ms/div)

V_SW(10V/div)

Figure 14. V_OUTShort and Release Waveform

(V_IN=48V)

Figure 15. SW Short and Release Waveform

(V_IN=48V)

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Typical Performance Curves - continued

3

2.5

2

350

300

Ta=+125˚C

250

Ta=+25˚C

200

1.5

1

Ta=-40˚C

150

100

50

0

0.5

0

-50

0

50

100

150

0

20

40

60

80

Ambient Temperature : Ta[˚C]

EN Input Voltage : V_EN[V]

Figure 16. EN Input Current vs EN Input Voltage

Figure 17. Operating Output Switching Current of Over

Current Protection vs Ambient Temperature

(V_IN=48V, V_OUT=5V)

900

800

700

600

500

400

300

200

100

0

800

700

600

500

400

300

200

100

0

-50

0

50

100

150

-50

0

50

100

150

Ambient Temperature : Ta[˚C]

Figure 18. Top Power NMOS ON Resistance vs

Ambient Temperature

Figure 19. Bottom Power NMOS ON Resistance vs

Ambient Temperature

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Typical Performance Curves - continued

5

4.5

4

3

2.5

2

3.5

3

1.5

1

2.5

2

Ta=+125˚C

Ta=-40˚C, +25˚C

1.5

1

0.5

0

0.5

0

-50

0

50

100

150

0

20

40

60

80

Ambient Temperature : Ta[˚C]

Power SupplyVoltage : V [V]

IN

Figure 20. EN Threshold Voltage H vs Ambient Temperature

(V_IN=48V, V_OUT=5V)

Figure 21. Output Leak Current H vs

Power Supply Voltage

(EN=0V, SW=V_IN)

5

4.5

4

500

450

400

350

300

250

200

150

100

50

3.5

3

2.5

2

1.5

Ta=+125˚C

1

Ta=-40˚C, +25˚C

0.5

0

-50

0

50

100

150

0

20

40

60

80

Ambient Temperature : Ta[˚C]

Power SupplyVoltage : V [V]

IN

Figure 22. Output Leak Current L vs Power Supply Voltage

(EN=0V, SW=GND)

Figure 23. PGOOD ON Resistance vs Ambient Temperature

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Function Explanation

1. Nano Pulse Control^TM

Nano Pulse Control^TMis an original technology developed by ROHM Co., Ltd. It enables to control voltage stably, which

is difficult in the conventional technology, even in a narrow SW ON Pulse such as less than 50ns at typical condition.

Therefore, high frequency switching operation become possible. BD9V101MUF-LB is designed with 9ns(Typ) Minimum

SW ON time for current sense and 2.1MHz(Typ) switching frequency by using this technology.

(1) High V_INLow V_OUTOperation

Narrow SW ON Pulse enables direct convert of high output voltage to low output voltage. BD9V101MUF-LB, the

output voltage V_OUT3.3V can be output directly from the supply voltage V_IN60V at 2.1MHz.

V_IN(10V/div) = 60V

V_SW(10V/div)

f_SW2.1MHz

V_OUT(10V/div) = 3.3V

Time (100ns/div)

Figure 24. Switching Waveform

(V_IN=60V, V_OUT=3.3V, I_OUT=0.5A, f_SW=2.1MHz)

Figure 25. V_INV_OUTWaveform

(V_IN=60V, V_OUT=3.3V, I_OUT=0.5A, f_SW=2.1MHz)

(2) Stable Startup Waveform

Narrow SW ON Pulse enables stable output waveform even at startup. BD9V101MUF-LB achieves a stable Soft

Start operation under wide input voltage conditions.

V_EN(20V/div)

V_SW(20V/div)

V_OUT(1V/div)

V_SW(20V/div)

V_OUT(1V/div)

Time (500µs/div)

Figure 26. Startup Waveform

(V_IN=16V, V_OUT=3.3V, I_OUT=0.5A, f_SW=2.1MHz)

Figure 27. Startup Waveform

(V_IN=60V, V_OUT=3.3V, I_OUT=0.5A, f_SW=2.1MHz)

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Function Explanation - continued

2. Enable Operation

Shutdown and startup of the IC can be controlled by the voltage applied to the EN pin. When EN voltage reaches

2.5V(Max) or more, the internal VREGH activates and the IC operates. When an EN voltage become 0.8V(Max) or less,

the IC will be shutdown.

Figure 28. Enable ON/OFF Timing Chart

3. Power Good

When the output voltage is within the voltage range of ±10%(Typ), the PGOOD pin set Hi-Z. When the output voltage is

outside the voltage range of ±10%(Typ), the PGOOD pin is pulled down with a built-in MOSFET of 0.22kΩ(Typ). Pull up

the PGOOD pin to VREGH with a resistor of about 10kΩ to 100kΩ.

Figure 29. PGOOD Timing Chart

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Protect function

1. Under Voltage Lockout (UVLO)

Under Voltage Lockout monitors the VIN terminal voltages. When the VIN voltage is at 15.0V(Max) or less, both of the

output MOSFETs are turned OFF and the regulator operation is stopped. When the input voltage becomes 16.0V(Max)

or more, the regulator restarts the operation with Soft Start.

Figure 30. UVLO Timing Chart

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Protect function - continued

2. Short Circuit Protection(SCP)

The Short Circuit Protection function produces a reference pulse that has an ON time derived from V_INand V_OUT. This

reference pulse’s ON time is compared to the SW ON time. If the SW ON time exceeds 2.5times(Typ) of the expected

SW ON time, and remains in that state for 2clk (clk = 1/f_SW) cycles, it will stop both of the output MOSFETs for 32ms(Typ)

and then restarts again. This protection circuit is effective in preventing damage due to sudden and unexpected incidents.

However, the IC should not be used in applications characterized by continuous operation of the protection circuit (e.g.

when a load that significantly exceeds the output current capability of the chip is connected).

The assumed SW ON Time is obtained from the following formula:

1

푉

푂푈푇

푡_{푝푢푙푠푒}

=

×

[μs]

2.1[MHz]

푉

퐼푁

1

푉

푡_{푝푢푙푠푒_푐푙푎푚푝}

=

×

^푂푈푇× ꢀ.5 [μs]

2.1[MHz]

푉

퐼푁

Figure31. SCP Timing Chart

3. Thermal Shutdown(TSD)

When the chip temperature exceeds Tj=175°C(Typ), both of the output MOSFETs are turned OFF and the VREGH is

stopped. The operation comes back when the chip temperature comes down to 150°C(Typ) or less. TSD prevents the

IC from thermal runaway under abnormal conditions exceeding Tjmax=150°C. The TSD circuit operates in a situation

that exceeds the absolute maximum ratings and therefore, under no circumstances should the TSD circuit be used in a

set design or for any purpose other than protecting the IC from heat damage.

Figure 32. TSD Timing Chart

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Protect function - continued

4. Over Current Protection (OCP)

Over Current Protection detects the lower limit value of the inductor current. The OCP is designed at 2.4A(Typ). This

circuit prevents the Top POWER MOSFET from turning ON until the inductor current I_Lfalls below the OCP limit I_SW. If

OCP is detected 8times in 30µs(Typ), operation stops for 32ms(Typ) and then restarts again. This protection circuit is

effective in preventing damage due to sudden and unexpected incidents. However, the IC should not be used in

applications characterized by continuous operation of the protection circuit (e.g. when a load that significantly exceeds

the output current capability of the chip is connected).

Figure 33. OCP Timing Chart

5. Over Voltage Protection (OVP)

Over Voltage Protection compares the feedback voltage with an internal reference voltage. When the feedback voltage

exceeds 0.96V(Typ) or more, the Top and Bottom POWER MOSFETs will turn OFF. When the output voltage decreases

to a value of 0.92V(Typ) or less, it goes back to normal operation.

Figure 34. OVP Timing Chart

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Protect function - continued

6. Over Voltage Lockout(OVLO)

Over Voltage Lockout monitors the VIN terminal voltage. When the VIN voltage is 60.0V(Min) or more, the chip will be

on standby mode, and when the VIN voltage is 59.0V(Min) or less, the chip will startup again.

Figure 35. OVLO Timing Chart

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Selection of Components Externally Connected

Contact us if not use the recommended constant in the application circuit.

Necessary parameters in designing the power supply are as follows:

Table 1. Application Specification

Parameter

Input Voltage

Symbol

V_IN

Specification Case

16V to 60V

Output Voltage

V_OUT

ΔV_P-P

I_OUT

5.0V

Output Ripple Voltage

Output Current

20mV_p-p

Min 0.1A / Typ 0.5A / Max 1.0A

2.1MHz

Switching Frequency

Operating Junction Temperature

f_SW

Tjopr

-40°C to +150°C

Figure 36. Application Sample Circuit

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Selection of Components Externally Connected - continued

1. Selection of the inductor L_Xvalue

Role of the coil in the switching regulator is that it also serves as a filter for smoothing the output voltage to supply a

continuous current to the load. The Inductor ripple current ΔI_Lthat flows to the inductor becomes small when an inductor

with a large inductance value is selected. Consequently, the voltage of the output ripple ΔV_P-Palso becomes small. It is

the trade-off between the size and the cost of the inductor.

The inductance of the inductor is shown in the following equation:

(푉

−푉

)×푉

퐼푁(푀ꢁ푥)

푂푈푇 푂푈푇

퐿 =

[H]

푉

×푓 ×∆ꢂ

푆푊 ꢃ

퐼푁(푀ꢁ푥)

Where:

ꢄ

is the maximum input voltage

ꢂꢅ (ꢆ푎ꢇ)

ꢄ_ꢈꢉꢊ

is the output voltage

ꢋ

훥ꢎ_ꢏ

is the switching frequency

is the peak to peak inductor current

ꢌꢍ

In current mode control, sub-harmonic oscillation may happen. The slope compensation circuit is integrated into the IC

in order to prevent sub-harmonic oscillation. The sub-harmonic oscillation depends on the rate of increase of output

switch current. If the inductor value is too small, the sub-harmonic oscillation may happen because the inductor ripple

current ΔI_Lis increased. And if the inductor value is too large, the feedback loop may not achieve stability because the

inductor ripple current ΔI_Lis decreased. Therefore, use an inductor value of the coil within the range of 3.3µH to 10µH.

The smaller the ΔI_L, the smaller the Inductor core loss (iron loss), and the smaller is the loss due to ESR of the output

capacitor. In effect, ΔV_P-P(Output peak-to-peak ripple voltage) will be reduced. ΔV_P-Pis shown in the following equation.

∆ꢂ

ꢃ

∆ꢄ_푃−푃= ∆ꢎ_ꢏ× 퐸ꢐ푅 + _8×퐶

[V]

(a)

×푓

푂푈푇

푆푊

Where:

퐸ꢐ푅

ꢑ_ꢈꢉꢊ

훥ꢎ_ꢏ

is the equivalent series resistance of the output capacitor

is the output capacitance

is the peak to peak inductor current

is the switching frequency

ꢋ

ꢌꢍ

Generally, even if ΔI_Lis somewhat large, the ΔV_P-Ptarget is satisfied because the ceramic capacitor has a very-low ESR.

It also contributes to the miniaturization of the application board. Also, because of the lower rated current, smaller inductor

is possible since the inductance is small. The disadvantages are increase in core losses in the inductor and the decrease

in maximum output current. When other capacitors (electrolytic capacitor, tantalum capacitor, and electro conductive

polymer etc.) are used for output capacitor C_OUT, check the ESR from the manufacturer's data sheet and determine the

ΔI_Lto fit within the acceptable range of ΔV_P-P. Especially in the case of electrolytic capacitor, because the decrease in

capacitance at low temperatures is significantly large, this will make ΔV_P-Pincrease. When using capacitor at low

temperature, this is an important consideration.

The shielded type (closed magnetic circuit type) is the recommended type of inductor to be used. Please note that

magnetic saturation may occur. It is important not to saturate the core in all cases. Precautions must be taken into account

on the given provisions of the current rating because it differs on every manufacturer. Please confirm the rated current

at maximum ambient temperature of application to the manufacturer.

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Selection of Components Externally Connected - continued

2. Selection of Output Capacitor C_OUT

The output capacitor is selected based on the ESR that is required from the equation (a). ΔV_P-Pcan be reduced by using

a capacitor with a small ESR. The ceramic capacitor is the best option that meets this requirement. It is because not only

does it has a small ESR but the ceramic capacitor also contributes to the size reduction of the application circuit. Please

confirm the frequency characteristics of ESR from the datasheet of the manufacturer, and consider a low ESR value for

the switching frequency being used. It is necessary to consider the ceramic capacitor because the DC biasing

characteristic is important. For the voltage rating of the ceramic capacitor, twice or more than the maximum output voltage

is usually required. By selecting a high voltage rating, it is possible to reduce the influence of DC bias characteristics.

Moreover, in order to maintain good temperature characteristics, the one with the characteristics of X7R or better is

recommended. Because the voltage rating of a large ceramic capacitor is low, the selection becomes difficult for an

application with high output voltage. In that case, please connect multiple ceramic capacitors in series or select

electrolytic capacitor. Consider having a voltage rating of 1.2 times or more of the output voltage when using electrolytic

capacitor. Electrolytic capacitors have a high voltage rating, large capacitance, small amount of DC biasing

characteristics, and are generally reasonable. Since the electrolytic capacitor is usually OPEN when it fails, it is effective

to use for applications when reliability is required. But there are disadvantages such as, ESR is relatively high, and

decreases capacitance value at low temperatures. In this case, please take note that ΔV_P-Pmay increase at low

temperature conditions. Moreover, consider the lifetime characteristic of this capacitor because it has a possibility to dry

up. A tantalum capacitor and a conductive polymer hybrid capacitor have excellent temperature characteristics unlike

the electrolytic capacitor. Moreover, since their ESR is smaller than an electrolytic capacitor, the ripple voltage is

relatively-small over a wide temperature range. Since these capacitors have almost no DC bias characteristics, design

will be easier. Regarding voltage rating, the tantalum capacitor is selected such that its capacitance is twice the value of

the output voltage, and for the conductive polymer hybrid capacitor, it is selected such that the voltage rating is 1.2 times

the value of the output voltage. The disadvantage of a tantalum capacitor is that it is SHORTED when it is destroyed,

and its breakdown voltage is low. It is not generally selected in an application that reliability is a demand. An electro

conductive polymer hybrid capacitor is OPEN when destroyed. Though it is effective for reliability, its disadvantage is

that it is generally expensive.

To improve the performance of ripple voltage in this condition, following is recommended:

1. Use low ESR capacitor like ceramic or conductive polymer hybrid capacitor.

2. Use a capacitor C_OUTwith a higher capacitance value.

These capacitors are rated in ripple current. The RMS values of the ripple current that can be obtained in the following

equation must not exceed the ripple current rating.

∆ꢂ

ꢃ

ꢎ_{퐶ꢈ(ꢒꢆꢌ)}

=

[A]

12

√

Where:

ꢎ_{퐶ꢈ(ꢒꢆꢌ)}is the value of the ripple electric current

is the peak to peak inductor current

∆ꢎ_ꢏ

In addition, for the total value of capacitance in the output line C_OUT(Max), choose a capacitance value less than the

value obtained by the following equation:

ꢓ

×(ꢂ

−ꢂ

)

푆푊푆푇퐴ꢔ푇 푀ꢁ푥

푆푆(푀푖푛)

푆푊(푀푖푛)

(

ꢑ_{ꢈꢉꢊ(ꢆ푎ꢇ)}

<

[F]

푉

푂푈푇

Where:

ꢎ_{ꢌꢍ(ꢆꢕꢖ)}

푡_{ꢌꢌ(ꢆꢕꢖ)}

ꢎ_{ꢌꢍꢌꢊꢗꢒꢊ(ꢆ푎ꢇ)}

ꢄ_ꢈꢉꢊ

is the OCP operation switch current (Min)

is the Soft Start Time (Min)

is the maximum output current during startup

is the output voltage

Startup failure may happen if the limits from the above-mentioned are exceeded. Especially if the capacitance value is

extremely large, over-current protection may be activated by the inrush current at startup preventing the output to turn

on. Please confirm this on the actual application. For stable transient response, the loop is dependent to C_OUT. Please

select after confirming the setting of the phase compensation circuit.

Also, in case of large changing input voltage and load current, select the capacitance accordingly by verifying that the

actual application setup meets the required specification.

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Selection of Components Externally Connected - continued

3. Selection of Input Capacitor C_IN, C_BLK

The input capacitor is usually required for two types of decoupling: capacitors C_INand bulk capacitors C_BLK. Ceramic

capacitors with values more than 1.2µF are necessary for the decoupling capacitor C_IN. Ceramic capacitors are effective

by placing it as close as possible to the VIN pin. The voltage rating of the capacitors is recommended to be more than

1.2 times the maximum input voltage, or twice the normal input voltage. The capacitor value including device variation,

temperature change, DC bias change, and aging change must be larger than minimum value. Also, the IC might not

operate properly when the PCB layout or the position of the capacitor is not good. Please check “Notes on the PCB

Layout” on page 30.

The bulk capacitor is optional. The bulk capacitor prevents the decrease in the line voltage and serves as a backup

power supply to keep the input voltage constant. A low ESR electrolytic capacitor with large capacitance is suitable for

the bulk capacitor. It is necessary to select the best capacitance value for each set of application. In that case, please

take note not to exceed the rated ripple current of the capacitor.

The RMS value of the input ripple current I_CIN(RMS)is obtained in the following equation:

푉

푂푈푇

×(푉 −푉

)

ꢘ

퐼푁

푂푈푇

ꢎ_{퐶ꢂꢅ(ꢒꢆꢌ)}= ꢎ_{ꢈꢉꢊ(ꢆꢗ푋)}

×

[A]

푉

퐼푁

Where:

ꢎ_{ꢈꢉꢊ(ꢆꢗ푋)}is the maximum output current.

In addition, applications requiring high reliability, it is recommended to connect the capacitors in parallel to accommodate

multiple electrolytic capacitors and minimize the chances of drying up. For ceramic capacitors, it is recommended to

make two series + two parallel structures to decrease the risk of capacitor destruction due to short circuit conditions.

When the impedance on the input side is high for some reason (because the wiring from the power supply to VIN is long,

etc.), then high capacitance is needed. In actual conditions, it is necessary to verify that there are no problems like IC

turns off, or the output overshoots due to the change in V_INat transient response.

4. Selection of Output Voltage Setting Resistance R_FB1, R_FB2

The output voltage is described by the following equation:

ꢛꢒ

ꢄ_ꢈ= 0.ꢙ × ^ꢒ

[V]

퐹퐵ꢚ

퐹퐵ꢜ

ꢒ

퐹퐵ꢜ

Power efficiency is reduced with a small R_FB1+ R_FB2, please set the current flowing through the feedback resistors as

small as possible in comparison to the output current I_OUT

.

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Selection of Components Externally Connected - continued

5. Selection of the Phase Compensation Circuit R_COMP, C_COMP

A good high frequency response performance is achieved by setting the 0dB crossing frequency, fc, (frequency at 0dB

gain) high. However, you need to be aware of the trade-off correlation between speed and stability. Moreover, DC / DC

converter application is sampled by switching frequency, so the gain of this switching frequency must be suppressed. It

is necessary to set the 0dB crossing frequency to 80kHz or less of the switching frequency. In general, target these

characteristics as follows:

- At 0dB crossing frequency, fc, phase lag should be 135˚ or less (phase margin is 45˚ or more).

- The 0dB crossing frequency, fc, must be 80kHz or less.

Achieving stability by using phase compensation is done by cancelling the f_P1and f_P2(error amp pole and power stage

pole) of the feedback loop by the use of f_Z1. f_P1, f_P2and f_Z1are determined in the following equations:

1

ꢋ =

[Hz]

푍1

2휋×ꢒ

2휋×퐶

×퐶

ꢝ푂푀ꢞ

1

ꢋ =

푃1

×ꢒ

푂푈푇

퐺

ꢟ퐴

ꢋ =

푃2

×ꢗ

ꢝ푂푀ꢞ

ꢠ

Where:

푅_ꢈꢉꢊ

ꢡ_ꢢꢗ

ꢣ_푉

is the resistance assumed actual load[Ω] = Output Voltage[V] / Output Current[A]

is the Error Amp trans conductance (300µA/V)

is the Error Amp Voltage Gain (63dB)

Figure 37. Setting the Phase Compensation Circuit

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Selection of Components Externally Connected - continued

6. Selection of the Switching Frequency Setting Resistance R_RT

The internal switching frequency can be set by connecting a resistor between RTand GND.

The range of frequency that can be set is 1.9MHz to 2.3MHz, and the relation between resistance and the switching frequency is

decidedas showninthefigurebelow.Whensettingbeyondthisrange, thereisapossibilitythatthereis nooscillationandICoperation

cannot be guaranteed.

Table 2. R_RTvs f_SW

R_RT[kΩ]

6.8

f_SW[MHz]

2.26

2.6

2.5

2.4

2.3

2.2

2.1

2.0

1.9

1.8

1.7

1.6

7.5

2.10

8.2

1.96

6

7

8

9

10

R_RT[kΩ]

Figure 38. Switching Frequency

vs Switching Frequency Setting Resistance

7. Selection of the Bootstrap Capacitor and Resistor

Bootstrap capacitor C_BSTvalue shall be 0.022μF. Bootstrap resistor R_BSTvalue shall be 3.3Ω. Connect the bootstrap

capacitor in series with the bootstrap resistor between SW pin and BST pin. Recommended products are described in

Application Examples1 on page 25.

8. Selection of the VREGH Capacitor.

VREGH capacitor C_VREGHshall be 2.2μF ceramic capacitor. Connect the VREGH capacitor between VREGH pin and

GND.

9. Selection of the VMON Resistor

At the time of V_OUTshort circuit, current may be drawn from the VMON terminal due to an inductive load. Connect a

resistor to limit that current. VMON resistor R_VOUTshall be 2kΩ.

10. Soft Start Time

Soft Start prevents the overshoot of the output voltage. It changes in proportion to the switching frequency f_SW. Soft start

time at f_SW2.1MHz(Typ) is 1.1ms(Typ). The production tolerance of t_SSis ±36%. t_SScan be calculated by using the

equation.

231ꢤ

푡_ꢌꢌ=

[s]

푓푠푤

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Application Examples1

Table 3. Specification Example 1

Parameter

Product Name

Symbol

IC

Specification Case

BD9V101MUF-LB

16V to 60V

5.0V

Input Voltage

V_IN

Output Voltage

V_OUT

ΔV_P-P

I_OUT

Output Ripple Voltage

Output Current

20mVp-p

0A to 1.0A

Switching Frequency

Operating Junction Temperature

f_SW

2.1MHz

Tjopr

-40°C to +150°C

Figure 39. Reference Circuit 1

Table 4. Parts List 1

No

C_BLK

C_IN1

Package

-

Parameters

Part Name (Series)

-

Type

-

Manufacturer

-

3225

1608

2012

1608

-

4.7µF, X7R, 50V

0.1µF, X7R, 50V

0.022µF, X7R, 50V

3.3Ω, 5%, 1/10W

2.2µF, X7R ,16V

100kΩ, 0.5%, 1/10W

2.0kΩ, 0.5%, 1/10W

Short

GCM32ER71H475K

GCM188R71H104K

GCM188R71H223K

MCR03EZPJ3R3

GCM21BR71C225K

MCR03EZPD1003

MCR03EZPD2001

-

Ceramic

MURATA

ROHM

MURATA

ROHM

-

C_IN2

Ceramic

C_IN3

Ceramic

C_IN4

Ceramic

C_BST

R_BST

C_VREGH

R_PGD

R_VOUT

R₁₀₀

Ceramic

Chip Resistor

Ceramic

Chip Resistor

-

R_FB1

R_FB2

R_RT

1608

-

43kΩ, 0.5%, 1/10W

8.2kΩ, 0.5%, 1/10W

7.5kΩ, 0.5%, 1/10W

51kΩ, 0.5%, 1/10W

1000pF, X7R, 50V

4.7µH

MCR03EZPD4302

MCR03EZPD8201

MCR03EZPD7501

MCR03EZPD5102

GCM188R71H102K

CLF6045NIT-4R7N-D

GCM32ER71C226K

Chip Resistor

Ceramic

ROHM

MURATA

TDK

R_COMP

C_COMP

L_X

Inductor

C_OUT1

C_OUT2

3225

22µF, X7R, 16V

Ceramic

MURATA

Ceramic

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Application Examples1 - continued

V_OUT(10mV/div)

Phase

Gain

Time (500ns/div)

Figure 40. Frequency Characteristics

(V_IN=48V, V_OUT=5V, I_OUT=500mA)

Figure 41. Ripple Voltage

(V_IN=48V, V_OUT=5V, I_OUT=500mA)

V_OUT(10mV/div)

V_OUT(100mV/div)

I_OUT(500mA/div)

V_IN(20V/div)

Time (5ms/div)

Time (200µs/div)

Figure 43. V_INTransient Response

(V_IN=16V ↔ 60V, V_OUT=5V, I_OUT=500mA)

Figure 42. V_INLoad Response

(V_IN=48V, V_OUT=5V, I_OUT=0A ↔ 1A)

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Application Examples2

Table 5. Specification Example 2

Parameter

Product Name

Symbol

IC

Specification Case

BD9V101MUF-LB

16V to 60V

3.3V

Input Voltage

V_IN

Output Voltage

V_OUT

ΔV_P-P

I_OUT

Output Ripple Voltage

Output Current

20mVp-p

0A to 1.0A

Switching Frequency

Operating Junction Temperature

f_SW

2.1MHz

Tjopr

-40°C to +150°C

Figure 44. Reference Circuit 2

Table 6. Parts List 2

No

C_BLK

C_IN1

Package

-

Parameters

Part Name (Series)

-

Type

-

Manufacturer

-

3225

1608

2012

4.7µF, X7R, 50V

0.1µF, X7R, 50V

0.022µF, X7R, 50V

3.3Ω, 5%, 1/10W

2.2µF, X7R ,16V

GCM32ER71H475K

GCM188R71H104K

GCM188R71H223K

MCR03EZPJ3R3

GCM21BR71C225K

MCR03EZPD1003

MCR03EZPD2001

-

Ceramic

MURATA

ROHM

MURATA

ROHM

-

C_IN2

Ceramic

C_IN3

Ceramic

C_IN4

Ceramic

C_BST

R_BST

C_VREGH

R_PGD

R_VOUT

R₁₀₀

Ceramic

Chip Resistor

Ceramic

1608 100kΩ, 0.5%, 1/10W

Chip Resistor

-

1608

-

2.0kΩ, 0.5%, 1/10W

Short

R_FB1

R_FB2

R_RT

1608

-

47kΩ, 0.5%, 1/10W

15kΩ, 0.5%, 1/10W

7.5kΩ, 0.5%, 1/10W

75kΩ, 0.5%, 1/10W

560pF, X7R, 50V

4.7µH

MCR03EZPD4702

MCR03EZPD1502

MCR03EZPD7501

MCR03EZPD7502

GCM188R71H561K

CLF6045NIT-4R7N-D

GCM32ER71C226K

Chip Resistor

Ceramic

ROHM

MURATA

TDK

R_COMP

C_COMP

L_X

Inductor

C_OUT1

C_OUT2

3225

22µF, X7R, 16V

Ceramic

MURATA

Ceramic

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Application Examples2 - continued

V_IN(10mV/div)

Phase

Gain

Time (500ns/div)

Figure 45. Frequency Characteristics

(V_IN=48V, V_OUT=3.3V, I_OUT=500mA)

Figure 46. Ripple Voltage

(V_IN=48V, V_OUT=3.3V, I_OUT=500mA)

V_OUT(100mV/div)

V_OUT(10mV/div)

I_OUT(500mA/div)

V_IN(20V/div)

Time (5ms/div)

Time (200µs/div)

Figure 48. V_INTransient Response

(V_IN=16V ↔ 60V, V_OUT=3.3V, I_OUT=500mA)

Figure 47. V_INLoad Response

(V_IN=48V, V_OUT=3.3V, I_OUT=0A ↔ 1A)

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Power Supply Line Circuit

POWER

LINE

VIN

BD9V101MUF-LB

L

C

π-type filter

Figure 49. Power Supply Line Circuit

As a reference, the power supply line circuit example is given in Figure 49.

π-type filter is a third-order LC filter. In general, it is used in combination with decoupling capacitors for high frequency.

Large attenuation characteristics can be obtained and thus excellent characteristic as a EMI filter. Devices used for π-type

filters should be placed close to each other.

Table 7. Reference Parts of Power Supply Line Circuit

Device

Part name (series)

CLF series

Manufacturer

TDK

L

XAL series

Coilcraft

C

CJ series / CZ series

NICHICON

Recommended Parts Manufacturer List

Shown below is the list of the recommended parts manufacturers for reference.

Type

Electrolytic Capacitor

Ceramic Capacitor

Inductor

Manufacturer

NICHICON

Murata

URL

www.nichicon-us.com

www.murata.com

product.tdk.com

www.coilcraft.com

www.sumida.com

www.rohm.com

TDK

Inductor

Coilcraft

SUMIDA

ROHM

Inductor

Resistor

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PCB Layout Design

PCB layout design for DC/DC converter power supply IC is as important as the circuit design. Appropriate layout can avoid

various problems caused by power supply circuit. Figure 50-a to 50-c show the current path in a buck converter circuit. The

Loop 1 in Figure 50-a is a current path when H-side switch is ON and L-side switch is OFF, the Loop 2 in Figure 50-b is when

H-side switch is OFF and L-side switch is ON. The thick line in Figure 50-c shows the difference between Loop1 and Loop2.

The current in thick line change sharply each time the switching element H-side and L-side switch change from OFF to ON,

and vice versa. These sharp changes induce several harmonics in the waveform. Therefore, the loop area of thick line that

is consisted by input capacitor and IC should be as small as possible to minimize noise. For more detail refer to application

note of switching regulator series “PCB Layout Techniques of Buck Converter”.

Loop1

V_IN

V_OUT

L

H-side switch

C_IN

C_OUT

L-side switch

GND

Figure 50-a. Current path when H-side switch = ON, L-side switch = OFF

V_IN

V_OUT

L

H-side switch

C_IN

C_OUT

Loop2

L-side switch

GND

V_IN

GND

Figure 50-b. Current path when H-side switch = OFF, L-side switch = ON

V_OUT

L

H-side FET

C_IN

C_OUT

L-side FET

GND

Figure 50-c. Difference of current and critical area in layout

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PCB Layout Design - continued

When designing the PCB layout, please pay extra attention to the following points:

- Place input capacitor on the same PCB surface as the IC and as close as possible to the IC’s PVIN terminal.

- Switching nodes should be traced as thick and short as possible to the inductor, because they may induce the noise

to the other nodes due to AC coupling.

- Please keep the lines connected to FB and COMP away from the SW node as far as possible.

- Please place output capacitor away from input capacitor to avoid harmonics noise from the input.

- R₁₀₀is an option, used for feedback’s frequency response measurement.

By inserting a resistor at R₁₀₀, it is possible to measure the frequency response (phase margin) using a FRA.

However, the resistor will not be used in actual application, please use this resistor pattern in short-circuit mode.

Figure 51. Evaluation Board Layout Example

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Power Dissipation

For thermal design, be sure to operate the IC within the following conditions.

(Since the temperatures described hereunder are all guaranteed temperatures, take margin into account.)

1. The ambient temperature Ta is to be 125 °C or less.

2. The chip junction temperature Tj is to be 150 °C or less.

The chip junction temperature Tj can be considered in the following two patterns:

1. To obtain Tj from the package surface center temperature Tt in actual use

ꢥ푗 = ꢥ푡 + 휓_퐽ꢊ× ꢦ [°C]

2. To obtain Tj from the ambient temperature Ta

ꢥ푗 = ꢥꢧ + 휃_퐽ꢗ× ꢦ [°C]

Where:

휓_퐽ꢊ

휃_퐽ꢗ

is junction to top characterization parameter (Refer to page 6)

is junction to ambient (Refer to page 6)

The heat loss W of the IC can be obtained by the formula shown below:

ꢄ_ꢈꢉꢊ

2

ꢦ = 푅_ꢈꢅ퐻× ꢎ_ꢈꢉꢊ

×

+ 푅_ꢈꢅꢏ× ꢎ_ꢈꢉꢊ²ꢨꢩ ꢪ

ꢫ

ꢄ

ꢂꢅ

1

(

)

+ꢄ × ꢎ_퐶퐶+ × 푡푟 + 푡ꢋ × ꢄ × ꢎ_ꢈꢉꢊ× ꢋ

[W]

ꢂꢅ

ꢌꢍ

2

Where:

푅_ꢈꢅ퐻

is the Top Power NMOS ON Resistance (Refer to page 7) [Ω]

is the Bottom Power NMOS ON Resistance (Refer to page 7) [Ω]

is the Load Current [A]

푅_ꢈꢅꢏ

ꢎ_ꢈꢉꢊ

ꢄ_ꢈꢉꢊ

is the Output Voltage [V]

ꢄ

ꢎ_퐶퐶

푡푟

푡ꢋ

ꢋ

ꢌꢍ

is the Input Voltage [V]

ꢂꢅ

is the Circuit Current (Refer to page 7) [A]

is the Switching Rise Time [s] (Typ:10ns)

is the Switching Fall Time [s] (Typ:10ns)

is the Switching Frequency [Hz]

2

1. 푅_ꢈꢅ퐻× ꢎ_ꢈꢉꢊ

2

2. 푅_ꢈꢅꢏ× ꢎ_ꢈꢉꢊ

3. ¹× (푡푟 + 푡ꢋ) × ꢄ × ꢎ_ꢈ× ꢋ

ꢂꢅ

ꢌꢍ

2

Figure 52. SW Waveform

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I/O Equivalent Circuit

1. EN

13,14 SW

PVIN

EN

400kΩ

SW

572kΩ

15. BST

17. VREGH

PVIN

10Ω

BST

VREGH

SW

18. PGOOD

19. RT

VREGH

PGOOD

180Ω

RT

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I/O Equivalent Circuit - continued

20. COMP

22. FB

VREGH

FB

1kΩ

COMP

23. VMON

VREGH

280kΩ

50kΩ

VMON

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Operational Notes

1.

2.

Reverse Connection of Power Supply

Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when

connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply

pins.

Power Supply Lines

Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at

all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic

capacitors.

3.

4.

Ground Voltage

Except for pins the output and the input of which were designed to go below ground, ensure that no pins are at a

voltage below that of the ground pin at any time, even during transient condition.

Ground Wiring Pattern

When using both small-signal and large-current ground traces, the two ground traces should be routed separately but

connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal

ground caused by large currents. Also ensure that the ground traces of external components do not cause variations

on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.

5.

6.

Recommended Operating Conditions

The function and operation of the IC are guaranteed within the range specified by the recommended operating

conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical

characteristics.

Inrush Current

When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow

instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.

Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing

of connections.

7.

8.

Operation Under Strong Electromagnetic Field

Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.

Testing on Application Boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject

the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should

always be turned off completely before connecting or removing it from the test setup during the inspection process. To

prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and

storage.

9.

Inter-pin Short and Mounting Errors

Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in

damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.

Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and

unintentional solder bridge deposited in between pins during assembly to name a few.

10. Unused Input Pins

Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and

extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge

acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause

unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power

supply or ground line.

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Operational Notes – continued

11. Regarding the Input Pin of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them

isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a

parasitic diode or transistor. For example (refer to figure below):

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to

operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be

avoided.

Resistor

Transistor (NPN)

Pin A

Pin B

B

E

C

Pin A

B

C

E

P

P⁺

N

P⁺

P

P⁺

N

Parasitic

Elements

Parasitic

Elements

P Substrate

GND GND

P Substrate

GND

Parasitic

Elements

Parasitic

Elements

N Region

close-by

Figure 53. Example of monolithic IC structure

12. Ceramic Capacitor

When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with

temperature and the decrease in nominal capacitance due to DC bias and others.

13. Area of Safe Operation (ASO)

Operate the IC such that the output voltage, output current, and the maximum junction temperature rating are all within

the Area of Safe Operation (ASO).

14. Thermal Shutdown Circuit (TSD)

This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always

be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the

junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls

below the TSD threshold, the circuits are automatically restored to normal operation.

Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no

circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat

damage.

15. Over Current Protection Circuit (OCP)

This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This

protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should

not be used in applications characterized by continuous operation or transitioning of the protection circuit.

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Ordering Information

B D 9 V 1

0

1 M U

F

-

L B E 2

Part Number

Package

Product class

MUF: VQFN24FV4040

LB: for Industrial applications

Packaging Specification

E2: Embossed tape and reel

Marking Diagrams

VQFN24FV4040 (TOP VIEW)

Part Number Marking

9 V 1 0 1

LOT Number

1PIN MARK

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Physical Dimension, Tape and Reel Information

Package Name

VQFN24FV4040

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Revision History

Date

Revision

001

Changes

15.Sept.2017

New Release

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Notice

Precaution on using ROHM Products

1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,

OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you

intend to use our Products in devices requiring extremely high reliability (such as medical equipment ^{(Note 1)}, transport

equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car

accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or

serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.

Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any

damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific

Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN

USA

EU

CHINA

CLASSⅢ

CLASSⅣ

CLASSⅡb

CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are designed and manufactured for use under standard conditions and not under any special or

extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any

special or extraordinary environments or conditions. If you intend to use our Products under any special or

extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of

product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of

flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning

residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in

the range that does not exceed the maximum junction temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must

be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,

please consult with the ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice-PGA-E

Rev.003

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign

trade act, please consult with ROHM in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data.

2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the

Products with other articles such as components, circuits, systems or external equipment (including software).

3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM

will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to

manufacture or sell products containing the Products, subject to the terms and conditions herein.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice-PGA-E

Rev.003


型号：	BD9V101MUF-LB
厂家：	ROHM
描述：	本产品是面向工业设备市场的产品，保证可长期稳定供货。是适合这些用途的产品。BD9V101MUF-LB 是内置高耐压POWER MOSFET的同步整流降压DC/DC转换器。16V~60V的大输入范围适用于工业设备等所有应用。通过Nano Pulse Control®，可输出20ns的最小SW ON 时间，因此即使是2.1MHz动作，也可通过1个IC实现从60V电源转换为3.3V微控制器的电压转换(60V→3.3V)。控制器微控制器转换器
文件：	总42页 (文件大小：3506K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BD9V101MUF-LB [ROHM]

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