BH6456GUL_12_技术文档

System Lens Driver Series for Mobile Phone Cameras

2-wire serial interface

Lens Driver for Voice Coil Motor

(I²C BUS compatible)

No.12015EAT03

BH6456GUL

●General Description

●Key Specifications

The BH6456GUL motor driver provide 1 Full on Driver a

H-bridge.

This lens driver is offered in an ultra-small functional lens

system for use in an auto focus system using a Piezo

actuator.

 Pch ON Resistance:

 Nch ON Resistance:

 Standby current consumption:

 15MHz OSC:

0.70Ω(Typ.)

0μA (Typ.)

±3.0%

-25℃ to +85℃

 Operating temperature range:

●Features

●Package(s)

W(Typ.) x D(Typ.) x H(Max.)

1.95mm x 1.00mm x 0.55mm

 Ultra-small chip size package .

 Low ON-Resistance Power CMOS output.

 Built-in 15MHz Oscillator

VCSP50L1

 Built-in UVLO (Under Voltage Locked Out: UVLO).

 Built-in TSD (Thermal Shut Down) circuit.

 Standby current consumption: 0μA Typ.

 1.8V can be put into each control input terminal

●Applications

 For Auto focus of camera module

 Digital still camera

 Camera Modules

 Lens Auto focus

 Web Cameras

●Typical Application Circuit(s)

VCC

SDA

SCL

Band

Gap

2-wire

Serial

VREG

UVLO

TSD

Interface

VM

Pre

OUTA

PS

Driver

H Bridge

Controller

15MHz

OSC

OUTB

GND

Fig.1 Block Diagram

○Product structure：Silicon monolithic integrated circuit ○This product is not designed protection against radioactive rays

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2012.03 - Rev.A

1/19

Technical Note

BH6456GUL

● Absolute maximum ratings (Ta=+25°C)

Parameter

Symbol

VCC

VM

Limit

Unit

V

Power supply voltage

Motor power supply voltage

Power save input voltage

Control input voltage

Power dissipation

-0.3 to +4.5

-0.3 to +5.5

-0.3 to VCC+0.3

530*¹

V

VPS

VIN

V

Pd

mW

Operating

temperature range

Topr

-25 to +85

°C

Junction temperature

Storage temperature range

H-bridge output current

Tjmax

Tstg

+125

°C

-55 to +125

-500 to +500^*2

Iout

mA

^*1Conditions: mounted on a glass epoxy board (50mm  58mm  1.75mm; 8 layers). In case of Ta>25°C, reduced by 5.3 mW/°C.

^*2Must not exceed Pd, ASO, or Tjmax of 125°C.

●Operating Conditions (Ta= -25°C to +85°C)

Parameter

Power supply voltage

Symbol

VCC

VM

Min.

2.3

0

Typ.

Max.

3.6

Unit

V

3.0

Motor power supply voltage

Power save input voltage

Control input voltage

3.0

4.8

V

VPS

VIN

-

VCC

400

400^*3

V

0

V

2-wire serial interface transmission rate

H-bridge output current

^*3Must not exceed Pd, ASO.

SCL

Iout

-

kHz

mA

-

Package Outline

Pin Arrangement (Top View)

1PIN MARK

1

2

3

4

A

B

VM

OUTB

SCL

SDA

AAU

Top View

Lot No.

OUTA

GND

VCC

PS

1.95±0.05

Fig.3 Pin Arrangement (Top View)

Side View

φ0.25±0.1

(φ0.15)

INDEX POST

Bottom View

0.225±0.05

P=0.5×3

Fig.2 VCSP50L1 Package (Unit: mm)

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2012.02 - Rev.A

2/19

Technical Note

BH6456GUL

● Electrical Characteristics (Unless otherwise specified Ta=25°C, VCC=3.0V )

Limit

Parameter

Symbol

Unit

Conditions

Min.

Typ.

Max.

Overall

Circuit current

during standby operation

Circuit current

ICCST

ICC

-

0

1

μA

PS=L

3.2

6.4

mA PS=H, SCL=400kHz, OSC active

UVLO

UVLO voltage

VUVLO

1.8

-

2.2

V

Power save input

High level input voltage

Low level input voltage

High level input current

Low level input current

Control input(SDA,SCL)

High level input voltage

Low level input voltage

Low level output voltage

High level input current

Low level input current

H Bridge Drive

VPSH

VPSL

IPSH

IPSL

1.5

0

-

VCC

0.5

60

V

15

-3

30

0

μA

VINH=3.0V

VINL=0V

-

VINH

VINL

VOL

IINH

IINL

1.5

0

-

VCC

0.5

0.4

10

V

-

V

IIN=3.0mA (SDA)

Input voltage=VCC

Input voltage=GND

-10

μA

10

Ω

RONP

RONN

-

0.7

1.0

Output ON-Resistance

Cycle length of

sequence drive

Output rise time

TMIN

10.35 10.67 11.00

μs

^*4Built in CLK 160 count

^*57.5Ω load condition

Tr

Tf

-

0.1

0.8

0.4

μs

Output fall time

0.02

*4

*5

The time that 1 cycle of sequence drive at the below setting of 2-wire serial data

ta[7:0] = 0x13, brake1[7:0] = 0x03, tb[7:0] = 0x1E, brake2[7:0] = 0x6B, osc[2:0] = 0x0

Output switching wave

100

90%

10%

90%

Output

voltage

10%

0%

Tf

Tr

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2012.02 - Rev.A

3/19

Technical Note

BH6456GUL

●2 wire Serial Interface Register detail

Write mode :

Read mode :

S

0

1

0

↑

A

PS T2 T1 T0 W3 W2 W1 W0

A

D7 D6 D5 D4 D3 D2 D1 D0

A

↑

P

Master is output

Slave is output

Write

Up date

0

PS T2 T1 T0 W3 W2 W1 W0

PS=Power save

S

0

1

0

1

A

D7 D6 D5 D4 D3 D2 D1 D0 nA

P

↑

Write

↑

Read

S=Start condition

P=Stop condition

A=Acknowledge

W3～W0=Resister address

D7～D0=Data

ｎA=not Acknowledge T2～T0=Test bit

●Resister

Address W3 W2 W1 W0

D7

D6

D5

D4

D3

init

D2

D1

D0

dir

0H

1H

2H

3H

4H

5H

6H

7H

8H

9H

AH

BH

CH

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

HiZE

ta[7]

initB[2]

ta[6]

initB[1]

ta[5]

InitB[0]

ta[4]

START

ta[2]

MODE

ta[1]

ta[3]

ta[0]

brake1[7] brake1[6] brake1[5] brake1[4] brake1[3] brake1[2] brake1[1] brake1[0]

tb[7] tb[6] tb[5] tb[4] tb[3] tb[2] tb[1] tb[0]

brake2[7] brake2[6] brake2[5] brake2[4] brake2[3] brake2[2] brake2[1] brake2[0]

cnt[7]

cnt[15]

pa

cnt[6]

cnt[14]

pb

cnt[5]

cnt[13]

osc[2]

TEST

cnt[4]

cnt[12]

osc[1]

TEST

cnt[3]

cnt[11]

osc[0]

TEST

cnt[2]

cnt[10]

cntck[2]

TEST

cnt[1]

cnt[9]

cntck[1]

TEST

EXT

cnt[0]

cnt[8]

cntck[0]

TEST

initEXT

TEST

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2012.02 - Rev.A

4/19

Technical Note

BH6456GUL

●2 wire Serial Interface Action Timing Characteristics (Unless otherwise specified, Ta=-25 to +85°C, VCC=2.3 to 4.8V)

FAST-MODE^*6

STANDARD-MODE^*6

Parameter

SCL frequency

Data clock high time

Data clock low time

Start condition hold time

Start condition setup time

Data hold time

Symbol

Unit

Min.

-

Typ.

Max.

400

-

Min.

Typ.

Max.

fSCL

tHIGH

tLOW

tHD:STA

tSU:STA

tHD:DAT

tSU:DAT

tSU:STO

tBUF

-

100

-

kHz

μs

ns

μs

ns

0.6

1.3

0.6

0

100

0.6

1.3

0

4.0

4.7

4.0

4.7

0

250

4.0

4.7

0

-

0.9

-

50

3.45

-

50

Data setup time

Stop condition setup time

BUS release time

Noise removal valid period

tI

*6

Standard-mode and Fast-mode 2-wire serial interface devices must be able to transmit or receive at that speed.

The maximum bit transfer rates of 100 kbit/s for Standard-mode devices and 400 kbit/s for Fast-mode devices

This transfer rates is provided the maximum transfer rates, for example it is able to drive 100 kbit/s of clocks with Fast-mode.

●2 wire Serial Interface Data timing

tF

tHIGH

tR

SCL

SDA

SCL

SDA

tHD : DAT

tSU : DAT

tLOW

tSU : STA

tSU : STO

tHD : STA

tBUF

STOP BIT

START BIT

Fig.4 Serial data timing

Fig.5 Start stop bit timing

●Recommend to power supply turning on operation timing

Recommendation limit

Parameter

Symbol

Unit

us

Min.

1

Typ.

-

Max.

-

PS input H voltage set-up time

2-wire serial interface input data set-up

time

TPS

tI2C

1

-

us

●Sequence of data input timing to power supply

VCC,VM

50%

PS

50%

Serial data

2-wire serial input

50%

tPS

tI2C

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2012.02 - Rev.A

5/19

Technical Note

BH6456GUL

●Driving wave setting

○

The structure of the driving wave for SIDM

1cycle=(ta+1)+brake1+tb+brake2

Ⅰ

Ⅱ

Ⅲ

Ⅳ

Ⅴ

Ⅵ

Ⅶ

Ⅰ

Ⅱ

Ⅷ

1osc

①

②

brake1

ta+1

tb

ta

brake2

*2

Ⅱ cw(ccw)

Ⅱcw(ccw)

Ⅵ CCW(cw)

Ⅷ Short brake

*1

Ⅰ.HiZ

Ⅲ

HiZ Ⅴ HiZ

Ⅶ HiZ

Ⅰ HiZ

Ⅲ HiZ

*2

Ⅳ Short brake

CW:Forward rotation

CCW:Reverse rotation

*1

*2

The state at A or B and C is HiZ.

At mode=0,the output logic is a setting of a short brake.

dir(address：OH,D2)

①

②

Note

0

1

OUTA

OUTB

OUTA

Move to the direction of Macro

Move to the direction of ∞

Driving wave is set by the 4 parameters of ta / brake1 / tb / brake2.

osc period is set by the osc(Internal CLK basic cycle setting).

ta

brake1 : On section is (brake1 -1) count for short brake state.

tb : On section is (tb1 -1) count for ccw(cw) state.

brake2 : On section is (brake2 -1) count for short brake state.

: On section is ( ta +1-1) = ta counts for cw(ccw) state.

（Ex.） In case of setting 1 cycle = 10.67μs、ta = 1.27μs、brake1 = 0.13μs、tb = 1.93μs, brake2 = 7.07μs.

osc[2:0]( = Basic cycle setting ) = 3’b000（ = Basic cycle = 66.67ns）、and ta / brake1 / tb / brake2 setting below;

ta[7:0]

brake1[7:0] = 0x03 = 3 count

tb[7:0] = 0x1E = 30 count

brake2[7:0] = 0x6B = 107 count

= 0x13

= 19 count

→ ON section = 19+1-1= 19 count

→ ON section = 2 count

→ ON section = 29 count

→ ON section = 106 count

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2012.02 - Rev.A

6/19

Technical Note

BH6456GUL

○

Driver function table

Sequence setting

mode = 0, osc = 0x0 or osc≠0x0 and HiZE = 0

Ⅰ

Ⅱ

Ⅲ

Ⅳ

Ⅴ

Ⅵ

Ⅶ

Ⅷ

output①

output②

mode

HiZ

H

HiZ

L

HiZ

H

HiZ

L

Short

brake

Short

brake

HiZ

CW

HiZ

CCW

mode = 0, osc≠0x0 and HiZE = 1

Ⅰ

Ⅱ

Ⅲ

Ⅳ

Ⅴ

Ⅵ

Ⅶ

Ⅷ

HiZ(66.67ns

output①

output②

mode

H

L

ec)→H

ec)→L

HiZ(66.67ns

ec)→H

L

H

HiZ^*3

L

HiZ(66.67ns

ec)→Short

brake

Short

brake

Short

brake

HiZ(66.67ns

ec)→CW

HiZ(66.67ns

ec)→CCW

CW

CCW

*3 The output ② status of Ⅶ dosen’t become from HiZ(66.67nsec) to Low.It is outputted HiZ.

mode = 1, osc = 0x0 or osc≠0x0 and HiZE = 0

Ⅰ

Ⅱ

Ⅲ

Ⅳ

Ⅴ

Ⅵ

Ⅶ

Ⅷ

output①

output②

mode

HiZ

H

HiZ

L

HiZ

L

HiZ

H

HiZ

CW

HiZ

CCW

mode = 1, osc≠0x0 and HiZE = 1

Ⅰ

Ⅱ

Ⅲ

Ⅳ

Ⅴ

Ⅵ

Ⅶ

Ⅷ

HiZ(66.67ns

output①

output②

mode

H

HiZ

L

L^*4

HiZ

ec)→H

ec)→L

L(66.67nsec

HiZ(66.67ns

ec)→H

L

HiZ

H

HiZ

)→HiZ

HiZ(66.67ns

ec)→CW

HiZ(66.67ns

ec)→CCW

CW

HiZ

CCW

*4 The output ① status of Ⅶ dosen’t become from Low (66.67nsec) to HiZ .It is outputed Low.

Truth table of Pa and Pb

sequence

pa

pb

0

OUTA

OUTB

Function mode

STOP

OFF

0

Z

L

Z

H

L

OFF

0

1

CCW

OFF

1

0

H

CW

OFF

ON

1

x

L

-

L

-

Short brake

X

Follow with the sequence

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2012.02 - Rev.A

7/19

Technical Note

BH6456GUL

○Normal sequence

Setting ta[7:0], brake1[7:0], tb[7:0], brake2[7:0], osc[2:0], HiZE, pa, pb, cntck[2:0], cnt[15:0]

START = Hi → Lo while normal sequence, stop the sequence

input data

START

Macro direction select

direction select

∞

input data

dir

1cycle

OUTA

OUTB

output data

EXT

Internal Counter

set

value

Reset

Count up

Reset

Count up

Set output logic by

pa , pb

Set output logic by

pa , pb

Normal sequence

Move to ∞ to direction

Move to Macro direction (movement at set cycle)

In this case of short brake

In the case of dir = Lo → Hi or Hi → Lo input while

START=Hi,reset setting cycle,and start normal

input data

START

Macro direction select

∞ direction select

input data

dir

1cycle

OUTA

OUTB

output data

EXT

Internal Counter

set

value

set value

Count up

Normal sequence

see output logic by pa,pb

Move to macro direction

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2012.02 - Rev.A

8/19

Technical Note

BH6456GUL

○Initial sequence

Setting ta[7:0], brake1[7:0], tb[7:0], brake2[7:0], osc[2:0], HiZE, pa, pb, cntck[2:0], cnt[15:0], initB[2:0]

Count stop

Stop squence

I2C input data

START

I2C input data

init

I2C output data

initEXT

reset

Internal Counter

∞direction

reset

Count up

Setting value

set

output

set

Set output logic by

pa, pb(I2C)

set

Normal sequence

output

∞ direction

m

∞ dir

∞dir

Initial sequence

In the case of init(I2C)= Hi Lo input

→

In the case of initial(I2C)=

Hi Lo

→

In the case of START(I2C)=Lo

input while initial sequence, reset

setting cycle, and start normal

sequence.

Hi

→

Move to

direction

Move to macro direction

∞

while START(I2C)=Lo,initEXT=Hi

input while initial sequence, reset

setting c ycle, and obey output

logic by pa,pb(I2C).

→

Lo output.

Ignore dir(I2C) signal

setting initB[2:0]

）

（

I2C input data

START

I2C input data

init

I2C output data

initEXT

Internal Counter

∞

direction

∞

direction

reset

Setting value

Count up

Setting value

Set output logic by

pa,pb(I2C)

set

output

Normal sequence

∞direction

m

∞ dir

m

output

Initial sequence

At START(I2C)=Hi,it is initEXT(I2C)=Hi

regardless of the init(I2C) logic

In the case of initEXT(I2C)=Hi

Lo

→

output at init(I2C)=Hi

sequence ends.

Lo after initial

→

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2012.02 - Rev.A

9/19

Technical Note

BH6456GUL

○STOP sequence

It changes to the next state after short brake 16.7μsec(typ) when the state transition

shown in the following while the sequence is operating is done.

・

When Initial sequence ∞ direction ends

When Initial sequence ends

When normal sequence ends

When dir bit signal reversing input is done at START bit = H

When initial sequence cancels

When normal sequence cancels

When the normal sequence interrupts at an initial sequence

○ Output rise, fall waveform

VM

A

(VM-B)*0.9+B

Output

voltage

A*0.9

(VM-B)*0.1+B

B

Tfall

Trise

A*0.1

0V

Output

current

0mA

A voltage = (VM voltage) – (Simulation DC output current at the only Resistance load) ×(Upper side output On-R)

B voltage = (Simulation DC output current at the only Resistance load) × (Lower side output On-R)

(Ex.) In case, the load is Resistance element = 2Ω, capacity element = 0.033μF

25°C, VM=3V, Upper side output On-R = 1Ω, Lower side output On-R = 1Ω

A voltage = (VM voltage) – ((VM voltage)÷(Load (R)+ Total ON-R))×(Upper side ON-R)

= 3V – (3V÷(2Ω+(1Ω+1Ω)))×1Ω

= 2.25V

B voltage = ((VM voltage)÷(Load (R)+ Total ON-R))×(Lower side ON-R)

= (3V÷(2Ω+(1Ω+1Ω)))×1Ω

= 0.75V

Rise time = Trise (A×0.1 to A×0.9)

= 100nsec（typ）

Fall time = Tfall ((VM-B)×0.9+B to (VM-B)×0.1+B) = 100nsec（typ）

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2012.02 - Rev.A

10/19

Technical Note

BH6456GUL

●Register detail

○Register catalogue

Bit

BIT Name

Function

address : 0H

D0

D1

dir

Output direction setting while normal sequence

Mode of brake1/brake2 setting for initial/normal sequence

Start setting for normal sequence

MODE

D2

D3

D4

D5

D6

START

init

Start setting for initial sequence

Initb[0]

Initb[1]

Initb[2]

Macro direction setting while initial sequence[0]

Macro direction setting while initial sequence [1]

Macro direction setting while initial sequence [2]

Dead time setting （Lo: 1 cycle of osc[2:0] setting、Hi: Internal CLK 1 cycle （typ

66.67nsec）

D7

HiZE

address : 1H

D0

ta[0]

ta[1]

ta[2]

ta[3]

ta[4]

ta[5]

ta[6]

ta[7]

Drive waveform setting[0] ta

Drive waveform setting[1] ta

Drive waveform setting[2] ta

Drive waveform setting[3] ta

Drive waveform setting[4] ta

Drive waveform setting[5] ta

Drive waveform setting[6] ta

Drive waveform setting[7] ta

D1

D2

D3

D4

D5

D6

D7

address : 2H

D0

D1

D2

D3

D4

D5

D6

D7

brake1[0]

brake1[1]

brake1[2]

brake1[3]

brake1[4]

brake1[5]

brake1[6]

brake1[7]

Drive waveform setting[0] brake1

Drive waveform setting[1] brake1

Drive waveform setting[2] brake1

Drive waveform setting[3] brake1

Drive waveform setting[4] brake1

Drive waveform setting[5] brake1

Drive waveform setting[6] brake1

Drive waveform setting[7] brake1

address : 3H

D0

D1

D2

D3

D4

D5

D6

D7

tb[0]

tb[1]

tb[2]

tb[3]

tb[4]

tb[5]

tb[6]

tb[7]

Drive waveform setting[0] tb

Drive waveform setting[1] tb

Drive waveform setting[2] tb

Drive waveform setting[3] tb

Drive waveform setting[4] tb

Drive waveform setting[5] tb

Drive waveform setting[6] tb

Drive waveform setting[7] tb

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2012.02 - Rev.A

11/19

Technical Note

BH6456GUL

Bit

BIT Name

Function

address : 4H

D0

D1

D2

D3

D4

D5

D6

D7

brake2[0]

Drive waveform setting[0] brake2

Drive waveform setting[1] brake2

Drive waveform setting[2] brake2

Drive waveform setting[3] brake2

Drive waveform setting[4] brake2

Drive waveform setting[5] brake2

Drive waveform setting[6] brake2

Drive waveform setting[7] brake2

brake2[1]

brake2[2]

brake2[3]

brake2[4]

brake2[5]

brake2[6]

brake2[7]

address : 5H

D0

cnt[0]

cnt[1]

cnt[2]

cnt[3]

cnt[4]

cnt[5]

cnt[6]

cnt[7]

Drive time count setting[0]

Drive time count setting[1]

Drive time count setting[2]

Drive time count setting[3]

Drive time count setting[4]

Drive time count setting[5]

Drive time count setting[6]

Drive time count setting[7]

D1

D2

D3

D4

D5

D6

D7

address : 6H

D0

cnt[8]

cnt[9]

Drive time count setting[8]

Drive time count setting[9]

Drive time count setting[10]

Drive time count setting[11]

Drive time count setting[12]

Drive time count setting[13]

Drive time count setting[14]

Drive time count setting[15]

D1

D2

cnt[10]

cnt[11]

cnt[12]

cnt[13]

cnt[14]

cnt[15]

D3

D4

D5

D6

D7

address : 7H

D0

D1

D2

D3

D4

D5

D6

D7

cntck[0]

cntck[1]

cntck[2]

osc[0]

osc[1]

osc[2]

pb

Drive time basic cycle setting[0]

Drive time basic cycle setting [1]

Drive time basic cycle setting [2]

Internal CLK basic cycle setting[0]

Internal CLK basic cycle setting [1]

Internal CLK basic cycle setting [2]

Output logic setting b

pa

Output logic setting a

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2012.02 - Rev.A

12/19

Technical Note

BH6456GUL

Bit

BIT Name

Function

address : 8H

D0

D1

D2

D3

D4

D5

D6

D7

cntout[0]

Drive time count value output[0]

Drive time count value output[1]

Drive time count value output[2]

Drive time count value output[3]

Drive time count value output[4]

Drive time count value output[5]

Drive time count value output[6]

Drive time count value output[7]

cntout[1]

cntout[2]

cntout[3]

cntout[4]

cntout[5]

cntout[6]

cntout[7]

address : 9H

D0

D1

D2

D3

D4

D5

D6

D7

cntout[8]

Drive time count value output[8]

Drive time count value output[9]

Drive time count value output[10]

Drive time count value output[11]

Drive time count value output[12]

Drive time count value output[13]

Drive time count value output[14]

Drive time count value output[15]

cntout[9]

cntout[10]

cntout[11]

cntout[12]

cntout[13]

cntout[14]

cntout[15]

address : AH

D0

initEXT

After initial sequence, Hi output

D1

EXT

Hi output while normal sequence、Lo output at the stop mode

D2

TEST

D3

D4

D5

D6

D7

address : BH

D0

TEST

D1

TEST

D2

D3

D4

D5

D6

D7

address : CH

D0

D1

D2

D3

D4

D5

D6

D7

TEST

www.rohm.com

2012.02 - Rev.A

13/19

Technical Note

BH6456GUL

○Internal CLK basic cycle setting [osc] Internal CLK 1 cycle = 66.67nsec(typ)

Internal

CLK cycle

number

Internal

CLK cycle

number

Internal

CLK cycle

number

Internal

CLK cycle

number

Magnificati

on

Magnificati

on

Magnificati

on

Magnificati

on

3’b000

3’b001

1

2

3’b010

3’b011

3

4

3’b100

3’b101

5

6

3’b110

3’b111

7

8

○Drive waveform [ta, brake1, tb, brake2]

Osc

Cycle

Osc

Cycle

Osc

Cycle

Time setting

Cycle

Time setting

number

8’b0000_0000

8’b0000_0001

8’b0000_0010

8’b0000_0011

…

1

8’b0100_0000

8’b0100_0001

8’b0100_0010

8’b0100_0011

…

64

65

8’b1000_0000

8’b1000_0001

8’b1000_0010

8’b1000_0011

…

128

129

130

131

…

8’b1100_0000

8’b1100_0001

8’b1100_0010

8’b1100_0011

…

192

193

194

195

…

2

66

3

67

…

61

62

63

…

8’b0011_1101

8’b0011_1110

8’b0011_1111

8’b0111_1101

8’b0111_1110

8’b0111_1111

125

126

127

8’b1101_1101

8’b1101_1110

8’b1101_1111

189

190

191

8’b1111_1101

8’b1111_1110

8’b1111_1111

253

254

255

○Drive time basic cycle setting [cntck]

Magnificati

on

Cycle

Magnificati

on

Cycle

Magnificati

on

Cycle

Magnificati

on

Cycle

number

3’b000

3’b001

1

2

3’b010

3’b011

4

8

3’b100

3’b101

15

32

3’b110

3’b111

64

127

www.rohm.com

2012.02 - Rev.A

14/19

Technical Note

BH6456GUL

○Macro direction setting while initial sequence [initB] ( (Total count number) = (cntck)×(initB))

count

Cntck cycle

number

count

Cntck cycle

number

count

Cntck cycle

number

count

Cntck cycle

number

setting

3’b000

3’b001

1

2

3’b010

3’b011

4

8

3’b100

3’b101

15

32

3’b110

3’b111

64

127

○Drive time count setting [cnt] ( (Total Drive count number) = (cntck)×(cnt))

count setting

Cntck cycle

number

count setting

Cntck cycle

number

count

Cntck cycle

number

count

Cntck

setting

cycle number

16’h0000

16’h0001

16’h0002

16’h0003

…

1

16’h4000

16’h4001

16’h4002

16’h4003

…

16384

16385

16386

16387

…

16’h8000

16’h8001

16’h8002

16’h8003

…

32768

32769

32770

32771

…

16’hC000

16’hC001

16’hC002

16’hC003

…

49152

49153

49154

49155

…

2

3

…

16’h3FFD

16’h3FFE

16’h3FFF

16381

16382

16383

16’h7FFD

16’h7FFE

16’h7FFF

32765

32766

32767

16’hBFFD

16’hBFFE

16’hBFFF

49149

49150

49151

16’hFFFD

16’hFFFE

16’hFFFF

65533

65534

65535

(Ex.)

In case, setting cntck[2:0] = 3’b001, cnt[15:0] = 16’h8000

cntck×cnt= 2×32768

= 65536count

= 851.968msec (In case of setting a cycle = 13usec)

www.rohm.com

2012.02 - Rev.A

15/19

Technical Note

BH6456GUL

●I/O Peripheral Circuit

1) Pull up resistance of SDA terminal

SDA is NMOS open drain, so requires pull up resistance. As for this resistance value (R_PU), select an appropriate

value to this resistance value from micro-controller V_IL, I_L, and V_OL– I_OLcharacteristics of this IC. If R_PUis large,

action frequency is limited. The smaller the R_PU, the larger the consumption current at action.

2) Maximum value of R_PU

The maximum value of R_PUis determined by the following factors.

（Ⅰ）SDA rise time to be determined by the capacity (CBUS) of BUS line of R_PUand SDA should be tR or below.

And AC timing should be satisfied even when SDA rise time is late.

（Ⅱ）The BUS electric potential V₁to be determined by input leak total (IL) of device connected to BUS at output of “H” to

SDA BUS and RPU should sufficiently secure the input “H” level (VIH) of micro-controller and driver including

recommended noise margin 0.2VCC.

Micro-controller

BR24LX

VCC - I_L×R_PU- 0.2×VCC ≧ V_IH

R_PU

SDA terminal

V₁

0.8×VCC - V_IH

IL

∴R_PU≦

･････①

IL

Example.) VCC = 3V, I_L=10μA, V_IH= 0.7×VCC

from ①

0.8×3 - 0.7×3

R_PU≦

= 30kΩ

10×10^-6

Bus line capacity

CBUS

3) Minimum value of R_PU

The minimum value of R_PUis determined by the following factors.

Fig.6 2 wire Serial Interface 1

（Ⅰ）When IC outputs LOW, it should be satisfied that V_OLMAX= 0.4V, and I_OLMAX= 3mA.

VCC-V_OL

≦ I_OL

･････②

R_PU

（Ⅱ）V_OLMAX= 0.4V should secure the input “L” level (VIL) of micro-controller and driver including recommended noise

margin 0.1VCC.

V_OLMAX≦ VIL-0.1×VCC

Ex.) VCC = 3V, V_OL=0.4V, I_OL= 3mA, micro-controller, driver V_IL= 0.3×VCC

3 - 0.4

3×10^-3

R_PU≧

= 867[Ω]

And V_OL= 0.4[V], V_IL= 0.3×3 = 0.9[V]

Therefore, the condition (Ⅱ) is satisfied.

4) Pull up resistance of SCL terminal

WHEN SCL control is made at CMOS output port, there is no need but in the case there is timing where SCL

becomes “Hi-Z”, add a pull up resistance. As for the pull up resistance, one of several kΩ to several ten kΩ is

recommended in consideration of drive performance of output port of micro-controller.

www.rohm.com

2012.02 - Rev.A

16/19

Technical Note

BH6456GUL

●Cautions on Micro-controller Connection

1) R_s

In the 2 wire Serial Interface, it is recommended that SDA port is of open drain input/output. However, when to use

CMOS input / output of tri state to SDA port, inset a series resistance R_sbetween the pull up resistance R_puand the

SDA terminal of driver. This controls over current that occurs when PMOS of the micro-controller and NMOS of driver

are turned ON simultaneously. R_salso plays the role of protection of SDA terminal against surge. Therefore, even

when SDA port is open drain input/output, R_scan be used.

ACK

R_PU

SCL

R_s

H output of micro-controller

SDA

L output of Driver

Driver

Micro-controller

Over current flows to SDA line by H output of micro-controller

and L output of Driver

Fig.7 2 wire Serial Interface 2

2) Maximum value of R_s

Fig.8 Input / Output collision timing

The maximum value of R_sis determined by the following relations.

（Ⅰ）SDA rise time to be determined by the capacity (C_b) of BUS line of R_puand SDA should be tR or below.

And AC timing should be satisfied even when SDA rise time is late.

（Ⅱ）The BUS electric potential V₂to be determined by R_puand R_sat the moment when driver outputs “L” to SDA BUS

should sufficiently secure the input “L” level (V_IL) of micro-controller including recommended noise margin 0.1VCC.

VCC

R_PU

(VCC-V_OL)×R_S

V₂

+V_OL+0.1×VCC ≦ V_IL

R_PU+R_S

R_s

V_OL

I_OL

V_IL-V_OL-0.1×VCC

1.1×VCC-V_IL

∴R_s≦

×R_PU

････③

Bus line

capacity

C_b

Example) When VCC = 3V, V_IL= 0.3×VCC, V_OL= 0.4V, R_PU= 20kΩ,

from ③

V_IL

driver

micro-controller

0.3×3 - 0.4 - 0.1×3

Fig.9 2 wire Serial Interface 3

3) Minimum value of R_S

R_s≦

×20×10³= 1.67[kΩ]

1.1×3 - 0.3×3

The minimum value of R_sis determined by over current at BUS collision. When over current flows, noises in power

source line, and instantaneous power failure of power source may occur. When allowable over current is defined as I,

the following relation must be satisfied. Determine the allowable current in consideration of impedance of power

source line in set and so forth. Set the over current to driver 10mA or below.

VCC

R_S

≦ I

････④

RPU

L output

RS

Exampre) When VCC=3V, I=10mA, From ④

3

Over current I

R_s≧

=300[Ω]

10×10^-3

H output

Microcontroller

Driver

Fig.10 2 wire Serial Interface 4

www.rohm.com

2012.02 - Rev.A

17/19

Technical Note

BH6456GUL

●Operation Notes

1) Absolute maximum ratings

Use of the IC in excess of absolute maximum ratings, such as the applied voltage (VCC) or operating temperature

range (Topr), may result in IC damage. Assumptions should not be made regarding the state of the IC (short mode or

open mode) when such damage is suffered. A physical safety measure, such as a fuse, should be implemented

when using the IC at times where the absolute maximum ratings may be exceeded.

2) Storage temperature range (Tstq)

As long as the IC is kept within this range, there should be no problems in the IC’s performance. Conversely,

extreme temperature changes may result in poor IC performance, even if the changes are within the above range.

3) Power supply and wiring

Be sure to connect the power terminals outside the IC. Do not leave them open. Because a return current is

generated by a counter electromotive force of the motor, take necessary measures such as putting a Capacitor

between the power source and the ground as a passageway for the regenerative current. Be sure to connect a

Capacitor of proper capacitance (0.1μF to 10μF) between the power source and the ground at the foot of the IC, and

ensure that there is no problem in properties of electrolytic Capacitors such as decrease in capacitance at low

temperatures. When the connected power source does not have enough current absorbing capability, there is a

possibility that the voltage of the power source line increases by the regenerative current an exceeds the absolute

maximum rating of this product and the peripheral circuits.

Therefore, be sure to take physical safety measures such as putting a zener diode for a voltage clamp between the

power source an the ground.

4) Ground terminal and wiring

The potential at GND terminals should be made the lowest under any operating conditions. Ensure that there are no

terminals where the potentials are below the potential at GND terminals, including the transient phenomena. The

motor ground terminals RNF and PGND, and the small signal ground terminal GND are not interconnected with one

another inside the IC. It is recommended that you should isolate the large-current RNF pattern and PGND pattern

from the small-signal GND pattern, and should establish a one-point grounding at a reference point of the set, to

avoid fluctuation of small-signal G voltages caused by voltage changes due to pattern wire resistances and large

currents. Also prevent the voltage variation of the ground wiring patterns of external components. Use short and thick

power source and ground wirings to ensure low impedance.

5) Thermal design

Use a proper thermal design that allows for a sufficient margin of the power dissipation (Pd) at actual operating

conditions.

6) Pin short and wrong direction assembly of the device

Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any

connection error or if positive and ground power supply terminals are reversed. The IC may also be damaged if pins

are shorted together or are shorted to other circuit’s power lines.

7) Avoiding strong magnetic field

Malfunction may occur if the IC is used around a strong magnetic field.

8) ASO

Ensure that the output transistors of the motor driver are not driven under excess conditions of the absolute

maximum ratings and ASO.

9) TSD (Thermal Shut Down) circuit

If the junction temperature (Tjmax) reaches 150°C, the TSD circuit will operate, and the coil output circuit of the

motor will open. There is a temperature hysterics of approximately 25°C. The TSD circuit is designed only to shut off

the IC in order to prevent runaway thermal operating. It is not designed to protect the IC or guarantee its operation.

The performance of the IC’s characteristics is not guaranteed and it is recommended that the device is replaced after

the TSD is activated.

www.rohm.com

2012.02 - Rev.A

18/19

Technical Note

BH6456GUL

10) Regarding the input pin of the IC

This monolithic IC contains P⁺isolation and P substrate layers between adjacent elements to keep them isolated.

P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic

diode or transistor. For example, the relation between each potential is as follows:

When GND > Pin A, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic diode and transistor.

Parasitic elements can occur inevitably in the structure of the IC. The operation of parasitic elements can result in

mutual interference among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic

elements operate, such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin, should

not be used.

Resistor

Transistor (NPN)

Pin A

Pin B

B

C

N

E

Pin A

B

C

E

N

P⁺

N

P⁺

N

P⁺

P

N

Parasitic

element

P substrate

Parasitic

elements

Other adjacent

elements

GND

Parasitic element

Parasitic elements

GND

Fig.11 Example of Simple IC Architecture

●Ordering Information

G U

L

B H 6 4 5 6

E 2

Part Number

Package

VCSP50L1

Packaging and forming specification

E2: Embossed tape and reel

www.rohm.com

2012.02 - Rev.A

19/19

Notice

N o t e s

No copying or reproduction of this document, in part or in whole, is permitted without the

consent of ROHM Co.,Ltd.

The content speciﬁed herein is subject to change for improvement without notice.

The content speciﬁed herein is for the purpose of introducing ROHM's products (hereinafter

"Products"). If you wish to use any such Product, please be sure to refer to the speciﬁcations,

which can be obtained from ROHM upon request.

Examples of application circuits, circuit constants and any other information contained herein

illustrate the standard usage and operations of the Products. The peripheral conditions must

be taken into account when designing circuits for mass production.

Great care was taken in ensuring the accuracy of the information speciﬁed in this document.

However, should you incur any damage arising from any inaccuracy or misprint of such

information, ROHM shall bear no responsibility for such damage.

The technical information speciﬁed herein is intended only to show the typical functions of and

examples of application circuits for the Products. ROHM does not grant you, explicitly or

implicitly, any license to use or exercise intellectual property or other rights held by ROHM and

other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the

use of such technical information.

The Products speciﬁed in this document are intended to be used with general-use electronic

equipment or devices (such as audio visual equipment, ofﬁce-automation equipment, commu-

nication devices, electronic appliances and amusement devices).

The Products speciﬁed in this document are not designed to be radiation tolerant.

While ROHM always makes efforts to enhance the quality and reliability of its Products, a

Product may fail or malfunction for a variety of reasons.

Please be sure to implement in your equipment using the Products safety measures to guard

against the possibility of physical injury, ﬁre or any other damage caused in the event of the

failure of any Product, such as derating, redundancy, ﬁre control and fail-safe designs. ROHM

shall bear no responsibility whatsoever for your use of any Product outside of the prescribed

scope or not in accordance with the instruction manual.

The Products are not designed or manufactured to be used with any equipment, device or

system which requires an extremely high level of reliability the failure or malfunction of which

may result in a direct threat to human life or create a risk of human injury (such as a medical

instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-

controller or other safety device). ROHM shall bear no responsibility in any way for use of any

of the Products for the above special purposes. If a Product is intended to be used for any

such special purpose, please contact a ROHM sales representative before purchasing.

If you intend to export or ship overseas any Product or technology speciﬁed herein that may

be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to

obtain a license or permit under the Law.

Thank you for your accessing to ROHM product informations.

More detail product informations and catalogs are available, please contact us.

ROHM Customer Support System

http://www.rohm.com/contact/

www.rohm.com

R1120

A


型号：	BH6456GUL_12
厂家：	ROHM
描述：	System Lens Driver Series for Mobile Phone Cameras 2-wire serial interface Lens Driver for Voice Coil Motor(I2C BUS compatible) 系统镜头驱动器系列的手机摄像头的2线音圈电机串行接口镜头驱动器（ I2C总线兼容）驱动器电机手机
文件：	总20页 (文件大小：443K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BH6456GUL_12 [ROHM]

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