BM1C101F [ROHM]
作为功率因数矫正转换器(Power Factor Correction: PFC)+准谐振(Quasi-Resonant: QR)DC/DC转换器的多转换器IC,BM1C101F为带插座的产品提供优良的系统。本产品内置650V耐压启动电路/X-Cap放电功能,有助于实现低待机功耗。PFC部采用电压控制方式的临界模式(BCM),可通过Zero Current Detection(ZCD)降低开关损耗和噪声。通过电阻进行零电流检测,因此无需ZCD用辅助绕组,可减少偏置部电路的零件数量,降低损耗。DCDC部采用准谐振方式。此方式实现了软开关,有助于实现低EMI。外接开关MOSFET及电流检测电阻,可实现自由度高的电源设计。轻负载时通过启动脉冲串功能提高效率。内置双系统PFC输出过电压保护功能。内置任意负载的PFC ON/OFF功能,可降低待机功耗。内置丰富的保护功能(VCC过电压保护、外部锁存保护、掉电保护、软启动功能、逐周期过电流限制、过负荷保护等)。;型号: | BM1C101F |
厂家: | ROHM |
描述: | 作为功率因数矫正转换器(Power Factor Correction: PFC)+准谐振(Quasi-Resonant: QR)DC/DC转换器的多转换器IC,BM1C101F为带插座的产品提供优良的系统。本产品内置650V耐压启动电路/X-Cap放电功能,有助于实现低待机功耗。PFC部采用电压控制方式的临界模式(BCM),可通过Zero Current Detection(ZCD)降低开关损耗和噪声。通过电阻进行零电流检测,因此无需ZCD用辅助绕组,可减少偏置部电路的零件数量,降低损耗。DCDC部采用准谐振方式。此方式实现了软开关,有助于实现低EMI。外接开关MOSFET及电流检测电阻,可实现自由度高的电源设计。轻负载时通过启动脉冲串功能提高效率。内置双系统PFC输出过电压保护功能。内置任意负载的PFC ON/OFF功能,可降低待机功耗。内置丰富的保护功能(VCC过电压保护、外部锁存保护、掉电保护、软启动功能、逐周期过电流限制、过负荷保护等)。 开关 CD 软启动 脉冲 功率因数校正 插座 转换器 |
文件: | 总39页 (文件大小:1913K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Datasheet
AC/DC Drivers
Power Factor Correction and
Quasi-Resonant DC/DC converter IC
BM1C101F
General Description
■PFC Output level switched function
The compounded LSI of the Power Factor Correction (PFC)
converter and Quasi-Resonant (QR) controller type DC/DC
converter IC provides an optimum system for all products that
include an electrical outlet. BM1C101F has a built-in HV
starter circuit that tolerates 650V and X-Cap discharge
function, and contributes to low power consumption and high
speed start.
The PFC part operates by Boundary Conduction Mode
(BCM). It reduces the switching loss and the switching noise.
Because of zero current detection (ZCD) by a resistance, this
solution achieves no auxiliary winding and reduces external
parts and the bias current.
■PFC ON/OFF setting
■QR low power when load is light (Burst operation) and
frequency decrease function
■QR maximum frequency control (120kHz)
■QR_CS pin open protection and OCP function
■QR Over-Current Protection with AC compensation
■QR Soft Start function
■QR secondary side protection circuit of over-current
■QR_ZT pin 2 step timeout function and OVP function
Applications
The DC/DC part operates by Quasi-Resonant Mode This
method enables soft switching and helps to keep the EMI low.
With MOSFET for switching and current detection resistors as
external devices, a higher degree of design freedom is
achieved.
This IC has over voltage protection for the PFC output
terminal, which protects electrolytic capacitor by stopping
switching and makes the standby power consumption low by
the PFC ON/OFF control function. The IC includes various
protective functions such as VCC over voltage protection,
external latch protection, brown out protection, soft start
function, per-cycle current limiter and over load protection.
AC adapters, TV, Lighting, Household appliances (Vacuum
cleaners, Air cleaners, Air conditioners, IH cooking
heaters, Rice cookers, etc.).
Key Features
Operating Power Supply:
VCC
8.9V to 26.0V
80V to 500V
1.2mA (Typ)
Voltage Range:
Operating Current:
VH_IN
Normal
Burst
PFC
0.6mA (Typ)
Max frequency:
External setting
120kHz (Typ)
-40°C to+105°C
QR
The range of temperature:
Features
Package W(Typ) x D(Typ) x H(Max)
■PFC+QR Combo IC
SOP18
11.20mm × 7.80mm × 2.01mm pitch 1.27mm
■Built-in 650V tolerance start circuit
■VCC pin: under and over voltage protection
■Brown out function
■External latch terminal function
■PFC boundary conduction mode (voltage control)
■PFC Zero Cross Detection
■PFC variable max frequency
■PFC Dynamic & Static OVP function
SOP18
Typical Application Circuit
FUSE
Diode
Bridge
Filter
AC
P_VS
VCC
QR_ZT
SBD
P_IS
QR_OUT
QR_OUT
P_IS
13
P_IS
QR_CS
12
QR_CS
P_VS
11
P_VS
QR_CS
10
P_OVP
18
VH_IN
17
(N.C.)
16
15
14
P_TIMER QR_OUT P_OUT
QR_FB
BM1C101F
P_EO
6
COMP
5
BR
7
P_RT P_OFFSET
VCC
1
GND
2
QR_FB QR_ZT
3
4
8
9
μ-
com
BR
VCC
QR_FB
QR_ZT
BR
Figure 1. Application circuit
○Product structure:Silicon monolithic integrated circuit ○This product has no designed protection against radioactive rays
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BM1C101F
Pin Configuration
Figure 2. Pin Layout (Top View)
Pin Description
Table 1. I/O Pin Functions
ESD Diode
VCC GND
Pin Name
I/O
Pin No.
Function
VCC
GND
QR_FB
QR_ZT
COMP
P_EO
I/O
I/O
I
I
I
O
I
I
I
I
I
I
I
O
O
I
-
I
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
[General] Power supply pin
[General] GND pin
-
○
-
○
-
[ QR ] Feedback detection pin
[ QR ] Zero cross detection pin
[General] External latch input pin
[PFC] Error amplifier output pin
[General] Input AC voltage monitor pin
[PFC] Max frequency setting pin
[PFC] ON/OFF setting voltage
[PFC] Over voltage detection pin
[PFC] Feedback signal input pin
[ QR ] Over-current detection pin
[PFC] Zero cross detection pin
[PFC] External MOS drive pin
[ QR ] External MOS drive pin
[PFC] OFF time setting pin
-
○
○
○
○
○
○
○
○
○
○
○
○
○
○
-
-
-
-
BR
P_RT
-
-
P_OFFSET
P_OVP
P_VS
QR_CS
P_IS
P_OUT
QR_OUT
P_TIMER
N.C.
-
-
-
-
-
○
○
-
-
-
VH_IN
[General] Starter circuit pin
○
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BM1C101F
Block Diagram
FUSE
AC
85-
Diode
Bridge
Filter
P_OVP
P_VS
265Vac
ZTOVP
VCCOVP
100 us
Timer
-
+
150 us
Timer
Latch
OR
Internal
Supply
+
-
QR_ZT
P_OVP
ACIN
ERROR
AMP
+
-
4.5μA/
5.5μA
4μA/
5μA
+
POFFSET_OL
-
+
-
CSdetect
+
-
+
-
OR
GCLAMP
(12.5V)
P_VS
+
-
S
AND
POUT
-
+
+
-
Q
PRE
Driver
AND
OR
NOUT
R
100kΩ
Soft Start
OSC
OVP_ COMP
+
-
-
+
200us
Timer
P_OVP
2.5V
2.0V
2μA
+
-
Filter
PFCOFF
Delay
Timer
P_ OFFSET_OL
QR_ZT
+
-
1 shot
QRZT
AND
100mV
/200mV
OR
OR
ZT Blanking
OUT (H->L)0.6us
NOUT
TimeOut
GCLAMP
(12.5V)
S
R
AND
100
MAX Blanking
Frequency
(120kHz)
us
+
-
POUT
Timer
Q
5.00V
PRE
Driver
+
-
AND
BURST_OH
FBOLP_OH
30kΩ
NOUT
FB
0.3V
Timer
(128ms)
+
-
100kΩ
2.8/2.6V
CSdetect
OSC
300kΩ
100kΩ
CURRENT SENSE
-
GAIN Setting
(Softstart)
-
+
LeadingEdge
0.5V
Blanking
(250ns)
SS10ms SS20ms SS40ms
SS05ms
Softstart /ACcorrection
Figure 3. Block Diagram
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Description of Blocks
(1) Starter Block (VH_IN Pin)
The IC builds in starter circuit which tolerates 650V. It is shown in Figure-4. For that it enables low standby mode current
consumption and high speed starting.
After starting, current consumption is idle ISTART3 (typ=8uA) only. (Shown in Figure-5)
To supply electric power from AC supply to VH_IN pin, diode rectification connection is needed from both AC input.
It is shown in Figure-4.
ISTART2
ISTART1
ISTART3
0
Vsc
VUVLO1
10V
VCC Voltage [V]
Figure 4. Starter Circuit Block Diagram
Figure 5. Start-up Current vs VCC Voltage
In addition, VH_IN pin has an X-Cap discharge function. If the input voltage peak of BR pin goes below 1.0V, discharge
function starts after passing 256ms. X-Cap discharge is the function that once VH_IN charge moves from VH_IN to VCC pin
by VCC recharge function, IC discharges VCC charge by X-Cap discharge node(Figure-4(a)).
In the case there is no power supply from the auxiliary winding such as a light load, the OLP state of the secondary side
output, the IC operates VCC recharge function. VCC recharge function charges VCC pin from VH_IN pin, VCC pin voltage
rises. As the result, X-cap is discharged. When VCC recharge function operates, the current path is Figure 4 (b). After it past
256ms timer from pulling out the outlet, X-Cap function discharges the charge of X-cap by the current path of Figure-4(a).
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BM1C101F
(2) Start-Up Sequence
(Low temperature start up: Cold Start Function, Soft Start Operation)
This IC has a built-in AC voltage detection function and this switches the reference voltage magnification of PFC and CS
over current detection voltage of QR and POFFSET pin current. When BR pin peak voltage > VACIN1 (typ=2.5V), IC
judges ACIN=H. When BR pin peak voltage <VACIN1, IC judges ACIN=L.
The reference magnification of PFC:
The internal reference magnification of PFC changes.
ACIN=H: ×1.0, ACIN=L: ×0.65
The over current detection switching of QR: FB/CS gain of QR changes and
The over current detection voltage also changes.
ACIN=H: ×0.90, ACIN=L: ×1.00
The POFFSET current at PFC OFF: POFFSET current at PFC=OFF is changed
ACIN=H: 5.0uA, ACIN=L: 5.5uA
The POFFSET current at PFC ON : POFFSET current at PFC=ON is changed
ACIN=H: 4.0uA, ACIN=L: 4.5uA
At starting, IC initial condition is ACIN=L except cold start status.
When the VCCUVLO protection function and the brown out function are released, the IC starts to operate.
[Cold Start]
At the time of start-up, the IC operates under the condition: PFC reference voltage magnification =×1.0 and QR over
current detection voltage =×1.0. This is the function that enables the stable start-up within required time by a momentary
rising of PFC output voltage in order not to make start-up time longer during low temperature for applications with
thermistor. At starting QR starts with a soft start. During this time PFC stops. And PFC can start operation after it passed
4ms from a soft start and P_EO voltage is charged more than about 0.8V.
About the above the cold start operation, PFC operates until P_VS voltage rises to 90% of AC 240V. When PFC output
voltage rises to 90% the cold start is released. After cold start operation, the ACIN logic is set to ACIN=L when the
detection of AC voltage hasn’t finished yet. When the stable AC waveform is applied seven times in a row, the IC detects
AC peak voltage by BR pin and the setting of ACIN=H/L is determined. When QR output is stable and A quarter of the
QRFB voltage(CS detect voltage) is lower than POFFSET voltage, PFC stops after the time set at P_TIMER pin. Refer to
Figure 6.
Operation explanation of Figure 6
A: Input voltage VH_IN is applied. Then the input voltage ×√2 is outputs from PFC.
B: Charge current flows from VH_IN pin to the VCC pin capacitor through the start circuit. Then VCC pin voltage rises.
C: When VUVLO1 (typ=13.5V) < VCC pin, VCC UVLO is released and the internal regulator rises.
D: When the IC detects BR pin voltage > 1.0V on the condition that VCC ULVO is released, and the brown out function is
released.
E: QR DCDC starts operation. When QR switching operation starts, secondary output VOUT raises. After QR DC/DC
starts up, secondary output voltage is needed to be stable within TFOLP(typ=128ms).During the start-up the IC operates
in below conditions by cold start function until PFC become 90% of AC230V.
Over current detection of QR = AC100V (QRFB/QRCS=4.0)
Output voltage of PFC = AC230V (PFC standard voltage=2.5V)
After the cold start, the IC operates under the status AC 100V until AC voltage is detected.
And if POFFSET pin voltage>CS detect voltage after the cold start, PFC stops after the setting time of PTIMER pin.
[QR Start-Up Operation]
E: IC adjusts the over-current limiter of QR DC/DC part during the operation of soft start1 against over voltage and
current rising. IC operates in the soft start1 state for tss1(typ=0.5ms). Then maximum current of QR is limited to 12%.
F: IC adjusts the over-current limiter of QR DC/DC part during the operation of soft start2 against over voltage and
current rising. IC operates in the soft start2 state for tss2 (typ=1.0ms). Then maximum current of QR is limited to 25%.
G: IC adjusts the over-current limiter of QR DC/DC part during the operation of soft start3 against over voltage and
current rising. IC operates in the soft start3 state for tss3 (typ=2.0ms). Then maximum current of QR is limited to 50%.
H: IC adjusts the over-current limiter of QR DC/DC part during the operation of soft start4 against over voltage and
current rising. IC operates in the soft start4 state for tss4 (typ=4.0ms). Then maximum current of QR is limited to 75%.
I: When TSS4 (typ=4ms) passed from start-up, soft start function finishes.
J: When secondary output voltage is stable, the QR_FB voltage is also stable by constant value corresponding to flow
current from photo coupler. At normal state, QR_FB voltage is QR_FB<VFBOLP1B (typ=2.60V).
[PFC Start-Up Operation]
I: When P_VS pin voltage is more than VP_SHORTH (typ=0.3V), the IC judges that the PFC output is normal
condition.After finishing the soft start of QR, PFC starts to operate when P_EO voltage is over 0.8V. At this time PFC
output rises to 90% of setting voltage of ACIN=H.
K: After PFC output rise to 90%, the cold start is released and PFC reference voltage and QR gain is set to ACIN=L.
L: AC is detected seven consecutive by BR pin. The operation is started by ACIN setting controlled by AC voltage. The
IC operates under the condition PFC reference voltage
=
2.5V because ACIN=H is detected.
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BM1C101F
OK
OK
OK
Normal Operation
12%25
50%
75%
Output Setting Voltage
VFOLP(typ=2.6V)
OK
VPGUPH(typ=2.25V)
P_VSAMPH
ACIN=L
ACIN=H
Figure 6. Start-up Sequence Timing Chart
(3) VCC Pin Protection Function
The IC builds in VCC low voltage protection function, ”VCC UVLO (Under Voltage Lock Out)”, VCC over voltage
protection function, “VCC OVP (Over Voltage Protection)”, and VCC CHARGE function that operates in case the VCC
voltage drops. VCC UVLO and VCC OVP are for stopping switching to prevent the switching MOSFET from destroying
at abnormal voltage. VCC charge function stabilizes the secondary output voltage by stabilizing VCC voltage to charge
the power from the high voltage line to VCC pin through the starter circuit when the VCC voltage drops.
And VCC pin releases latch protection when VCC voltage is low.
(3-1) VCC UVLO/VCC OVP Function
VCC UVLO is an auto recovery comparator that has voltage hysteresis. VCC OVP is latch protection. VCCOVP has
mask time to prevent a false detection by surge etc. When the situation of VCC pin voltage > VOVP (typ=27.5) continues
for TLACH (typ=100us), OVP protection is operated.
(3-2) VCC Charge Function
After the VCC pin voltage >VUVLO1, once VCC < VCHG1 VCC charge function operates. Then VCC pin is charged from
VH_IN pin through starter circuit. The function prevents VCC starting failure. In charging VCC, PFC switching operation
is stopped to stable VCC pin charge. When the VCC pin voltage rises to VCC >VCHG2, VCC charging is stopped, and
PFC starts to work. The operations are shown in figure-7. However, as VH_IN voltage is AC input, VCC is not charged
in the range of low voltage. During this time, VCC charging function operates but VCC pin is not charged. Even If the
AC voltage is low, adjust the value of VCC capacitor in order for VCC pin not to become lower than UVLO and more
than 22uF is recommended as the value of VCC capacitor. And to prevent thermal runaway, this function also stops
when the overheating of the IC operates.
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BM1C101F
VH_IN
p
p
p
Time
ON
VCC CHARGE
Function
OFF
ON
VCC OVP
OFF
OFF
ON
QR _OUT
Switcing DC/DC
OFF
OFF
OFF
OFF
OFF
ON
P_OUT
Switching
OFF
PFC
L : Normal
H : Latch
Internal
Latch Signal
TLATCH
Time
G
I
JK
A
M
A
B
C D
E
F
H
B
L
N
O
P
Figure 7. VCC UVLO / VCC OVP / VCC Charge Function Timing Chart
A: VH _IN pin voltage is applied, VCC pin voltage starts rising.
B: VCC > VUVLO1, VCC UVLO is released, QR DC/DC operates. After that, PFC operation starts at QR soft-start finished.
C: VCC > VOVP, VCC OVP detects the overvoltage in the IC.
D: If the state of VCC > VOVP continues for TLATCH (typ=100us) time, switching stops by the OVP function. (Latch mode).
E: Because of latch protection, PFC and QR don’t operate switching. Then, VCC voltage decreases because there is
supply from an auxiliary winding. If VCC pin voltage<VCHG1, VCC pin voltage rises by operating VCC recharging
function.
F: VCC pin voltage > VCHG2, VCC recharge function stops. Because of latch protection, PFC and QR don’t operate
switching. By the operation of E and F, latch is not released since VCC voltage is stabilized. For that, latch protection is
not released.
G: (The same as E.)
H: (The same as F.)
I: The voltage of VH_IN is stopped to supply. Then the brown out is detected and X-cap electrical discharge is started.
J: Because VH_IN is lost, VCC charging function operates but VCC is not charged. So VCC voltage decreases. If VCC
pin voltage < VUVLO2, VCC UVLO function operates.
K: VCC<VLATCH, Latch is released.
L: When the secondary output has no load, QR DCDC works burst operation. VCC pin voltage drops because power
does not supply from auxiliary winding
M: VCC<VCHG1 VCC recharging function operates.
,
N: VCC> VCHG2, VCC recharge function stops.
O: (The same as M.)
P: To increase a load, the power supply of the auxiliary winding starts.
However when the VCC recharge function operates, the standby power is increased because the loss of (VHIN voltage
– VCC voltage)×VH current occurs. So design the application which supplies electricity from the auxiliary winding to
VCC during no load. And operate VCC recharge function in time of a start-up assist, an over load protection, and a latch
protection.
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(4) COMP Pin (Outside forced stop function)
The COMP pin is used for forced stop function. When the COMP pin is lower than VCOMP (typ=0.5V), PFC part
and QR DC/DC part stop. A detection timer TCOMP (typ=150us) is builds in to prevent detection errors caused by noise.
The stop mode is latched.
The COMP pin is pulled up by RCOMP (typ=25.9kΩ), When the COMP pin is pulled down by a lower resistance value
than RT(3.70kΩ.typ), IC detects the abnormality and IC operates latch off. The application examples are shown in
Figure 8, 9 and 10.
Overheating Protection by NTC Thermistor
When a thermistor is attached to the COMP pin, latch stop can be operated when overheating occurs.
In the case of this application, it should be designed so that the thermistor resistance becomes RT (typ=3.70kΩ) when
overheating is detected.
(Figure 8, 9 are application circuit examples in which latching occurs when Ta = 110°C.)
Please set the capacitor value less than 0.01uF to stabilize COMP pin voltage if COMP pin is attached capacitor to
GND.
20.0
18.0
16.0
14.0
12.0
10.0
8.0
VREF
R
(Ty25.9k)
COMP
-
+
RTt(typ3.7kΩ)
Detect
6.0
V
NTC
4.0
2.0
(T0.5V)
Thermistor
0.0
0
20
40
60
80 100 120 140 160 180 200
Temparature T[℃]
Figure 8. COMP Pin Overheating Protection Application
Figure 9. Temperature-Thermistor Resistance Value
Characteristics
Secondary Output Voltage Overvoltage Protection
A photo-coupler is attached to the COMP pin to perform detection of secondary output overvoltage.
VO
Typ25.9k
COMP
-
+
Figure 10. Output Overvoltage Protection Application
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(5) BR Pin
The BR Pin has built-in three functions below. Usage example is shown in Figure 11.
1: Low AC voltage protection. (Blown IN/OUT) If BR pin voltage peak is lower than VBR1 (typ=1.0V), the operation is
stopped.
2: When the condition is detected that BR pin voltage peak is lower than VBR1 (typ1.0V), and x-cap discharging
function is operated from VH_IN pin.
3: AC input voltage judges whether 240V or 100V, and PFC reference voltage and voltage level of the QRCS
over-current detection and POFFSET current are switched by ACIN logic. When the peak of BR pin voltage is
higher than VACIN(typ=2.5V), IC judges ACIN=H. And when it is lower, it judges AC100V.
The Input voltage to the BR pin is the full-wave / half-wave rectified AC waveform of 50Hz/60Hz voltage divided by
resistance. In addition, in order to stabilize the input waveform, the capacitor (0.1nF to 10nF) must be connected close
to the BR pin.
(5-1) Low AC Voltage Protection (Blown IN/OUT)
When AC voltage is low, blown out function can stop the PFC block and QR block operation. The AC input voltage is
connected to the BR pin through two divider resistors. When the peak voltage of the BR pin is higher than VBR1
(typ=1.0V), the IC judges normal state and QR DC/DC starts operation and QR and PFC start to operate.
If the AC outlet is plugged out after the IC operates, QR DCDC part stop after TBR (typ=256ms) after the IC detects
that BR pin exceeds VBR (typ=1.0V) finally. Moreover, X capacitor discharge function is operated.
(5-2) X Capacitor Discharge Function
After it past TBR (typ=256ms) from AC voltage dropping, X-capacitor discharge function is operated.
X-capacitor discharge function operates to be linked VCC recharge function after VCC is discharged.
Figure 11. Blown IN/OUT Application Circuits
(1) When AC input voltage drops BR < VBR1(typ=1.0V) for
more than 256ms, QR DC/DC operation stops
In this case, X-cap discharge function starts to operate.
(2) When the AC outlet is pulled out, BR pin voltage < VBR1
(typ=1.0V), QR DC/DC output stops after 256ms from the time
which the BR terminal voltage drops to 1.0V or less.
In this case, Xcap discharge function operates.
(3) If the AC outlet is pulled out, BR pin voltage is higher than
VBR1 (typ=1.0V), QR DC/DC does not stop.
After TBR (typ=256ms) from the time which the BR pin peak
voltage drops to VBR1 (typ=1.0V), QR DC/DC stops and X-cap
discharge function operates.
Figure 12. BR Pin Timing Chart
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(5-3) PFC Output Voltage Switching Function
In order to make PFC boosting rate constant for AC input voltage that varies by region, PFC output voltage value is
switched by AC100V or AC240V. For example, PFC output voltage is set to 260V in the case of AC100V-based input
and PFC output voltage is set to 400V in the case of AC240V-based input. As a result, the PFC efficiency of AC100V
is improved and the noise of AC100V is low.
This function is detected AC100V or AC240V by BR pin voltage divided resistor from AC input voltage. (Refer to
Figure 13). See the timing chart of Figure 14, When the waveform (voltage higher than the voltage VACIN (typ=2.5V)) of
9 cycles is applied continuously, IC judges AC240V system. Then, GM amplifier reference voltage inside IC is changed
from VP_VSAMPL (typ=1.625V) to VP_VSAMPH (typ=2.5V), and the PFC output voltage is changed from 260V to 400V.
Figure 13. PFC output voltage switching function
Figure 14. PFC output voltage switching Timing Chart
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(6) The Quasi-Resonant DC/DC Driver
QR part of IC operates with PFM (Pulse Frequency Modulation) mode method. By monitoring the QR_FB pin,
QR_ZT pin, and QR_CS pin, the IC supplies optimum system for QR DC/DC operation. IC controls ON width (Turn Off)
of external MOSFET by QR_FB pin and QR_CS pin. And IC controls OFF width (Turn ON) of external MOSFET by
QR_ZT pin. The details are shown below. (Refer to Figure 15)
VS
VOUT
VH
Va
CM
VCC
NOUT
12V Clamp
Circuit
+
-
ZT OVP Comp.
(LATCH)
Rzt1
Rzt2
1
shot
ZT
Comp.
QR_ZT
SBD
+
-
QRZT
TimeOut
OR
AND
7V
Czt
POUT
SET
ZT Blanking
OUT(H->L)
0.5us
100mV
/200mV
S
R
AND
OR
Q
QR_OUT
NOUT
PRE
Driver
FBOLP_OH AND
AND
NOUT
Max frequency
control
VREF(4V)
RESET
30k
Burst
Comp.
QR_FB
+
-
VREF(4V)
Cfb
0.3V
FBOLP_OH
OFF Timer
(2048ms)
FB_OLP
+
1MΩ
ON Timer
(128ms)
-
2.8V/2.6V
DCDC
Comp.
300kΩ
100kΩ
CURRENT SENSE
FB/4
-
-
+
0.50V
QR_CS
Leading Edge
Blanking
SS0.5ms SS1.0ms SS2.0ms SS4.0ms
Softstart/ ACcorrection
RS
GND
Figure 15. DC/DC Block Diagram
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(6-1) Determination of ON width (Turn OFF)
ON width is controlled by QR_FB and QR_CS. The IC decides ON width by comparison between the value which
divide QR_FB pin by AVCS1 (typ=4) voltage and QR_CS pin voltage. CS Limiter has changed comparator level lineally
by QR_FB voltage shown in Figure-16. QR_CS voltage is also used over current limiter per pulse.
By change over current limiter level and maximum blanking frequency by QR_FB voltage, IC regulates output.
mode1: Burst operation
mode2: Frequency reduction operation (reduce max frequency)
mode3: Max frequency operation
mode4: Over load operation (To detect over load state, IC stops switching)
Figure 16. QR_FB Pin Voltage – Over-Current Limiter, Max Frequency Characteristics
To adjust over-current limiter level, CS Over-Current Protection voltage is switched in soft-start, AC voltage.
Vlim1 and Vlim2 are changed below.
Table 2. Over-Current Protection Voltage Detail
AC=100V AC=240V(PFC=OFF)
AC=240V(PFC=ON)
Soft Start
Vlim1
Vlim2
Vlim1
Vlim2
Start to 0.5ms
0.5ms to 1ms
1ms to 2ms
2ms to 4ms
4ms ≤
0.063V (12%)
0.125V (25%)
0.250V (50%)
0.375V (75%)
0.500V (100%)
0.009V (1.8%)
0.019V (3.8%)
0.038V (7.6%)
0.056V (19%)
0.75V (25%)
0.056V (11%)
0.113V (23%)
0.225V (45%)
0.338V (68%)
0.450V (90%)
0.008V (1.7%)
0.017V (3.4%)
0.034V (6.8%)
0.051V (10.1%)
0.068V (13.5%)
* (percent) is shown comparative value with Vlim1 (typ =0.5V) in normal operation.
The reason that distinguishes between AC100V and AC230V is by CS over-current protection voltage switch function which is shown in
(6-3).
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(6-2) LEB (Leading Edge Blanking) Function
When a MOSFET for switching is turned ON, surge current occurs because of capacitance or rush current. Therefore,
when QR_CS voltage rises temporarily, the over-current limiter circuit may result to miss detections. To prevent miss
detections, the IC has a built-in blanking function which masks for TLEB (typ=250ns) from switching QR_OUT pin from
L to H. This blanking function enables to reduce noise filter of QR_CS pin.
(6-3) QR_CS Pin Over-Current Protection Switching Function
IC has changed PFC output voltage. When PFC output voltage changes high, ON time is short. As a result, maximum
capable power increases for constant over-current limiter. For that while monitoring BR pin (ACIN detect voltage) the IC
switches the over-current detection of the IC. In case of high voltage (AC230V) and PFC working, IC changes
over-current comparator level to ×0.9 multiple of normal level.
(6-4) Determination of OFF Width (Turn on)
OFF width is controlled at the QR_ZT pin. When QR_OUT is Low, the power stored in the coil is supplied to the
secondary-side output capacitor. When this power supply ends as there is no more current flowing to the secondary
side, the drain pin voltage of switching MOSFET drops. Consequently, the voltage on the auxiliary winding also drops.
A voltage that was resistance-divided by Rzt1 and Rzt2 is applied to QR_ZT pin. When this voltage level drops to VZT1
(typ=100mV) or below, MOSFET is turned ON by the ZT comparator. Since zero current status is detected at the
QR_ZT pin, time constants are generated using Czt, Rzt1, and Rzt2. Additionally, a ZT trigger mask function (described
in section 6-5) and a ZT timeout function (described in section 6-6) are built in IC.
In addition, the voltage on auxiliary winding becomes negative value while the switching is turned ON, When the
surge voltage negative is input to the QR_ZT pin, IC may be mal-functioned. For this reason, preventing QR_ZT
voltage is lower than -0.3V, Please connect a Schottky diode between the pin and GND. (Refer to Figure 15) And,
when the diode flows large leak current, ZT voltage is changed, ZTOVP level has changed. For the reason, it needs to
select low leakage current diode in high degree. The Schottky diode is recommended RB751CM-40, RB530VM-30,
and RB751VM-40 (made by Rohm).
(6-5) ZT Trigger Mask Function
When MOSFET is switched from ON to OFF, surge noise may occur at the QR_ZT pin.
Then, the ZT comparator and ZTOVP comparator are masked for the TZTMASK time to prevent ZT comparator operation
errors. (Figure 17)
Figure 17. The Function of QR_ZT Trigger Mask.
A: DC/DC OFF => ON
B: DC/DC ON => OFF
C: Since a noise occurs to QR_ZT pin at B, IC masks ZT comparator
and ZTOVP comparator detection for TZTMASK time.
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(6-6) ZT Timeout Function
(6-6-1) ZT Timeout Function 1
When QR_ZT pin voltage is not higher than VZT2 (typ=200mV) for TZTOUT1 such as start or low output voltage, or
QR_ ZT pin shorts to ground, IC turns on MOSFET by force. (Figure 18)
(6-6-2) ZT Timeout Function 2
After ZT comparator detects VZT1 low voltage level, when IC does not detect a following VZT1 low voltage level
within TZTOUT2, IC turns on MOSFET by force. After ZT comparator detects one bottom per one pulse, the function
operates. For that, it does not operate at start or at low output voltage. When IC turns on more than 2nd bottom number,
IC cannot detect QR_ZT low voltage level by decreasing auxiliary winding voltage. Then, the function is operated.
Figure 18. The Function of ZT Time Out
A: At the starting, IC starts to operate by ZT timeout function1 for QR_ZT=0V.
B: MOSFET turns ON
C: MOSFET turns OFF
D: QR_ZT voltage decreases but the IC is not turned on by the maximum frequency function. During this function
operated, QR_ZT peak voltage is lower than VZT2 (typ=200mV) because of a reduction of QR_ZT pin vibration. After
this, the maximum frequency function is released.
E: MOSFET turns ON by ZT timeout fucntion2 after TZTOUT2 (typ=24us) from D point.
F: QR_ZT voltage decreases but the IC is not turned on by the maximum frequency function. During this function
operated, QR_ZT peak voltage is lower than VZTOUT2 (typ=200mV) because of a reduction of QR_ZT pin vibration.
G: MOSFET turns ON by ZT timeout fucntion2 after TZTOUT2 (typ=24us) from F point.
H: QR_ZT pin is short to GND.
I: MOSFET turns ON by ZT timeout function1 after TZTOUT1 (typ=70us).
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(6-7) Soft Start Sequence
Normally, when AC voltage is applied there is a large amount of current flow then secondary the output voltage and
current overshoot. To prevent it, the IC has a built-in soft-start function. When VCC pin voltage is lower than VUVLO2
(typ=8.2V), IC is reset. After that, when AC voltage is applied, the IC operates soft-start. The soft start function is shown
below:
start to 0.5ms
0.5ms to 1ms
1ms to 2ms
2ms to 4ms
4ms ≤
=>
=>
=>
=>
=>
Set QR_CS limiter to 12.5% of normal operation.
Set QR_CS limiter to 25% of normal operation.
Set QR_CS limiter to 50% of normal operation.
Set QR_CS limiter to 75% of normal operation.
normal operation
(6-8) QR_ZT OVP (Over Voltage Protection)
The built-in OVP function to QR_ZT pin of the IC has a protection type that is latch mode. ZTOVP corresponds to DC
voltage detection and pulse detection for QR_ZT pin.
For DC detection, when the QR_ZT pin voltage is over VZTL(typ=5.0V) for TLATCH(typ=100us), IC starts to detect ZTOVP
function. For pulse detection, IC detects high voltage pulse of 3 count and TLATCH(typ=100us) timer.
ZT OVP function operates in all states (normal state and over load state and burst state) after TZTMASK(typ=0.5us) to
prevent ZT OVP from miss-detecting by surge noise,.
For pulse detection, ZT OVP operation starts detection after TZTMASK delay time from QR_OUT: H->L
QR_OUT
VZT2
QR_ZT
VZT1
ZT OVP
Comparator
Tztmask
Tztmask
Tztmask
Tztmask
Tztmask
Tztmask
1
2
3
ZT OVP Detect
Latch Stop
TLATCH(typ=100us)
C
A B
D
Figure 19. The Function of Latch Mask and ZT OVP
A: When QR_OUT voltage is changed from H to L, the surge occurs at QR_ZT pin. However, QR_ZT pin OVP is not
detected by TZTMASK (typ=0.5us).
B: After it passes TZTMASK time (typ=0.5us) from A point, the IC detects QR_ZT pin OVP by ZT OVP comparator when
QR_ZT voltage > VZTL (typ=5.0V).
C: When ZTOVP comparator counts 3 pulse, TLATCH timer (typ=100us) operates.
D: When the situation of pulse or DC of QR_ZT pin voltage > VZTL (typ=5.0V) continues for TLATCH timer (typ=100us)
from C point, IC operates latch protection by QR_ZT OVP.
(6-9) QR_CS Open Protection
When QR_CS is OPEN, to prevent a malfunction of QR_OUT pin by a noise, the IC has built-in QR-CS pin open
protection circuit. When QR_CS is open, QR_OUT switching is stopped by the function. (Auto-recovery protection.)
Figure 20. QR_CS Open Protection Circuit.
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(6-10) OUTPUT over Load Protection (FB OLP Comparator)
Over load protection is the function that monitors the load state of secondary output by QR_FB pin, and fixes
QR_OUT pin on L. In over load status, photo-coupler has no current flow and QR_FB pin rise, over load protection is
detected. If the condition continues for TFOLP (typ=128ms), IC judges it is over load state, and QR_OUT pin and
P_OUT pin is fixed to L. After QR_FB voltage is over VFOLP1A (typ=2.8V), if QR_FB voltage is lower than VFOLP1B
(typ=2.6V) within TFOLP (typ=128ms), over load protection timer is reset.
Because QR_FB is pull-up by a resistor to internal voltage , QR_FB voltage starts to operate in the state which is
more than VFOLP1A (typ=2.8V) in starting. For that, please set the stable time of secondary output voltage within TFOLP
(typ=128ms) from the starting. After detecting over load, IC is stopped for TOLPST (typ =2048ms), and it is on
auto-recovery operation. At this moment, the IC operates a soft start. In stopping switching, though VCC voltage
decreases, the IC keeps the condition VCC pin voltage > VUVLO2 because VCC recharging function charges VCC
voltage from the starting circuit.
switching
switching
Figure 21. Auto Restart Operation by Over Load Protection.
A: Because of QR_FB > VFOLP1A, FBOLP comparator detects over load.
B: When the state of A continues for TFOLP (typ=128ms), the IC stops switching by over load protection.
C: During stopping switching by over load protection, VCC voltage drops. When VCC voltage is lower than VCHG1
VCC re-charge function operates, and VCC voltage rises.
,
D: When VCC voltage is higher than VCHG2 by re-charge function, VCC recharge function is stopped.
E: It takes for TOLPST (typ=2048ms) from B point until IC starts switching with soft-start.
F: While over load state continues, QR_FB voltage is over VFOLP1A. When it passes for TFOLP (typ=128ms) from E,IC
stops switching.
G: During stopping switching, VCC voltage drops. When VCC voltage becomes lower than VCHG1, VCC re-charge
function operates and VCC voltage rises.
H: When VCC voltage is higher than VCHG2 by re-charge function, VCC recharge function is stopped.
(6-11) QR_OUT Pin Voltage Clamp Function
For the purpose of protecting the external MOSFET, H level of QR_OUT is clamped to VOUTH (typ=12.5V)
It prevents gate destruction of MOSFET by rising VCC voltage. (refer to Figure 22)
Figure 22. The Simple Circuit of QR_OUT Pin.
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(7) Power Factor Correction (PFC: Power Factor Correction) Part
The Power Factor Correction Circuit is a voltage control method with the PFM boundary conduction mode. Because
of this mode, ON width is fixed for a load. The operation circuit is shown is Figure 23 and Timing chart is shown in
Figure 24.
Switching Operation
(1)
(2)
(3)
Inductor current (IL) increases after MOSFET changes to ON.
When Vramp voltage becomes higher by comparing with the slope set by P_RT pin, MOSFET turns OFF.
MOSFET is set to be ON after P_IS pin detects at the zero point.
Figure 23. The Operation Circuit of PFC.
Figure 24. The Switching Timing Chart.
ON width is determined by Vramp voltage and VP_EO pin voltage which controlled by loads. Vramp waveform is
generated in the inside of the IC. Using this ON width fixing operation, peak current is decided by the below formula.
IL = Vac × Ton/L1 (IL: coil current, Vac: input voltage, ton: ON width, L1: PFC inductance)
In case of constant loads, IL is determined according to the value of Vac because Ton and L1 are a fixing value.
As a result, there is no phase difference between AC current and AC voltage, and a higher harmonic wave becomes
smaller. Zero current detection operates with a negative voltage at P_IS pin. The current flowing in sense resistor is
detected by voltage.
If currents except for PFC loop flow to this resistor by the pattern of application board, the operation becomes an
unstable condition because it can’t detect current accurately. For that, please pay attention to the pattern of boards
making application boards.
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(7-1) gmAMP
P_VS pin monitors a voltage divided resistors of PFC output voltage. P_VS voltage has the piled up ripple voltage of
AC frequency (50Hz/60Hz).
The gmAMP filters this ripple voltage and controls the voltage level of P_EO, by responding to error of P_VS pin
voltage and internal reference voltage VP_VSAMPH / VP_VSAMPL (typ=2.5V/1.625V).
Please remove the ripple of AC frequency by an error amp which is configured by P_EO pin shown in figure 25.
Gm constant is designed 44uA / V.
Figure 25. The Block Diagram of gmAMP.
PFC works switching operation within the P_EO voltage range from about 0.8V to 3.0V. As P_EO pin voltage rises, the ON
width of P_OUT pin becomes longer. And when it becomes lower than about 0.8V, the switching operation is stopped. For that,
as P_EO pin is shorted to GND forcibly by the exterior, it enables to stop the PFC operation.
The transfer function of an error amp is shown below.
Vout
Vin
1
G
gm Z gm
1
1
1
jC1
1
Rout R1
R2
jC2
(In this formula, Rout means an output impedance of an amp.)
In the case of attaching R1, P_EO voltage is clamped by the voltage which is multiplied by gm amplifier current and R1
If R1 is attached, R1 should be higher than 1MΩ. Basically, it is recommended that R1 is not attached.
Figure 26 shows this specific characteristic.
Figure 26. gmAMP specific characteristic of frequency
According to the transfer function and Figure 26,
If you want the gain of A area to rise, please raise R1.
If you want pole between A to B to lower, please raise C2
If you want the gain of C area to rise, please raise R2.
If you want pole between C to D to lower, please raise C1
The whole of the transfer function as PFC determined by not only error amp but also IC peculiar gain, LC resonance,
and the voltage dividing resistor of PFC output. Please set the invariable of the error amp and regulate the AC
frequency in order it not to appear at P_EO pin. And it is necessary to check in real applications.
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(7-2) P_VS Short Protection
The PFC built-in short protection function at P_VS works by stopping switching at P_OUT when P_VS voltage <
VP_SHORTH / VP_SHORTL (typ:0.3V/0.195V: -92% voltage of PFC output). The operation is shown is Figure 27.
Figure 27. The Short Protection of P_VS Terminal
(7-3) Gain Boost Function in P_VS low Voltage
When the output voltage lowers by occurring sudden load changes, the tarn of a lowing output voltage becomes longer
because of the slow voltage control loop. Therefore, when P_VS pin voltage lowers to VPGUP1 / VPGUP2
(typ=2.25V/1.462V), it is suitable for -10% of output voltage, and the IC speeds up the voltage control loop. In the
operation, ON width at P_OUT pin increases, and PFC prevents output voltage from dropping for a long time. This
operation is stopped when P_VS pin voltage is higher than VPGUP1 /VPGUP2 (typ=2.25V/1.462V).
(7-4) Gain Decrease Function in P_VS over Voltage (Dynamic OVP)
In case the output voltage rises by starting up or sudden output load changes, as PFC voltage response is slow,
output voltage is high for a long time. Therefore, IC speeds up voltage control loop gain by P_VS first voltage protection
function when P_VS pin voltage is higher than VP_OVP1H/ VP_OVP1Ltyp=2.625V/1.706V), it is suitable for +5% of the
output voltage. In this operation, ON width at P_OUT pin decreases, IC prevents output voltage from rising for a long
time. This operation is stopped when P_VS pin voltage is lower than VP_OVP1 H/ VP_OVP1L (typ=2.625V/1.706V).
(7-5) P_VS over Voltage Protection Function (Static OVP)
The IC has a second over voltage protection, for the case that P_VS voltage exceeds over the first over voltage
protection voltage VP_OVP1H/VP_OVP1L. P_VS pin voltage is exceeded VP_OVP2H / VP_OVP2L (typ=2.725V/1.771V), PFC
switching is stopped instantly. When P_VS pin voltage decrease lower than VP_OVP3H / VP_OVP3L (typ=2.625V / 1.706V),
switching operation is re-start. Refer to Figure 28.
Figure 28. P_VS Over Voltage Protection (Auto Restart Mode).
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(7-6) P_OVP Terminal over Voltage Protection Function
P_OVP pin is an over voltage protection function which is available in the case that the output of PFC rises more than
P_VS over voltage protection function VP_OVP2 under an abnormal condition or is made latch. (Refer to Figure 29) This
function makes it possible to protect PFC by double putting together with P_VS over voltage protection function.
The IC stops switching operation (latch mode) after timer (typ=200us), if P_OVP increases more than VPOVP4
(typ=2.5V). By the internal timer, the IC avoids detection error. The operation is shown is Figure 30.
PFC-Out
P_OVP
+
-
2.5V
P_OUT
Driver
Logic
T
POVP4
Figure 29. The Protection of P_POVP (Latch mode).
Figure 30. Timing Chart
(7-7) P_IS Pin: Zero Current Detection and Over-Current Detection Function
Zero current detection circuit is the function that detects zero cross of PFC inductor current (IL). (Shown in Figure32)
The voltage of P_IS pin becomes more than the voltage of zero current detection and P_OUT output turn ON after it is
passes for Delay time.
P_IS
P_OUT
+
-
Driver
Logic
Delay
-10mV
-
+
Over Current Protection
-0.6V
Figure 31. Current Detection Circuit of P_IS Terminal
Figure 32. P_IS Zero Current Detection Delay Time
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(7-8) P_IS pin over current detection protection function
In normal operation, turn OFF of PFC is controlled by the ON width determined by P_EO pin voltage. However, it
turns OFF with pulse- by-pulse by operating over current protection when P_IS pin becomes lower than the voltage (IS
over current detection voltage) VIS_OCP (typ=-0.6V). This protection prevents the IC from flowing over current to
MOSFET.
This function controls the ON width, so PFC voltage falls if it operates. Please decide the sense resistor of PFC
within the range of AC voltage specification in order the function not to operate in normal operation. The level of over
current detection protection detects AC voltage, and the level is switching.
(7-9)P_RT pin setting
This pin sets the maximum frequency by external resistor which generated in the interior of the IC.
By P_RT resistor value, maximum frequency, maximum ON width, and P_IS delay time are set. They are shown in
Figure 33-35. The maximum ON width for minimum AC voltage is calculated by the following expression on application.
The maximum ON width set by P_RT resistance is shown in Figure-33
2 L P
O
TMAXON [s]
VACMin 2
VAC Min: Minimum input power, L: Inductor, Po: Max output power (W), Efficiency
The maximum ON width which set in Figure 31 needs to set more than TMAXON width which shows above.
In order to improve the efficiency in a light load, the frequency rising in a light load is limited to set value at P_RT pin, by
the maximum frequency of Figure 32.
Furthermore, Delay time from the comparator for zero cross detection VZCD (typ=-10mV) can be set in P_RT pin.
(Refer to Figure 33)
The IC can’t operate in more 500kHz than maximum frequency because it has a peculiar delay time, external MOSFET
delay and delay time of drive circuit even if P_RT resistor is attached less than 39kΩ..
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Figure 33. The Relationship of RT and Operation Frequency*
Figure 34. The Relationship of RT and ON Width*
Figure 35. The Relationship of RT and
PFC Zero Current Detection Delay*
*The above chart is for reference only. After confirmation of the actual device, please set the constant.
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(7-10) PFC ON/OFF setting function
This is a function that stops PFC switching operation in a light load, and improve the efficiency of the whole of systems. PFC
ON/OFF power is detected by a current limiter level of QR_CS pin (CS detection). (It is CS detect shown in Figure 38.)
CS detect = QR_FB voltage / AVCS1
In application design, QR_FB voltage is needed to set to the power which hopes PFC ON/OFF. The POFFSET voltage is
calculated by QR_FB voltage /4. It is set by POFFSET resistor that POFFSET voltage corresponds to the value.
With comparing the current limiter voltage with the voltage set POFFSET pin, PFC ON/OFF electric power is set. The
relation of CS detection and QR_FB is shown in below. To set POFFSET voltage within the range of this CS detection enables
the IC to operate PFC ON/OFF.
Figure 36. Relation of CS detection voltage –QR_FB voltage
The relation of CS detection voltage and output voltage is shown in below.
Output electric power: Po=1/2×Lp×Ip2×Fsw×η=1/2×Lp× (VCS/Rs) 2 × FSW ×η
(Lp: QR primary side inductance, VCS: over current detection voltage, Rs: sense resistor, Fsw: Switching frequency,
η: efficiency)
VCS = CS detection + Vpfc × Tondelay Lp*Rs (Vpfc: input voltage of QR)
The CS detection voltage is detected PFC ON/OFF.
According to this formula the graph of the relation is shown in Figure 37.
Figure 37. Relation of output electric power - CS detection
IC operates PFC ON/OFF comparing CS detect with POFFSET pin voltage. As a load increases in PFC OFF state, CS
detect voltage increases. CS detect voltage increases than fixed POFFSET voltage for TPFCON(typ=4ms),
PFC turns from OFF to ON. While, as a load decreases in PFC ON state, CS detect voltage decreases. PFC turns OFF when
the CS detect voltage lowers than the fixed POFFSET voltage.
It is expressed in electric specification that the P_OFFSET voltage turns PFC from ON to OFF in QR_CS = 0.15V (DC).
It is regulated in P_OFFSET current in order to reduce the power varying of PFC ON/OFF(V_OFSON, V_OFSOFF) by decreasing
the difference between CS detection voltage and P_OFFSET voltage. So that, there is a large varying in POFFSET current, but
it is designed that the varying of CS detection voltage and P_OFFFSET become to be small.
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P_OFFSET pin current is determined below.
PFC OFF : ACIN=L => PFC current is I_OFFSET4(typ=5.5uA)
: ACIN=H => PFC current is I_OFFSET3(typ=5.0uA)
PFC ON
: ACIN=L => PFC current is I_OFFSET2(typ=4.5uA)
: ACIN=H => PFC current is I_OFFSET1(typ=4.0uA)
For the current, PFC ON/OFF is needed to adjust POFFSET pin resistor.
To compensate PFC ON/OFF power variation by AC voltage, PFCOFF current is changed in ACIN=H/L.
An operation circuit diagrams shown in Figure 38, a resources operation circuit diagram is shown in Figure39, and a
switching operation is shown in Figure 40.
Figure 38. PFC ON/OFF operation circuit diagrams
・The reference of CS detect and QRFB voltage
CS detect = QRFB / AVcs1(typ=4)
Figure 39. Resources Operation Circuit
Figure 40. Timing Chart
Because CS detect voltage shown in Figure-39 is generated by QR_FB voltage. When QRFB voltage ripple is large, PFC
ON/OFF may not be at target point because CS detect voltage is also piled up ripple. In this case, please regulate output
capacitors or capacitors of QR_FB pin and so on.
P_TIMER pin is setting time pin which sets the time of detecting output electric power decline (CS limit voltage decline) to
stopping PFC (PFC: ON to OFF). In order not to switch PFC by changing loads in such a case of pulse loads, please coordinate
the time by this pin.
If the QR loads become to be light, peak current of QR is lower. Thus, if the voltage of CS limit lowers than DC voltage setting
at P_OFFSET pin, the IC starts to charge to external capacity of P_TIMER pin. P_TIMER pin voltage rises, and PFC is stopped
at the moment of exceeding the P_TIMER detection voltage (typ=2.0V).
To stabilize the P_OFFSET voltage, a capacitor 0.1uF is recommended at P_OFFSET pin.
When it wants to decrease PFC OFF power setting, it needs to decrease P_OFFSET resistor. Then, IC may be burst
operation. When IC operates in burst operation, it needs to fit P_TIMER capacitor value because PFC ON/OFF is decided by
burst frequency and P_TIMER setting time. And, please confirm operation in an actual application when setting.
And if you want PFC to continue operation without PFC=OFF function, please connect P_OFFSET pin and P_TIMER pin to
GND. And if PFC is operated in a light load condition, there is a possibility that a current supply from an auxiliary winding fails. In
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that case, please pay attention to VCC decreasing, and PFC and QR are stopping.
Furthermore, when it is set PFC ON/OFF by using external photo-coupler without using PFC ON/OFF function,
set in below circuit.
Figure 41. External PFC ON/OFF circuit
Operation Mode of Protection Circuit
Operation mode of protection functions are shown in Table 3.
Table 3. Operation Mode of Protection Circuit.
Operation Mode
Item
Comments
Operation At
Detection
Operation At
Release
Detection Method
Release Method
PFC Part,
DC/DC Part
STOP
PFC Part,
DC/DC Part
Start Up Operation
VCC<8.2V
(VCC Falling)
VCC>13.5V
(VCC Rising)
VCC Pin
Low Voltage Protection
VCCUVLO
VCCOVP
Brown Out
COMP
VCC>27.5V
During 100us
(VCC Rising)
PFC Part,
DC/DC Part
Latch STOP
PFC Part,
DC/DC Part
Latch released
VCC<6.2V
(VCC Falling)
VCC Pin
Over Voltage Protection
BR<1.0V
During 256ms
(BR Falling)
PFC Part and QR
Part STOP,
X-Cap Discharging
BR>1.0V
(BR Rising)
Input AC Voltage
Low Voltage Protection
Normal Operation
COMP<0.5V
During 150us
(COMP Falling)
PFC Part,
DC/DC Part
Latch Stop
PFC Part,
DC/DC Part
Latch released
VCC<6.2V
(VCC Falling)
COMP Pin Protection
QR_FB>2.8V
During 128ms
(QR_FB Rising)
QR_FB<2.6V During
2048ms
(QR_FB Falling)
QR_FB Pin
Over-Current Protection
DC/DC ,PFC Parts
STOP
QR_FB_OLP
Normal Operation
QR_ZT>5.0V
During 100us
(QR_QR_ZT Rising)
PFC Part,
DC/DC Part
Latch released
VCC<6.2V
(VCC Falling)
QR_ZT Pin
Over Voltage Protection
DC/DC, PFC Parts
Latch Stop
QR_ZT OVP
P_IS OCP
P_IS<-0.60V
(P_IS Falling)
P_IS Pin
Short Protection
PFC Part Output
STOP
Pulse by Pulse
Normal Operation
Normal Operation
P_VS<0.300V(0.195V)
(P_VS Falling)
P_VS>0.300V(0.195V)
(P_VS Rising)
P_VS
Short Protection 1(2)
P_VS Pin
Short Protection
PFC Part Operation
STOP
P_VS Pin
Low Voltage
Gain Boost Function
P_VS<2.250V(1.462V)
(P_VS Falling)
P_VS>2.250V(1.462V)
(P_VS Rising)
P_VS
Gain rise voltage1(2)
Gm-Amp.
GAIN Boost
Normal Operation
P_VS>2.625V(1.706V)
(P_VS Rising)
P_VS<2.625V(1.706V)
(P_VS Falling)
P_VS
Gain fall voltage1(2)
P_VS Pin Dynamic
Over Voltage Protection
Gm-Amp.
GAIN Down
Normal Operation
Normal Operation
P_VS
over voltage
protection1(2)
P_VS>2.725V(1.771V)
(P_VS Rising)
P_VS<2.603V(1.692V)
(P_VS Falling)
P_VS Pin Static
Over Voltage Protection
PFC Part
STOP
PFC Part,
DC/DC Part
Latch Stop
PFC Part,
DC/DC Part
Latch released
P_OVP>2.5V
(P_VS Rising)
VCC<6.2V
(VCC Falling)
P_OVP Pin
Over Voltage Protection
P_OVP OVP
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Absolute Maximum Ratings (Ta = 25°C)
Parameter
Maximum Applied Voltage 1
Maximum Applied Voltage 2
Symbol
Vmax1
Vmax2
Rating
Unit
V
V
Conditions
-0.3 to +30.0
-0.3 to +650
-0.3 to +15.0
VCC
VH_IN
Maximum Applied Voltage 3
Maximum Applied Voltage 4
Vmax3
V
P_OUT, QR_OUT
QR_FB, COMP, P_EO, BR
P_RT, P_OFFSET, P_OVP,
P_VS, QR_CS, P_TIMER
,
Vmax4
-0.3 to +6.5
V
Maximum Applied Voltage 5
Maximum Applied Voltage 6
Vmax5
-0.3 to +7.0
V
QR_ZT
Vmax6
IP_OUT1
IP_OUT2
IQR_OUT1
IQR_OUT2
-6.5 to +0.3
-0.5
V
A
A
A
A
P_IS
source
sink
source
sink
P_OUT Pin Output Peak Current 1
P_OUT Pin Output Peak Current 2
QR_OUT Pin Output Peak Current 1
QR_OUT Pin Output Peak Current 2
+1.0
-0.5
+1.0
Allowable Dissipation
Pd
0.68 (Note1)
W
mounted
Operating Temperature Range
Storage Temperature Range
Topr
Tstr
-40 to +105
-55 to +150
°C
°C
(Note1) Derate by 5.5 mW/°C when operating above Ta = 25°C when mounted (on 70 mm × 70 mm, 1.6 mm thick, glass epoxy on single-layer substrate).
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over the
absolute maximum ratings.
Recommended Operating Conditions (Ta = 25°C)
Parameter
Power supply voltage range 1
Power supply voltage range 2
Symbol
VCC
Rating
Unit
V
Conditions
VCC Pin Voltage
8.9 to 26.0
80 to 600
VH
V
VH_IN Pin Voltage
Recommended External Parts (Ta = 25°C)
Parameter
Symbol
Rating
Unit
VCC Pin Capacitor
BR Pin Capacitor
P_OFFSET Pin Capacitor
COMP Pin Capacitor
QR_ZT pin diode
CVCC
CBR
CP_OFFSET
CCOMP
DZTD
22.0~
0.1 to 10
0.1~
μF
nF
μF
μF
-
to 0.01
Schottkey diode
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Electrical Characteristics (Unless otherwise noted, Ta=25°C, VCC=15V)
Specifications
Parameter
Symbol
Unit
Conditions
Min
Typ
Max
[ Circuit Current ]
PFC=OFF
QR_FB=2.0V
(During Pulse Operation)
PFC=ON
QR_FB=2.0V
(During Pulse Operation)
Circuit current (ON) 1
Circuit current (ON) 2
ION1
ION2
ION3
-
-
-
1.0
1.2
1.4
1.7
mA
mA
μA
PFC=OFF
FB=0.0V
Circuit current (ON) 3
600
780
(During Burst Operation)
[ Start-Up Circuit Block ]
Start current 1
Start current 2
ISTART1
ISTART2
0.55
4.5
0.85
6.5
1.15
8.5
mA
mA
VCC= 0V
VCC=10V
Input Current from VH _IN
Terminal after Releasing
UVLO
OFF Current
ISTART3
-
8
16
μA
VH voltage switched start
current
VH_IN minimum
operation voltage
VSC
0.8
30
1.5
-
2.1
-
V
V
VHACT
VHIN start to flow
[ VCC Pin Protection Function ]
VCC UVLO voltage1
VCC UVLO voltage 2
VCC UVLO hysteresis
VUVLO1
VUVLO2
VUVLO3
12.5
7.5
-
13.5
8.2
5.3
14.5
8.9
-
V
V
V
VCC Rise
VCC Drop
VUVLO3 =VUVLO1 -VUVLO2
Start Circuit Operation
Voltage
VCHG1
8.5
9.5
10.5
V
VCC charge start voltage
VCHG2
VOVP
9.5
26.0
10.5
27.5
11.5
29.0
V
V
Stop Voltage from VCHG1
VCC Rise
VCC charge end voltage
VCC OVP voltage
[ BR Pin (7pin) ]
BR detect voltage1
BR detect voltage 2
BR hysteresis
VBR1
VBR2
VBRHYS
0.92
-
-
1.00
0.70
0.30
1.08
-
-
V
V
V
BR Rise
BR Fall
PFC, DCDC Stop,
Discharge Start
ACIN switched
BR peak voltage
BR timer
TBRTIMER
VACIN1
204
2.3
256
2.5
307
2.7
ms
V
ACIN switched voltage
[ COMP Pin (5pin) ]
COMP pin detect voltage
COMP pin pull-up resistor
Thermistor resistor detection
value
VCOMP
RCOMP
0.37
19.4
0.50
25.9
0.63
32.3
V
kΩ
RT
3.32
3.70
4.08
kΩ
Latch release voltage
(VCC pin voltage)
VUVLO2
2.00
–
VLATCH
-
-
V
COMP Latch mask time
TCOMP
75
150
240
μs
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Electrical Characteristics – continued (Unless otherwise noted, Ta=25, VCC=15V)
Specifications
Parameter
Symbol
Unit
Conditions
Min
Typ
Max
[ P_OFFSET block]
P_OFFSET source current 1
P_OFFSET source current 2
P_OFFSET source current 3
P_OFFSET source current 4
I_OFFSET1
I_OFFSET2
I_OFFSET3
I_OFFSET4
2.0
2.5
2.5
2.7
4.0
4.5
5.0
5.5
6.0
7.0
10.0
11.0
μA
μA
μA
μA
At PFC ON ACIN=H
At PFC ON ACIN=L
At PFC OFF ACIN=H
At PFC OFF ACIN=L
QR_CS=0.15V(DC)
PFC OFF => ON
P_OFFSET voltage
At PFC OFF
V_OFSON
0.135
0.15
0.165
V
Switched voltage
QR_CS=0.15V(DC)
PFC ON => OFF
Switched voltage
P_OFFSET voltage
At PFC ON
V_OFSOFF
0.135
2.60
0.15
4.00
0.165
5.40
V
Delay time at PFC ON
TPFCON
ms
PFC ON delay time
[ P_TIMER Pin ]
P_TIMER source current
P_TIMER detection voltage
I_PTIMER
VP_TIMER
1.8
1.9
2.0
2.0
2.2
2.1
μA
V
P_TIMER Rise
[ PFC Part Gm Amplifier Block ]
P_VS pin pull-up current
Gm Amp. normal voltage 1
Gm Amp. normal voltage 2
Gm Amp. trans conductance
Maximum Gm amplifier source
current
I_P_VS
VP_VSAMPH
VP_VSAMPL
TP_VS
-
0.5
2.50
1.625
44.0
-
μA
V
V
2.44
1.544
30.8
2.56
1.706
59.2
μA/V
IP_EOsource
15
24
25
40
35
56
μA
μA
P_VS=1.0V
P_VS=3.5V
Maximum Gm amplifier sink
current
IP_EOsink
[ PFC Part OSC Block ]
Maximum ON width
Maximum oscillation frequency
TMAXON
28
256
32
320
36
384
us
kHz
RT=56kΩ
RT=56kΩ
FP
MAX
[ PFC Part P_IS Block ]
Zero current detection
voltage
Zero current detection
voltage Delay
IS over-current detection
voltage
VZCD
TZCDD
-15
0.4
-10
0.8
-5
1.2
mV
μs
V
VIS_OCP
-0.625
-0.600
-0.575
[ PFC Part protection Block ] Figure of ( %) is the ratio of VS standard voltage (1: 2.5V, 2:1.625V).
0.200
(-92%)
0.130
(-92%)
2.050
(-18%)
1.332
(-18%)
0.300
(-88%)
0.195
(-88%)
2. 250
(-10%)
1.462
(-10%)
2.625
(+5%)
1.706
(+5%)
2.725
(+9%)
1.771
(+9%)
2.603
(+5%)
1.692
(+5%)
0.400
(-84%)
0.260
(-84%)
2.450
(-2%)
1.593
(-2%)
P_VS short protection voltage1 VP SHORTH
P_VS short protection voltage2 VP SHORTL
V
V
V
V
V
V
V
V
V
ACIN=H
ACIN=L
ACIN=H
ACIN=L
ACIN=H
ACIN=L
ACIN=H
ACIN=L
ACIN=H
P_VS gain rise voltage1
P_VS gain rise voltage2
P_VS gain fall voltage 1
P_VS gain fall voltage 2
VPGUP1
VPGUP2
VP OVP1H
VP OVP1L
VP OVP2H
VP OVP2L
VP OVP3H
-
-
-
-
-
-
-
-
-
-
P_VS over voltage protection
detection voltage1
P_VS over voltage protection
detection voltage2
P_VS over voltage protection
release voltage1
P_VS over voltage protection
release voltage2
VP OVP3L
-
-
V
ACIN=L
* Definition of ACIN (L: BR Pin Voltage < 2.5V, H: BR Pin Voltage > 2.5V)
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Electrical Characteristics – continued (Unless otherwise noted, Ta=25, VCC=15V)
Specifications
Parameter
Symbol
Unit
Conditions
Min
Typ
Max
[ PFC Part OVP Block ]
PFC OVP pin detection voltage
PFC OVP pin detection timer
VPOVP4
TPOVP4
2.43
100
2.50
200
2.57
350
V
us
[ PFC Part OUT Block ]
P_OUT pin H voltage
P_OUT pin L voltage
P_OUT pin pull down resistor
VPOUTH
VPOUTL
RPDOUT
10.5
-
75
12.5
-
100
14.5
1.00
125
V
V
kΩ
IO = -20mA
IO = +20mA
[ DC/DC Convertor Block (Turn Off) ]
FB pin pull-up resistor
CS over-current detect
voltage 1A
CS over-current detect
voltage 1B
CS over-current detect
voltage 2A
CS over-current detect
voltage 2B
RFB
22.5
30.0
37.5
kΩ
Vlim1A
0.475
0.500
0.525
V
FB=2.2V (ACIN=L)
FB=2.2V (ACIN=H)
FB=0.8V (ACIN=L)
FB=0.8V (ACIN=H)
Vlim1B
Vlim2A
Vlim2B
0.410
0.150
0.130
0.450
0.200
0.180
0.490
0.250
0.230
V
V
V
Voltage gain 1 (⊿VFB/⊿VCS)
AVCS1
AVCS2
3.40
3.77
4.00
4.44
4.60
5.11
V/V
V/V
ACIN=L
ACIN=H
Voltage gain 2 (⊿VFB/⊿VCS)
CS Leading Edge
Blanking time
TLEB
-
0.250
-
us
Turn off time
Minimum ON width
Maximum ON width
TOFF
Tmin
Tmax
-
-
0.250
0.500
43.0
-
-
us
us
us
PULSE is applied to CS Pin
TLEB + TOFF
29.0
57.2
[ DC/DC Convertor Block (Turn On) ]
Maximum operating
frequency 1
Maximum operating
frequency 2
Frequency reduction
start FB voltage
FSW1
108
20.5
1.10
0.435
120
30.0
1.25
0.50
132
39.5
1.40
0.565
kHz
kHz
V
FB=2.0V
FB=0.5V
FSW2
VFBSW1
VFBSW2
Frequency reduction
end FB voltage
V
ZT comparator voltage 1
ZT comparator voltage 2
VZT1
VZT2
60
120
100
200
140
280
mV
mV
ZT fall
ZT rise
OUT H to L, for Protection
Noise
ZT trigger mask time
TZTMASK
-
0.5
-
us
ZT trigger timeout period 1
The Operation without
Bottom Detection
Count from Final ZT Trigger
TZTOUT1
TZTOUT2
46.8
16.2
70.0
24
92.8
31.8
us
us
ZT trigger timeout period 2
[ DC/DC Convertor Block (Protection) ]
Soft start time 1
Soft start time 2
Soft start time 3
Soft start time 4
FB burst voltage 1
TSS1
TSS2
TSS3
TSS4
VBURST1
0.35
0.70
1.40
2.80
0.25
0.50
1.00
2.00
4.00
0.30
0.65
1.30
2.60
5.20
0.35
ms
ms
ms
ms
V
Over Load Detection
(FB Fall)
Over Load Detection
(FB Rise)
FB OLP voltage a
FB OLP voltage b
VFOLP1A
VFOLP1B
2.6
-
2.8
2.6
3.0
-
V
V
FB OLP detection timer
FB OLP stop timer
Latch release voltage
(VCC pin voltage)
TFOLP
TOLPST
99
1433
128
2048
VUVLO2
2.00
166
2664
ms
ms
–
VLATCH
-
-
V
Latch mask time
ZT OVP voltage
TLATCH
VZTL
50
4.64
100
5.00
200
5.36
μs
V
ZTOVP, VCCOVP
[DC/DC OUT Block]
QR_OUT Pin H Voltage
QR_OUT Pin L Voltage
QR_OUT Pin Pull-Down Res.
VQROUTH
VQROUTL
RQRDOUT
10.5
-
75
12.5
-
100
14.5
1.00
125
V
V
kΩ
IO=-20mA
IO=+20mA
* Definition of ACIN (L: BR Pin Voltage < 2.5V, H: BR Pin Voltage > 2.5V)
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Power Dissipation
The thermal design should set operation for the following conditions.
(Since the temperature shown below is the guaranteed temperature, be sure to take a margin into account.)
1. The ambient temperature Ta must be 105°C or less.
2. The IC’s loss must be within the allowable dissipation Pd.
The thermal abatement characteristics are as follows.
(PCB: 70 mm × 70 mm × 1.6 mm, mounted on glass epoxy single-layer substrate)
0.80
0.70
0.60
0.50
0.40
0.30
0.20
0.10
0.00
0
25
50
75
100
125
150
AMBIENT TEMPERATURE : Ta [
]
℃
Figure 42. Thermal Abatement Characteristics
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I/O Equivalence Circuits
1
VCC
2
GND
3
QR_FB
4
QR_ZT
Internal Reg
Internal Reg
5
COMP
6
P_EO
7
BR
8
P_RT
Internal Reg
P_OFFSET
10
P_OVP
P_OUT
VH_IN
11
P_VS
12
QR_CS
9
Internal Reg
Internal Reg
Internal Reg
13
P_IS
14
15
QR_OUT
16
P_TIMER
Internal Reg
Internal Reg
17
(N.C.)
18
Internal
Circuit
N. C.
Figure 43. I/O Equivalent Circuit Diagram
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Operational Notes
1.
2.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply terminals.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
4.
Ground Voltage
Except for pins the output and the input of which were designed to go below ground, ensure that no pins are at a
voltage below that of the ground pin at any time, even during transient condition.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded, the rise in temperature of the chip may result in
deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when
the IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum
rating, increase the board size and copper area to prevent exceeding the Pd rating.
6.
7.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
Rush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may
flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and
routing of connections.
8.
9.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
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Operational Notes – continued
11. Unused Input Terminals
Input terminals of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance
and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input terminals should be connected to
the power supply or ground line.
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should
be avoided.
Figure 40. Example of hic IC scture
13. Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
14. Area of Safe Operation (ASO)
Operate the IC such that the output voltage, output current, and power dissipation are all within the Area of Safe
Operation (ASO).
15. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below
the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
16. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
Status of this document
The Japanese version of this document is formal specification. A customer may use this translation version only for a reference
to help reading the formal version.
If there are any differences in translation version of this document formal version takes priority
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Ordering Information
B M 1 C 1 0 1
F
-
G E 2
Part Number
Package
F:SOP18
Packaging and forming specification
G: Halogen free
E2: Embossed tape and reel
Marking Diagrams
SOP18 (TOP VIEW)
Part Number Marking
LOT Number
BM1C101F
1PIN MARK
Part Number Marking
BM1C101F
Package
SOP18
Orderable Part Number
BM1C101F-GE2
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Physical Dimension, Tape and Reel Information
Package Name
SOP18
(Max 11.55 (include.BURR))
(UNIT: mm)
PKG: SOP18
Drawing No. : EX115-5001
<Tape and Reel information>
Tape
Embossed carrier tape
2000pcs
Quantity
E2
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
(
)
Direction of feed
1pin
Reel
Order quantity needs to be multiple of the minimum quantity.
∗
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Revision History
Date
Revision
001
Changes
24.Nov.2015
22.Mar.2017
New Release
002
P11 the value in Figure 15
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Notice
Precaution on using ROHM Products
1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅣ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅢ
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
Rev.003
© 2015 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
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General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall not be in an y way responsible or liable for failure, malfunction or accident arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
相关型号:
BM1C102F
作为功率因数矫正转换器(Power Factor Correction: PFC)+准谐振(Quasi-Resonant: QR)DC/DC转换器的多转换器IC,BM1C102F为所有带插座的产品提供优良的系统。本产品内置650V耐压启动电路/X-Cap放电功能,有助于实现低待机功耗。PFC部采用电压控制方式的临界模式(BCM),可通过Zero Current Detection(ZCD)降低开关损耗和噪声。通过电阻进行零电流检测,因此无需ZCD用辅助绕组,可减少偏置部电路的零件数量,降低损耗。DCDC部采用准谐振方式。此方式实现了软开关,有助于实现低EMI。外接开关MOSFET及电流检测电阻,可实现自由度高的电源设计。轻负载时通过启动脉冲串功能提高效率。内置双系统PFC输出过电压保护功能。内置任意负载的PFC ON/OFF功能,可降低待机功耗。内置丰富的保护功能(VCC过电压保护、外部锁存保护、掉电保护、软启动功能、逐周期过电流限制、过负荷保护等)。
ROHM
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