BM67290FV-CE2 [ROHM]
Power Supply Support Circuit, Fixed, 1 Channel, PDSO20, SSOP-20;
| 型号： | BM67290FV-CE2 |
| 厂家： | 
ROHM |
| 描述： | Power Supply Support Circuit, Fixed, 1 Channel, PDSO20, SSOP-20 光电二极管 |
| 文件： | 总33页 (文件大小：1071K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
For Electric Cars & Hybrid Cars
Isolation Voltage 2,500Vrms
High Voltage Detection IC
BM67290FV-C
Key Specifications
General Description
Isolation Voltage:
Power Source Voltage Range (high voltage side):
8.0V to 24V
2,500Vrms (Max)
This is a voltage detector IC for DC-DC converter.
Aside from being capable of converting input voltage to
duty, it has built in protection functions against low
voltage, overvoltage and active overvoltage.
Power Source Voltage Range (low voltage side):
3.0V to 5.5V
Reference Voltage :
Oscillation Frequency Variability:
5V±1.5%
Features
Built-in input PWM modulation circuit
Built-in low voltage lock out circuit
Built-in input under voltage protection function
Built-in input overvoltage protection function
Built-in magnetic isolator
10kHz to 250kHz (Typ)
Package
(Typ) (Typ) (Max)
6.50mm x 8.10mm x 2.01mm
Built-in active overvoltage protection function
Built-in reference voltage output
Application
DC-DC converter
SSOP-B20W
Typical Application Circuit
Vbias1
Vbias2
VDD1 VDD2
REF
VH
NC
OUT
NC
Controller
RFOV
RFLV
SD1
VDTY SD2
VACT
RT
NC
NC
GND1 GND2
GND1 GND2
Figure 1. Example of a Typical Application Circuit of DC-DC Converter
○Product structure: Silicon integrated circuit ○This product has no designed protection against radioactive rays
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Pin Configuration
REF
GND1
RFOV
RFLV
VH
GND2
NC
VDD2
NC
OUT
VDTY
VDD1
SD1
NC
SD2
NC
VACT
GND1
RT
GND2
Figure 2. BM67290FV-C Package (SSOP-B20W)
Pin Descriptions
Terminal
Number
Code
I/O
Function
Reference voltage terminal
1
2
REF
GND1
RFOV
RFLV
VH
O
-
Grounding terminal 1 (high voltage side)
Input overvoltage protection value setting terminal
Input low voltage protection value setting terminal
Input voltage signal terminal
3
I
4
I
5
I
6
VDTY
VDD1
VACT
GND1
RT
I
Input voltage signal terminal for Duty
Power source terminal 1 (high voltage side)
Active voltage signal terminal
7
-
8
I
9
-
Grounding terminal 1 (high voltage side)
Timing resistance terminal
10
11
12
13
14
15
16
I
GND2
NC
-
Grounding terminal 2 (low voltage side)
Disconnected terminal
-
SD2
O
-
Protective cutoff terminal 2
NC
Disconnected terminal
SD1
O
O
Protective cutoff terminal 1
Input voltage monitoring condition output signal
terminal
OUT
17
18
19
20
NC
VDD2
NC
-
-
-
-
Disconnected terminal
Power source terminal 2 (low voltage side)
Disconnected terminal
GND2
Grounding terminal 2 (low voltage side)
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Block Diagram
VDD1
REF
VDD2
Internal circuit
VDD1
UVLO COMP
(UVLO)
VDD1
7.7V/7.4V
REG12V
REGlogic
REF
Reset
Internal circuit
4.2V/4.0V
REF
UVLO COMP
VDD2
DRV
Transformer 1
VACT
COMP
Transformer
driving
circuit
(PWM)
OUT
SD1
VACT
Transformer
receiving
circuit
(PRT1)
REF/
4.0V
GND2
VHOV
COMP
VDD2
VH
Transformer
driving
circuit
Transformer
receiving
circuit
PWM
Circuit/
Output
mode
DRV
(SD)
RFOV/
0.985 x RFOV
VHLV
COMP
RFOV
Transformer 2
switching
GND2
(PRT2)
RFLV
VDTY
0.8 x RFLV/
RFLV
SD2
RT
GND2
GND2
GND1
GND2
GND1
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Explanation of Operation
(1) Timing when VDD2 is ON first before VDD1
VDD2 powers SD1, SD2 and OUT. When VDD2 turns ON, SD1=H, SD2=L and OUT=L initially.
Then, when VDD1 turns ON and reaches VthVDD1H, REF turns ON. When REF reaches VthREF, CT turns ON.
Once the above conditions are satisfied, DUTY will be outputted to OUT pin at CLK’s 2nd pulse. At the same
time, SD1 becomes L and SD2 becomes Hi-Z.
VthHVDD2
VDD2
0V
VthVDD1H
VthVDD1L
VDD1
0V
VthREFH
VthREFL
REF
0V
VthOV, Vtyh¥VACT
VthOV×VOVZ
VHVACT
VthHPWL
(CT)
VH
VDTY
VthLV
VthLV×VLVH
VthLPWL
0V
H
(CLK)
L
VDD2
OUT
0V
H
(PRT1)
L
H
(PRT2)
L
VDD2
SD1
0V
Hi-Z
SD2
0V
Figure 3. VDD2 Start to VDD1 Start Timing Chart
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(2) Timing when VDD1 is ON first before VDD2
When VDD1 turns ON and reaches VthVDD1, REF turns ON. When REF reaches VthREF, CT turns ON.
When VDD2 turns ON, SD1=H, SD2=L and OUT=L initially..
When VDD2 reaches VthVDD2, DUTY will be immediately outputted to OUT pin at the next CLK pulse.
SD1 and SD2 behavior at CLK’s 2nd pulse is still the same with (1), SD1=L and SD2=Hi-Z at CLK’s 2nd pulse.
VthVDD2
VDD2
0V
VthVDD1H
VthLVDD1L
VDD1
0V
VthREFH
VthREFH
REF
0V
VthOV,VthVACT
VthOV×VOVZ
VHVACT
VthHPWL
(CT)
VH
VDTY
VTHLV
VthLV×VLVH
VthLPWL
0V
H
L
(CLK)
VDD2
OUT
0V
H
L
(PRT1)
(PRT2)
H
L
VDD2
SD1
0V
Hi-Z
0V
SD2
Figure 4. VDD1 Start to VDD2 Start Timing Chart
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(3) Timing when VDD1 is turned OFF before VDD2
When VDD1 reaches VthLVDD1, REF and CT immediately stop. Outputs become SD1=H, SD2=L and OUT=L.
VDD2
0V
VthVDD1H
VthVDD1L
VDD1
0V
VthREFH
VthREFL
REF
0V
VthOV, VACT
VthOV×VOVZ
VHVACT
VthHPWL
( CT )
VH
VDTY
VthLV
VthLV×VLVH
VthLPWL
0V
H
( CLK )
L
VDD2
OUT
0V
H
( PRT1 )
L
H
( PRT2 )
L
VDD2
SD1
0V
Hi-Z
SD2
0V
Figure 5. VDD1 Stop to VDD2 Stop Timing Chart
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(4) Timing when VDD2 is tuned OFF before VDD1
When VDD2 reaches VthLVDD2, the outputs become SD1=H, SD2=L and OUT=L even if REF and CT are still
active.
VthVDD2
VDD2
0V
VthVDD1H
VthVDD1L
VDD1
0V
VthREFH
VthREFL
REF
0V
VthOV, VACT
VthOV×VOVZ
VHVACT
VthHPWML
( CT )
VH
VDTY
VthLV
VthLV×VLVH
VthLPWL
0V
H
( CLK )
L
VDD2
OUT
0V
H
( PRT1 )
L
H
( PRT2 )
L
VDD2
SD1
0V
Hi-Z
SD2
0V
Figure 6. VDD2 Stop to VDD1 Stop Timing Chart
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(5) Normal Operation
During normal operation, the internal oscillator (CT) and internal clock (CLK) are active.
OUT turns L every time CT is above VDTY.
OUT turns H every time CLK rises.
Since protection circuits are not active, SD1=L and SD2=Hi-Z.
VthOV,VACT
VthOV×VOVZ
VHVACT
VthHPWL
( CT )
VH
VDTY
VthLV
VthLV×VLVH
VthLPWL
0V
H
( CLK )
L
VDD2
OUT
0V
H
( PRT1 )
L
H
( PRT2 )
L
VDD2
SD1
0V
Hi-Z
SD2
0V
Figure 7. Normal Operation Timing Chart
VthHPWL
VDTY
(CT)
VthLPWL
(CLK)
(PWM)
OUT
Minimum Duty 10%
Maximum Duty 100%
td1
td2
Propagation delay time =|td1-td2|
Figure 8. Propagation Delay Time, Minimum Duty, Maximum Duty
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The output from OUT terminal varies its Duty in accordance with VDTY voltage. Duty becomes higher as VDTY
voltage increases. The relationship between VDTY voltage and output Duty is shown in the graph below. The
output Duty becomes 100% when VDTY voltage is above VthHPWL (Typ 4.275V) and minimum duty is achieved
when VDTY voltage is below VthLPWL (Typ 0.225 V).
Duty= Min duty + (VDTY-0.225V)/A
frequency =10kHz
: Min duty=10.0%, A=0.04500
frequency =100kHz : Min duty=10.9%, A=0.04545
frequency =250kHz : Min duty=12.1%, A=0.04607
100
Duty
[ % ]
50
10
0
1.0
2.0
3.0
4.0
0.225
(VthLPWL)
4.275
VDTY voltage[ V ]
(VthHPWL)
Figure 9. VDTY Voltage-Output Duty Property
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(6) Overvoltage Detection (active overvoltage protection, input overvoltage protection)
Overvoltage is detected when VACT > VthACT (for active overvoltage protection) and VH>VthOV (for input
overvoltage protection). PRT1 immediately turns to “H” and the protection circuit is activated.
At this time, OUT=H, SD1=H, and SD2=L.
When the protection circuit is deactivated (VACT<VHVACT for active OVP and VH <VthOV×VOVZ for input OVP),
OUT returns to normal operation, SD1=L and SD2=Hi-Z at CLK’s 2nd pulse..
VthOV
(VthVACT)
VthOV×VOVZ
(VHVACT)
VthHPWL
( CT )
VH
VDTY
VthLV
VthLV×VLVH
VthLPWL
0V
H
( CLK )
L
VDD2
OUT
0
H
2CLK
( PRT1 )
L
H
( PRT2 )
L
VDD2
SD1
0V
Hi-Z
SD2
0V
Figure 10. Protection Detection (active overvoltage protection, input overvoltage protection) Timing Chart
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(7) Under Voltage Detection (input low voltage protection)
When VH < VthLV×VLVH, input low voltage protection is activated. PRT2 immediately turns H.
At this time, OUT=”L”, SD1=”H”, and SD2=”L”.
When VH > VthLV, the protection circuit is deactivated and PRT2=L. OUT returns to normal operation, SD1 turns L
and SD2 turns Hi-Z at CLK’s 2nd pulse.
VthOV,VthVACT
VthOV×VOVZ
VHVACT
VthHPWL
( CT )
VH
VDTY
VthLV
VthLV×VLVH
VthLPWL
0V
H
( CLK )
L
VDD2
OUT
0
H
( PRT1 )
L
H
( PRT2 )
L
VDD2
SD1
0V
Hi-Z
SD2
0V
Figure 11. Protection Detection (input low voltage protection) Timing Chart
(8) UVLO Detection
This IC is equipped with UVLO circuits for VDD1 voltage, REF voltage and VDD2 voltage.
When any undervoltage is detected, OUT=L, SD1=H and SD2=L.
VDD1
UVLO
VDD2
UVLO
REF
UVLO
No
OUT
SD1
SD2
1
2
3
4
5
6
7
8
L
L
L
L
L
H
H
L
L
H
H
L
H
L
H
L
H
L
H
L
L
L
L
L
L
L
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
H
H
H
H
DUTY
OUTPUT
PROTECTION PROTECTION
OUTPUT OUTUT
H:Release L:Detection
Figure 12. Output Logic of the UVLO
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Absolute Maximum Ratings
Parameter
Symbol
VDD1
VDD2
VH
Rating
Unit
V
Power Source Terminal (VDD1)
Power Source Terminal (VDD2)
Input Voltage (VH)
-0.3 to +30 (Note 1)
-0.3 to +7 (Note 2)
V
-0.3 to VDD1+0.3 or +30 (Note 1)
-0.3 to VDD1+0.3 or +30 (Note 1)
-0.3 to VDD1+0.3 or +30 (Note 1)
-0.3 to VDD1+0.3 or +30 (Note 1)
-0.3 to VDD1+0.3 or +30 (Note 1)
-0.3 to VDD2+0.3 or +7 (Note 2)
-0.3 to VDD2+0.3 or +7 (Note 2)
-0.3 to +20 (Note 2)
V
Input Voltage (VDTY)
VDTY
VACT
VRFOV
VRFLV
VOUT
VSD1
VSD2
Topr
Tstg
V
Input Voltage (VACT)
V
Input Voltage (RFOV)
V
Input Voltage (RFLV)
V
Output Voltage (OUT)
V
Output Voltage (SD1)
V
Output Voltage (SD2)
V
Operating Temperature Range
Storage Temperature Range
Junction Temperature
-40 to +125
°C
°C
°C
-55 to+150
Tjmax
150
(Note 1) Based on GND1
(Note 2) Based on GND2
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated
over the absolute maximum ratings.
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Thermal Resistance(Note3)
Thermal Resistance (Typ)
Parameter
Symbol
Unit
1s(Note 5)
2s2p(Note 6)
Fill the package name
Junction to Ambient
Junction to Top Characterization Parameter(Note 4)
151.5
47
80.6
40
θJA
°C/W
°C/W
ΨJT
(Note3)Based on JESD51-2A(Still-Air)
(Note4)The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note5)Using a PCB board based on JESD51-3.
Layer Number of
Measurement Board
Material
FR-4
Board Size
Single
114.3mm x 76.2mm x 1.57mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70μm
(Note 6)Using a PCB board based on JESD51-7.
Layer Number of
Material
Board Size
114.3mm x 76.2mm x 1.6mmt
2 Internal Layers
Measurement Board
4 Layers
FR-4
Top
Bottom
Copper Pattern
74.2mm x 74.2mm
Copper Pattern
Thickness
Copper Pattern
Thickness
Thickness
Footprints and Traces
70μm
74.2mm x 74.2mm
35μm
70μm
Recommended Operating Conditions
Parameter
Symbol
VDD1
VDD2
IREF
Min
8.0
3.0
0
Typ
10
5
Max
Unit
V
Power Source Voltage VDD1
Power Source Voltage VDD2
Reference Voltage Output Current
Reference Voltage Output Capacity
Timing Resistance
24
5.5
V
-
5 (Note 7)
mA
µF
kΩ
kHz
CREF
RRT
1.0
4
-
4.7
10
100
100
Oscillation Frequency
fOSC
10
250
In-phase Input Voltage Range
VDD1<11.5V
In-phase Input Voltage Range
VDD1≥ 11.5V
Input Protection Diode
Current
VICML
VICMH
IDIO
0
0
-
-
-
-
VDD1-2.5
9.0
V
V
2.0
mA
(Note 7) Should not exceed Tj=150℃.
Insulation Related Characteristics (UL1577 conformity)
Parameter
Symbol
Characteristic
>109
Unit
Ω
Insulation Resistance (VIO=500V)
Insulation Withstand Voltage / 1min.
RS
VISO
2500
Vrms
Insulation Test Voltage / 1s
VISO
3000
Vrms
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Electrical Characteristics
(Unless, otherwise specified, VDD1=8V to 24.0V, VDD2=3.0V to 5.5V, Ta=-40°C to +125°C, RT=10kΩ, described with direction
of flow from IC as +)
Limit
Parameter
Symbol
Unit
Conditions
Min
Typ
Max
[Whole]
VDD1
VDD2
IDD1
8.0
3.0
-
-
24.0
5.5
V
Input Voltage Range
-
V
VDD1 Circuit Current
VDD2 Circuit Current
4.6
0.2
10.0
1.0
mA
mA
RT=10kΩ , VDTY=2.25V
RT=10kΩ , VDTY=2.25V
IDD2
-
[Low Voltage Malfunction Prevention Circuit]
Startup Threshold Voltage
Cutoff Threshold Voltage
Operation Voltage Hysteresis
Startup Threshold Voltage
Cutoff Threshold Voltage
Operation Voltage Hysteresis
[Reference Voltage]
VthVDD1H
VthVDD1L
VhysVDD1
VthREFH
VthREFL
VhysREF
7.5
7.2
0.2
4.0
3.8
0.1
7.7
7.4
0.3
4.2
4.0
0.2
7.9
7.6
0.4
4.4
4.2
0.3
V
V
V
V
V
V
Output Voltage
VREF
Iref
4.925
5
5.000
-
5.075
-
V
IREF=0mA to 5mA
Output Drive Current
[PWM Part]
mA
Oscillation Frequency
Duty Precision 10kHz
Duty Precision 100kHz
Duty Precision 250kHz
fOSC
90
100
55.0
55.5
56.0
110
58.0
58.5
59.0
kHz
%
RT=10kΩ
DutyL
DutyM
DutyH
52.0
52.5
53.0
VDTY=2.25V, H duty
VDTY=2.25V, H duty
VDTY=2.25V, H duty
%
%
Duty Temperature
Property/Electric Property
Variation Ratio
ΔDuty
-
1
-
%
Design assurance
(Comparison with Ta=25℃,
VDD1=10V)
Threshold Voltage During
Discharge
VthHPWL
4.1
4.275
4.45
V
Threshold Voltage During
Charge
VthLPWL
IbVDTY
td1
0.15
0.225
0.3
1.0
500
500
50
V
Input Bias Current
-1.0
-
-
-
-
μA
ns
ns
ns
VDTY=0V to 9V
Propagation Delay Time 1
Propagation Delay Time 2
-
-
-
td2
Propagation Delay Time
Difference
td1-td2
[OUT Terminal]
VOUTL
VOUTH
-
-
-
0.5
V
V
ISINK = -20mA
Output Voltage
VDD2-0.5
VDD2
ISOURCE = 20mA
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Electrical Characteristics – continued
(Unless, otherwise specified, VDD1=8V to 24.0V, VDD2=3.0V to 5.5V, Ta=-40°C to +125°C, RT=10kΩ, described with direction
of flow from IC as +)
Limit
Parameter
[SD1 Terminal]
Symbol
Unit
Conditions
Min
Typ
Max
-
-
-
0.5
V
V
ISINK = -20mA
VSD1L
VSD1H
Output Voltage
VDD2-0.5
VDD2
ISOURCE = 20mA
[SD2 Terminal]
SD2 Voltage Operation
Output Off-leak Current
[Input Low Voltage Protection Part]
VSD2
-
-
-
-
0.5
10
V
ISOURCE = 20mA
SD2 = 20V
IOFFLEAKSD2
μA
Protection Operation/
Protection Cancellation
Voltage Ratio
Protection Cancellation
Threshold Voltage
RFLV=1.2V,
VH=1.5V to down
VLVH
VthLV
tdlyLV
0.78
1.15
-
0.80
1.20
-
0.82
1.25
1.0
-
V
RFLV=1.2V, VH=0V to up
RFLV=1.2V,
VH=1.5V to 0.5V to
SD1:L to H, SD2 : H to L
Protection Operation Delay
Time
μs
RFLV Input Bias Current
VH Input Bias Current
IbRFLV
IbVH
-1.0
-1.0
-
-
1.0
1.0
μA
μA
VH= RFLV=0V to 9V
VH= RFLV=0V to 9V
[Active Overvoltage Protection Part]
Overvoltage Threshold Voltage
VthVACT
VHVACT
4.9
3.9
5.0
4.0
5.1
4.1
V
V
VACT=3.5V to up
Protection Cancellation
Threshold Voltage
Protection Operation Delay
Time
VACT=5.5V to down
VACT=4.5V to 5.5V to
SD1：L to H, SD2：H to L
VACT=0V to 9V
tdlyVACT
IbVACT
-
-
-
1.0
1.0
μs
VACT Input Bias Current
-1.0
μA
[Input Overvoltage Protection Part]
Protection Operation/
Protection Cancellation Voltage
Ratio
Protection Operation Threshold
Voltage
RFOV=5.0V,
VH=5.5V to down
VOVZ
VthOV
0.970
4.9
0.985
5.0
1.000
5.1
-
V
RFOV=5.0V,VH=0V to up
RFOV=5.0V,
VH=4.5V to 5.5V to
SD1 : L to H, SD2 : H to L
Protection Operation Delay
Time
tdlyOV
-
-
-
1.0
1.0
μs
RLOV Input Bias Current
IbRFOV
-1.0
μA
VH= RFOV=0V to 9V
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TSZ22111・15・001
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Typical Performance Curves
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
16
14
12
10
8
125℃
6
125℃
25℃
4
2
-40℃
25℃
-40℃
0
0
1
2
3
4
5
0
4
8
12
16
20
24
Input Voltage : VDD2 [V]
Input Voltage : VDD1 [V]
Figure 13. VDD1 Circuit Current 10kHz
vs Input Voltage
Figure 14. VDD2 Circuit Current 10kHz
vs Input Voltage
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
16
14
12
10
8
25℃
-40℃
125℃
25℃
6
125℃
4
-40℃
2
0
0
1
2
3
4
5
0
4
8
12
16
20
24
Input Voltage : VDD1 [V]
Input Voltage : VDD2 [V]
Figure 16. VDD2 Circuit Current 100kHz
vs Input Voltage
Figure 15. VDD1 Circuit Current 100kHz
vs Input Voltage
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Typical Performance Curves - continued
16
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
25℃
14
-40℃
12
10
8
125℃
125℃
25℃
6
4
2
0
-40℃
0
4
8
12
16
20
24
0
1
2
3
4
5
Input Voltage : VDD1 [V]
Input Voltage : VDD2 [V]
Figure 17. VDD1 Circuit Current 250kHz
vs Input Voltage
Figure 18. VDD2 Circuit Current 250kHz
vs Input Voltage
6
5
4
3
2
1
0
6
-40℃
5
4
3
2
1
0
125℃
125℃
-40℃
25℃
25℃
25℃
25℃
-40℃
-40℃
125℃
125℃
3.8
3.9
4.0
4.1
4.2
4.3
4.4
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
Input Voltage : VDD1 [V]
REF Output Voltage : VREF [V]
Figure 20. OUT Voltage vs REF Output Voltage
(REF Startup/Shutdown Threshold)
Figure 19. REF Output Voltage vs Input Voltage
(VDD1 Startup/Shutdown Threshold)
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BM67290FV-C
Typical Performance Curves - continued
5.075
5.050
5.075
5.050
5.025
5.000
4.975
4.950
4.925
125℃
25℃
10V
8V
24V
5.025
5.000
4.975
4.950
4.925
-40℃
-50 -25
0
25 50 75 100 125 150
0
1
2
3
4
5
Temperature : Ta [°C]
REF Output Current : IREF [mA]
Figure 21. REF Output Voltage vs Temperature
Figure 22. REF Output Voltage
vs REF Output Current
(REF Output Load Regulation (VDD1=10V))
100
90
80
70
60
50
40
30
20
10
0
110
108
106
104
102
100
98
125℃
-40℃
25℃
25℃
-40℃
125℃
96
94
92
90
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
-50 -25
0
25 50 75 100 125 150
Temperature : Ta [°C]
VDTY Input Voltage : VDTY [V]
Figure 23. Oscillation Frequency at 100kHz
vs Temperature
Figure 24. OUT Duty vs VDTY Input Voltage
(VDTY-DUTY Characteristic at 100kHz)
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Typical Performance Curves - continued
11.0
10.8
10.6
100
90
80
70
60
50
40
30
20
10
0
125℃
-40℃
25℃
10.4
10.2
10.0
9.8
25℃
-40℃
125℃
9.6
9.4
9.2
9.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
-50 -25
0
25 50 75 100 125 150
VDTY Input Voltage : VDTY [V]
Temperature : Ta [°C]
Figure 26. OUT Duty vs VDTY Input Voltage
(VDTY-DUTY Characteristic at 10kHz)
Figure 25. Oscillation Frequency at 10kHz
vs Temperature
100
90
80
70
60
50
40
30
20
10
0
275
270
265
260
255
250
245
240
235
230
225
125℃
25℃
8V
-40℃
10V
24V
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
-50 -25
0
25 50 75 100 125 150
Temperature : Ta [°C]
Input Voltage : VDTY [V]
Figure 27. Oscillation Frequency at 250kHz
vs Temperature
Figure 28. OUT Duty vs Input Voltage
(VDTY-DUTY Characteristic at 250kHz)
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Typical Performance Curves - continued
58.5
57.5
58.0
57.0
56.0
55.0
54.0
53.0
52.0
8V
10V
24V
8V
10V
24V
56.5
55.5
54.5
53.5
52.5
-50 -25
0
25 50 75 100 125 150
-50 -25
0
25 50 75 100 125 150
Temperature : Ta [°C]
Temperature : Ta [°C]
Figure 29. Duty at 100kHz vs Temperature
Figure 30. Duty at 10kHz vs Temperature
59.0
58.0
57.0
56.0
55.0
54.0
53.0
1.0
0.8
0.6
25℃
0.4
-40℃
0.2
0.0
24V
8V
10V
-0.2
-0.4
-0.6
-0.8
-1.0
125℃
-50 -25
0
25 50 75 100 125 150
0
3
6
9
Temperature : Ta [°C]
Input Voltage : VDTY [V]
Figure 31. Duty at 250kHz vs Temperature
Figure 32. Input Bias Current vs VDTY Input Voltage
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Typical Performance Curves - continued
0.5
0.4
0.3
6
5
4
3
2
1
0
-40℃
25℃
-40℃
25℃
125℃
25℃
125℃
0.2
125℃
0.1
0.0
-40℃
0
5
10
15
20
0.8
0.9
1.0
1.1
1.2
1.3
ISOURCE [mA]
VH Input Voltage : VH [V]
Figure 33. SD2 Output Voltage
Figure 34. SD1 Output Voltage vs VH Input Voltage
(Low Voltage Detect/Release Threshold)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
1.0
0.8
0.6
0.4
125℃
-40℃
25℃
0.2
0.0
25℃
-40℃
-0.2
125℃
-0.4
-0.6
-0.8
-1.0
8
12
16
20
24
0
3
6
9
RFLV Input Voltage : VRFLV [V]
Input Voltage : VDD1 [V]
Figure 36. Input Bias Current vs RFLV Input Voltage
Figure 35. Protection Operation Delay Time vs Input Voltage
(Low Voltage Detect Delay Time)
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BM67290FV-C
Typical Performance Curves - continued
1.0
0.8
0.6
6
5
4
3
2
1
0
-40℃
-40℃
25℃
0.4
-40℃
25℃
0.2
0.0
25℃
125℃
-0.2
125℃
-0.4
125℃
-0.6
-0.8
-1.0
0
3
6
9
3.0
3.5
4.0
4.5
5.0
5.5
VH Input Voltage : VH [V]
VACT Input Voltage : VACT [V]
Figure 38. SD1 Output Voltage vs VACT Input Voltage
(Active High Voltage Detect/Release Threshold)
Figure 37. Input Bias Current vs VH Input Voltage
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
1.0
0.8
0.6
0.4
0.2
125℃
125℃
25℃
0.0
-0.2
-0.4
-0.6
-0.8
-1.0
25℃
-40℃
-40℃
8
12
16
20
24
0
3
6
9
Input Voltage : VDD1 [V]
VACT Input Voltage : VACT [V]
Figure 40. Input Bias Current vs VACT Input Voltage
Figure 39. Protection Operation Delay Time vs Input Voltage
(Active High Voltage Detect Delay Time)
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Typical Performance Curves - continued
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
6
5
125℃
-40℃
4
-40℃
-40℃
25℃
3
25℃
25℃
2
125℃
125℃
1
0
8
12
16
20
24
4.85
4.90
4.95
5.00
5.05
Input Voltage : VDD1 [V]
VH Input Voltage : VH [V]
Figure 41. SD1 Output Voltage vs VH Input Voltage
(High Voltage Detect/Release Threshold)
Figure 42. Protection Operation Delay Time
vs Input Voltage
(High Voltage Detect/Release Threshold)
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
-40℃
25℃
125℃
-0.4
-0.6
-0.8
-1.0
0
3
6
9
RFOV Input Voltage : VRFOV [V]
Figure 43. Input Bias Current vs RFOV Input Voltage
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External Resistor
(1) VH,VDTY External Resistors
VH terminal is used to monitor the occurrences of over and under voltage condition.
VDTY is used to determine the output Duty.
Voltage is provided to both terminals by a voltage divider circuit.
Over voltage is detected when VH voltage> RFOV, while under voltage is detected when VH< RFLV voltage×0.8.
Voltage-divider resistor ratio is determined according to the high voltage to be monitored and to be detection
voltage.
When R3 of Figure 44 is removed, internal diodes clamp VH and VDTY voltages to VDD+Vf. At this condition,
design the values of R1 and R2 that will keep VH and VDTY currents below 2mA.
High voltage
High voltage
VDD1
VH
VDD1
VH
R1
R2
R3
R1
Max 2mA
Max 2mA
Protection detection
VDD1+Vf
R2
VDTY
VDTY
Voltage monitor
R3
Open
(High voltage-VDD1)/R1<2mA
Figure 44. VH,VDTY Partial Resistance
(2) RFOV,RFLV External Resistors
RFOV sets the reference value for OVP, while RFLV sets the reference for UVP.
The resistor values to be used should always keep the load current of REF below 5mA.
Load current
REF
RL1
RO1
RO2
(REF voltage/(RL1+RL2)) + (REF voltage/(RO1+RO2)) < 5mA
RFOV
RFLV
RL2
Figure 45. RFOV,RFLV Partial Resistance
(3) RT External Resistors
RT terminal is used to set the current of the internal reference oscillator.
Reference frequency is F_OSC=(1.0*10^6)/(RT resistance) [kHz].
Upper limit of set frequency is 250 kHz (RT=4kΩ), and lower limit is 10 kHz (RT=100kΩ).
RT Resistance
100kΩ
Frequency
10kHz
10kΩ
100kHz
250kHz
4kΩ
Figure 46. RT Resistance and Frequency
(4) SD2 Resistance
SD2 terminal is an open drain output terminal. Connect pull-up resistor between SD2 and power source to use it.
RSD resistance value should keep the current of SD2 terminal below 20mA.
VBAT
RSD
SD2
VBAT/RSD<20mA
Figure 47. SD2 Resistance
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BM67290FV-C
I/O Equivalent Circuits
○VDTY, RFOV, RFLV
○REF
○VACT
VDD1
Internal power supply
VDD1
VDD1
VDD1 Internal power supply
REF
VACT
VDTY
RFOV
RFLV
GND1 GND1
GND1
GND1
○RT
○VH
VDD1 Internal power supply
VDD1
REF
RT
VH
Internal power supply
GND1
GND1
○OUT,SD1
○SD2
VDD2
VDD2
SD2
OUT
SD1
GND2 GND2
GND2 GND2
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Operational Notes
1. Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
terminals.
2. Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3. Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4. Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5. Thermal Consideration
Should by any chance the power dissipation rating be exceeded, the rise in temperature of the chip may result in
deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when
the IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum rating,
increase the board size and copper area to prevent exceeding the Pd rating.
6. Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
7. Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.
Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing
of connections.
8. Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9. Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should
always be turned OFF completely before connecting or removing it from the test setup during the inspection process.
To prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport
and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
11. Unused Input Terminals
Input terminals of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance
and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input terminals should be connected to
the power supply or ground line.
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Operational Notes – continued
12. Regarding Input Pins of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
Pin B
B
E
C
Pin A
B
C
E
P
P+
P+
N
P+
P
P+
N
N
N
N
N
N
N
Parasitic
Elements
Parasitic
Elements
P Substrate
GND GND
P Substrate
GND
GND
Parasitic
Elements
Parasitic
Elements
N Region
close-by
Figure 49. Example of Monolithic IC Structure
13. Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
14. Over-Current Protection Circuit (OCP)
This IC has a built-in overcurrent protection circuit that activates when the output is accidentally shorted. However, it is
strongly advised not to subject the IC to prolonged shorting of the output.
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Ordering Information
0
F
V
B M 6
7
2
9
CE 2
Package
FV: SSOP-B20W
Package, forming specifications
E2: Reel type embossed taping
(SSOP-B20W)
Part Number
None: Tray, tube
Marking Diagram
SSOP-B20W (TOP VIEW)
Part Number Marking
LOT Number
B M 6 7 2 9 0
1PIN MARK
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Physical Dimension, Tape and Reel Information
Package Name
SSOP-B20W
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Revision History
Date
Revision
001
Changes
10.Nov.2014
New Release
P1 Modify Figure 1
P12 Modify VH,VDTY,VACT,RFOV,RFLV Absolute Maximum Ratings
P12 Modify OUT,SD1 Absolute Maximum Ratings
P12 Delete Power Dissipation
P13 Add Thermal Resistance
P13 Modify Note7
P13 Add Insulation Related Characteristics
P14 Modify Duty Temperature Property/Electric Property Variation Ratio
Symbol ⊿DUTY/DUTY ⇒⊿DUTY
19.Jul.2016
002
P15 Modify RLOV⇒RFOV
P15 Isurce⇒Isource
P21 Modify Ibvdty⇒IbRFLV
P22 Modify Ibvdty⇒IbVH
P23 Modify Ibvdty⇒IbVACT
P23 Modify Ibvdty⇒IbRFOV
P24 Modify Figure.14⇒Figure.44
P25 Modify OUT/SD1 Equivalent Circuits GND⇒GND2
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Notice
Precaution on using ROHM Products
(Note 1)
1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment
,
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅣ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅢ
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
Rev.003
© 2015 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PAA-E
Rev.003
© 2015 ROHM Co., Ltd. All rights reserved.
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General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall not be in an y way responsible or liable for failure, malfunction or accident arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
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