BR24G64F-5_技术文档

Datasheet

Serial EEPROM Series Standard EEPROM

I²C BUS EEPROM (2-Wire)

BR24G64xxx-5 Series

General Description

Key Specifications

BR24G64xxx-5 Series is a 64Kbit serial EEPROM of I²C

BUS Interface.

◼

Write Cycles:

4 Million Times (Ta=25°C)

200 Years (Ta=55°C)

5ms (Max)

Data Retention:

Write Cycle Time:

Supply Voltage:

1.6V to 5.5V

Features

◼

All Controls Available by 2 Ports of Serial Clock

(SCL) and Serial Data (SDA)

Packages

SOP8

W(Typ) x D(Typ) x H(Max)

5.00mm x 6.20mm x 1.71mm

4.90mm x 6.00mm x 1.65mm

3.00mm x 6.40mm x 1.20mm

2.90mm x 4.00mm x 0.90mm

2.00mm x 3.00mm x 0.60mm

◼

1.6V to 5.5V Wide Limit of Operating Voltage,

Possible 1MHz Operation

SOP-J8

TSSOP-B8

MSOP8

VSON008X2030

◼

Page Write Mode 32Byte

Bit Format 8K x 8bit

Low Current Consumption

Prevention of Miswriting

➢ WP (Write Protect) Function Added

➢ Prevention of Miswriting at Low Voltage

Noise Filter Built-in SCL / SDA Pin

Initial Delivery State FFh

◼

Applications

Ordinary Electronic Equipment (such as AV equipment,

SOP8

SOP-J8

MSOP8

OA equipment, telecommunication equipment, home

electronic appliances, amusement equipment, etc.).

Typical Application Circuit

VSON008X2030

V_CC

VCC

WP

A0

A1

*

TSSOP-B8

Micro-

controller

SCL

SDA

A2

Figure 2

GND

0.1µF

* Connect A0, A1, A2 to VCC or GND.

These pins have pull-down elements inside the IC.

If pins are open, they are the same as when they are connected to GND.

Figure 1. Typical Application Circuit

〇Product structure : Silicon integrated circuit 〇This product has no designed protection against radioactive rays

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BR24G64xxx-5 Series

Contents

General Description........................................................................................................................................................................1

Features..........................................................................................................................................................................................1

Applications ....................................................................................................................................................................................1

Typical Application Circuit ...............................................................................................................................................................1

Key Specifications ..........................................................................................................................................................................1

Packages........................................................................................................................................................................................1

Contents .........................................................................................................................................................................................2

Pin Configuration ............................................................................................................................................................................3

Pin Description................................................................................................................................................................................3

Block Diagram ................................................................................................................................................................................3

Absolute Maximum Ratings ............................................................................................................................................................4

Thermal Resistance........................................................................................................................................................................4

Operating Conditions......................................................................................................................................................................5

Input / Output Capacitance .............................................................................................................................................................5

Input Impedance.............................................................................................................................................................................5

Memory Cell Characteristics...........................................................................................................................................................5

Electrical Characteristics.................................................................................................................................................................6

AC Characteristics..........................................................................................................................................................................6

AC Characteristics Condition..........................................................................................................................................................6

Input / Output Timing ......................................................................................................................................................................7

Typical Performance Curves...........................................................................................................................................................8

I²C BUS Communication...............................................................................................................................................................17

Write Command............................................................................................................................................................................18

Read Command............................................................................................................................................................................19

Method of Reset ...........................................................................................................................................................................20

Acknowledge Polling.....................................................................................................................................................................20

WP Valid Timing (Write Cancel)....................................................................................................................................................21

Command Cancel by Start Condition and Stop Condition ............................................................................................................21

Application Examples ...................................................................................................................................................................22

Caution on Power-Up Conditions..................................................................................................................................................24

Low Voltage Malfunction Prevention Function ..............................................................................................................................24

I/O Equivalence Circuits................................................................................................................................................................25

Operational Notes.........................................................................................................................................................................26

Ordering Information.....................................................................................................................................................................27

Lineup...........................................................................................................................................................................................27

Marking Diagrams.........................................................................................................................................................................28

Physical Dimension and Packing Information...............................................................................................................................29

Revision History............................................................................................................................................................................34

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Pin Configuration

(TOP VIEW)

VCC

8

1

2

3

4

8

7

6

5

VCC

WP

A0

A1

1

2

3

4

A0

A1

7 WP

6 SCL

SCL

SDA

A2

EXP-PAD

SDA

5

GND

Figure 3-(a). Pin Configuration

(SOP8, SOP-J8, TSSOP-B8, MSOP8)

Figure 3-(b). Pin Configuration

(VSON008X2030)

Pin Description

Pin No.

Pin Name

A0

Input / Output

Descriptions

Slave address setting^{(Note 1)}

Reference voltage of all input / output, 0V

Serial data input / serial data output^{(Note 2)}

Serial clock input

1

2

3

4

5

6

7

8

-

Input

A1

Input

A2

Input

GND

SDA

SCL

-

Input / Output

Input

Write protect pin^{(Note 3)}

WP

Input

Connect the power source

VCC

EXP-PAD

-

Leave as OPEN or connect to GND

(Note 1) Connect to VCC or GND. There are pull-down elements inside the IC. If pins are open, they are the same as when they are connected to GND.

(Note 2) SDA is NMOS open drain, so it requires a pull-up resistor.

(Note 3) Connect to VCC or GND, or control to 'HIGH' level or 'LOW' level. There are pull-down elements inside the IC. If this pin is open, this input is recognized

as 'LOW'.

Block Diagram

A0

1

8

VCC

64Kbit EEPROM Array

8bit

Address

Decoder

Word

Data

13bit

A1

A2

2

3

4

7

6

5

WP

Address Register

Register

START

STOP

SCL

SDA

Control Circuit

ACK

Supply Voltage

Detection

High Voltage

Generating Circuit

GND

Figure 4. Block Diagram

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BR24G64xxx-5 Series

Absolute Maximum Ratings

Parameter

Symbol

V_CC

Rating

Unit

V

Remark

Ta=25°C

Supply Voltage

-0.3 to +6.5

Ta=25°C.The maximum value of input voltage/

output voltage is not over than 6.5V. When the

pulse width is 50ns or less, the minimum value

of input voltage/output voltage is -1.0V.

Input Voltage / Output Voltage

-

-0.3 to V_CC+1.0

V

Electro Static Discharge

(Human Body Model)

Maximum Output Low Current

(SDA)

V_ESD

-3000 to +3000

10

V

Ta=25°C

I_OLMAX

mA

Maximum Junction Temperature

Tjmax

Tstg

150

°C

Storage Temperature Range

-65 to +150

Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit

between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is

operated over the absolute maximum ratings.

Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the

properties of the chip. In case of exceeding this absolute maximum rating, design a PCB boards with thermal resistance taken into consideration by

increasing board size and copper area so as not to exceed the maximum junction temperature rating.

Thermal Resistance^{(Note 4)}

Thermal Resistance (Typ)

Parameter

Symbol

Unit

1s^{(Note 6)}

2s2p^{(Note 7)}

SOP8

197.4

21

109.8

19

Junction to Ambient

Junction to Top Characterization Parameter^{(Note 5)}

θ_JA

°C/W

Ψ_JT

SOP-J8

Junction to Ambient

Junction to Top Characterization Parameter^{(Note 5)}

θ_JA

149.3

18

76.9

11

°C/W

Ψ_JT

TSSOP-B8

Junction to Ambient

Junction to Top Characterization Parameter^{(Note 5)}

θ_JA

251.9

31

152.1

20

°C/W

Ψ_JT

MSOP8

Junction to Ambient

Junction to Top Characterization Parameter^{(Note 5)}

θ_JA

284.1

21

135.4

11

°C/W

Ψ_JT

(Note 4) Based on JESD51-2A(Still-Air)

(Note 5) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside

surface of the component package.

(Note 6) Using a PCB board based on JESD51-3.

Layer Number of

Measurement Board

Material

FR-4

Board Size

Single

114.3mm x 76.2mm x 1.57mmt

Top

Copper Pattern

Thickness

70µm

Footprints and Traces

(Note 7) Using a PCB board based on JESD51-7.

Layer Number of

Material

Board Size

114.3mm x 76.2mm x 1.6mmt

2 Internal Layers

Measurement Board

4 Layers

FR-4

Top

Bottom

Copper Pattern

74.2mm x 74.2mm

Copper Pattern

Thickness

70µm

Copper Pattern

Thickness

35µm

Thickness

70µm

Footprints and Traces

74.2mm x 74.2mm

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Thermal Resistance^{(Note 8)}- continued

Thermal Resistance (Typ)

Parameter

Symbol

Unit

1s^{(Note 10)}

2s2p^{(Note 11)}

VSON008X2030

308.3

43

69.6

10

Junction to Ambient

Junction to Top Characterization Parameter^{(Note 9)}

θ_JA

°C/W

Ψ_JT

(Note 8) Based on JESD51-2A(Still-Air)

(Note 9) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside

surface of the component package.

(Note 10) Using a PCB board based on JESD51-3.

Layer Number of

Measurement Board

Material

FR-4

Board Size

Single

114.3mm x 76.2mm x 1.57mmt

Top

Copper Pattern

Thickness

70µm

Footprints and Traces

(Note 11) Using a PCB board based on JESD51-5, 7.

Thermal Via^{(Note 12)}

Layer Number of

Material

Board Size

Measurement Board

Pitch

1.20mm

Diameter

Φ0.30mm

4 Layers

FR-4

114.3mm x 76.2mm x 1.6mmt

2 Internal Layers

Top

Bottom

Copper Pattern

Thickness

70µm

Copper Pattern

Thickness

35µm

Copper Pattern

Thickness

Footprints and Traces

74.2mm x 74.2mm

70µm

(Note 12) This thermal via connects with the copper pattern of all layers.

Operating Conditions

Parameter

Supply Voltage

Symbol

Min

Typ

Max

Unit

V_CC

Ta

C

1.6

-40

0.1

-

5.5

+85

-

V

Ambient Operating Temperature

Bypass capacitor^{(Note 13)}

°C

µF

(Note 13) Connect a bypass capacitor between the IC’s VCC and GND pin.

Input / Output Capacitance (Ta=25°C, f=1MHz)

Parameter

Symbol

Min

Typ

Max

8

Unit

Conditions

Input / Output Capacitance

(SDA)^{(Note 14)}

pF V_I/O=GND

pF V_IN=GND

C_I/O

-

Input Capacitance

C_IN

8

(SCL, A0, A1, A2, WP)^{(Note 14)}

(Note 14) Not 100% TESTED.

Input Impedance

Parameter

Input Impedance 1

Input Impedance 2

(Unless otherwise specified, Ta=-40°C to +85°C, V_CC=1.6V to 5.5V)

Symbol

Min

Typ

Max

Unit

Conditions

Z_IH

Z_IL

500

30

-

kΩ 0.7V_CC≤V_IN(A0, A1, A2, WP)

kΩ V_IN≤0.3V_CC(A0, A1, A2, WP)

Memory Cell Characteristics (V_CC=1.6V to 5.5V)

Parameter

Symbol

Min

Typ

Max

Unit

Conditions

Write Cycles^{(Note 15,16)}

Data Retention^{(Note 15)}

-

4,000,000

200

-

Times Ta=25°C

Years Ta=55°C

(Note 15) Not 100% TESTED.

(Note 16) The Write Cycles is defined for unit of 4 data bytes with the same address bits of WA12 to WA2.

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Electrical Characteristics

(Unless otherwise specified, Ta=-40°C to +85°C

,

V_CC=1.6V to 5.5V

)

Parameter

Symbol

Min

Typ

Max

Unit

Conditions

Input High Voltage 1

Input Low Voltage 1

Input High Voltage 2

Input Low Voltage 2

Output Low Voltage 1

Output Low Voltage 2

V_IH1

V_IL1

0.7V_CC

-0.3^{(Note 17)}

0.8V_CC

-0.3^{(Note 17)}

-

V_CC+1.0

+0.3V_CC

V_CC+1.0

+0.2V_CC

0.4

V

1.7V≤V_CC≤5.5V

V_IH2

V_IL2

1.6V≤V_CC<1.7V

V_OL1

V_OL2

I_OL=3.2mA, 2.5V≤V_CC≤5.5V (SDA)

I_OL=1.0mA, 1.6V≤V_CC<2.5V (SDA)

-

0.2

V_IN=0 or V_CC(A0, A1, A2, WP)

Standby Mode

Input Leakage Current 1

I_LI1

-1

-

+1

µA

Input Leakage Current 2

Output Leakage Current

I_LI2

I_LO

-1

-

+1

µA V_IN=0 to V_CC(SCL)

µA V_OUT=0 to V_CC(SDA)

V_CC=5.5V, f_SCL=1MHz, t_WR=5ms,

Byte Write, Page Write

V_CC=5.5V, f_SCL=1MHz

mA Random Read, Current Read,

Sequential Read

Supply Current (Write) ^{(Note 18)}

Supply Current (Read) ^{(Note 18)}

Standby Current

I_CC1

I_CC2

I_SB

-

2.0

2.5

mA

V_CC=5.5V, SDA, SCL=V_CC

A0, A1, A2, WP=GND

µA

(Note 17) When the pulse width is 50ns or less, it is -1.0V.

(Note 18) The average value during operation.

AC Characteristics

(Unless otherwise specified, Ta=-40°C to +85°C

,

V_CC=1.6V to 5.5V

)

Parameter

Symbol

Min

Typ

Max

Unit

Clock Frequency

f_SCL

t_HIGH

t_LOW

t_R

-

260

500

-

1

MHz

ns

ms

ns

µs

Data Clock High Period

Data Clock Low Period

SDA, SCL (input) Rise Time^{(Note 19)}

SDA, SCL (input) Fall Time^{(Note 19)}

SDA (output) Fall Time^{(Note 19)}

Start Condition Hold Time

Start Condition Setup Time

Input Data Hold Time

-

120

t_F1

-

120

t_F2

-

120

t_HD:STA

t_SU:STA

t_HD:DAT

t_SU:DAT

t_PD

250

200

0

-

Input Data Setup Time

Output Data Delay Time

Output Data Hold Time

Stop Condition Setup Time

Bus Free Time

50

250

500

-

450

t_DH

-

t_SU:STO

t_BUF

-

Write Cycle Time

t_WR

5

50

-

Noise Suppression Time (SCL, SDA)

WP Hold Time

t_I

-

t_HD:WP

t_SU:WP

t_HIGH:WP

1.0

0.1

1.0

WP Setup Time

-

WP High Period

-

(Note 19) Not 100% TESTED.

AC Characteristics Condition

Parameter

Symbol

Conditions

Unit

Load Capacitance

C_L

t_R

100

20

pF

ns

V

Input Rise Time

Input Fall Time

t_F1

20

Input Voltage

V_IL/V_IH

-

0.2V_CC/0.8V_CC

0.3V_CC/0.7V_CC

Input / Output Data Timing Reference Level

V

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BR24G64xxx-5 Series

Input / Output Timing

t_R

t_HIGH

t_F1

70%

30%

70%

SCL

30%

t_HD:STA

t_HD:DAT

t_LOW

t_SU:DAT

70%

SDA

(input)

70%

30%

t_DH

t_PD

t_BUF

SDA

(output)

70%

30%

t_F2

○Input read at the rise edge of SCL

○Data output in sync with the fall of SCL

Figure 5-(a). Input / Output Timing

70%

SCL

70%

t_SU:STA

t_SU:STO

t_HD:STA

70%

30%

SDA

30%

STOP condition

START condition

Figure 5-(b). Start-Stop Condition Timing

SCL

SDA

70%

D0

ACK

t_WR

write data

(n-th address)

START condition

STOP condition

Figure 5-(c). Write Cycle Timing

DATA(n)

70%

SCL

DATA(1)

70%

ACK

SDA

WP

t_WR

70%

30%

t_HD:WP

STOP condition

t_SU:WP

Figure 5-(d). WP Timing at Write Execution

SCL

SDA

DATA(n)

DATA(1)

70%

ACK

D1

D0

t_WR

t_HIGH:WP

70%

WP

Figure 5-(e). WP Timing at Write Cancel

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BR24G64xxx-5 Series

Typical Performance Curves

6

5

4

3

2

1

0

6

Ta=-40°C

Ta=+25°C

Ta=+85°C

Ta=-40°C

Ta=+25°C

Ta=+85°C

5

4

3

2

1

0

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SupplyVoltage : V_CC[V]

Supply Voltage : V_CC[V]

Figure 6. Input High Voltage 1,2 vs Supply Voltage

Figure 7. Input Low Voltage 1,2 vs Supply Voltage

1.0

Ta=-40°C

Ta=+25°C

Ta=-40°C

Ta=+25°C

Ta=+85°C

0.8

Ta=+85°C

0.8

0.6

0.4

SPEC

0.4

SPEC

0.2

0.0

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Output Low Current : I_OL[mA]

Figure 8. Output Low Voltage 1 vs Output Low Current

(V_CC=2.5V)

Figure 9. Output Low Voltage 2 vs Output Low Current

(V_CC=1.6V)

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BR24G64xxx-5 Series

Typical Performance Curves - continued

1.2

1.0

0.8

0.6

0.4

0.2

0.0

SPEC

1.0

0.8

0.6

0.4

0.2

0.0

Ta=-40°C

Ta=+25°C

Ta=+85°C

Ta

=-40°C

Ta=+25°C

Ta=+85°C

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Input Voltage : V [V]

IN

Figure 10. Input Leakage Current 1 vs Input Voltage

(Standby Mode)

Figure 11. Input Leakage Current 2 vs Input Voltage

1.2

2.5

SPEC

1.0

2.0

Ta=-40°C

Ta=+25°C

Ta=+85°C

Ta=-40°C

Ta=+25°C

Ta=+85°C

0.8

1.5

1.0

0.5

0.0

0.6

0.4

0.2

0.0

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Output Voltage : V_OUT[V]

Supply Voltage : V_CC[V]

Figure 12. Output Leakage Current vs Output Voltage

Figure 13. Supply Current (Write) vs Supply Voltage

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BR24G64xxx-5 Series

Typical Performance Curves - continued

2.5

2.0

1.5

1.0

0.5

0.0

2.5

SPEC

2.0

1.5

1.0

0.5

0.0

Ta=-40°C

Ta=+25°C

Ta=+85°C

Ta=-40°C

Ta=+25°C

Ta=+85°C

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Supply Voltage : V_CC[V]

Figure 14. Supply Current (Read) vs Supply Voltage

(f_SCL=1MHz)

Figure 15. Standby Current vs Supply Voltage

10.0

300

SPEC

250

200

150

100

50

1.0

SPEC

Ta=-40°C

Ta=+25°C

Ta=+85°C

0.1

Ta=-40°C

Ta=+25°C

Ta=+85°C

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Supply Voltage : V_CC[V]

SupplyVoltage : V_CC[V]

Figure 16. Clock Frequency vs Supply Voltage

Figure 17. Data Clock High Period vs Supply Voltage

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BR24G64xxx-5 Series

Typical Performance Curves - continued

600

140

120

100

80

SPEC

500

400

300

200

100

0

Ta=-40°C

Ta=+25°C

Ta=+85°C

60

40

Ta=-40°C

Ta=+25°C

Ta=+85°C

20

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Supply Voltage : V_CC[V]

SupplyVoltage : V_CC[V]

Figure 18. Data Clock Low Period vs Supply Voltage

Figure 19. SDA (OUTPUT) Fall Time vs Supply Voltage

300

250

SPEC

250

200

Ta=-40°C

Ta=+25°C

Ta=+85°C

Ta=-40°C

Ta=+25°C

Ta=+85°C

200

150

100

50

150

100

50

0

-50

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SupplyVoltage : V_CC[V]

Figure 20. Start Condition Hold Time vs Supply Voltage

Figure 21. Start Condition Setup Time vs Supply Voltage

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BR24G64xxx-5 Series

Typical Performance Curves - continued

50

0

50

SPEC

0

-50

-100

-150

-100

-150

Ta=-40°C

Ta=+25°C

Ta=+85°C

Ta=-40°C

Ta=+25°C

Ta=+85°C

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SupplyVoltage : V_CC[V]

Figure 22. Input Data Hold Time vs Supply Voltage

(SDA 'LOW' to 'HIGH')

Figure 23. Input Data Hold Time vs Supply Voltage

(SDA 'HIGH' to 'LOW')

60

SPEC

50

Ta=-40°C

Ta=+25°C

Ta=+85°C

Ta=-40°C

Ta=+25°C

Ta=+85°C

40

30

20

10

0

30

20

10

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SupplyVoltage : V_CC[V]

Figure 24. Input Data Setup Time vs Supply Voltage

(SDA 'LOW' to 'HIGH')

Figure 25. Input Data Setup Time vs Supply Voltage

(SDA 'HIGH' to 'LOW')

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BR24G64xxx-5 Series

Typical Performance Curves - continued

500

400

300

200

100

0

500

SPEC

Ta=-40°C

Ta=+25°C

Ta=+85°C

SPEC

Ta=-40°C

Ta=+25°C

Ta=+85°C

400

300

200

100

0

SPEC

4

0

1

2

3

4

5

6

0

1

2

3

5

6

SupplyVoltage : V_CC[V]

Figure 26. Output Data Delay Time vs Supply Voltage

(SDA 'LOW' to 'HIGH')

Figure 27. Output Data Delay Time vs Supply Voltage

(SDA 'HIGH' to 'LOW')

500

Ta=-40°C

Ta=+25°C

Ta=+85°C

400

Ta=+85°C

400

300

200

100

300

200

100

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SupplyVoltage : V_CC[V]

Figure 28. Output Data Hold Time vs Supply Voltage

(SDA 'LOW' to 'HIGH')

Figure 29. Output Data Hold Time vs Supply Voltage

(SDA 'HIGH' to 'LOW')

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BR24G64xxx-5 Series

Typical Performance Curves - continued

600

500

400

300

200

100

0

300

SPEC

Ta=-40°C

Ta=+25°C

Ta=+85°C

250

200

150

100

50

Ta=-40°C

Ta=+25°C

Ta=+85°C

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SupplyVoltage : V_CC[V]

Figure 30. Stop Condition Setup Time vs Supply Voltage

Figure 31. Bus Free Time vs Supply Voltage

200

6

Ta=-40°C

Ta=+25°C

Ta=+85°C

SPEC

5

150

100

50

4

3

2

SPEC

Ta=-40°C

1

Ta=+25°C

Ta=+85°C

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SupplyVoltage : V_CC[V]

Figure 32. Write Cycle Time vs Supply Voltage

Figure 33. Noise Suppression Time vs Supply Voltage

(SCL 'HIGH')

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Typical Performance Curves - continued

200

150

100

50

200

Ta=-40°C

Ta=+25°C

Ta=+85°C

Ta=-40°C

Ta=+25°C

Ta=+85°C

150

100

50

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

SupplyVoltage : V_CC[V]

Supply Voltage : V_CC[V]

Figure 34. Noise Suppression Time vs Supply Voltage

(SCL 'LOW')

Figure 35. Noise Suppression Time vs Supply Voltage

(SDA 'HIGH')

1.2

200

Ta=-40°C

Ta=+25°C

Ta=+85°C

SPEC

1.0

Ta=-40°C

Ta=+25°C

Ta=+85°C

150

100

0.8

0.6

0.4

0.2

0.0

50

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Supply Voltage : V_CC[V]

Figure 36. Noise Suppression Time vs Supply Voltage

(SDA 'LOW')

Figure 37. WP Hold Time vs Supply Voltage

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Typical Performance Curves - continued

0.2

1.2

1.0

0.8

0.6

0.4

0.2

0.0

SPEC

0.1

0.0

SPEC

Ta=-40°C

Ta=+25°C

Ta=+85°C

-0.1

-0.2

-0.3

-0.4

-0.5

-0.6

Ta=-40°C

Ta=+25°C

Ta=+85°C

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Supply Voltage : V_CC[V]

Figure 38. WP Setup Time vs Supply Voltage

Figure 39. WP High Period vs Supply Voltage

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I²C BUS Communication

1. I²C BUS Data Communication

(1) I²C BUS data communication begins with start condition input, and ends at the stop condition input.

(2) The data is always 8bit long, and acknowledge is always required after each byte.

(3) I²C BUS data communication with several devices connected to the BUS is possible by connecting with 2

communication lines: serial data (SDA) and serial clock (SCL).

(4) Among the devices, there is a “master” that generates clock and control communication start and end. The rest

become “slave” which are controlled by an address peculiar to each device. EEPROM is a “slave”.

(5) The device that outputs data to the bus during data communication is called “transmitter”, and the device that

receives data is called “receiver”.

SDA

1 to 7

8

9

8

9

8

9

SCL

S

P

START ADDRESS R/W ACK

condition

DATA

ACK

DATA

ACK STOP

condition

Figure 40. Data Transfer Timing

2. Start Condition (Start Bit Recognition)

(1) Before executing each command, start condition (start bit) where SDA goes down from 'HIGH' to 'LOW' while SCL

is 'HIGH' is necessary.

(2) This IC always detects whether SDA and SCL are in start condition (start bit) or not, therefore, unless this

condition is satisfied, any command cannot be executed.

3. Stop Condition (Stop Bit Recognition)

Each command can be ended by a stop condition (stop bit) where SDA goes from 'LOW' to 'HIGH' while SCL is

'HIGH'.

4. Acknowledge (ACK) Signal

(1) This acknowledge (ACK) signal is a software rule to indicate whether or not data transfer was performed normally.

In both master and slave communication, the device at the transmitter (sending) side releases the bus after

outputting 8-bit data. When a slave address of a write command or a read command is input, microcontroller is the

device at the transmitter side. When data output for a read command, this IC is the device at the transmitter side.

(2) The device on the receiver (receiving) side sets SDA 'LOW' during the 9^thclock cycle, and outputs an ACK signal

showing that the 8-bit data has been received. When a slave address of a write command or a read command is

input, this IC is the device at the receiver side. When data output for a read command, microcontroller is the device

at the receiver side.

(3) This IC, after recognizing start condition and slave address (8bit), outputs ACK signal 'LOW'.

(4) Each write operation outputs ACK signal 'LOW' every 8bit data (a word address and write data) reception.

(5) During read operation, this IC outputs 8bit data (read data) and detects the ACK signal 'LOW'. When ACK signal is

detected, and no stop condition is sent from the master (microcontroller) side, this IC will continue to output data. If

the ACK signal is not detected, this IC stops data transfer, recognizes the stop condition (stop bit), and ends the

read operation. Then this IC becomes ready for another transmission.

5. Device Addressing

(1) From the master, input the slave address after the start condition.

(2) The significant 4 bits of slave address are used for recognizing a device type.

The device code of this IC is fixed to '1010'.

(3) The next slave addresses (A2 A1 A0 --- device address) are for selecting devices, and multiple devices can be used

on a same bus according to the number of device addresses. It is possible to select and operate only device whose

'VCC' 'GND' input conditions of the A0, A1, A2 pin match the 'HIGH' 'LOW' input conditions of slave address sent

from the master.

(4) The least significant bit (R / W --- READ/ WRITE ) of slave address is used for designating write or read operation,

and is as shown below.

Setting R/ W to 0 ------- write (setting 0 to word address setting of random read)

Setting R/ W to 1 ------- read

Maximum number of

Slave address

Connected buses

8

1

0

1

0 A2 A1 A0 R/ W

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Write Command

1. Write

(1) Arbitrary data can be written to EEPROM. When writing only 1 byte, Byte Write is normally used, and when writing

continuous data of 2 bytes or more, simultaneous write is possible by Page Write. Up to 32 arbitrary bytes can be

written.

SLAVE

ADDRESS

1st WORD

ADDRESS

2nd WORD

ADDRESS

WRITE

START

DATA

STOP

SDA

LINE

WAWA

WA

0

1

0

1

0 A2A1A0

R/W

D7

D0

ACK

＊

＊＊

* Don't Care bit

12 11

ACK

Figure 41. Byte Write

SLAVE

ADDRESS

1st WORD

ADDRESS(n)

2nd WORD

ADDRESS(n)

START

WRITE

DATA(n)

DATA(n+63)

STOP

SDA

LINE

WA WA

WA

* Don't Care bit

1

0

1

D7

D0

0 ^{A2 A1 A0}

12 11

＊

0

＊

ACK

R/W ACK

ACK

Figure 42. Page Write

(2) During internal write execution, all input commands are ignored, therefore ACK is not returned.

(3) Data is written to the address designated by word address (n-th address)

(4) By issuing stop bit after 8bit data input, internal write to memory cell starts.

(5) When internal write is started, command is not accepted for t_WR(5ms at maximum).

(6) Using page write, it is possible to write one lump sum up to 32 bytes. When data of more than 32 bytes is sent, the

excess of the bytes is overwritten the data sent already from first byte. (Refer to "Internal Address Increment").

(7) As for page write where 2 or more bytes of data is intended to be written, after the word address are designated

arbitrarily, only the value of 5 least significant bits in the address is incremented internally, so that data up to 32

bytes of memory only can be written.

(8) When V_CCis turned off during t_WR, data at the designated address is not guaranteed, please write it again.

1 page=32bytes, but the write time of page write is 5ms at maximum for 32byte batch write.

It is not equal to 5ms at maximum x 32byte=160ms(Max).

2. Internal Address Increment

Page write mode

WA7 WA6 WA5 WA4 WA3 WA2 WA1 WA0

0

1

0

1

0

Increment

For example, when starting from address 1Eh, then,

1Eh→1Fh→00h→01h···. Please take note that it will be

incremented.

0

1

0

1

0

1

0

1

0

1

0

1Eh

*1Eh···1E in hexadecimal, therefore, 00011110 becomes a

binary number.

Significantbit is fixed.

No digitup

3. Write Protect (WP) Function

When WP pin is set at V_CC('HIGH' level), data rewrite of all addresses is prohibited. When it is set GND ('LOW' level),

data rewrite of all address is enabled. Be sure to connect this pin to VCC or GND, or control it to 'HIGH' level or 'LOW'

level. If WP pin is open, this input is recognized as 'LOW'.

In case of using it as ROM, by connect it to pull-up or VCC, write error can be prevented.

At extremely low voltage at power ON/OFF, by setting the WP pin 'HIGH', write error can be prevented.

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4. ECC Function

This IC has ECC bits for Error Correction every 4 bytes with the same address bits of WA12 to WA2. In read operation,

if 1 bit of error data exists in 4 bytes, this error data will be corrected by the ECC function and outputs the correct data.

In write operation, only 1 byte of data is to be written, 4 bytes of data will be written as one group with the same

address bits of WA12 to WA2 (the data to be written in the remaining 3 bytes will be the same as its previous stored

data). Therefore, the number of write cycle times is guaranteed every 4 bytes with the same address bits of WA12 to

WA2.

Initial Delivery State

Address

Number of remaining

write cycles

0000h

4 Million

Times

0001h

4 Million

Times

0002h

4 Million

Times

0003h

4 Million

Times

0004h

4 Million

Times

0005h

4 Million

Times

···

After 1 Million Times using Byte Write in Address 0000h

Address

Number of remaining

write cycles

0000h

3 Million

Times

0001h

3 Million

Times

0002h

3 Million

Times

0003h

3 Million

Times

0004h

4 Million

Times

0005h

4 Million

Times

···

Even if only 1 byte of data is to be written in address 0000h,

the addresses 0000h to 0003h are written as one group.

Therefore, the number of write cycle times at addresses 0001h to

0003h decreases.

Figure 43. Example of data write and number of remaining write cycles

Read Command

Read the EEPROM data. Read has a random read and a current read functions. Random read is commonly used in

commands that specify addresses and read data. The current read is a command to read data of the internal address

register without specifying an address. In both read functions, sequential read is possible where the next address data

can be read in succession.

SLAVE

ADDRESS

1st WORD

ADDRESS（ｎ）

2nd WORD SLAVE

ADDRESS（ｎ） START ADDRESS

DATA(n)

STOP

START

WRITE

READ

SDA

LINE

WA

0

WAWA

12 11

A2

1 0 1 0 A1A0

1 0 1 0

A1A0

D7

D0

A2

*

* Don’t Care bit

ACK

R/W

Figure 44. Random Read

SLAVE

START ADDRESS

DATA(n)

READ

STOP

SDA

LINE

1 0 1 0 A2A1A0

D7

D0

ACK

R/W ACK

Figure 45. Current Read

SLAVE

ADDRESS

START

1

READ

DATA(n)

DATA(n+x)

STOP

SDA

LINE

A2 A0

A1

0

1

0

D7

D0

D7

D0

R/W ACK

ACK

Figure 46. Sequential Read (in the Case of Current Read)

(1) In random read, data of designated word address can be read.

(2) When the command just before current read is random read or current read (each including sequential read), if last

read address is (n)-th, data of the incremented address (n+1)-th is outputted.

(3) When ACK signal 'LOW' after D0 is detected, and stop condition is not sent from master (microcontroller) side, the

next address data can be read in succession.

(4) Read is ended by stop condition where 'HIGH' is input to ACK signal after D0 and SDA signal goes from 'LOW' to

'HIGH' while at SCL signal is 'HIGH'.

(5) When 'LOW' is input at ACK signal after D0 without 'HIGH' input, sequential read gets in, and the next data is

outputted. Therefore, read command cannot be ended. To end read command, be sure to input 'HIGH' to ACK

signal after D0, and the stop condition where SDA goes from 'LOW' to 'HIGH' while SCL signal is 'HIGH'.

(6) Sequential read is ended by stop condition where 'HIGH' is input to ACK signal after arbitrary D0 and SDA goes

from 'LOW' to 'HIGH' while SCL signal is 'HIGH'.

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Method of Reset

This IC can be reset by sending the stop condition after executing the start condition. Please execute it when it is necessary

to reset after power-up, or during command input timing. However, the start condition and stop condition could not be

applied because 'HIGH' input of microcontroller and 'LOW' output of EEPROM collide when EEPROM is 'LOW' in ACK

output section and data reading. In that case, input SCL clock until SDA bus is released ('HIGH' by pull-up). After confirming

that SDA is released, send the stop condition after inputting the start condition. If SDA bus could not be confirmed whether

released or not in microcontroller, input the software reset. If software reset is run, EEPROM can be reset without

confirming the SDA state because SDA bus is always released in either of the two start conditions. The method of reset is

shown in the table below.

Status of SDA

Method of reset

SDA bus released

('HIGH' by pull-up)

Send the stop condition after executing the start condition.

Input SCL clock until SDA bus is released, confirm that SDA bus is released, and send the

stop condition after inputting start condition.

'LOW'

Microcontroller cannot

confirm SDA bus is

released or not

Using the software reset shown in the figure below, the start condition can be always

excuted. Within the dummy clock input area, the SDA bus is needed to be released ('HIGH'

by pull-up). For normal commands, start with the start condition input.

Stop

Dummy clock x 9

Start

SCL

SDA

Normal command

1

2

8

9

Figure 47. Input timing of software reset

Acknowledge Polling

During internal write execution, all input commands are ignored, therefore ACK is not returned. During internal automatic

write execution after write input, next command (slave address) is sent. If the first ACK signal sends back 'LOW', then it

means end of write operation, else 'HIGH' is returned, which means writing is still in progress. By the use of acknowledge

polling, next command can be executed without waiting for t_WR= 5ms.

To write continuously, slave address with R/ W = 0, then to carry out current read after write, slave address with R/ W = 1

is sent. If ACK signal sends back 'LOW', then execute word address input and data output and so forth.

During internal write,

First write command

ACK = HIGH is returned.

START

Slave

START

STOP

Slave

Address

Write Command

···

Address

ACK

=HIGH

ACK

=HIGH

t_WR

Second write command

START

STOP

START

Slave

Word

Slave

Address

···

Data

Address

ACK

=HIGH

ACK

=LOW

ACK

=LOW

ACK

=LOW

t_WR

After completion of internal write,

ACK=LOW is returned, so input next

word address and data in succession.

Figure 48. The Case of Continuous Write by Acknowledge Polling

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WP Valid Timing (Write Cancel)

WP is usually fixed to 'HIGH' or 'LOW', but when WP is controlled and used for write cancel and so on, pay attention to the

following WP valid timing. Write can be cancelled by setting WP='HIGH' while it is executed and in WP valid area. In both

byte write and page write, the area from the first start condition of command to the rise of clock which take in D0 of data(in

page write, the first byte data) is the WP invalid area. WP input in this area becomes ‘Don't care’. The area from the rise of

clock to take in D0 to the stop condition input is the WP valid area. Furthermore, after the execution of forced end by WP,

the IC enters standby status.

·Rise of SDA

·Rise of D0 taken clock

SCL

SDA

D1

D0 ACK

SDA D0

ACK

Enlarged view

STOP

START

t_WR

Slave

Address

Word

SDA

D7 D6 D5

D2

D1 D0

D4 D3

Data

Address

ACK

=LOW

ACK

=LOW

ACK

=LOW

ACK

=LOW

WP Invalid Area

WP Valid Area

WP

If WP='HIGH' in this area,

data is not written

Figure 49. WP Valid Timing

Command Cancel by Start Condition and Stop Condition

During command input, by continuously inputting start condition and stop condition, command can be cancelled. However,

within ACK output area and during data read, SDA bus may output 'LOW'. In this case, start condition and stop condition

cannot be inputted, so reset is not available. Therefore, execution of reset is needed referring ‘Method of Reset’. When

command is cancelled by start-stop condition during random read, sequential read, or current read, internal setting address

is not determined. Therefore, it is not possible to carry out current read in succession. To carry out read in succession, carry

out random read.

SCL

SDA

1

0

1

0

Start Condition

Stop Condition

Figure 50. The Case of Cancel by Start, Stop Condition during Slave Address Input

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Application Examples

1. I/O Peripheral Circuit

(1) Pull-up Resistance of SDA Pin

SDA is NMOS open drain, so it requires a pull-up resistor. As for this resistor value (R_PU), select an appropriate value

from microcontroller V_IL, I_L, and V_OL-I_OLcharacteristics of this IC. If R_PUis large, operating frequency is limited. The

smaller the R_PUincreases the supply current.

(2) Maximum Value of R_PU

The maximum value of R_PUis determined by the following factors.

(a) SDA rise time determined by the capacitance (C_BUS) of bus line of SDA and R_PUshould be t_Ror lower.

Furthermore, AC timing should be satisfied even when SDA rise time is slow.

(b) The bus electric potential

A to be determined by input current leak total (I_L) of the device connected to bus at

○

output of 'HIGH' to SDA line and R_PUshould sufficiently secure the input 'HIGH' level (V_IH) of microcontroller and

EEPROM including recommended noise margin of 0.2V_CC

.

V_CC

R_PU

Microcontroller

EEPROM

V

CC

-

I

L

R

PU

-

0.2VCC



VIH

I_L

0

.8VCC

-V

IH

SDA Pin

A

∴

R

PU



IL

I_L1

I_L2

Ex.) V_CC=3V I_L=10µA V_IH=0.7V_CC

from (b)

Bus line

Capacitance

C_BUS

0.8 3 -0.7 3

∴

R

PU



6

10



10 ^-

Figure 51. I/O Circuit Diagram

30

[ kΩ ]

(3) Minimum Value of R_PU

The minimum value of R_PUis determined by the following factors.

(a) When IC outputs 'LOW', the bus electric potential

of EEPROM.

A should be equal to or less than output 'LOW' level (V_OL)

○

V

CC -VOL

IOL

RPU

V

CC

-

V

OL

∴

RPU



I

OL

Ex.) V_CC=3V, V_OL=0.4V, I_OL=3.2mA, microcontroller, EEPROM V_IL=0.3V_CC

3 -0.4

∴

RPU



3

.2



10^-3

812 ꢀ.

5

[ Ω]

(4) Pull-up Resistance of SCL Pin

When SCL control is made at the CMOS output port, there is no need for a pull-up resistor. But when there is a time

where SCL becomes 'Hi-Z', add a pull-up resistor. As for the pull-up resistor value, decide with the balance with drive

performance of output port of microcontroller.

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2. Cautions on Microcontroller Connection

(1) R_S

In I²C BUS, it is recommended that SDA port is of open drain input/output. However, when using CMOS input/output of

tri state to SDA port, insert a series resistance R_Sbetween the pull-up resistor R_PUand the SDA pin of EEPROM. This

is to control over current that may occur when PMOS of the microcontroller and NMOS of EEPROM are turned ON

simultaneously. R_Salso plays the role of protecting the SDA pin against surge. Therefore, even when SDA port is open

drain input/output, R_Scan be used.

ACK

V_CC

SCL

R_PU

R_S

SDA

'HIGH' output of microcontroller

'LOW' output of EEPROM

EEPROM

Microcontroller

Over current flows to SDA line by 'HIGH'

output of microcontroller and 'LOW'

output of EEPROM.

Figure 52. I/O Circuit Diagram

Figure 53. I/O Collision Timing

(2) Maximum Value of R_S

The maximum value of R_Sis determined by the following relations.

(a) SDA rise time to be determined by the capacitance (C_BUS) of bus line of SDA and R_PUshould be t_Ror lower.

Furthermore, AC timing should be satisfied even when SDA rise time is slow.

(b) The bus electric potential

A to be determined by R_PUand R_Swhen EEPROM outputs 'LOW' to SDA bus should

○

sufficiently secure the input 'LOW' level (V_IL) of microcontroller including recommended noise margin of 0.1V_CC

.

(

V

CC

-

V

OL )

R

S

V_CC

+

V

OL

+

0

.

1VCC

VIL

R

PU

+

R

S

A

R_PU

V

IL

-

V -0.1V

OL

^CC

R

PU

R_S

∴

R

S



V_OL

1.

1VCC

-V

IL

I_OL

Ex.) V_CC=3V V_IL=0.3V_CCV_OL=0.4V R_PU=20kΩ

Bus line

capacitance

C_BUS

0.3 3 -0.4 -0.1ꢀ3

R

S



20 

10³

V_IL

EEPROM

Microcontroller

1.1 3 -0.3 3

Figure 54. I/O Circuit Diagram

1.67

[ kΩ ]

(3) Minimum Value of R_S

The minimum value of R_Sis determined by over current at bus collision. When over current flows, noises in power

source line and instantaneous power failure of power source may occur. When allowable over current is defined as I,

the following relation must be satisfied. Determine the allowable current in consideration of the impedance of power

source line in set and so forth.

V

CC

V_CC

I

R

S

R_PU

R_S

'LOW'

output

V

CC

Rs 

I

Ex.) V_CC=3V I=10mA

Over current I

'HIGH'

output

3

Rs



-3

10



10

EEPROM

Microcontroller

300

[ Ω]

Figure 55. I/O Circuit Diagram

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BR24G64xxx-5 Series

Caution on Power-Up Conditions

At power-up, as the V_CCrises, the IC’s internal circuits may go through unstable low voltage area, making the IC’s internal

circuit not completely reset, hence, malfunction may occur. To prevent it, this IC is equipped with Power-on Reset (P.O.R.)

circuit and LVCC circuit. In order to ensure its operation, observe the following three conditions at power-up.

1. Set SDA = 'HIGH' and SCL ='LOW' or 'HIGH'.

2. In order to operate the P.O.R. function, please turn on the power supply so as to satisfy the power-up conditions below.

In order to start its normal operation, set the power supply rise so that the supply voltage constantly increases from

Vbot to V_CClevel. Also, do not input commands during t_INITfrom power supply stabilized.

t_R:VCCt_INIT

V_CC

V_CC(Min)

t_POFF

Command

start

Vbot

0V

Figure 56. Rise Waveform Diagram

Power-Up Conditions

Parameter

Symbol

Vbot

t_POFF

Min

-

Typ

Max

0.3

-

Unit

V

Supply Voltage at Power OFF

Power OFF Time^{(Note 20)}

Initialize Time^{(Note 20)}

-

1

ms

t_INIT

0.1

0.001

-

Supply Voltage Rising Time^{(Note 20)}

t_R:VCC

100

(Note 20) Not 100% TESTED

3. Set SDA and SCL so as not to be 'Hi-Z'.

When the above conditions 1 and 2 cannot be observed, please take the following measures.

Be sure to observe condition 3.

(1) When the above condition 1 cannot be observed and SDA becomes 'LOW' at power-up.

→Control SCL and SDA as shown below, and set both SCL and SDA to 'HIGH'.

VCC

SCL

VCC

SCL

t_LOW

SDA

t_INITt_HD:DATt_SU:DAT

t_INITt_SU:DAT

Figure 58. When SCL='LOW' and SDA='LOW'

Figure 57. When SCL='HIGH' and SDA='LOW'

(2) In the case when the above condition 2 cannot be observed.

→Set WP = 'HIGH' at power-up and then execute reset.

(3) In the case when the above conditions 1 and 2 cannot be observed.

→Set WP = 'HIGH' at power-up, perform (1) and then (2).

Low Voltage Malfunction Prevention Function

LVCC circuit prevents data rewrite operation at low power, and prevents write error. At LVCC voltage (Typ =1.2V) or below,

data rewrite is prevented.

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BR24G64xxx-5 Series

I/O Equivalence Circuits

1. Input (A0, A1, A2, WP)

Pull-down elements

Figure 59. Input Pin Circuit Diagram (A0, A1, A2, WP)

2. Input (SCL)

Figure 60. Input Pin Circuit Diagram (SCL)

3. Input / Output (SDA)

Figure 61. Input / Output Pin Circuit Diagram (SDA)

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BR24G64xxx-5 Series

Operational Notes

1.

2.

Reverse Connection of Power Supply

Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when

connecting the power supply, such as mounting an external diode between the power supply and the IC’s power

supply pins.

Power Supply Lines

Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at

all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic

capacitors.

3.

4.

Ground Voltage

Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.

Ground Wiring Pattern

When using both small-signal and large-current ground traces, the two ground traces should be routed separately but

connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal

ground caused by large currents. Also ensure that the ground traces of external components do not cause variations

on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.

5.

6.

Operating Conditions

The function and operation of the IC are guaranteed within the range specified by the operating conditions. The

characteristic values are guaranteed only under the conditions of each item specified by the electrical characteristics.

Inrush Current

When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may

flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power

supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and

routing of connections.

7.

8.

Operation Under Strong Electromagnetic Field

Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.

Testing on Application Boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may

subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply

should always be turned off completely before connecting or removing it from the test setup during the inspection

process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during

transport and storage.

9.

Inter-pin Short and Mounting Errors

Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in

damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.

Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment)

and unintentional solder bridge deposited in between pins during assembly to name a few.

10. Unused Input Pins

Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and

extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small

charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and

cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the

power supply or ground line.

11. Regarding the Input Pin of the IC

In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The

operation of these parasitic elements can result in mutual interference among circuits, operational faults, or physical

damage. Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an

input pin lower than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when

no power supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input

pins have voltages within the values specified in the electrical characteristics of this IC.

12. Ceramic Capacitor

When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with

temperature and the decrease in nominal capacitance due to DC bias and others.

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BR24G64xxx-5 Series

Ordering Information

B

R

2

4

G

6

4

x

-

5

x

BUS Type

24 : I²C

Ambient Operating Temperature

/ Supply Voltage

-40°C~+85°C

/ 1.6V~5.5V

Capacity

64=64Kbit

Package

F : SOP8

FJ : SOP-J8

FVT : TSSOP-B8

FVM : MSOP8

NUX : VSON008X2030

Process Code

Packaging and Forming Specification

E2 : Embossed tape and reel (SOP8, SOP-J8, TSSOP-B8)

TR : Embossed tape and reel (MSOP8, VSON008X2030)

Lineup

Package

Orderable Part Number

Type

Quantity

SOP8

Reel of 2500

Reel of 3000

Reel of 4000

BR24G64F

-5E2

-5TR

SOP-J8

BR24G64FJ

TSSOP-B8

MSOP8

BR24G64FVT

BR24G64FVM

BR24G64NUX

VSON008X2030

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BR24G64xxx-5 Series

Marking Diagrams

SOP8(TOP VIEW)

MSOP8(TOP VIEW)

Part Number Marking

LOT Number

Part Number Marking

LOT Number

4

G

5

4

G

6

4

Pin 1 Mark

SOP-J8(TOP VIEW)

VSON008X2030 (TOP VIEW)

Part Number Marking

LOT Number

Part Number Marking

LOT Number

4 G 6

4

G

6

4

5

Pin 1 Mark

TSSOP-B8(TOP VIEW)

Part Number Marking

LOT Number

Pin 1 Mark

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BR24G64xxx-5 Series

Physical Dimension and Packing Information

Package Name

SOP8

(Max 5.35 (include.BURR))

(UNIT: mm)

PKG: SOP8

Drawing No.: EX112-5001-1

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BR24G64xxx-5 Series

Physical Dimension and Packing Information - continued

Package Name

SOP-J8

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BR24G64xxx-5 Series

Physical Dimension and Packing Information - continued

Package Name

TSSOP-B8

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BR24G64xxx-5 Series

Physical Dimension and Packing Information - continued

Package Name

MSOP8

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BR24G64xxx-5 Series

Physical Dimension and Packing Information - continued

Package Name

VSON008X2030

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BR24G64xxx-5 Series

Revision History

Date

Revision

001

Changes

30.Nov.2017

New Release

P5 Deleted the comments on columns for condition of input impedance 1 and input

impedance 2.

13.Feb.2020

002

Change the fonts and format.

P.19 Correction of error in Number of remaining write cycles.

P.6 Add Note.18.

05.Jun.2020

28.Dec.2021

003

004

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28.Dec.2021 Rev.004

Notice

Precaution on using ROHM Products

1. Our Products are designed and manufactured for application in ordinary electronic equipment (such as AV equipment,

OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you

intend to use our Products in devices requiring extremely high reliability (such as medical equipment ^{(Note 1)}, transport

equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car

accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or

serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.

Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any

damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific

Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN

USA

EU

CHINA

CLASSⅢ

CLASSⅣ

CLASSⅡb

CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are designed and manufactured for use under standard conditions and not under any special or

extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any

special or extraordinary environments or conditions. If you intend to use our Products under any special or

extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of

product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.

However, recommend sufficiently about the residue.) ; or Washing our Products by using water or water-soluble

cleaning agents for cleaning residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in

the range that does not exceed the maximum junction temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must

be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,

please consult with the ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice-PGA-E

Rev.004

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl₂, H₂S, NH₃, SO₂, and NO₂

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign

trade act, please consult with ROHM in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data.

2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the

Products with other articles such as components, circuits, systems or external equipment (including software).

3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM

will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to

manufacture or sell products containing the Products, subject to the terms and conditions herein.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice-PGA-E

Rev.004


型号：	BR24G64F-5
厂家：	ROHM
描述：	BR24G64F-5是I²C BUS 接口的64K 位串行EEPROM 。可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件：	总37页 (文件大小：1606K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BR24G64F-5 [ROHM]

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