BR25G512FJ-3_技术文档

Datasheet

Serial EEPROM Series Standard EEPROM

SPI BUS EEPROM

BR25G512-3

General Description

BR25G512-3 is a 512Kbit serial EEPROM of SPI BUS interface.

Features

Packages W(Typ) x D(Typ) x H(Max)



High Speed Clock Action up to 10MHz (Max)

Wait Function by HOLDB Terminal

Part or Whole of Memory Arrays Settable as

Read only Memory Area by Program

1.8V to 5.5V Single Power Source Operation Most

Suitable for Battery Use.



SOP8



UP to 128Byte in Page Write Mode.

For SPI bus interface (CPOL, CPHA) = (0, 0), (1, 1)

Self-timed Programming Cycle

SOP- J8

4.90mm x 6.00mm x 1.65mm

5.00mm x 6.20mm x 1.71mm

Low Current Consumption



At Write Action (5V)

At Read Action (5V)

At Standby Action (5V) : 0.1µA (Typ)

:

0.7mA (Typ)

2.4mA (Typ)



Address Auto Increment Function at Read Action

 Prevention of Write Mistake

TSSOP-B8



Write Prohibition at Power On

Write Prohibition by Command Code (WRDI)

Write Prohibition by WPB Pin

Write Prohibition Block Setting by Status Registers

(BP1, BP0)

3.00mm x 6.40mm x 1.20mm

Figure 1.



Prevention of Write Mistake at Low Voltage

More than 100 years Data Retention.

More than 1 Million Write Cycles.

Bit Format 64K×8



Initial Delivery Data

Memory Array: FFh

Status Register: WPEN, BP1, BP0 : 0

○Product structure：Silicon monolithic integrated circuit ○This product is not designed protection against radioactive rays

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Datasheet

BR25G512-3

Absolute Maximum Ratings (Ta=25°C)

Parameter

Symbol

Ratings

-0.3 to +6.5

Unit

V

Remarks

Supply Voltage

V_CC

When using at Ta=25°C or higher 4.5mW to be reduced per 1°C.

When using at Ta=25°C or higher 3.3mW to be reduced per 1°C.

0.45 (SOP8)

0.45 (SOP-J8)

0.33 (TSSOP-B8)

- 65 to +150

- 40 to +85

Power Dissipation

Pd

W

Storage Temperature

Operating Temperature

Tstg

Topr

°C

The Max value of Terminal Voltage is not over 6.5V.

When the pulse width is 50ns or less, the Min value of Terminal

Voltage is not under -1.0V.

Input Voltage /

Output Voltage

Junction temperature

Electrostatic discharge

voltage

‐

- 0.3 to Vcc+1.0

150

V

Junction temperature at the storage condition

Tjmax

°C

V_ESD

-4000 to +4000

V

(human body model)

Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit

between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over

the absolute maximum ratings.

Memory Cell Characteristics (Ta=25°C, Vcc=1.8V to 5.5V)

Limits

Parameter

Unit

Min

1,000,000

100

Typ

-

Max

-

Write Cycles ^(Note1)

Times

Years

Data Retention ^(Note1)

(Note1) Not 100% TESTED

Recommended Operating Ratings

Parameter

Power Source Voltage

Input Voltage

Symbol

Vcc

V_IN

Ratings

1.8 to 5.5

0 to Vcc

Unit

V

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Datasheet

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Electrical Characteristics (Unless otherwise specified, Ta=-40°C to +85°C, Vcc=1.8V to 5.5V)

Limits

Parameter

Symbol

Unit

Conditions

Min

0.7 x Vcc

-0.3 ^(Note1)

0

Typ

－

Max

Vcc+1.0

0.3 x Vcc

0.4

Input High Voltage1

Input Low Voltage1

V_IH1

V_IL1

V_OL1

V_OL2

V_OH1

V_OH2

I_LI

V

1.8≤Vcc≤5.5V

Output Low Voltage1

Output Low Voltage2

Output High Voltage1

Output High Voltage2

Input Leakage Current

Output Leakage Current

I_OL=3.0mA, 2.5≤Vcc≤5.5V

I_OL=1.0mA, 1.8≤Vcc<2.5V

I_OH=-2.0mA, 2.5V≤Vcc≤5.5V

I_OH=-400µA, 1.8≤Vcc<2.5V

0

0.2

Vcc

1

Vcc-0.2

- 1

µA V_IN=0 to Vcc

µA V_OUT=0 to Vcc, CSB=Vcc

I_LO

- 1

1

Vcc=2.5V, f_SCK=5MHz, t_E/W=5ms

Byte Write, Page Write, Write Status Register

I_CC1

I_CC2

－

1.5

2

mA

Supply Current (Write)

Vcc=5.5V, f_SCK=10MHz, t_E/W=5ms

Byte Write, Page Write, Write Status Register

Vcc=1.8V, f_SCK=3MHz, SO=OPEN

I_CC3

I_CC4

I_CC5

－

0.7

1

mA Read, Read Status Register

VIH/VIL=0.9Vcc/0.1Vcc

Vcc=2.5V, f_SCK=5MHz, SO=OPEN

mA Read, Read Status Register

VIH/VIL=0.9Vcc/0.1Vcc

Vcc=5.5V, f_SCK=5MHz, SO=OPEN

mA Read, Read Status Register

VIH/VIL=0.9Vcc/0.1Vcc

Supply Current (Read)

3

Vcc=5.5V, f_SCK=10MHz, SO=OPEN

mA Read, Read Status Register

VIH/VIL=0.9Vcc/0.1Vcc

I_CC6

－

4

1

Vcc=5.5V, SO=OPEN

Standby Current

I_SB

µA

CSB=HOLDB=WPB=Vcc, SCK=SI=Vcc or GND

(Note1) When the pulse width is 50ns or less, it is -1.0V.

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Datasheet

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Operating Timing Characteristics (Ta=-40°C to +85°C, unless otherwise specified, load capacity C_L=30pF)

1.8≤Vcc<2.5V 2.5≤Vcc<4.5V 4.5≤Vcc≤5.5V Unit

Min Typ Max Min Typ Max Min Typ Max

Parameter

Symbol

SCK Frequency

SCK High Time

SCK Low Time

CSB High Time

CSB Setup Time

CSB Hold Time

SCK Setup Time

SCK Hold Time

SI Setup Time

SI Hold Time

Data Output Delay Time

Output Hold Time

Output Disable Time

HOLDB Setting Setup Time

HOLDB Setting Hold Time

HOLDB Release Setup Time

HOLDB Release Hold Time

Time from HOLDB to Output High-Z

Time from HOLDB to Output change

SCK Rise Time ^(Note1)

SCK Fall Time ^(Note1)

OUTPUT Rise Time ^(Note1)

OUTPUT Fall Time ^(Note1)

Write Time

f_SCK

t_SCKWH125

t_SCKWL

t_CS

t_CSS

t_CSH

t_SCKS

t_SCKH

t_DIS

t_DIH

t_PD

t_OH

0.01

-

3

-

0.01

80

40

30

20

10

-

0

-

0

20

0

20

-

5

-

70

-

40

-

0.01

40

20

15

5

-

0

-

0

10

0

10

-

10 MHz

-

ns

µs

ns

ms

125

90

60

50

20

-

0

-

0

20

0

20

-

40

-

125

-

80

-

t_OZ

25

-

t_HFS

t_HFH

t_HRS

t_HRH

t_HOZ

t_HPD

t_RC

t_FC

t_RO

t_FO

t_E/W

-

80

2

40

5

40

2

40

5

25

20

2

20

5

-

(Note1) NOT 100% TESTED

AC Timing Characteristics Conditions

Limits

Typ

-

Parameter

Symbol

Unit

Min

-

Max

Load Capacity

Input Voltage

Input / Output Judgment Voltage

C_L

-

30

pF

V

0.2Vcc/0.8Vcc

0.3Vcc/0.7Vcc

V

Input / Output Capacity (Ta=25°C, frequency=5MHz)

Parameter

Input Capacity ^(Note1)

Output Capacity ^(Note1)

Symbol

C_IN

C_OUT

Min

－

Max

8

Unit

pF

Conditions

V_IN=GND

V_OUT=GND

－

(Note1)

Not 100% TESTED.

Serial Input / Output Timing

tCSS

tCS

CSB

SCK

tSCKH

CSB

tSCKS

tCSH

tRC

tFC

tSCKWH

tSCKWL

tDIS

SCK

SI

tDIH

tPD

SI

tRO,tFO

tOZ

tOH

High-Z

SO

High-Z

SO

Figure 2-(a). Input timing

Figure 2-(b). Input / Output timing

SI is taken into IC inside in sync with data rise edge of

SCK. Input address and data from the most significant bit

MSB

SO is output in sync with data fall edge of SCK. Data is

output from the most significant bit MSB.

CSB ^"H"

"L"

tHFS tHFH

tHRS tHRH

SCK

SI

tDIS

n

n+1

n-1

tHOZ

Dn

tHPD

High-Z

SO

Dn+1

Dn

Dn-1

HOLDB

Figure 2-(c). HOLD timing

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Datasheet

BR25G512-3

Block Diagram

VOLTAGE

1

2

3

4

8

7

6

5

CSB

SO

Vcc

INSTRUCTION DECODE

CONTROL CLOCK

GENERATION

DETECTION

WRITE

INHIBITION

HIGH VOLTAGE

GENERATOR

HOLDB

SCK

SI

INSTRUCTION

REGISTER

STATUS REGISTER

ADDRESS

WPB

GND

ADDRESS

16bit

8bit

16bit

8bit

REGISTER

DECODER

512K

EEPROM

DATA

READ/WRITE

AMP

REGISTER

Figure 3. Block Diagram

(TOP VIEW)

Pin Configuration

Vcc

HOLDB SCK

SI

CSB

SO

GND

WPB

Figure 4. Pin Configuration

Pin Descriptions

Terminal

name

Input

/Output

Function

Vcc

-

Power source to be connected

GND

CSB

SCK

SI

-

All input / output reference voltage, 0V

Chip select input

Input

Output

Serial clock input

Ope code, address, and serial data input

Serial data output

SO

Hold input

HOLDB

WPB

Input

Command communications may be suspended

temporarily (HOLD status)

Write protect input

Write status register command is prohibited

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Datasheet

BR25G512-3

Typical Performance Curves

(The following characteristic data are Typ Values.)

6

5

4

3

2

1

0

5

Ta=-40°C

Ta= 25°C

Ta= 85°C

Ta=-40°C

Ta= 25°C

Ta= 85°C

4

3

SPEC

2

1

0

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Vcc [V]

Figure 5. Input High Voltage1 vs Supply Voltage

(CSB,SCK,SI,HOLDB,WPB)

Figure 6. Input Low Voltage1 vs Supply Voltage

(CSB,SCK,SI,HOLDB,WPB)

1

0.8

0.6

0.4

0.2

0

1

0.8

0.6

0.4

0.2

0

Ta=-40°C

Ta= 25°C

Ta= 85°C

Ta=-40°C

Ta= 25°C

Ta= 85°C

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

I_OL[mA]

Figure 7. Output Low Voltage1 vs Output Current

(Vcc=2.5V)

Figure 8. Output Low Voltage2 vs Output Current

(Vcc=1.8V)

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Typical Performance Curves‐Continued

2.6

2.5

2.4

1.9

1.8

1.7

1.6

1.5

SPEC

2.3

Ta=-40°C

Ta= 25°C

Ta= 85°C

Ta=-40°C

Ta= 25°C

Ta= 85°C

2.2

0

0.5

1

1.5

_OH[mA]

2

2.5

0

0.2

0.4

0.6

I_OH[mA]

0.8

1

1.2

I

Figure 9. Output High Voltage1 vs Output Current

(Vcc=2.5V)

Figure 10. Output High Voltage2 vs Output Current

(Vcc=1.8V)

1.2

1

1.2

SPEC

1

0.8

0.6

0.4

0.2

0

0.8

0.6

0.4

0.2

0

Ta=-40°C

Ta= 25°C

Ta= 85°C

Ta=-40°C

Ta= 25°C

Ta= 85°C

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Vcc [V]

Figure 11. Input Leakage Current vs Supply Voltage

(CSB,SCK,SI,HOLDB,WPB)

Figure 12. Output Leakage Current vs Supply Voltage

(SO)

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Typical Performance Curves‐Continued

4

3

2

1

0

Ta=-40°C

Ta= 25°C

Ta= 85°C

Ta=-40°C

Ta= 25°C

Ta= 85°C

3

SPEC

2

SPEC

1

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Vcc [V]

Figure 14. Supply Current (Write) vs Supply Voltage

(fSCK=10MHz)

Figure 13. Supply Current (Write) vs Supply Voltage

(fSCK=5MHz)

0.8

SPEC

0.6

Ta=-40°C

Ta= 25°C

Ta= 85°C

0.4

0.2

0

1

2

3

4

5

6

Vcc [V]

Figure 15. Supply Current (Read) vs Supply Voltage

(fSCK=3MHz)

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Typical Performance Curves‐Continued

4

5

4

3

2

1

0

Ta=-40°C

Ta= 25°C

Ta= 85°C

SPEC

Ta=-40°C

Ta= 25°C

Ta= 85°C

3

2

SPEC

1

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Vcc [V]

Figure 16. Supply Current (Read) vs Supply Voltage

(fSCK=5MHz)

Figure 17. Supply Current (Read) vs Supply Voltage

(fSCK=10MHz)

100

10

1

2.5

2

SPEC

Ta=-40°C

Ta= 25°C

Ta= 85°C

1.5

1

SPEC

Ta=-40°C

Ta= 25°C

Ta= 85°C

0.5

0

0.1

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Vcc [V]

Figure 19. SCK Frequency vs Supply Voltage

Figure 18. Standby Current vs Supply Voltage

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Typical Performance Curves‐Continued

140

120

100

80

SPEC

120

Ta=-40°C

Ta= 25°C

Ta= 85°C

Ta= 25°C

Ta= 85°C

100

SPEC

80

60

SPEC

40

20

0

40

20

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Vcc [V]

Figure 20. SCK High Time vs Supply Voltage

Figure 21. SCK Low Time vs Supply Voltage

100

80

60

40

20

0

80

60

40

20

0

SPEC

Ta=-40°C

Ta= 25°C

Ta= 85°C

Ta= 25°C

SPEC

Ta= 85°C

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Vcc [V]

Figure 22. CSB High Time vs Supply Voltage

Figure 23. CSB Setup Time vs Supply Voltage

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BR25G512-3

Typical Performance Curves‐Continued

30

20

10

0

80

SPEC

Ta=-40°C

Ta= 25°C

Ta= 85°C

Ta=-40°C

Ta= 25°C

Ta= 85°C

60

40

20

0

SPEC

-10

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Vcc [V]

Figure 24. CSB Hold Time vs Supply Voltage

Figure 25. SI Setup Time vs Supply Voltage

25

140

SPEC

Ta=-40°C

120

100

80

60

40

20

0

Ta= 25°C

SPEC

Ta= 85°C

Ta=-40°C

Ta= 25°C

Ta= 85°C

20

15

10

5

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Vcc [V]

Figure 26. SI Hold Time vs Supply Voltage

Figure 27. Data Output Delay Time vs Supply Voltage

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Datasheet

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Typical Performance Curves‐Continued

100

25

20

15

10

5

Ta=-40°C

Ta= 25°C

SPEC

Ta= 85°C

80

60

40

20

0

Ta=-40°C

Ta= 25°C

Ta= 85°C

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Vcc [V]

Figure 28. Output Disable Time vs Supply Voltage

Figure 29. HOLDB Setting Hold Time vs Supply Voltage

100

25

20

15

10

5

Ta=-40°C

Ta= 25°C

Ta= 85°C

SPEC

80

60

40

20

0

Ta=-40°C

Ta= 25°C

Ta= 85°C

SPEC

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Vcc [V]

Figure 30. HOLDB Release Hold Time vs Supply Voltage

Figure 31. Time from HOLDB to Output High-Z

vs Supply Voltage

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Datasheet

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Typical Performance Curves‐Continued

100

50

40

30

20

10

0

Ta=-40°C

SPEC

Ta= 25°C

80

Ta= 85°C

Ta=-40°C

Ta= 25°C

Ta= 85°C

60

SPEC

40

SPEC

20

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Vcc [V]

Figure 32. Time from HOLDB to Output change

vs Supply Voltage

Figure 33. OUTPUT Rise Time vs Supply Voltage

6

5

4

3

2

1

0

50

SPEC

40

30

20

10

0

Ta=-40°C

Ta= 25°C

Ta= 85°C

SPEC

Ta=-40°C

Ta= 25°C

Ta= 85°C

0

1

2

3

4

5

6

0

1

2

3

4

5

6

Vcc [V]

Figure 34. OUTPUT Fall Time vs Supply Voltage

Figure 35. Write Cycle Time vs Supply Voltage

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Datasheet

BR25G512-3

Features

1. Status Registers

This IC has status register. The status register expresses the following parameters of 8 bits.

BP0 and BP1 can be set by write status register command. These 2 bits are memorized into the EEPROM, therefore are

valid even when power source is turned off.

Rewrite characteristics and data hold time are same as characteristics of the EEPROM.

WEN can be set by write enable command and write disable command. WEN becomes write disable status when power

source is turned off. R/B is for write confirmation, therefore cannot be set externally.

The value of status register can be read by read status register command.

(1) Contexture of Status Register

bit 7

bit 6

bit 5

bit 4

0

bit 3

BP1

bit 2

BP0

bit 1

bit 0

―

WPEN

0

WEN

R/B

Memory

location

bit

Function

WPB pin enable / disable designation bit

WPEN=0=invalid

WPEN

EEPROM

WPEN=1=valid

BP1

BP0

EEPROM

registers

EEPROM write disable block designation bit

Write and write status register write enable / disable status confirmation bit

WEN

WEN=0=prohibited

WEN=1=permitted

Write cycle status (READY / BUSY) status confirmation bit

―

registers

R/B=0=READY

R/B

―

R/B=1=BUSY

(2) Write Disable Block Setting

BP1

BP0

Write disable block

0

1

0

1

0

1

None

C000h-FFFFh

8000h-FFFFh

0000h-FFFFh

2. WPB Pin

By setting WPB=LOW, write command is prohibited. And the write command to be disabled at this moment is WRSR.

However, when write cycle is in execution, no interruption can be made.

WRSR

WRITE

Prohibition possible

but WPEN bit “1”

Prohibition

impossible

3. HOLDB Pin

By HOLDB pin, data transfer can be interrupted. When SCK=”0”, by making HOLDB from “1” into”0”, data transfer to

EEPROM is interrupted. When SCK = “0”, by making HOLDB from “0” into “1”, data transfer is restarted.

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Datasheet

BR25G512-3

Command Mode

Command

Contents

Ope code

0000

WREN

WRDI

READ

WRITE

RDSR

WRSR

Write Enable Command

Write Disable Command

Read Command

Write Command

Read Status Register Command

Write Status Register Command

0110

0100

0011

0010

0101

0001

Timing Chart

1. Write Enable (WREN) / Disable (WRDI) Command

WREN (WRITE ENABLE): Write enable

WRDI (WRITE DISABLE): Write disable

CSB

SCK

SI

0

1

2

3

4

5

6

7

SCK

SI

0

1

2

3

4

5

6

7

0

1

0

1

0

High-Z

SO

High-Z

SO

Figure 36. Write enable command

Figure 37. Write disable command

This IC has write enable status and write disable status. It is set to write enable status by write enable command, and it is

set to write disable status by write disable command. As for these commands, set CSB LOW, and then input the

respective ope codes. The respective commands are accepted at the 7-th clock rise. Even with input over 7 clocks,

command becomes valid.

When to carry out write command, it is necessary to set write enable status by the write enable command. If write

command is input in the write disable status, the command is cancelled. And even in the write enable status, once write

command is executed, it gets in the write disable status. After power on, this IC is in write disable status.

2. Read Command (READ)

CSB

SCK

SI

～～

10

0

1

2

3

4

5

6

7

8

9

11

23

24

30

31

～～

0

1

A15 A14 A13 A12

A1 A0

～～

High-Z

D7 D6

D2 D1 D0

SO

Figure 38. Read command

By read command, data of EEPROM can be read. As for this command, set CSB LOW, then input address after read ope

code. EEPROM starts data output of the designated address. Data output is started from SCK fall of 23-th clock, and

from D7 to D0 sequentially. This IC has increment read function. After output of data for 1 byte (8bits), by continuing input

of SCK, data of the next address can be read. Increment read can read all the addresses of EEPROM. After reading data

of the most significant address, by continuing increment read, data of the most insignificant address is read.

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3. Write Command (WRITE)

CSB

～～

0

1

2

3

4

5

6

7

8

10

11

23

24

30

31

9

SCK

～～

0

1

0

A14 A13 A12

A1

A0

D7 D6

D2

～～

D1

D0

SI

A15

High-Z

～～

SO

＊=Don't Care

Figure 39. Write command

By write command, data of EEPROM can be written. As for this command, set CSB LOW, then input address and data

after write ope code. Then, by making CSB HIGH, the EEPROM starts writing. The write time of EEPROM requires time

of t_E/W(Max 5ms). During t_E/W, other than read status register command is not accepted. Set CSB HIGH between taking

the last data (D0) and rising the next SCK clock. At the other timing, write command is not executed, and this write

command is cancelled. This IC has page write function, and after input of data for 1 byte (8 bits), by continuing data input

without setting CSB HIGH, 2byte or more data can be written for one t_E/W. Up to 128 arbitrary bytes can be written. In

page write, the insignificant 7 bit of the designated address is incremented internally at every time when data of 1 byte is

input and data is written to respective addresses. When data of the maximum bytes or higher is input, address rolls over,

and previously input data is overwritten.

4. Write Status Register, Read Status Register Command (WRSR/RDSR)

CSB

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

SCK

bit7

WPEN

bit6

bit5

bit4

bit3

bit2

bit1

bit0

0

1

BP1 BP0

SI

*

High-Z

SO

*=Don't care

Figure 40. Write status register

Write status register command can write data of status register. The data can be written by this command are 3 bits, that

is, WPEN (bit7), BP1 (bit3) and BP0 (bit2) among 8 bits of status register. By BP1 and BP0, write disable block of

EEPROM can be set. As for this command, set CSB LOW, and input ope code of write status register, and input data.

Then, by making CSB HIGH, EEPROM starts writing. Write time requires time of t_E/Was same as write. As for CSB rise,

set CSB HIGH between taking the last data bit (bit0) and the next SCK clock rising. At the other timing, command is

cancelled. Write disable block is determined by BP1 BP0, and the block can be selected from 1/4, 1/2, and entire of

memory array (Refer to the write disable block setting table.). To the write disabled block, write cannot be made, and only

read can be made.

CSB

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

SCK

0

1

0

1

SI

bit7

WPEN

bit6

bit5

bit4

bit3

bit2

bit1

WEN

bit0

R/B

High-Z

0

BP1 BP0

SO

Figure 41. Read status register command

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WPB Cancel Valid Area

WPB is normally fixed to “H” or “L” for use, but when WPB is controlled so as to cancel write status register command, pay

attention to the following WPB valid timing.

While write status register command is executed, by setting WPB = “L” in cancel valid area, command can be cancelled.

The area from command ope code to CSB rise at internal automatic write start becomes the cancel valid area. However,

once write is started, by any input write cycle cannot be cancelled. WPB input becomes Don’t Care, and cancellation

becomes invalid.

SCK

6

7

15

16

tE/W

Ope Code

Data

Va lid

Data write time

Invalid

Figure 42. WPB valid timing (At inputting WRSR command)

HOLDB Pin

By HOLDB pin, command communication can be stopped temporarily (HOLD status). The command communications are

carried out when the HOLDB pin is HIGH. To get in HOLD status, at command communication, when SCK=LOW, set the

HOLDB pin LOW. At HOLD status, SCK and SI become Don’t Care, and SO becomes high impedance (High-Z). To release

the HOLD status, set the HOLDB pin HIGH when SCK=LOW. After that, communication can be restarted from the point

before the HOLD status. For example, when HOLD status is made after A5 address input at read, after release of HOLD

status, by starting A4 address input, read can be restarted. When in HOLD status, keep CSB LOW. When it is set

CSB=HIGH in HOLD status, the IC is reset, therefore communication after that cannot be restarted.

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Method to Cancel Each Command

1. READ, RDSR

・Method to cancel : cancel by CSB = “H”.

Ope code

8 bits

Address

16 bits

Data

Ope code

8 bits

Cancel available in all areas of read mode

Cancel available in all

areas of rdsr mode

Figure 43. READ cancel valid timing

Figure 44. RDSR cancel valid timing

2. WRITE, PAGE WRITE

Ope code

8bits

Address

16bits

Data

t_E/W

a：Ope code or address input area

Cancellation is available by CSB=”H”.

b：Data input area (D7 to D1 input area)

Cancellation is available by CSB=”H”.

c：Data input area (D0 area)

8bits

b

a

d

c

SCK

SI

In this area, cancellation is not available.

When CSB is set HIGH, write starts.

d：t_E/Warea

D7 D6 D5 D4 D3 D2 D1 D0

c

b

In the area c, by rising CSB, write starts.

While writing, by any input, cancellation cannot be made.

Figure 45. WRITE cancel valid timing

Note1) If Vcc is made OFF during write execution, designated address data is not guaranteed, therefore write it once again.

Note2) If CSB is rised at the same timing as that of the SCK rise, write execution / cancel becomes unstable, therefore, it is recommended to rise in

SCK = “L” area. As for SCK rise, assure timing of t_CSS/ t_CSHor more.

3. WRSR

a：From ope code to 15-th clock rise

14 15

16

17

SCK

SI

Cancellation is available by CSB=”H”.

D1

D0

b：From 15-th clock rise to 16-th clock rise (write enable area)

In this area, cancellation is not available by CSB=”H”.

When CSB is set HIGH, write starts using CSB..

c：After 16-th clock rise.

a

b

c

t_E/W

Ope code

8 bits

Data

8 bits

Cancellation is available by CSB=”H”.

However, if write starts (CSB is rised)

a

c

In the area b, cancellation cannot be made by any means.

And, by inputting on SCK clock, cancellation cannot be made.

b

Figure 46. WRSR cancel valid timing

Note1) If Vcc is made OFF during write execution, designated address data is not guaranteed, therefore write it once again

Note2) If CSB is rised at the same timing as that of the SCK rise, write execution / cancel becomes unstable, therefore, it is recommended to rise in

SCK = “L” area. As for SCK rise, assure timing of t_CSS/ t_CSHor more.

4. WREN/WRDI

6

7

8

SCK

a：From ope code to 7-th clock rise, cancellation is available by CSB = “H”.

b：Cancellation is not available 7-th clock.

Ope code

8 bits

a

b

Figure 47. WREN/WRDI cancel valid timing

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I/O Peripheral Circuits

In order to realize stable high speed operations, pay attention to the following input / output pin conditions.

Input pin pull up, pull down resistance

When to attach pull up, pull down resistance to EEPROM input pin, select an appropriate value for the microcontroller V_OL

,

I

_OLwith considering V_ILcharacteristics of this IC.

Vcc－V^OLM

R_PU



･･･①

･･･②

IOLM

VOLM  ꢀVILM

1. Pull Up Resistance

Example) When Vcc=5V, V_ILE=1.5V, V_OLM=0.4V, I_OLM=2mA,

from the equation ①,

Microcontroller

V_OLM

“L” output

I_OLM

EEPROM

V_ILE

R_PU

5‐0.4

R_PU



210^‐3

“L” input

 R_PU 2.3[k]

Figure 48. Pull up resistance

With the value of Rpu to satisfy the above equation, V_OLM

becomes 0.4V or lower, and with V_ILE(=1.5V), the equation ② is

also satisfied.

・V_ILE:EEPROM V_ILspecifications

・V_OLM:Microcontroller V_OLspecifications

・I_OLM:Microcontroller I_OLspecifications

And, in order to prevent malfunction or erroneous write at power ON/OFF, be sure to make CSB pull up.

2. Pull Down Resistance

VOHM

･･･③

R_PD



Microcontroller

V_OHM

EEPROM

V_IHE

I^OHM

_{VOLM  ꢀVIHM}･･･④

R_PD

“H” output

“H” input

Example) When V_CC=5V, V_OHM=V_CC-0.5V, I_OHM＝0.4mA,

V_IHE=V_CC×0.7V, from the equation③,

I_OHM

5‐0.5

0.410^‐3

Figure 49. Pull down resistance

R_PD



∴ R_PD 11.3[k]

Further, by amplitude V_IHE, V_ILEof signal input to EEPROM, operation speed changes. By inputting Vcc/GND level

amplitude of signal, more stable high speed operations can be realized. On the contrary, when amplitude of 0.8Vcc /

0.2Vcc is input, operation speed becomes slow.^(note1)

In order to realize more stable high speed operation, it is recommended to make the values of R_PU, R_PDas large as

possible, and make the amplitude of signal input to EEPROM close to the amplitude of VCC / GND level.

(note1) In this case, guaranteed value of operating timing is guaranteed.

3. SO Load Capacity Condition

Load capacity of SO output pin affects upon delay characteristic of SO output (Data output delay time, time from HOLDB

to High-Z, Output rise time, Output fall time.). In order to make output delay characteristic into better, make SO load

capacity small.

EEPROM

SO

C_L

Figure 50. SO load capacity

4. Other cautions

Make the each wire length from the microcontroller to EEPROM input pin same length, in order to prevent setup / hold

violation to EEPROM, owing to difference of wire length of each input.

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Equivalent Circuit

1. Output Circuit

internal

signal

SO

internal

signal

Figure 51. SO output equivalent circuit

2. Input Circuit

internal

signal

CSB

internal

signal

Figure 52. CSB input equivalent circuit

internal

signal

internal

signal

SI

SCK

Figure 54. SI input equivalent circuit

Figure 53. SCK input equivalent circuit

internal

signal

internal

WPB

HOLDB

signal

Figure 56. WPB input equivalent circuit

Figure 55. HOLDB input equivalent circuit

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Power-Up/Down Conditions

1. At Standby

Set CSB “H”, and be sure to set SCK, SI input “L” or “H”. Do not input intermediate electric potantial.

2. At Power ON/OFF

When Vcc rise or fall, set CSB=”H” (=Vcc).

When CSB is “L”, this IC gets in input accept status (active). If power is turned on in this status, noises and the likes may

cause malfunction, erroneous write or so. To prevent these, at power ON, set CSB “H”. (When CSB is in “H” status, all

inputs are canceled.)

Vcc

CSB

Good example Bad example

Figure 57. CSB timing at power ON/OFF

(Good example) CSB terminal is pulled up to Vcc.

At power OFF, take 10ms or more before supply. If power is turned on without observing this condition, the IC

internal circuit may not be reset.

(Bad example) CSB terminal is “L” at power ON/OFF.

In this case, CSB always becomes “L” (active status), and EEPROM may have malfunction or erroneous write owing

to noises and the likes.

Even when CSB input is High-Z, the status becomes like this case.

3. Operating Timing after Power ON

As shown in Figure 58, at standby, when SCK is “H”, even if CSB is fallen, SI status is not read at fall edge. SI status is

read at SCK rise edge after fall of CSB. At standby and at power ON/OFF, set CSB “H” status.

Even if CSB is fallen at SCK=”H”,

SI status is not read at that edge.

CSB

Command start here. SI is read.

SCK

SI

0

1

2

Figure 58. Operating timing

4. At Power on Malfunction Preventing Function

This IC has a POR (Power On Reset) circuit as mistake write countermeasure. After POR action, it gets in write disable

status. The POR circuit is valid only when power is ON, and does not work when power is OFF. When power is ON, if the

recommended conditions of the following t_R, t_OFF, and V_botare not satisfied, it may become write enable status owing to

noises and the likes.

t_R

Recommended conditions of t_R, t_OFF, V_bot

Vcc

t_R

t_OFF

Vbot

10ms or below

100ms or below

10ms or higher

0.3V or below

0.2V or below

t_OFF

Vbot

0

Figure 59. Rise waveform

5. Low Voltage Malfunction Preventing Function

LVCC (Vcc-Lockout) circuit prevents data rewrite action at low power, and prevents wrong write.

At LVCC voltage (Typ =1.2V) or below, it prevent data rewrite.

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Noise Countermeasures

1. Vcc Noise (bypass capacitor)

When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is

recommended to attach a bypass capacitor (0.1µF) between IC Vcc and GND. At that time, attach it as close to IC as

possible.

And, it is also recommended to attach a bypass capacitor between board Vcc and GND.

2. SCK Noise

When the rise time of SCK (t_RC) is long, and a certain degree or more of noise exists, malfunction may occur owing to

clock bit displacement. To avoid this, a Schmitt trigger circuit is built in SCK input. The hysteresis width of this circuit is set

about 0.2V, if noises exist at SCK input, set the noise amplitude 0.2Vp-p or below. And it is recommended to set the rise

time of SCK (t_RC) 100ns or below. In the case when the rise time is 100ns or higher, take sufficient noise

countermeasures. Make the clock rise, fall time as small as possible.

3. WPB Noise

During execution of write status register command, if there exist noises on WPB pin, mistake in recognition may occur

and forcible cancellation may result. To avoid this, a Schmitt trigger circuit is built in WPB input. In the same manner, a

Schmitt trigger circuit is built in CSB input, SI input and HOLDB input too.

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Operational Notes

1.

Reverse Connection of Power Supply

Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when

connecting the power supply, such as mounting an external diode between the power supply and the IC’s power

supply pins.

2.

Power Supply Lines

Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the

digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog

block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and

aging on the capacitance value when using electrolytic capacitors.

3.

4.

Ground Voltage

Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.

Ground Wiring Pattern

When using both small-signal and large-current ground traces, the two ground traces should be routed separately but

connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal

ground caused by large currents. Also ensure that the ground traces of external components do not cause variations

on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.

5.

Thermal Consideration

Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in

deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when

the IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum

rating, increase the board size and copper area to prevent exceeding the Pd rating.

6.

7.

Recommended Operating Conditions

These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.

The electrical characteristics are guaranteed under the conditions of each parameter.

Inrush Current

When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush

current may flow instantaneously due to the internal powering sequence and delays, especially if the IC

has more than one power supply. Therefore, give special consideration to power coupling capacitance,

power wiring, width of ground wiring, and routing of connections.

8.

9.

Operation Under Strong Electromagnetic Field

Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.

Testing on Application Boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may

subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply

should always be turned off completely before connecting or removing it from the test setup during the inspection

process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during

transport and storage.

10. Inter-pin Short and Mounting Errors

Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in

damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.

Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and

unintentional solder bridge deposited in between pins during assembly to name a few.

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Operational Notes – continued

11. Unused Input Pins

Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and

extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small

charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and

cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the

power supply or ground line.

12. Regarding the Input Pin of the IC

In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The

operation of these parasitic elements can result in mutual interference among circuits, operational faults, or physical

damage. Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an

input pin lower than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when

no power supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins

have voltages within the values specified in the electrical characteristics of this IC.

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Ordering Information

Product Code Description

B

R

2

5

G

5

1

2

x

-

3

G

E

2

BUS Type

25：SPI

Operating temperature/voltage

-40°C to +85°C / 1.8V to 5.5V

Capacity

512=512K

Package

F

: SOP8

: SOP-J8

FJ

: TSSOP-B8

FVT

Process Code

Halogen free

G

:

Packaging and Forming Specification

E2

: Embossed tape and reel

Lineup

Package

Capacity

Orderable Part Number

Type

Quantity

SOP8

BR25G512F

BR25G512FJ

-3GE2

Reel of 2500

Reel of 3000

512K

SOP-J8

TSSOP-B8

BR25G512FVT -3GE2

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Physical Dimension Tape and Reel Information

Package Name

SOP8

(Max 5.35 (include.BURR)

(UNIT : mm)

PKG : SOP8

Drawing No. : EX112-5001-1

Tape

Embossed carrier tape

2500pcs

Quantity

E2

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

Direction of feed

1pin

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

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Physical Dimension Tape and Reel Information - continued

Package Name

SOP-J8

Tape

Embossed carrier tape

2500pcs

Quantity

E2

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

Direction of feed

1pin

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

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Physical Dimension Tape and Reel Information - continued

Package Name

TSSOP-B8

Tape

Embossed carrier tape

3000pcs

Quantity

E2

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

Direction of feed

1pin

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

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Marking Diagrams

SOP-J8 (TOP VIEW)

SOP8 (TOP VIEW)

Part Number Marking

LOT Number

Part Number Marking

LOT Number

5 G 5 1

1PIN MARK

TSSOP-B8 (TOP VIEW)

Part Number Marking

LOT Number

1PIN MARK

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Revision History

Date

Revision

001

Changes

6.Oct.2015

New Release

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Daattaasshheeeett

Notice

Precaution on using ROHM Products

1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,

OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you

intend to use our Products in devices requiring extremely high reliability (such as medical equipment ^{(Note 1)}, transport

equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car

accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or

serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.

Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any

damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific

Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN

USA

EU

CHINA

CLASSⅢ

CLASSⅣ

CLASSⅡb

CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are designed and manufactured for use under standard conditions and not under any special or

extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any

special or extraordinary environments or conditions. If you intend to use our Products under any special or

extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of

product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of

flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning

residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual

ambient temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must

be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,

please consult with the ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice-PGB-E

Rev.001

Daattaasshheeeett

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

QR code printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since concerned goods are fallen under listed items of export control prescribed by Foreign exchange and Foreign trade

act, the permission based on the act is necessary in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data.

2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the

Products with other articles such as components, circuits, systems or external equipment (including software).

3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM

will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to

manufacture or sell products containing the Products, subject to the terms and conditions herein.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice-PGB-E

Rev.001

Daattaasshheeeett

General Precaution

1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.

ROHM shall not be in an y way responsible or liable for failure, malfunction or accident arising from the use of a ny

ROHM’s Products against warning, caution or note contained in this document.

2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior

notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s

representative.

3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all

information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or

liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or

concerning such information.

Notice – WE

Rev.001


型号：	BR25G512FJ-3
厂家：	ROHM
描述：	BR25G512FJ-3是512kbit SPI BUS 接口的串行EEPROM。可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件：	总33页 (文件大小：827K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BR25G512FJ-3 [ROHM]

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