BR25H040F-5AC (新产品) [ROHM]
BR25H040xxx-5AC系列是支持SPI BUS接口的4Kbit串行EEPROM。;
| 型号： | BR25H040F-5AC (新产品) |
| 厂家： | 
ROHM |
| 描述： | BR25H040xxx-5AC系列是支持SPI BUS接口的4Kbit串行EEPROM。 可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器 |
| 文件： | 总44页 (文件大小：1925K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Datasheet
Serial EEPROM Series for Automotive EEPROM
125 °C Operation SPI BUS EEPROM
for Automotive
BR25H040xxx-5AC Series
General Description
BR25H040xxx-5AC Series is a 4 Kbit serial EEPROM of SPI
BUS Interface.
Key Specifications
◼
◼
◼
◼
◼
Supply Voltage:
1.7 V to 5.5 V
Ambient Operating Temperature: -40 °C to +125 °C
Clock Frequency:
Write Time:
20 MHz (Max)
3.5 ms (Max)
Features
AEC-Q100 Qualified(Note 1)
Functional Safety Supportive Automotive Products
SPI BUS Mode (CPOL, CPHA) = (0, 0), (1, 1)
Page Size: 16 Byte
Write Cycles:
◼
◼
◼
◼
◼
◼
◼
◼
◼
4 Million Times (Ta = 25 °C)
1.2 Million Times (Ta = 85 °C)
0.5 Million Times (Ta = 105 °C)
0.3 Million Times (Ta = 125 °C)
Bit Format: 512 x 8 bit
◼
Data Retention:
16 Byte Write Lockable Identification Page (ID Page)
Address Auto Increment Function at Read Operation
Auto Erase and Auto End Function at Data Rewrite
Write Protect Block Setting by Software
Memory Array 1/4, 1/2, Whole
100 Years (Ta = 25 °C)
60 Years (Ta = 105 °C)
50 Years (Ta = 125 °C)
Packages
SOP8
W (Typ) x D (Typ) x H (Max)
5.0 mm x 6.2 mm x 1.71 mm
4.9 mm x 6.0 mm x 1.65 mm
3.0 mm x 6.4 mm x 1.2 mm
2.9 mm x 4.0 mm x 0.9 mm
2.0 mm x 3.0 mm x 0.6 mm
◼
◼
HOLD Function by the HOLDB Pin
Prevention of Write Mistake
Write Prohibition at Power On
Write Prohibition by the WPB Pin
Write Prohibition Block Setting
Prevention of Write Mistake at Low Voltage
Data at Shipment
SOP-J8
TSSOP-B8
MSOP8
VSON08AX2030
◼
Memory Array: FFh
ID Page First 3 Addresses: 2Fh, 00h, 09h
Other Addresses: FFh
Status Register BP1, BP0: 0, 0
Lock Status
(Note 1) Grade 1
LS: 0
Applications
SOP8
SOP-J8
MSOP8
◼
◼
◼
Airbag
ABS
ECU
Typical Application Circuit
VSON08AX2030
VCC
0.1 μF
TSSOP-B8
VCC
HOLDB
SCK
CSB
Micro-
controller
SO
Micro-
controller
WPB
GND
Figure 2
SI
Figure 1. Typical Application Circuit
〇Product structure : Silicon integrated circuit 〇This product has no designed protection against radioactive rays.
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BR25H040xxx-5AC Series
Contents
General Description........................................................................................................................................................................1
Features..........................................................................................................................................................................................1
Applications ....................................................................................................................................................................................1
Key Specifications ..........................................................................................................................................................................1
Packages........................................................................................................................................................................................1
Typical Application Circuit ...............................................................................................................................................................1
Contents .........................................................................................................................................................................................2
Pin Configurations .........................................................................................................................................................................3
Pin Description................................................................................................................................................................................3
Block Diagram ................................................................................................................................................................................3
Absolute Maximum Ratings ............................................................................................................................................................4
Thermal Resistance........................................................................................................................................................................4
Operating Conditions......................................................................................................................................................................5
Input/Output Capacitance...............................................................................................................................................................5
Memory Cell Characteristics...........................................................................................................................................................5
Electrical Characteristics.................................................................................................................................................................6
AC Characteristics..........................................................................................................................................................................7
AC Characteristics Condition..........................................................................................................................................................7
Input/Output Timing ........................................................................................................................................................................8
Typical Performance Curves...........................................................................................................................................................9
Function Explanation ....................................................................................................................................................................17
Instruction Mode ...........................................................................................................................................................................20
Timing Chart .................................................................................................................................................................................21
At Standby State...........................................................................................................................................................................26
Method To Cancel Each Command ..............................................................................................................................................27
Application Examples ...................................................................................................................................................................28
I/O Equivalence Circuits................................................................................................................................................................29
Caution on Power-up Conditions ..................................................................................................................................................30
Low Voltage Malfunction Prevention Function ..............................................................................................................................30
Noise Countermeasures...............................................................................................................................................................31
Operational Notes.........................................................................................................................................................................32
Ordering Information.....................................................................................................................................................................34
Lineup...........................................................................................................................................................................................34
Marking Diagrams.........................................................................................................................................................................35
Physical Dimension and Packing Information...............................................................................................................................36
Revision History............................................................................................................................................................................41
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BR25H040xxx-5AC Series
Pin Configurations
(TOP VIEW)
(TOP VIEW)
VCC
CSB
SO
1
2
3
4
8
7
CSB
1
2
3
4
8
7
6
5
VCC
HOLDB
SCK
SI
HOLDB
SO
WPB
GND
6 SCK
WPB
GND
EXP-PAD
SI
5
Figure 3-(a). Pin Configuration
(SOP8, SOP-J8, TSSOP-B8, MSOP8)
Figure 3-(b). Pin Configuration
(VSON08AX2030)
Pin Description
Pin No.
Pin Name
CSB
Input/Output
Descriptions
1
2
3
4
5
6
7
8
-
Input
Output
Input
-
Chip select input
Serial data output
SO
WPB
Write protect input
GND
All input/output reference voltage, 0 V
Serial data input
SI
Input
Input
Input
-
SCK
Serial clock input
HOLDB
VCC
Hold input
Power supply
EXP-PAD
-
Leave as OPEN or connect to GND
Block Diagram
VOLTAGE
CSB
INSTRUCTION DECODE
CONTROL CLOCK
GENERATION
DETECTION
SCK
WRITE
HIGH VOLTAGE
GENERATOR
INHIBITION
INSTRUCTION
REGISTER
SI
IDENTIFICATION PAGE
STATUS REGISTER
ADDRESS
ADDRESS
HOLDB
9 bit
9 bit
REGISTER
DECODER
4 Kbit
EEPROM
DATA
READ/WRITE
AMP
WPB
SO
8 bit
8 bit
REGISTER
Figure 4. Block Diagram
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BR25H040xxx-5AC Series
Absolute Maximum Ratings
Parameter
Symbol
VCC
Rating
Unit
V
Remark
Ta = 25 °C
Supply Voltage
-0.3 to +6.5
Ta = 25 °C. The maximum value of terminal
voltage is not over than 6.5 V. When the pulse
width is 50 ns or less, the minimum value of
terminal voltage is -1.0 V.
Terminal Voltage
-
-0.3 to VCC+1.0
V
Electro Static Discharge
(Human Body Model)
Maximum Output Low Current
(SO)
Maximum Output HIGH Current
(SO)
VESD
IOLMAX
IOHMAX
-4000 to +4000
V
Ta = 25 °C
Ta = 25 °C
Ta = 25 °C
10
mA
mA
-10
Maximum Junction Temperature
Tjmax
Tstg
150
°C
°C
-
-
Storage Temperature Range
-65 to +150
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit between
pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over the
absolute maximum ratings.
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the properties
of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by increasing board size
and copper area so as not to exceed the maximum junction temperature rating.
Thermal Resistance (Note 2)
Thermal Resistance (Typ)
Parameter
Symbol
Unit
1s(Note 4)
2s2p(Note 5)
SOP8
197.4
21
109.8
19
Junction to Ambient
Junction to Top Characterization Parameter(Note 3)
θJA
°C/W
°C/W
ΨJT
SOP-J8
149.3
18
76.9
11
Junction to Ambient
Junction to Top Characterization Parameter(Note 3)
θJA
°C/W
°C/W
ΨJT
TSSOP-B8
Junction to Ambient
Junction to Top Characterization Parameter(Note 3)
θJA
251.9
31
152.1
20
°C/W
°C/W
ΨJT
MSOP8
Junction to Ambient
Junction to Top Characterization Parameter(Note 3)
θJA
284.1
21
135.4
11
°C/W
°C/W
ΨJT
(Note 2) Based on JESD51-2A (Still-Air)
(Note 3) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside surface
of the component package.
(Note 4) Using a PCB board based on JESD51-3.
(Note 5) Using a PCB board based on JESD51-7.
Layer Number of
Measurement Board
Material
FR-4
Board Size
Single
114.3 mm x 76.2 mm x 1.57 mmt
Top
Copper Pattern
Thickness
70 μm
Footprints and Traces
Layer Number of
Measurement Board
Material
FR-4
Board Size
114.3 mm x 76.2 mm x 1.6 mmt
2 Internal Layers
4 Layers
Top
Copper Pattern
Bottom
Copper Pattern
74.2 mm x 74.2 mm
Thickness
70 μm
Copper Pattern
Thickness
35 μm
Thickness
70 μm
Footprints and Traces
74.2 mm x 74.2 mm
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BR25H040xxx-5AC Series
Thermal Resistance (Note 6) - continued
Thermal Resistance (Typ)
Parameter
Symbol
Unit
1s(Note 8)
2s2p(Note 9)
VSON08AX2030
299.5
42
77.8
18
Junction to Ambient
Junction to Top Characterization Parameter(Note 7)
θJA
°C/W
°C/W
ΨJT
(Note 6) Based on JESD51-2A(Still-Air)
(Note 7) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside surface
of the component package.
(Note 8) Using a PCB board based on JESD51-3.
(Note 9) Using a PCB board based on JESD51-5, 7.
Layer Number of
Measurement Board
Material
FR-4
Board Size
Single
114.3 mm x 76.2 mm x 1.57 mmt
Top
Copper Pattern
Thickness
70 μm
Footprints and Traces
Thermal Via(Note 10)
Layer Number of
Measurement Board
Material
FR-4
Board Size
Pitch
1.20 mm
Diameter
4 Layers
114.3 mm x 76.2 mm x 1.6 mmt
2 Internal Layers
Φ 0.30 mm
Top
Copper Pattern
Bottom
Thickness
70 μm
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
74.2 mm x 74.2 mm
35 μm
74.2 mm x 74.2 mm
70 μm
(Note 10) This thermal via connect with the copper pattern of layers 1,2, and 4. The placement and dimensions obey a land pattern.
Operating Conditions
Parameter
Supply Voltage
Symbol
Min
Typ
Max
Unit
VCC
Ta
C
1.7
-40
0.1
-
-
-
5.5
+125
-
V
Ambient Operating Temperature
Bypass Capacitor(Note 11)
°C
μF
(Note 11) Connect a bypass capacitor between the IC’s VCC and GND pin.
Input/Output Capacitance
Parameter
(
Ta = 25 °C
,
f = 5 MHz
)
Symbol
Min
Typ
Max
Unit
Conditions
Input Capacitance(Note 12)
Output Capacitance(Note 12)
CIN
-
-
-
-
8
8
pF
pF
VIN = GND
VOUT = GND
COUT
(Note 12) Not 100 % Tested.
Memory Cell Characteristics (VCC = 1.7 V to 5.5 V)
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
-
-
-
-
-
-
-
4,000,000
1,200,000
500,000
300,000
100
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Times Ta = 25 °C
Times Ta = 85 °C
Write Cycles(Note 13, 14)
Times Ta = 105 °C
Times Ta = 125 °C
Years Ta = 25 °C
Years Ta = 105 °C
Years Ta = 125 °C
Data Retention(Note 13)
60
50
(Note 13) Not 100 % Tested.
(Note 14) The Write Cycles is defined for unit of 4 data bytes with the same address bits of WA8 to WA2.
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BR25H040xxx-5AC Series
Electrical Characteristics
(Unless otherwise specified, Ta = -40 °C to +125 °C
,
VCC = 1.7 V to 5.5 V)
Limit
Parameter
Symbol
Unit
Conditions
Min
0.7Vcc
-0.3(Note 15)
0
Typ
Max
Vcc+1.0
+0.3VCC
0.4
Input High Voltage
VIH
VIL
-
-
-
-
-
-
-
-
V
V
V
V
V
V
-
-
Input Low Voltage
Output Low Voltage 1
Output Low Voltage 2
Output High Voltage 1
Output High Voltage 2
Input Leakage Current
Output Leakage Current
VOL1
VOL2
VOH1
VOH2
ILI
IOL = 3.0 mA, 2.5 V ≤ VCC ≤ 5.5 V
IOL = 1.0 mA, 1.7 V ≤ VCC < 2.5 V
IOH = -2.0 mA, 2.5 V ≤ VCC ≤ 5.5 V
IOH = -400 μA, 1.7 V ≤ VCC < 2.5 V
0
0.2
0.8Vcc
0.8Vcc
-2
Vcc
Vcc
+2
μA VIN = 0 V to Vcc
ILO
-2
+2
μA VOUT = 0 V to Vcc, CSB = Vcc
Vcc = 5.5 V, fSCK = 20 MHz, tE/W = 3.5 ms
mA
Supply Current (WRITE) (Note 16)
ICC1
ICC2
ICC3
ICC4
ICC5
ICC6
ICC7
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1.7
1.0
1.5
3.0
2.0
4.0
8.0
VIH/VIL = 0.9Vcc/0.1Vcc, SO = OPEN
Vcc = 1.7 V, fSCK = 5 MHz
VIH/VIL = 0.9Vcc/0.1Vcc, SO = OPEN
mA
Vcc = 2.5 V, fSCK = 5 MHz
VIH/VIL = 0.9Vcc/0.1Vcc, SO = OPEN
mA
Vcc = 5.5 V, fSCK = 5 MHz
VIH/VIL = 0.9Vcc/0.1Vcc, SO = OPEN
mA
Supply Current (READ) (Note 16)
Vcc = 2.5 V, fSCK = 10 MHz
VIH/VIL = 0.9Vcc/0.1Vcc, SO = OPEN
mA
Vcc = 5.5 V, fSCK = 10 MHz
VIH/VIL = 0.9Vcc/0.1Vcc, SO = OPEN
mA
Vcc = 5.5 V, fSCK = 20 MHz
VIH/VIL = 0.9Vcc/0.1Vcc, SO = OPEN
mA
Vcc = 5.5 V
Standby Current
ISB
-
-
10
μA CSB = HOLDB = WPB = Vcc,
SCK = SI = Vcc or 0 V, SO = OPEN
(Note 15) When the pulse width is 50 ns or less, it is -1.0 V.
(Note 16) The average value during operation.
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BR25H040xxx-5AC Series
AC Characteristics
Parameter
SCK Frequency
(
Unless otherwise specified, Ta = -40 °C to +125 °C, CL1 = 30 pF, VCC = 1.7 V to 5.5 V
)
1.7 V ≤ Vcc < 2.5 V 2.5 V ≤ Vcc < 4.5 V 4.5 V ≤ Vcc ≤ 5.5 V
Symbol
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
fSCK
tSCKWH
tSCKWL
tCS
0.01
80
80
85
60
60
60
60
20
20
-
-
-
-
-
-
-
-
-
-
-
-
5
-
0.01
40
40
40
30
30
30
30
10
10
-
-
-
-
-
-
-
-
-
-
-
-
10
-
0.01
20
20
20
15
15
15
15
5
-
-
-
-
-
-
-
-
-
-
-
20
-
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SCK High Time
SCK Low Time
CSB High Time
CSB Setup Time
CSB Hold Time
SCK Setup Time
SCK Hold Time
SI Setup Time
-
-
-
-
-
-
tCSS
-
-
-
tCSH
-
-
-
tSCKS
tSCKH
tDIS
-
-
-
-
-
-
-
-
-
SI Hold Time
tDIH
-
-
5
-
Data Output Delay Time1
tPD1
50
30
-
20
Data Output Delay Time2
(CL2 = 100 pF)
tPD2
-
-
60
-
-
40
-
-
20
ns
Output Hold Time
tOH
tOZ
0
-
-
-
-
0
-
-
-
-
0
-
-
-
-
ns
ns
Output Disable Time
80
40
20
HOLDB Setting
Setup Time
HOLDB Setting
Hold Time
HOLDB Release
Setup Time
HOLDB Release
Hold Time
Time from HOLDB
to Output High-Z
Time from HOLDB
to Output Change
tHFS
tHFH
tHRS
tHRH
tHOZ
tHPD
0
40
0
-
-
-
-
-
-
-
-
0
30
0
-
-
-
-
-
-
-
-
0
15
0
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
-
-
-
60
-
-
30
-
-
15
-
-
80
80
40
40
20
20
-
-
-
SCK Rise Time(Note 17)
SCK Fall Time(Note 17)
Output Rise Time(Note 17)
Output Fall Time(Note 17)
tRC
tFC
-
-
-
-
-
-
-
-
-
-
2
2
-
-
-
-
-
-
-
-
-
-
2
2
-
-
-
-
-
-
-
-
-
-
2
2
μs
μs
ns
ns
ms
tRO
tFO
tE/W
40
40
3.5
20
20
3.5
10
10
3.5
Write Time
(Note 17) Not 100 % Tested.
AC Characteristics Condition
Parameter
Load Capacitance1
Load Capacitance2
Input Rise Time
Symbol
Conditions
Unit
CL1
30
pF
pF
ns
ns
V
CL2
100
50
-
-
-
-
Input Fall Time
50
Input Voltage
0.2Vcc / 0.8Vcc
0.3Vcc / 0.7Vcc
Input/Output Judgment Voltage
V
Input Voltage
0.8Vcc
Input/Output Judgment Voltage
0.7Vcc
0.3Vcc
0.2Vcc
Figure 5. Input/Output Judgment Voltage
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BR25H040xxx-5AC Series
Input/Output Timing
tCSS
tCS
CSB
tSCKS
tRC
tFC
tSCKWH
tSCKWL
SCK
tDIS
tDIH
SI
High-Z
SO
Figure 6-(a). Input Timing
SI is taken into IC inside in sync with data rise edge of SCK. Input address and data from the Most Significant Bit MSB.
tCS
CSB
SCK
tSCKH
tCSH
SI
tPD
tRO,tFO
tOZ
tOH
High-Z
SO
Figure 6-(b). Input/Output Timing
SO is output in sync with data fall edge of SCK. Data is output from the Most Significant Bit MSB.
"H"
CSB
"L"
tHFS
tHFH
tHRS tHRH
SCK
SI
tDIS
n
n+1
n-1
tHOZ
Dn
tHPD
High-Z
SO
Dn+1
Dn
Dn-1
HOLDB
Figure 6-(c). HOLD Timing
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BR25H040xxx-5AC Series
Typical Performance Curves
6.0
5.0
4.0
3.0
2.0
1.0
0.0
6.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
5.0
4.0
3.0
2.0
1.0
0.0
SPEC
SPEC
0.0
1.0
2.0
3.0
4.0
5.0
6.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Supply Voltage : VCC [V]
Supply Voltage : VCC [V]
Figure 7. Input High Voltage vs Supply Voltage
(CSB, SCK, SI, HOLDB, WPB)
Figure 8. Input Low Voltage vs Supply Voltage
(CSB, SCK, SI, HOLDB, WPB)
1.0
1.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
0.8
0.6
0.4
0.2
0.0
0.8
0.6
0.4
0.2
0.0
SPEC
SPEC
0.0
1.0
2.0
3.0
4.0
5.0
6.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Output Low Current : IOL [mA]
Output Low Current : IOL [mA]
Figure 9. Output Low Voltage1 vs Output Low Current
(Vcc = 2.5 V)
Figure 10. Output Low Voltage2 vs Output Low Current
(Vcc = 1.7 V)
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BR25H040xxx-5AC Series
Typical Performance Curves - continued
2.0
1.5
1.0
0.5
0.0
3.0
2.5
SPEC
SPEC
2.0
1.5
1.0
0.5
0.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
-6.0
-5.0
-4.0
-3.0
-2.0
-1.0
0.0
-6.0
-5.0
-4.0
-3.0
-2.0
-1.0
0.0
Output High Current : IOH [mA]
Output High Current : IOH [mA]
Figure 11. Output High Voltage1 vs Output High Current
(Vcc = 2.5 V)
Figure 12. Output High Voltage2 vs Output High Current
(Vcc = 1.7 V)
3.0
3.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
2.5
2.5
SPEC
SPEC
2.0
2.0
1.5
1.0
0.5
0.0
1.5
1.0
0.5
0.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Supply Voltage : VCC [V]
Supply Voltage : VCC [V]
Figure 13. Input Leakage Current vs Supply Voltage
(CSB, SCK, SI, HOLDB, WPB)
Figure 14. Output Leakage Current vs Supply Voltage
(SO)
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10/41
BR25H040xxx-5AC Series
Typical Performance Curves - continued
4.0
3.0
2.0
1.0
0.0
3.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
SPEC
2.0
1.0
0.0
SPEC
SPEC
SPEC
0.0
1.0
2.0
3.0
4.0
5.0
6.0
4.0
4.5
5.0
5.5
6.0
Supply Voltage : VCC [V]
Supply Voltage : VCC [V]
Figure 15. Supply Current (WRITE) vs Supply Voltage
Figure 16. Supply Current (READ) vs Supply Voltage
6.0
10.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
SPEC
5.0
8.0
6.0
4.0
2.0
0.0
SPEC
4.0
3.0
2.0
1.0
0.0
SPEC
4.0
4.5
5.0
5.5
6.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Supply Voltage : VCC [V]
Supply Voltage : VCC [V]
Figure 17. Supply Current (READ) vs Supply Voltage
Figure 18. Supply Current (READ) vs Supply Voltage
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BR25H040xxx-5AC Series
Typical Performance Curves - continued
12.0
100.0
10.0
1.0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
SPEC
10.0
SPEC
SPEC
8.0
6.0
4.0
2.0
0.0
SPEC
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
0.1
0.0
1.0
2.0
3.0
4.0
5.0
6.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Supply Voltage : VCC [V]
Supply Voltage : VCC [V]
Figure 19. Standby Current vs Supply Voltage
Figure 20. SCK Frequency vs Supply Voltage
100
100
SPEC
SPEC
80
60
40
20
0
80
60
40
20
0
Ta = -40 °C
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
Ta = +25 °C
Ta = +125 °C
SPEC
SPEC
SPEC
5.0
SPEC
0.0
1.0
2.0
3.0
4.0
6.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Supply Voltage : VCC [V]
Supply Voltage : VCC [V]
Figure 21. SCK High Time vs Supply Voltage
Figure 22. SCK Low Time vs Supply Voltage
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12.Jan.2022 Rev.002
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BR25H040xxx-5AC Series
Typical Performance Curves - continued
100
100
80
60
40
20
0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
SPEC
80
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
SPEC
60
40
20
0
SPEC
SPEC
SPEC
SPEC
0.0
1.0
2.0
3.0
4.0
5.0
6.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Supply Voltage : VCC [V]
Supply Voltage : VCC [V]
Figure 23. CSB High Time vs Supply Voltage
Figure 24. CSB Setup Time vs Supply Voltage
100
50
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
40
30
20
10
0
80
60
40
20
0
SPEC
SPEC
SPEC
SPEC
SPEC
SPEC
-10
0.0
1.0
2.0
3.0
4.0
5.0
6.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Supply Voltage : VCC [V]
Supply Voltage : VCC [V]
Figure 25. CSB Hold Time vs Supply Voltage
Figure 26. SI Setup Time vs Supply Voltage
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12.Jan.2022 Rev.002
13/41
BR25H040xxx-5AC Series
Typical Performance Curves - continued
100
80
60
40
20
0
50
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
40
30
SPEC
SPEC
20
SPEC
10
SPEC
SPEC
SPEC
0
-10
0.0
1.0
2.0
3.0
4.0
5.0
6.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Supply Voltage : VCC [V]
Supply Voltage : VCC [V]
Figure 27. SI Hold Time vs Supply Voltage
Figure 28. Data Output Delay Time1 vs Supply Voltage
50
120
100
80
60
40
20
0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
SPEC
40
SPEC
SPEC
30
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
SPEC
20
SPEC
SPEC
10
0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Supply Voltage : VCC [V]
Supply Voltage : VCC [V]
Figure 29. Output Disable Time vs Supply Voltage
Figure 30. HOLDB Setting Hold Time vs Supply Voltage
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12.Jan.2022 Rev.002
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BR25H040xxx-5AC Series
Typical Performance Curves - continued
100
120
100
80
60
40
20
0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
80
SPEC
SPEC
60
40
SPEC
SPEC
20
0
SPEC
SPEC
0.0
1.0
2.0
3.0
4.0
5.0
6.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Supply Voltage : VCC [V]
Supply Voltage : VCC [V]
Figure 31. HOLDB Release Hold Time vs Supply Voltage
Figure 32. Time from HOLDB to Output High-Z vs Supply
Voltage
100
100
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
80
SPEC
80
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
60
60
40
20
0
SPEC
SPEC
40
SPEC
SPEC
20
SPEC
0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Supply Voltage : VCC [V]
Supply Voltage : VCC [V]
Figure 33. Time from HOLDB to Output Change vs Supply
Voltage
Figure 34. Output Rise Time vs Supply Voltage
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12.Jan.2022 Rev.002
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BR25H040xxx-5AC Series
Typical Performance Curves - continued
100
6
5
4
3
2
1
0
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
Ta = -40 °C
Ta = +25 °C
Ta = +125 °C
80
60
40
20
0
SPEC
SPEC
SPEC
SPEC
0.0
1.0
2.0
3.0
4.0
5.0
6.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Supply Voltage : VCC [V]
Supply Voltage : VCC [V]
Figure 35. Output Fall Time vs Supply Voltage
Figure 36. Write Time vs Supply Voltage
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BR25H040xxx-5AC Series
Function Explanation
1. Status Register
This IC has the Status Registers. Status Register are of 8 bits and express the following parameters.
BP0 and BP1 can be set by Write Status Register command. These 2 bits are memorized into the EEPROM, therefore are
valid even when supply voltage is turned off.
Write Cycles and Data Retention of Status Register are same as characteristics of the EEPROM.
WEN can be set by Write Enable command and Write Disable command. WEN becomes write disable status when supply
――
voltage is turned off. R/B is for write confirmation, therefore cannot be set externally.
The values of Status Register can be read by Read Status Register command.
Table 1. Status Register
D7
1
D6
1
D5
D4
D3
D2
D1
D0
――
1
1
BP1
BP0
WEN
R/B
Table 2. Function of Status Register
Function
Memory
Location
bit
Content
BP1 and BP0 bits designate the Write
Disable Block of EEPROM. Refer to
Table 3. Write Disable Block Setting.
BP1
BP0
EEPROM Write Disable Block
designation bit
EEPROM
Write Enable/Write Disable Confirmation bit
Register WEN = 0 = Prohibited
WEN = 1 = Permitted
WEN bit indicates the status of write
enable or write disable for WRITE,
WRSR, WRID, LID.
WEN
Write Cycle Status (―R―E―A――D―Y―/BUSY) Confirmation bit
――
――
R/B bit indicates the status of READY
or BUSY of the write cycle.
Register
――
――
R/B
R/B = 0 = READY, R/B = 1 = BUSY
Table 3. Write Disable Block Setting
Status Register
Protected Block
Protected Addresses
BP1
0
BP0
0
None
Upper 1/4
None
0
1
1
1
0
1
180h to 1FFh
Upper 1/2
100h to 1FFh
Whole Memory
000h to 1FFh, ID Page
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BR25H040xxx-5AC Series
Function Explanation - continued
2. Write Protect Mode by the WPB pin
By setting WPB = Low, Write command, Write Status Register command, Write ID page command, and Write ID page lock
command are disabled. However, when write cycle is in execution, no interruption can be made.
Table 4. Write Protect Mode
Instruction
WPB pin
WRSR / WRITE / WRID / LID
High
Low
Writable
Write Protected
WPB is normally fixed to High or Low for use, but when WPB is controlled so as to cancel Write command, Write Status
Register command, Write ID page command, and Write ID page lock command, pay attention to the following WPB Valid
Timing.
Write Status Register command is executed, by setting WPB = Low in cancel valid area, command can be cancelled. The
area from Instruction Code to Data area (until 16th rise of SCK) becomes the cancel valid area. Write command, Write ID
page command, and Write ID page lock command are executed, by setting WPB = Low in cancel valid area, command can
be cancelled. The area from Instruction Code to Address, Data area (until 24th rise of SCK) becomes the cancel valid area.
However, once write is started, any input cannot be cancelled. WPB input becomes Don’t Care, and cancellation becomes invalid.
SCK
6
7
15
16
tE/W
Instruction
Data
Instruction Code
Data Write Time
Valid
(WEN is reset by WPB = L)
Write Protect
Invalid
Figure 37. WPB Valid Timing (WRSR)
SCK
6
7
23
24
tE/W
Instruction
Address, Data
Instruction Code
Data Write Time
Valid
(WEN is reset by WPB = L)
Write Protect
Invalid
Figure 38. WPB Valid Timing (WRITE / WRID / LID)
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BR25H040xxx-5AC Series
Function Explanation - continued
3. Hold Mode by the HOLDB pin
By the HOLDB pin, serial communication can be stopped temporarily (HOLD status). The HOLDB pin carries out serial
communications normally when it is High. To get in HOLD status, at serial communication, when SCK = Low, set the HOLDB
pin Low.
At HOLD status, SCK and SI become Don’t Care, and SO becomes high impedance (High-Z).
To release the HOLD status, set HOLDB = High, when SCK = Low. After that, communication can be restarted from the point
before the HOLD status. For example, when HOLD status is made after WA5 address input at Read command, after release
of HOLD status, by starting WA4 address input, Read command can be restarted. When in HOLD status, leave CSB = Low.
When it is set CSB = High in HOLD status, the IC is reset, therefore communication after that cannot be restarted.
SCK
HOLDB
HOLD Status
HOLD Status
Figure 39. HOLD Status
4. ID Page
This IC has 16 byte Write Lockable Identification Page (ID Page) in addition to Memory Array.
The data in the first 3 addresses are for device identification. These data are over written by Write ID Page command.
Table 5. Data in the first 3 addresses
ID Page Address
Data
2Fh
00h
09h
Content
Manufacturer Code (ROHM)
Interface Method (SPI)
Memory Density (4 Kbit)
00h
01h
02h
By setting Lock Status (LS) bit to “1” with Lock ID Page command, it is prohibited to write to ID page permanently.
It is not reversible to set from ID Page Lock Status (LS = “1”) to ID Page Lock Release status (LS = “0”).
Table 6. Function of Lock Status
Memory
Location
bit
Function
Content
ID Page Lock/Release Status designation bit
EEPROM LS = 0 = ID Page Lock Release
LS = 1 = ID Page Lock
LS bit can set Lock Status to
ID Page.
LS
5. ECC Function
This IC has ECC bits for Error Correction to each 4 data bytes with the same address bits of WA8 to WA2. In the Read
operation, even if there is 1 bit data error in the 4 bytes, IC corrects to correct data by ECC function and outputs data
corrected. Even if write operation is started with only 1 byte data input, this IC rewrites the data of 4 bytes with the same
address bits of WA8 to WA2 and the data of ECC bits added to these 4 bytes data. In order to maximize Write Cycles
specified, it is recommended to write with data input of each 4 bytes with the same address bits of WA8 to WA2.
Table 7. Example of 4 data bytes with the same address bits of WA8 to WA2 (Address 000h, 001h, 002h, 003h)
Non-
Common
Same Address Bits from WA8 to WA2
Address
WA
8
WA
7
WA
6
WA
5
WA
4
WA
3
WA
2
WA
1
WA
0
0
0
0
0
0
0
0
0
0
000h
001h
002h
003h
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
1
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12.Jan.2022 Rev.002
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BR25H040xxx-5AC Series
Instruction Mode
After setting the CSB pin from High to Low, to execute each command, input Instruction Code, Address and Data from the
Most Significant Bit MSB.
Table 8. Instruction Mode
Instruction
Code (8 bit)
Address / Data
(8 bit)
Data
(8 bit)
Instruction
WREN
WRDI
READ
WRITE
RDSR
WRSR
RDID
Content
Write Enable
Write Disable
Read
0000 *110 (Note 18)
0000 *100 (Note 18)
0000 WA8011
0000 WA8010
0000 *101 (Note 18)
0000 *001 (Note 18)
1000 0011
-
-
-
-
WA7 to WA0
WA7 to WA0
D7 to D0 Output (Note 19)
D7 to D0 Input (Note 19)
0000WA3 to WA0
0000WA3 to WA0
1000 0000
D7 to D0 Output
D7 to D0 Input
-
Write
Read Status
Register
Write Status
Register
-
Read ID Page
Write ID Page
Read Lock Status
Lock ID page
D7 to D0 Output
D7 to D0 Input
D7 to D0 Output (Note 20)
D7 to D0 Input (Note 20)
WRID
RDLS
LID
1000 0010
1000 0011
1000 0010
1000 0000
(Note 18) * = Don’t Care
(Note 19) Refer to Figure 46 and Figure 47
(Note 20) Refer to Figure 50 and Figure 51
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12.Jan.2022 Rev.002
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BR25H040xxx-5AC Series
Timing Chart
1. Write Enable Command (WREN)
It is set to write enable status by Write Enable command. As for this command, set CSB to Low, and then input the
Instruction Code of Write Enable command. This command is accepted at the 7th rise of SCK. Even with input over 7
clocks, command becomes valid.
Before carrying out Write command, Write Status Register command, Write ID Page command and Lock ID Page
command, it is necessary to set write enable status by the Write Enable command.
CSB
0
1
2
3
4
5
6
7
SCK
SI
0
0
0
0
1
1
0
* Don’t Care
*
High-Z
SO
Figure 40. Write Enable Command
2. Write Disable Command (WRDI)
It is set to write disable status, WEN bit becomes to “0”, by Write Disable command. As for this command, set CSB to Low,
and then input the Instruction Code of Write Disable command. This command is accepted at the 7th rise of SCK. Even
with input over 7 clocks, command becomes valid.
If Write command, Write Status Register command, Write ID Page command or Lock ID Page command is input in the
write disable status, commands are cancelled. And even in the write enable status, once Write command, Write Status
Register command, Write ID Page command or Lock ID Page is executed, it gets in the write disable status.
After power on, this IC is in write disable status.
CSB
0
1
2
3
4
5
6
7
SCK
SI
* Don’t Care
0
0
0
0
1
0
0
*
High-Z
SO
Figure 41. Write Disable Command
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BR25H040xxx-5AC Series
Timing Chart - continued
3. Read Command (READ)
By Read command, data of EEPROM can be read. As for this command, set CSB to Low, then input address after
Instruction Code of Read command. This IC starts data output of the designated address. Data output is started from
SCK fall of 15 clock, and from D7 to D0 sequentially. This IC has increment read function. After output of data for 1 byte
(8 bit), by continuing input of SCK, data of the next address can be read. Increment read can read all the addresses of
EEPROM Array. After reading data of the most significant address, by continuing increment read, data of the least
significant address is read.
CSB
～～
～～
～～
～～
0
1
2
3
4
5
6
7
8
9
10
11
15
16
22
23
SCK
SI
Address Input (8 bit)
～～
Instruction Code(8 bit)
0
WA7 WA6
WA5
0
0
0
WA8
0
1
1
WA4
WA1 WA0
～～
～～
Data Outputs of first byte (8 bit)
～～
second byte
D7
High-Z
SO
D7 D6
D2 D1 D0
～～
Figure 42. Read Command
4. Write Command (WRITE)
By Write command, data of EEPROM can be written. As for this command, set CSB to Low, then input address and data
after Instruction Code of Write command. Then, by making CSB to High, the IC starts write operation. The write time of
EEPROM requires time of tE/W (Max 3.5 ms). To start write operation, set CSB Low to High after taking the last data (D0),
and before the next SCK clock starts. At other timing, Write command is not executed, and this Write command is
cancelled.
During write operation, other than Read Status Register command is not accepted.
This IC has Page Write function, and after input of data for 1 byte (8 bit), by continuing data input without setting CSB High
to Low, data up to 16 byte can be written for one tE/W. In Page Write, the addressed lower 4 address bits are incremented
internally at every time when data of 1 byte is inputted and data is written to respective addresses. When the data input
exceeds the last address byte of the page, address rolls over to the first address byte of the same page. It is not
recommended to input data over 16 byte, it is recommended to input data in 16 byte. In case of the data input over 16
byte, it is explained in Table 10.
CSB rising valid timing to start write operation
CSB
SCK
～～
～～
～～
0
1
2
3
4
5
6
7
9
10
11
15
16
22
23
24
8
～～
Instruction Code (8 bit)
Data Input (8 bit)
Address Input (8 bit)
～～
～～
WA1 WA0 D7 D6
D2
D1
D0
0
0
0
0
WA8
0
1
0
WA6 WA5 WA4
WA7
SI
～～
～～
High-Z
SO
～～
～～
Figure 43. Write Command (Byte Write)
CSB rising valid timing to start write operation
CSB
SCK
～～
～～
～～
～～
～～
(8n+16)-8(8n+16)-7(8n+16)-2 (8n+16)-1
～～
8n+16
～～
8
9
0
1
2
Instruction Code (8 bit)
WA8
3
4
5
6
7
11
15
16
17
22
23
24
25
10
～～
Data Input of nth byte
～～
Data Input of first byte (8 bit)
～～
Address Input (8 bit)
～～
～～
～～
WA7 WA6 WA5 WA4
D7
D6
0
D7 D6
D1
D0
D7
D6
D1 D0
0
0
0
0
0
1
WA1 WA0
SI
～～
～～
～～
～～
High-Z
～～
～～
SO
～～
Figure 44. Write Command (Page Write)
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TSZ22111 • 15• 001
TSZ02201-0G1G0G100660-1-2
12.Jan.2022 Rev.002
22/41
BR25H040xxx-5AC Series
Timing Chart - continued
5. Page Write Function
16 Byte of Page
Column 0 Column 1 Column 2
. . .
. . .
. . .
. . .
.
Column 14 Column 15
Page 0
Page 1
Page 2
.
000h
010h
020h
.
001h
011h
021h
.
002h
012h
022h
.
00Eh
01Eh
02Eh
.
00Fh
01Fh
02Fh
.
.
.
.
.
.
.
.
Page 30
Page 31
1E0h
1F0h
1E1h
1F1h
1E2h
1F2h
. . .
. . .
1EEh
1FEh
1EFh
1FFh
These column addresses are
the first address of each pages.
These column addresses are
the last address of each pages.
Figure 45. EEPROM physical address for Page Write command (16 Byte)
(1) In case of Page Write command with lower than 16 Byte data input
Table 9. Example of Page Write with 2 byte data input
No.
4 Byte group
Group 0
. . .
. . .
. . .
Group 3
Addresses of Page 0
000h
00h
001h
002h
02h
003h
03h
004h
00Ch
0Ch
00Dh
00Eh
0Eh
00Fh
0Fh
1
2
Previous Data
01h
55h
04h
-
. . .
. . .
0Dh
-
Input data for
Page Write (2 Byte)
AAh
-
-
-
-
-
The Data
after Write operation
3
AAh
55h
02h
03h
04h
. . .
0Ch
0Dh
0Eh
0Fh
No.1: These data are EEPROM data before Write operation.
No.2: Inputted 2 byte data AAh, 55h from address 000h.
No.3: If Write operation is executed with the data of No.2, the data are changed from the data of No.1 to the data of
No.3.The data of address 000h, 001h are changed to data AAh, 55h, the data of address 002h, 003h, the 4 byte
group of Group 0, are over-written to data 02h, 03h.
When Write command is cancelled, EEPROM data keep No.1.
(2) In case of Page Write command with more than 16 byte data input
Table 10. Example of Page Write with 18 byte data input
4 Byte group
Group 0
. . .
. . .
. . .
Group 3
No.
1
Addresses of Page 0
000h
00h
55h
FFh
001h
002h
02h
55h
-
003h
03h
AAh
-
004h
00Ch
0Ch
55h
-
00Dh
00Eh
0Eh
55h
-
00Fh
0Fh
AAh
-
Previous Data
01h
AAh
00h
04h
55h
-
. . .
. . .
. . .
0Dh
AAh
-
Input data for
Page Write (18 Byte)
2
3
The Data
after Write operation
FFh
00h
02h
03h
55h
. . .
55h
AAh
55h
AAh
No.1: These data are initial EEPROM data before Write operation.
No.2: Inputted 18 byte data 55h, AAh, - - , 55h, AAh, FFh, 00h from address 000h.
The data of address 000h, 001h are set to data 55h, AAh first. The data of address 002h, 003h are set to data
55h, AAh. After inputting data to Maximum byte (00Fh), the data address 000h, 001h are set to data FFh, 00h
again. No data input to address 002h, 003h again.
No.3: If Page Write operation is executed with the data of No.2, the data are changed from the data of No.1 to the data of
No.3. The data of address 000h, 001h are changed to FFh, 00h inputted data later, not to 55h, AAh inputted data
first. The data of address 002h, 003h, the 4 byte group of Group 0, are over-written to 02h, 03h of Previous Data,
not to 55h, AAh inputted data first. The data of other addresses are changed to 55h, AAh - - , 55h, AAh. When
Write command is cancelled, EEPROM data keep No.1.
(3) Roll Over
In Page Write command, when data is set to the last address of a page (e.g. address “00Fh” of page 0), the next data
will be set to the first address of the same page (e.g. address “000h” of page 0). Page Write address increment is
available in the same page including the address designated at first.
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BR25H040xxx-5AC Series
Timing Chart - continued
6. Read Status Register Command (RDSR)
By Read Status register command, data of status register can be read. As for this command, set CSB to Low, then input
Instruction Code of Read Status Register command. This IC starts data output of the status register. Data output is
started from SCK fall of 7 clock, and from D7 to D0 sequentially. This IC has increment read function. After output of data
for 1 byte (8 bits), by continuing input of SCK, this IC repeats to output data of the status register.
Even if in write operation, Read Status Register command can be executed.
CSB
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SCK
SI
Instruction Code (8 bit)
0
0
0
0
1
0
1
*Don’t Care
Data Output (8 bit)
D7
D6
D5
1
D4
D3
D2
D1
D0
High-Z
BP1 BP0
WEN R/B
1
1
SO
1
Figure 46. Read Status Register Command
7. Write Status Register Command (WRSR)
Write Status Register command can write status register data. The data can be written by this command are 2 bits, that is,
BP1 (D3) and BP0 (D2) among 8 bits of status register. As for this command, set CSB to Low, and input Instruction Code
of Write Status Register command, and input data. Then, by making CSB to High, this IC starts write operation. Write Time
requires time of tE/W as same as Write command. As for CSB rise, start CSB after taking the last data bit (D0), and before
the next SCK clock starts. At other timing, command is cancelled.
To the write disabled block, write cannot be made, and only read can be made.
During write operation, other than Read Status Register command is not accepted.
CSB
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SCK
Data Input (8 bit)
Instruction Code (8 bit)
D7
D6
D5
D4
D3
D2
D1
D0
BP1 BP0
0
0
0
0
0
0
1
SI
High-Z
SO
*Don't care
Figure 47. Write Status Register Command
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BR25H040xxx-5AC Series
Timing Chart - continued
8. Read ID Page Command (RDID)
By Read ID Page command, data of ID Page can be read. As for this command, set CSB to Low, then input address after
Instruction Code of Read ID Page command. By inputting lower address bits WA3 to WA0, it is possible to address to 16
byte ID Page. Data output is started from SCK fall of 15 clock, and from D7 to D0 sequentially. This IC has increment
read function. After output of data for 1 byte (8 bits), by continuing input of SCK, data of the next address can be read.
After reading data of the most significant address of ID Page, by continuing increment read, data of the least significant
address of ID Page is read.
CSB
～～
～～
～～
～～
10
Address Input (8 bit)
17
20
21
23
0
1
2
3
4
5
6
7
9
11
12
15
16
22
8
SCK
SI
Instruction Code(8 bit)
～～
～～
0
0
1
0
0
0
1
1
0
0
0
0
WA3
WA0
～～
Data Outputs of first byte (8 bit) second byte
～～
High-Z
～～
D7
SO
D7 D6
D2 D1 D0
～～
Figure 48. Read ID Page Command
9. Write ID Page Command (WRID)
By Write ID Page command, data of ID Page can be written. As for this command, set CSB to Low, then input address and
data after Instruction Code of Write ID Page command. By inputting lower address bits WA3 to WA0, it is possible to
address to 16 byte ID Page. Then, by making CSB to High, the IC starts write operation. To start write operation, set CSB
Low to High after taking the last data (D0), and before the next SCK clock starts. At other timing, Write ID Page command
is not executed, and this Write ID Page command is cancelled. The write time of EEPROM requires time of tE/W (Max 3.5
ms).
During write operation, other than Read Status Register command is not accepted.
In case of Lock Status (LS) bit “1”, Write ID Page command can’t be executed.
Write ID Page command has Page Write Function same as Write command.
CSB rising valid timing to start write operation
CSB
～～
～～
～～
～～
0
1
2
3
4
5
6
7
8
9
10
11
12
15
16
17
22
23
24
21
SCK
Instruction Code (8 bit)
Data Input (8 bit)
Address Input (8 bit)
～～
～～
～～
0
WA3
WA0 D7 D6
D2
D1
D0
1
0
0
0
0
0
1
0
0
0
0
SI
～～
High-Z
SO
～～
～～
Figure 49. Write ID Page Command
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BR25H040xxx-5AC Series
Timing Chart - continued
10. Read Lock Status Command (RDLS)
By Read Lock Status command, data of Lock Status can be read. As for this command, set CSB to Low, then input
address after Instruction Code of Read Lock Status command. Data output is started from SCK fall of 15 clock, and from
D7 to D0 sequentially. The data D0 indicates Lock Status bit. The data D7 to D1 are Don’t Care. This IC has increment
read function. After output of data for 1 byte (8 bits), by continuing input of SCK, this IC repeats to output data of the
Lock Status byte. In case of Lock Status (LS) bit “1”, ID Page is locked, Write ID Page command can’t be executed. In
case of LS bit “0”, ID Page is released to lock, Write ID Page command can be executed.
CSB
～～
～～
～～
～～
～～
0
1
2
3
4
5
6
7
8
9
12
13
15
16
17
21
22
23
14
SCK
SI
Instruction Code(8 bit)
Address Input (8 bit)
0
0
0
0
0
0
0
1
0
0
0
1
1
1
～～
～～
Data Outputs of first byte (8 bit) second byte
D7
D6
D2
D1
D0
～～
High-Z
SO
LS
～～
* Don’t Care
Figure 50. Read Lock Status Command
11. Lock ID Page Command (LID)
By Lock ID Page command, data of Lock Status can be written. In case of Lock Status (LS) bit “1”, Lock ID Page
command can’t be executed permanently. As for this command, set CSB to Low, then input address and data after
Instruction Code of Lock ID Page command. To start write operation, set CSB Low to High after taking the last data
(D0), and before the next SCK clock starts. At other timing, Lock ID Page command is not executed, and this Lock ID
Page command is cancelled. The write time of EEPROM requires time of tE/W (Max 3.5 ms).
During write operation, other than Read Status Register command is not accepted.
CSB rising valid timing to start write operation
～～
CSB
～～
～～
～～
12
13
14
0
1
2
3
4
5
6
7
8
9
15
16
17
21
22
23
24
SCK
Instruction Code (8 bit)
Data Input (8 bit)
Address Input (8 bit)
D7
D6
D2
D1
D0
～～
1
0
0
0
0
0
LS
1
0
0
0
0
0
1
0
SI
*
*
*
*
*
～～
～～
～～
High-Z
SO
～～
* Don’t Care
Figure 51. Lock ID Page Command
At Standby State
1. Standby Current
Set CSB = High, and be sure to set SCK, SI, WPB and HOLDB inputs = Low or High. Do not input intermediate voltage.
2. Timing
As shown in Figure.52, at standby, when SCK is High, even if CSB is fallen, SI status is not read at fall edge. SI status is
read at SCK rise edge after fall of CSB. At standby and at power ON/OFF, set CSB = High status.
Even if CSB is fallen at SCK = SI = “High”,
SI status is not read at that edge.
CSB
Command start here. SI is read.
SCK
SI
0
1
2
Figure 52. Operating Timing
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BR25H040xxx-5AC Series
Method To Cancel Each Command
1. READ, RDID, RDLS
Instruction Code
8 bits
Address
8 bits
Data
Method to cancel: cancel by CSB = High
8 bits
Cancel available in all areas of read modes
Figure 53. READ, RDID, RDLS Cancel Valid Timing
Instruction Code
8 bits
Data
2. RDSR
Method to cancel: cancel by CSB = High
8 bits
Cancel available
in all areas of RDSR
Figure 54. RDSR Cancel Valid Timing
3. WRITE, WRID, LID
Instruction Code
8 bits
Address
8 bits
Data
tE/W
a: Instruction Code, Address Input Area
Cancellation is available by CSB = High.
b: Data Input Area (D7 to D1 input area)
Cancellation is available by CSB = High.
c: Data Input Area (D0 area)
8 bits
b
a
d
c
When CSB is started, write starts.
After CSB rise, cancellation cannot be made by any
means.
SCK
SI
D7 D6 D5 D4 D3 D2 D1 D0
d: tE/W Area
c
b
Cancellation is available by CSB = High. However,
when write starts (CSB is started) in the area c,
cancellation cannot be made by any means. And by
inputting on SCK clock, cancellation cannot be made.
In page write mode, there is write enable area at
every 8 clocks.
Figure 55. WRITE, WRID, LID Cancel Valid Timing
Note 1) If VCC is made OFF during write execution, designated address data is not guaranteed, therefore write it once again.
Note 2) If VCC is made OFF during LID write execution, LS and BP0 and BP1 data is not guaranteed, therefore write LS and BP0 and BP1 once again.
Note 3) If CSB is started at the same timing as that of the SCK rise, write execution/cancel becomes unstable, therefore, it is recommended to fall in
SCK = Low area. As for SCK rise, assure timing of tCSS/tCSH or higher.
4. WRSR
a: From Instruction code to 15th rising of SCK
Cancel by CSB = High.
b: From 15th rising of SCK to 16th rising of SCK (write
enable area)
14 15
16
17
SCK
SI
D1
D0
a
b
c
When CSB is started, write starts.
c: After 16th rising of SCK
tE/W
Instruction Code
8 bits
Data
Cancel by CSB = High.
8 bits
However, when write starts (CSB is started) in the
area b, cancellation cannot be made by any means.
And, by inputting on SCK clock, cancellation cannot
be made.
a
c
b
Figure 56. WRSR Cancel Valid Timing
Note 1) If VCC is made OFF during write execution, LS and BP0 and BP1 data is not guaranteed, therefore write LS and BP0 and BP1 once again.
Note 2) If CSB is started at the same timing as that of the SCK rise, write execution/cancel becomes unstable, therefore, it is recommended to fall in
SCK = Low area. As for SCK rise, assure timing of tCSS/tCSH or higher.
5. WREN/WRDI
a: From instruction code to 7th rising of SCK
Cancel by CSB = High.
6
7
8
SCK
b: Cancellation is not available when CSB is started
after 7th clock.
Instruction Code
8 bits
a
b
Figure 57. WREN/WRDI Cancel Valid Timing
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BR25H040xxx-5AC Series
Application Examples
High Speed Operation
In order to realize stable high speed operations, pay attention to the following input/output pin conditions.
1. Pull Up, Pull Down Resistance for Input Pins
When to attach pull up, pull down resistance to EEPROM input pins, select an appropriate value for the microcontroller
VOL, IOL from VIL characteristics of this IC.
2. Pull Up Resistance
푉
−푉
퐶퐶
푂퐿푀
(1)
(2)
푅푃푈
≥
Microcontroller
VOLM
Low Output
IOLM
EEPROM
VILE
퐼
푂퐿푀
RPU
ꢀꢁꢂꢃ ≤ ꢀ
퐼ꢂ퐸
Low Input
Example) When Vcc = 5 V, VILE = 1.5 V, VOLM = 0.4 V, IOLM = 2 mA,
from the equation (1).
VILE : VIL of EEPROM
VOLM : VOL of Microcontroller
IOLM : IOL of Microcontroller
5 ꢄ 0.4
2 × 10−3
푅푃푈
≥
Figure 58. Pull Up Resistance
푅푃푈 ≥ 2.ꢅ [ kΩ ]
With the value of RPU to satisfy the above equation, VOLM becomes
0.4 V or lower, and with VILE (= 1.5 V), the equation (2) is also
satisfied.
And, in order to prevent malfunction, mistake write at power ON/OFF, be sure to make the CSB pin pull up.
3. Pull Down Resistance
푉
푂퐻푀
푅푃퐷
≥
Microcontroller
VOHM
EEPROM
VIHE
(3)
(4)
퐼
푂퐻푀
ꢀꢁꢆꢃ ≥ ꢀ
퐼ꢆ퐸
RPD
High Output
High Input
IOHM
Example) When VCC = 5 V, VOHM = VCC-0.5 V, IOHM = 0.4 mA,
VIHE = VCC × 0.7 V, from the equation (3),
VIHE : VIH of EEPROM
VOHM : VOH of Microcontroller
IOHM : IOH of Microcontroller
5 ꢄ 0.5
0.4 × 10−3
푅푃퐷
≥
Figure 59. Pull Down Resistance
푅푃퐷 ≥ 11.ꢅ [ kΩ ]
Further, by amplitude VIHE, VILE of signal input to EEPROM, operation speed changes. By inputting signal of amplitude of
Vcc/GND level to input, more stable high speed operations can be realized. On the contrary, when amplitude of
0.8Vcc/0.2Vcc is input, operation speed becomes slow.(Note 21)
In order to realize more stable high speed operation, it is recommended to make the values of RPU, RPD as large as
possible, and make the amplitude of signal input to EEPROM close to the amplitude of Vcc/GND level.
(Note 21) At this moment, operating timing guaranteed value is guaranteed.
°C
tPD - VIL Characteristic
80
70
60
Spec
50
40
30
Vcc = 2.5 V
Ta = 25 °C
20
VIH = Vcc
CL = 30 pF
10
0
0
0.2
0.4
VIL [V]0.6
0.8
1
Figure 60. VIL dependency of Data Output Delay Time tPD
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BR25H040xxx-5AC Series
Application Examples - continued
4. SO Load Capacitance Condition
Load capacitance of the SO Pin affects upon delay characteristic of SO output. (Data Output Delay Time, Time from
HOLDB to High-Z) In order to make output delay characteristic into higher speed, make SO load capacitance small. In
concrete, “Do not connect many devices to SO bus”, “Make the wire between the controller and EEPROM short”, and so
forth.
5. Other Cautions
Make the wire length from the Microcontroller to EEPROM input signal same length, in order to prevent setup/hold
violation to EEPROM, owing to difference of wire length of each input.
I/O Equivalence Circuits
1. Input (CSB, SCK, SI, HOLDB, WPB)
Figure 61. Input Equivalent Circuit (CSB, SCK, SI, HOLDB, WPB)
2. Output (SO)
Figure 62. Output Equivalent Circuit (SO)
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BR25H040xxx-5AC Series
Caution on Power-up Conditions
At power-up, as the VCC rises, the IC’s internal circuits may go through unstable low voltage area, making the IC’s internal
circuit not completely reset, hence, malfunction like miswriting and misread may occur. To prevent it, this IC is equipped with
Power-on Reset circuit. In order to ensure its operation, at power-up, please observe the conditions below. In addition, set
the power supply rise so that the supply voltage constantly increases from VBOT to VCC level. Furthermore, tINIT is the time
from the power become stable to the start of the first command input.
tR: VCC tINIT
VCC
tPOFF
Command
start
VCC (Min)
VBOT
0 V
Figure 63. Rise Waveform Diagram
Power-Up Conditions
Parameter
Supply Voltage at Power OFF
Power OFF Time(Note 22)
Initialize Time(Note 22)
Symbol
VBOT
Min
-
Typ
Max
0.3
-
Unit
V
-
-
-
-
tPOFF
1
ms
ms
ms
tINIT
0.1
0.001
-
Supply Voltage Rising Time (Note 22)
tR: VCC
100
(Note 22) Not 100 % Tested.
At power ON/OFF, set CSB = High (= Vcc).
When CSB is Low, this IC gets in input accept status (active). If power is turned on in this status, noises and the likes may
cause malfunction, mistake write or so. To prevent these, at power ON, set CSB = High. (When CSB is in High status, all
inputs are canceled.)
Vcc
VCC
GND
Vcc
CSB
GND
Good
Bad
Example
Example
Figure 64. CSB Timing at power ON/OFF
(Good example) the CSB Pin is pulled up to Vcc.
At power OFF, take 1 ms or higher before supply. If power is turned on without observing this condition, the IC internal
circuit may not be reset, which please note.
(Bad example) the CSB Pin is Low at power ON/OFF.
In this case, CSB always becomes Low (active status), and EEPROM may have malfunction, mistake write owing to
noises and the likes.
Even when CSB input is High-Z, the status becomes like this case, which please note.
Low Voltage Malfunction Prevention Function
LVCC circuit prevents data rewrite operation at low power, and prevents write error. At LVCC voltage (Typ = 1.2 V) or below,
data rewrite is prevented.
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BR25H040xxx-5AC Series
Noise Countermeasures
1. VCC Noise (bypass capacitor)
When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is
recommended to attach a bypass capacitor (0.1 μF) between IC VCC and GND. At that moment, attach it as close to IC
as possible. And, it is also recommended to attach a bypass capacitor between board VCC and GND.
2. SCK Noise
When the rise time (tRC) of SCK is long, and a certain degree or more of noise exists, malfunction may occur owing to
clock bit displacement. To avoid this, a Schmitt trigger circuit is built in SCK input. The hysteresis width of this circuit is set
about 0.2 V, if noises exist at SCK input, set the noise amplitude 0.2 Vp-p or below. And it is recommended to set the rise
time (tRC) of SCK 100 ns or below. In the case when the rise time is 100 ns or higher, take sufficient noise
countermeasures. Make the clock rise, fall time as small as possible.
3. WPB Noise
During execution of Write Status Register command, if there exist noises on the WPB pin, mistake in recognition may
occur and forcible cancellation may result, which please note. To avoid this, a Schmitt trigger circuit is built in WPB input.
In the same manner, a Schmitt trigger circuit is built in CSB input, SI input and HOLDB input too.
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BR25H040xxx-5AC Series
Operational Notes
1. Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
pins.
2. Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at all
power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3. Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4. Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations on
the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5. Operating Conditions
The function and operation of the IC are guaranteed within the range specified by the operating conditions. The
characteristic values are guaranteed only under the conditions of each item specified by the electrical characteristics.
6. Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.
Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing
of connections.
7. Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always
be turned off completely before connecting or removing it from the test setup during the inspection process. To prevent
damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage.
8. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin. Inter-
pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
9. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge
acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power
supply or ground line.
10. Regarding the Input Pin of the IC
In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The operation
of these parasitic elements can result in mutual interference among circuits, operational faults, or physical damage.
Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an input pin lower
than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when no power supply
voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins have voltages
within the values specified in the electrical characteristics of this IC.
11. Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with temperature
and the decrease in nominal capacitance due to DC bias and others.
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TSZ02201-0G1G0G100660-1-2
© 2020 ROHM Co., Ltd. All rights reserved.
32/41
TSZ22111 • 15• 001
12.Jan.2022 Rev.002
BR25H040xxx-5AC Series
Operational Notes - continued
12. Functional Safety
“ISO 26262 Process Compliant to Support ASIL-*”
A product that has been developed based on an ISO 26262 design process compliant to the ASIL level described in the
datasheet.
“Safety Mechanism is Implemented to Support Functional Safety (ASIL-*)”
A product that has implemented safety mechanism to meet ASIL level requirements described in the datasheet.
“Functional Safety Supportive Automotive Products”
A product that has been developed for automotive use and is capable of supporting safety analysis with regard to the
functional safety.
Note: “ASIL-*” is stands for the ratings of “ASIL-A”, “-B”, “-C” or “-D” specified by each product's datasheet.
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TSZ02201-0G1G0G100660-1-2
© 2020 ROHM Co., Ltd. All rights reserved.
33/41
TSZ22111 • 15• 001
12.Jan.2022 Rev.002
BR25H040xxx-5AC Series
Ordering Information
B
R
2
5
H
0
4
x
x
x
x
-
5
A
C
x
x
BUS Type
25: SPI
Ambient Operating Temperature
/ Supply Voltage
-40 °C to +125 °C
/ 1.7 V to 5.5 V
Capacity
040 = 4 Kbit
04A = 4 Kbit
VSON08AX2030 adds A to the description
Package
F: SOP8
FJ: SOP-J8
FVT: TSSOP-B8
FVM: MSOP8
NUX: VSON08AX2030
5: Process Code
A: Revision
Product Rank
C: for Automotive Application
Packaging and Forming Specification
E2: Embossed tape and reel (SOP8, SOP-J8, TSSOP-B8)
TR: Embossed tape and reel (MSOP8, VSON08AX2030)
Lineup
Package
Orderable Part Number
Type
Quantity
Reel of 2500
Reel of 2500
Reel of 3000
Reel of 3000
Reel of 4000
BR25H040F
-5ACE2
-5ACE2
-5ACE2
-5ACTR
-5ACTR
SOP8
SOP-J8
BR25H040FJ
BR25H040FVT
BR25H040FVM
BR25H04ANUX
TSSOP-B8
MSOP8
VSON08AX2030
www.rohm.com
© 2020 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15• 001
TSZ02201-0G1G0G100660-1-2
12.Jan.2022 Rev.002
34/41
BR25H040xxx-5AC Series
Marking Diagrams
SOP8 (TOP VIEW)
MSOP8 (TOP VIEW)
Part Number Marking
LOT Number
Part Number Marking
5
H
C
5
5 H 0 4 A
5
A
LOT Number
Pin 1 Mark
Pin 1 Mark
VSON08AX2030 (TOP VIEW)
SOP-J8 (TOP VIEW)
Part Number Marking
LOT Number
Part Number Marking
5 H C
A A 5
5 H 0 4 A
5
LOT Number
Pin 1 Mark
Pin 1 Mark
TSSOP-B8 (TOP VIEW)
Part Number Marking
LOT Number
Pin 1 Mark
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© 2020 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15• 001
TSZ02201-0G1G0G100660-1-2
12.Jan.2022 Rev.002
35/41
BR25H040xxx-5AC Series
Physical Dimension and Packing Information
Package Name
SOP8
(Max 5.35 (include.BURR))
(UNIT: mm)
PKG: SOP8
Drawing No.: EX112-5001-1
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© 2020 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15• 001
TSZ02201-0G1G0G100660-1-2
12.Jan.2022 Rev.002
36/41
BR25H040xxx-5AC Series
Physical Dimension and Packing Information - continued
Package Name
SOP-J8
www.rohm.com
TSZ02201-0G1G0G100660-1-2
12.Jan.2022 Rev.002
© 2020 ROHM Co., Ltd. All rights reserved.
37/41
TSZ22111 • 15• 001
BR25H040xxx-5AC Series
Physical Dimension and Packing Information - continued
Package Name
TSSOP-B8
www.rohm.com
TSZ02201-0G1G0G100660-1-2
12.Jan.2022 Rev.002
© 2020 ROHM Co., Ltd. All rights reserved.
38/41
TSZ22111 • 15• 001
BR25H040xxx-5AC Series
Physical Dimension and Packing Information - continued
Package Name
MSOP8
www.rohm.com
TSZ02201-0G1G0G100660-1-2
12.Jan.2022 Rev.002
© 2020 ROHM Co., Ltd. All rights reserved.
39/41
TSZ22111 • 15• 001
BR25H040xxx-5AC Series
Physical Dimension and Packing Information - continued
Package Name
VSON08AX2030
www.rohm.com
TSZ02201-0G1G0G100660-1-2
12.Jan.2022 Rev.002
© 2020 ROHM Co., Ltd. All rights reserved.
40/41
TSZ22111 • 15• 001
BR25H040xxx-5AC Series
Revision History
Date
Revision
001
Changes
12.Jan.2022
New Release
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© 2020 ROHM Co., Ltd. All rights reserved.
TSZ22111 • 15• 001
TSZ02201-0G1G0G100660-1-2
12.Jan.2022 Rev.002
41/41
Notice
Precaution on using ROHM Products
(Note 1)
1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment
,
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅣ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅢ
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.
However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble
cleaning agents for cleaning residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
Rev.004
© 2015 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PAA-E
Rev.004
© 2015 ROHM Co., Ltd. All rights reserved.
Daattaasshheeeett
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3. The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
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